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authorPeter Maydell <peter.maydell@linaro.org>2015-03-24 09:52:19 +0000
committerPeter Maydell <peter.maydell@linaro.org>2015-03-24 09:52:19 +0000
commit549c4e49788bbb16bdac3fb5480a2177019899e2 (patch)
tree7bdda3681d43ea7d3b5c832c1d15c5b38eb61307
parent362ca922eea03240916287a8a6267801ab095d12 (diff)
parentf69c24e4584f2161f90ee7caba38728aa77f937f (diff)
Merge remote-tracking branch 'remotes/bkoppelmann/tags/pull-tricore-20150324' into staging
TriCore bugfixes for 2.3-rc1 # gpg: Signature made Tue Mar 24 08:48:33 2015 GMT using RSA key ID 6B69CA14 # gpg: Good signature from "Bastian Koppelmann <kbastian@mail.uni-paderborn.de>" * remotes/bkoppelmann/tags/pull-tricore-20150324: target-tricore: properly fix dvinit_b/h_13 target-tricore: fix RRPW_DEXTR using wrong reg target-tricore: fix DVINIT_HU/BU calculating overflow before result target-tricore: Fix two helper functions (clang warnings) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target-tricore/op_helper.c44
-rw-r--r--target-tricore/translate.c34
2 files changed, 32 insertions, 46 deletions
diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c
index 97b0c8b8d3..220ec4a3c1 100644
--- a/target-tricore/op_helper.c
+++ b/target-tricore/op_helper.c
@@ -1942,29 +1942,19 @@ uint64_t helper_unpack(target_ulong arg1)
uint64_t helper_dvinit_b_13(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
{
uint64_t ret;
- int32_t abs_sig_dividend, abs_base_dividend, abs_divisor;
- int32_t quotient_sign;
+ int32_t abs_sig_dividend, abs_divisor;
ret = sextract32(r1, 0, 32);
ret = ret << 24;
- quotient_sign = 0;
if (!((r1 & 0x80000000) == (r2 & 0x80000000))) {
ret |= 0xffffff;
- quotient_sign = 1;
}
- abs_sig_dividend = abs(r1) >> 7;
- abs_base_dividend = abs(r1) & 0x7f;
- abs_divisor = abs(r1);
- /* calc overflow */
- env->PSW_USB_V = 0;
- if ((quotient_sign) && (abs_divisor)) {
- env->PSW_USB_V = (((abs_sig_dividend == abs_divisor) &&
- (abs_base_dividend >= abs_divisor)) ||
- (abs_sig_dividend > abs_divisor));
- } else {
- env->PSW_USB_V = (abs_sig_dividend >= abs_divisor);
- }
+ abs_sig_dividend = abs((int32_t)r1) >> 8;
+ abs_divisor = abs((int32_t)r2);
+ /* calc overflow
+ ofv if (a/b >= 255) <=> (a/255 >= b) */
+ env->PSW_USB_V = (abs_sig_dividend >= abs_divisor) << 31;
env->PSW_USB_V = env->PSW_USB_V << 31;
env->PSW_USB_SV |= env->PSW_USB_V;
env->PSW_USB_AV = 0;
@@ -1992,29 +1982,19 @@ uint64_t helper_dvinit_b_131(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
uint64_t helper_dvinit_h_13(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
{
uint64_t ret;
- int32_t abs_sig_dividend, abs_base_dividend, abs_divisor;
- int32_t quotient_sign;
+ int32_t abs_sig_dividend, abs_divisor;
ret = sextract32(r1, 0, 32);
ret = ret << 16;
- quotient_sign = 0;
if (!((r1 & 0x80000000) == (r2 & 0x80000000))) {
ret |= 0xffff;
- quotient_sign = 1;
}
- abs_sig_dividend = abs(r1) >> 7;
- abs_base_dividend = abs(r1) & 0x7f;
- abs_divisor = abs(r1);
- /* calc overflow */
- env->PSW_USB_V = 0;
- if ((quotient_sign) && (abs_divisor)) {
- env->PSW_USB_V = (((abs_sig_dividend == abs_divisor) &&
- (abs_base_dividend >= abs_divisor)) ||
- (abs_sig_dividend > abs_divisor));
- } else {
- env->PSW_USB_V = (abs_sig_dividend >= abs_divisor);
- }
+ abs_sig_dividend = abs((int32_t)r1) >> 16;
+ abs_divisor = abs((int32_t)r2);
+ /* calc overflow
+ ofv if (a/b >= 0xffff) <=> (a/0xffff >= b) */
+ env->PSW_USB_V = (abs_sig_dividend >= abs_divisor) << 31;
env->PSW_USB_V = env->PSW_USB_V << 31;
env->PSW_USB_SV |= env->PSW_USB_V;
env->PSW_USB_AV = 0;
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 0b7cf06f94..bbcfee9754 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -6240,7 +6240,7 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx)
uint32_t op2;
int r1, r2, r3;
- TCGv temp, temp2;
+ TCGv temp, temp2, temp3;
op2 = MASK_OP_RR_OP2(ctx->opcode);
r3 = MASK_OP_RR_D(ctx->opcode);
@@ -6261,14 +6261,17 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx)
case OPC2_32_RR_DVINIT_BU:
temp = tcg_temp_new();
temp2 = tcg_temp_new();
+ temp3 = tcg_temp_new();
+
+ tcg_gen_shri_tl(temp3, cpu_gpr_d[r1], 8);
/* reset av */
tcg_gen_movi_tl(cpu_PSW_AV, 0);
if (!tricore_feature(env, TRICORE_FEATURE_131)) {
/* overflow = (abs(D[r3+1]) >= abs(D[r2])) */
- tcg_gen_neg_tl(temp, cpu_gpr_d[r3+1]);
+ tcg_gen_neg_tl(temp, temp3);
/* use cpu_PSW_AV to compare against 0 */
- tcg_gen_movcond_tl(TCG_COND_LT, temp, cpu_gpr_d[r3+1], cpu_PSW_AV,
- temp, cpu_gpr_d[r3+1]);
+ tcg_gen_movcond_tl(TCG_COND_LT, temp, temp3, cpu_PSW_AV,
+ temp, temp3);
tcg_gen_neg_tl(temp2, cpu_gpr_d[r2]);
tcg_gen_movcond_tl(TCG_COND_LT, temp2, cpu_gpr_d[r2], cpu_PSW_AV,
temp2, cpu_gpr_d[r2]);
@@ -6281,12 +6284,12 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx)
/* sv */
tcg_gen_or_tl(cpu_PSW_SV, cpu_PSW_SV, cpu_PSW_V);
/* write result */
- tcg_gen_shri_tl(temp, cpu_gpr_d[r1], 8);
tcg_gen_shli_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], 24);
- tcg_gen_mov_tl(cpu_gpr_d[r3+1], temp);
+ tcg_gen_mov_tl(cpu_gpr_d[r3+1], temp3);
tcg_temp_free(temp);
tcg_temp_free(temp2);
+ tcg_temp_free(temp3);
break;
case OPC2_32_RR_DVINIT_H:
gen_dvinit_h(env, cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r1],
@@ -6295,14 +6298,17 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx)
case OPC2_32_RR_DVINIT_HU:
temp = tcg_temp_new();
temp2 = tcg_temp_new();
+ temp3 = tcg_temp_new();
+
+ tcg_gen_shri_tl(temp3, cpu_gpr_d[r1], 16);
/* reset av */
tcg_gen_movi_tl(cpu_PSW_AV, 0);
if (!tricore_feature(env, TRICORE_FEATURE_131)) {
/* overflow = (abs(D[r3+1]) >= abs(D[r2])) */
- tcg_gen_neg_tl(temp, cpu_gpr_d[r3+1]);
+ tcg_gen_neg_tl(temp, temp3);
/* use cpu_PSW_AV to compare against 0 */
- tcg_gen_movcond_tl(TCG_COND_LT, temp, cpu_gpr_d[r3+1], cpu_PSW_AV,
- temp, cpu_gpr_d[r3+1]);
+ tcg_gen_movcond_tl(TCG_COND_LT, temp, temp3, cpu_PSW_AV,
+ temp, temp3);
tcg_gen_neg_tl(temp2, cpu_gpr_d[r2]);
tcg_gen_movcond_tl(TCG_COND_LT, temp2, cpu_gpr_d[r2], cpu_PSW_AV,
temp2, cpu_gpr_d[r2]);
@@ -6315,11 +6321,11 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx)
/* sv */
tcg_gen_or_tl(cpu_PSW_SV, cpu_PSW_SV, cpu_PSW_V);
/* write result */
- tcg_gen_mov_tl(temp, cpu_gpr_d[r1]);
- tcg_gen_shri_tl(cpu_gpr_d[r3+1], temp, 16);
- tcg_gen_shli_tl(cpu_gpr_d[r3], temp, 16);
+ tcg_gen_mov_tl(cpu_gpr_d[r3+1], temp3);
+ tcg_gen_shli_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], 16);
tcg_temp_free(temp);
tcg_temp_free(temp2);
+ tcg_temp_free(temp3);
break;
case OPC2_32_RR_DVINIT:
temp = tcg_temp_new();
@@ -8038,8 +8044,8 @@ static void decode_32Bit_opc(CPUTriCoreState *env, DisasContext *ctx)
tcg_gen_rotli_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], const16);
} else {
temp = tcg_temp_new();
- tcg_gen_shli_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], const16);
- tcg_gen_shri_tl(temp, cpu_gpr_d[r1], 32 - const16);
+ tcg_gen_shli_tl(temp, cpu_gpr_d[r1], const16);
+ tcg_gen_shri_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], 32 - const16);
tcg_gen_or_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], temp);
tcg_temp_free(temp);
}