summaryrefslogtreecommitdiff
path: root/src/gallium/drivers
AgeCommit message (Expand)AuthorFilesLines
2016-06-29gallium/radeon: assume X11 DRI3 can use at most 5 back buffersMarek Olšák1-1/+5
2016-06-29gallium/radeon: separate DCC starts as disabled (ps_draw_ratio = 0)Marek Olšák1-9/+10
2016-06-29gallium/radeon: R600_DEBUG=nodccfb disables separate DCCMarek Olšák3-1/+4
2016-06-29gallium/radeon: add and use r600_texture_referenceMarek Olšák5-10/+13
2016-06-29gallium/radeon: add a HUD query for PS draw ratio stats from separate DCCMarek Olšák4-0/+8
2016-06-29gallium/radeon: add a heuristic enabling DCC for scanout surfaces (v2)Marek Olšák6-4/+338
2016-06-29gallium/radeon: add state setup for a separate DCC bufferMarek Olšák4-5/+41
2016-06-29radeonsi: always calculate DCC info even if it's not used immediatelyMarek Olšák1-1/+2
2016-06-29radeonsi: unreference framebuffer state with set_framebuffer_stateMarek Olšák3-4/+6
2016-06-29gallium/radeon: add flag R600_QUERY_HW_FLAG_BEGIN_RESUMESMarek Olšák2-1/+4
2016-06-29radeonsi: don't advertise multisample shader imagesMarek Olšák1-0/+3
2016-06-29radeonsi: enable distributed tess on multi-SE parts onlyMarek Olšák4-2/+7
2016-06-29radeonsi: set optimal VGT_HS_OFFCHIP_PARAMMarek Olšák5-14/+49
2016-06-29radeonsi: enable CU0 in each SE for LS-HS executionMarek Olšák1-2/+1
2016-06-29radeonsi: use conformant line rasterizationMarek Olšák4-5/+29
2016-06-28svga: force direct map for transfering multiple slicesCharmaine Lee1-15/+24
2016-06-28svga: whitespace, line wrapping fixes in svga_surface.cBrian Paul1-11/+16
2016-06-28gm107/ir: make sure that flagsDef is set when emitting setcondSamuel Pitoiset1-1/+1
2016-06-28radeonsi: set PA_SU_SMALL_PRIM_FILTER_CNTL register on PolarisMarek Olšák2-0/+11
2016-06-28radeon/vce: use vce structure for vce 52 firmwareBoyuan Zhang5-98/+517
2016-06-28radeon/vce: add vce structuresBoyuan Zhang1-0/+297
2016-06-28gm107/ir: add missing setcond flags for LOP variantsSamuel Pitoiset1-0/+2
2016-06-28gm107/ir: make use of LOP32I for all immediatesSamuel Pitoiset1-1/+1
2016-06-28virgl: reduce some limits for nowDave Airlie1-3/+4
2016-06-27radeonsi: use optimal WD settings for primitive restart on PolarisMarek Olšák1-2/+10
2016-06-27gm107/ir: make use of MOV32I for all immediatesSamuel Pitoiset1-2/+1
2016-06-26nvc0: update "derived" state function namesIlia Mirkin1-8/+8
2016-06-26nvc0: provide support for unscaled poly offset unitsIlia Mirkin3-3/+26
2016-06-26gm107/ir: make use of IMUL32I for all immediatesSamuel Pitoiset1-1/+1
2016-06-25radeonsi: make si_is_format_supported staticMarek Olšák3-11/+6
2016-06-25radeonsi: boolean -> bool, TRUE -> true, FALSE -> falseMarek Olšák4-15/+15
2016-06-25gallium/radeon: boolean -> bool, TRUE -> true, FALSE -> falseMarek Olšák9-75/+75
2016-06-25gallium/radeon/winsyses: boolean -> bool, TRUE -> true, FALSE -> falseMarek Olšák1-21/+22
2016-06-25gallium/radeon: use r600_resource_referenceMarek Olšák12-40/+32
2016-06-25r600g: Implement POLYGON_OFFSET_UNITS_UNSCALEDAxel Davy5-36/+46
2016-06-25radeonsi: Implement POLYGON_OFFSET_UNITS_UNSCALEDAxel Davy2-15/+19
2016-06-25radeon: Remove useless pa_su_poly_offset_db_fmt_cntlAxel Davy1-1/+0
2016-06-25r600g: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset states for evergreenAxel Davy1-25/+13
2016-06-25r600g: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset states for r600Axel Davy1-24/+13
2016-06-25radeonsi: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset statesAxel Davy1-23/+8
2016-06-25gallium: Add a cap for offset_units_unscaledAxel Davy15-0/+15
2016-06-24radeonsi: fix fractional odd tessellation spacing for PolarisMarek Olšák4-1/+23
2016-06-24radeonsi: set some VGT context registers on SI-CIMarek Olšák1-0/+3
2016-06-24radeonsi: optimize rendering to linear color buffersMarek Olšák2-1/+12
2016-06-24radeonsi: set almost optimal settings in SC_MODE_CNTL_1Marek Olšák1-1/+10
2016-06-24gallium/radeon: let drivers specify SC_MODE_CNTL_1 fieldsMarek Olšák4-10/+18
2016-06-24gallium/radeon: disable complicated point clipping against user clip planesMarek Olšák3-3/+0
2016-06-24radeonsi: fix a compute shader hang with big threadgroups on SI & CIMarek Olšák1-0/+18
2016-06-24nvc0: when mapping directly, provide accurate xfer info + startIlia Mirkin1-5/+12
2016-06-24radeonsi: drop the DRAW_PREAMBLE packet on PolarisNicolai Hähnle2-1/+28
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-21 01:17:28 +0000