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AgeCommit message (Expand)AuthorFilesLines
2015-08-14radeonsi: add all new VI PCI IDs including FijiMarek Olšák1-0/+24
2015-08-10radeonsi: add new OLAND pci idAlex Deucher1-0/+1
2015-06-24i965/bxt: Add basic Broxton infrastructureBen Widawsky1-0/+3
2015-05-12radeonsi: add new bonaire pci idAlex Deucher1-0/+1
2015-04-16i965: Add marketing names for CHVVille Syrjälä1-4/+4
2015-02-18i915: For the love of all that is holy, stop saying "IGD"Adam Jackson1-2/+2
2014-12-08i965/skl: Add Skylake PCI IDsKristian Høgsberg1-0/+15
2014-08-21radeonsi: add new SI pci idsAlex Deucher1-0/+4
2014-08-21radeonsi: add new CIK pci idsAlex Deucher1-0/+3
2014-06-26i965: Include marketing names for Broadwell GPUs.Kenneth Graunke1-18/+18
2014-05-02radeonsi: add Mullins pci ids.Samuel Li1-0/+17
2014-03-28i965: Add Cherryview support.Kenneth Graunke1-0/+4
2014-03-19loader: add special logic to distinguish nouveau from nouveau_vieuxIlia Mirkin1-81/+0
2014-02-20i965: Enable Broadwell support.Kenneth Graunke1-2/+0
2014-01-31i965: Add (disabled) Broadwell PCI IDs.Kenneth Graunke1-0/+20
2014-01-18pci_ids: no not include loader.hEmil Velikov1-1/+4
2014-01-18loader: introduce the loader util libEmil Velikov1-13/+11
2013-12-24r600g: fix SUMO2 pci idAlex Deucher1-1/+1
2013-11-15radeonsi: add Hawaii pci idsAlex Deucher1-0/+13
2013-10-13i965: Add the family name to the PCI ID table.Kenneth Graunke2-94/+94
2013-10-13i965: Remove #define name from PCI ID table.Kenneth Graunke2-94/+94
2013-09-06radeonsi: add berlin pci idsAlex Deucher1-0/+22
2013-06-28radeonsi: add kabini pci idsAlex Deucher1-0/+17
2013-06-28radeonsi: add bonaire pci idsAlex Deucher1-0/+9
2013-06-06intel: Use the CHIPSET macro in the PCI ID tables for the device name.Kenneth Graunke3-110/+110
2013-06-06intel: Remove 'misc' parameter from CHIPSET macro in PCI ID tables.Kenneth Graunke3-110/+110
2013-06-05i965: Adding more reserved PCI IDs for Haswell.Rodrigo Vivi1-0/+24
2013-05-14radeonsi: add Hainan pci idsAlex Deucher1-0/+7
2013-05-09i965: make GT3 machines work as GT3 instead of GT2Paulo Zanoni1-12/+12
2013-04-25radeonsi: add new SI pci idsAlex Deucher1-0/+3
2013-04-25r600g: add new richland pci idsAlex Deucher1-0/+2
2013-04-16i965: Enable the Bay Trail platform.Kenneth Graunke1-0/+5
2013-03-15r600g: add Richland APU pci idsAlex Deucher1-0/+11
2013-03-03i965: Fix Crystal Well PCI IDs.Kenneth Graunke1-9/+9
2013-02-04radeonsi: add Oland pci idsAlex Deucher1-0/+14
2012-11-21radeonsi: add a new SI pci idAlex Deucher1-0/+1
2012-10-16radeonsi: add some new SI pci idsAlex Deucher1-0/+3
2012-08-07i965: add more Haswell PCI IDsPaulo Zanoni1-1/+32
2012-08-06radeonsi: add some new pci idsAlex Deucher1-0/+3
2012-08-06r600g: add additional evergreen pci idsAlex Deucher1-0/+3
2012-06-05r600g: add new Trinity PCI idsAlex Deucher1-0/+17
2012-06-05r600g: add new Sumo, Palm, BTC pci idsAlex Deucher1-0/+5
2012-06-05radeonsi: add new SI pci idsAlex Deucher1-5/+6
2012-04-13radeonsi: initial WIP SI codeTom Stellard2-0/+47
2012-04-01intel: add PCI IDs for Ivy Bridge GT2 server variantEugeni Dodonov1-0/+1
2012-03-30intel: Add some PCI IDs for Haswell.Kenneth Graunke1-0/+5
2012-03-20r600g: add support for TN (trinity) APUsAlex Deucher1-0/+8
2011-12-12r600g: add some new pci idsAlex Deucher1-0/+10
2011-12-01r600g: add some new pci idsAlex Deucher1-0/+8
2011-11-14radeon: add some missing FireMV pci idsAlex Deucher2-0/+3
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