diff options
| -rw-r--r-- | docs/relnotes/17.1.0.html | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 7 | ||||
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h | 2 |
5 files changed, 14 insertions, 2 deletions
diff --git a/docs/relnotes/17.1.0.html b/docs/relnotes/17.1.0.html index a11a37ffb8..917ee94b57 100644 --- a/docs/relnotes/17.1.0.html +++ b/docs/relnotes/17.1.0.html @@ -49,6 +49,7 @@ Note: some of the new features are only available with certain drivers. <li>GL_ARB_shader_group_vote on radeonsi</li> <li>GL_ARB_transform_feedback2 on i965/gen6</li> <li>GL_ARB_transform_feedback_overflow_query on i965/gen6+</li> +<li>GL_NV_fill_rectangle on nvc0</li> <li>Geometry shaders enabled on swr</li> </ul> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h b/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h index 1be5952231..accde94f64 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h @@ -772,6 +772,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_3D_VTX_ATTR_MASK_UNK0DD0_ALT__ESIZE 0x00000004 #define NVC0_3D_VTX_ATTR_MASK_UNK0DD0_ALT__LEN 0x00000004 +#define NVC0_3D_FILL_RECTANGLE 0x0000113c +#define NVC0_3D_FILL_RECTANGLE_ENABLE 0x00000002 + #define NVC0_3D_UNK1140 0x00001140 #define NVC0_3D_UNK1144 0x00001144 diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index 9631c6fd0a..5bb963b005 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -256,6 +256,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0; case PIPE_CAP_TGSI_FS_FBFETCH: return class_3d >= NVE4_3D_CLASS; /* needs testing on fermi */ + case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE: + return class_3d >= GM200_3D_CLASS; /* unsupported caps */ case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: @@ -286,7 +288,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: case PIPE_CAP_INT64_DIVMOD: case PIPE_CAP_TGSI_CLOCK: - case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE: return 0; case PIPE_CAP_VENDOR_ID: diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c index 32233a51ff..c51c9a7778 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c @@ -211,6 +211,7 @@ nvc0_rasterizer_state_create(struct pipe_context *pipe, const struct pipe_rasterizer_state *cso) { struct nvc0_rasterizer_stateobj *so; + uint16_t class_3d = nouveau_screen(pipe->screen)->class_3d; uint32_t reg; so = CALLOC_STRUCT(nvc0_rasterizer_stateobj); @@ -261,6 +262,12 @@ nvc0_rasterizer_state_create(struct pipe_context *pipe, SB_IMMED_3D(so, POINT_SPRITE_ENABLE, cso->point_quad_rasterization); SB_IMMED_3D(so, POINT_SMOOTH_ENABLE, cso->point_smooth); + if (class_3d >= GM200_3D_CLASS) { + SB_IMMED_3D(so, FILL_RECTANGLE, + cso->fill_front == PIPE_POLYGON_MODE_FILL_RECTANGLE ? + NVC0_3D_FILL_RECTANGLE_ENABLE : 0); + } + SB_BEGIN_3D(so, MACRO_POLYGON_MODE_FRONT, 1); SB_DATA (so, nvgl_polygon_mode(cso->fill_front)); SB_BEGIN_3D(so, MACRO_POLYGON_MODE_BACK, 1); diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h b/src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h index 054b1e77d7..3006ed6195 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h @@ -23,7 +23,7 @@ struct nvc0_blend_stateobj { struct nvc0_rasterizer_stateobj { struct pipe_rasterizer_state pipe; int size; - uint32_t state[42]; + uint32_t state[43]; }; struct nvc0_zsa_stateobj { |