gallium/radeon: Multiply bpe by nsamples in surf_winsys_to_drm

For symmetry with surf_drm_to_winsys.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

1 files changed, 5 insertions, 2 deletions

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_surface.c b/src/gallium/winsys/radeon/drm/radeon_drm_surface.c
index 6836a1ba3a..8324d2891b 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_surface.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_surface.c
@@ -157,7 +157,9 @@ static void surf_winsys_to_drm(struct radeon_surface *surf_drm,
     surf_drm->tile_split = surf_ws->tile_split;
 
     for (i = 0; i <= surf_drm->last_level; i++) {
-        surf_level_winsys_to_drm(&surf_drm->level[i], &surf_ws->level[i], bpe);
+        surf_level_winsys_to_drm(&surf_drm->level[i], &surf_ws->level[i],
+                                 bpe * surf_drm->nsamples);
+
         surf_drm->tiling_index[i] = surf_ws->tiling_index[i];
     }
 
@@ -166,7 +168,8 @@ static void surf_winsys_to_drm(struct radeon_surface *surf_drm,
 
         for (i = 0; i <= surf_drm->last_level; i++) {
             surf_level_winsys_to_drm(&surf_drm->stencil_level[i],
-                                     &surf_ws->stencil_level[i], bpe);
+                                     &surf_ws->stencil_level[i],
+                                     surf_drm->nsamples);
             surf_drm->stencil_tiling_index[i] = surf_ws->stencil_tiling_index[i];
         }
     }