blob: df60e3004aa5f785c5ab8971441faa2159b30949 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
|
/*
* arch/arm/mach-spear3xx/include/mach/spear.h
*
* SPEAr3xx Machine family specific definition
*
* Copyright (C) 2009 ST Microelectronics
* Viresh Kumar<viresh.kumar@st.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __MACH_SPEAR3XX_H
#define __MACH_SPEAR3XX_H
#include <mach/spear300.h>
#include <mach/spear310.h>
#include <mach/spear320.h>
#define SPEAR3XX_ML_SDRAM_BASE 0x00000000
#define SPEAR3XX_ICM9_BASE 0xC0000000
/* ICM1 - Low speed connection */
#define SPEAR3XX_ICM1_2_BASE 0xD0000000
#define SPEAR3XX_ICM1_UART_BASE 0xD0000000
#define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE)
#define SPEAR3XX_ICM1_ADC_BASE 0xD0080000
#define SPEAR3XX_ICM1_SSP_BASE 0xD0100000
#define SPEAR3XX_ICM1_I2C_BASE 0xD0180000
#define SPEAR3XX_ICM1_JPEG_BASE 0xD0800000
#define SPEAR3XX_ICM1_IRDA_BASE 0xD1000000
#define SPEAR3XX_ICM1_SRAM_BASE 0xD2800000
/* ICM2 - Application Subsystem */
#define SPEAR3XX_ICM2_HWACCEL0_BASE 0xD8800000
#define SPEAR3XX_ICM2_HWACCEL1_BASE 0xD9000000
/* ICM4 - High Speed Connection */
#define SPEAR3XX_ICM4_BASE 0xE0000000
#define SPEAR3XX_ICM4_MII_BASE 0xE0800000
#define SPEAR3XX_ICM4_USBD_FIFO_BASE 0xE1000000
#define SPEAR3XX_ICM4_USBD_CSR_BASE 0xE1100000
#define SPEAR3XX_ICM4_USBD_PLDT_BASE 0xE1200000
#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE 0xE1800000
#define SPEAR3XX_ICM4_USB_OHCI0_BASE 0xE1900000
#define SPEAR3XX_ICM4_USB_OHCI1_BASE 0xE2100000
#define SPEAR3XX_ICM4_USB_ARB_BASE 0xE2800000
/* ML1 - Multi Layer CPU Subsystem */
#define SPEAR3XX_ICM3_ML1_2_BASE 0xF0000000
#define SPEAR3XX_ML1_TMR_BASE 0xF0000000
#define SPEAR3XX_ML1_VIC_BASE 0xF1100000
#define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE)
/* ICM3 - Basic Subsystem */
#define SPEAR3XX_ICM3_SMEM_BASE 0xF8000000
#define SPEAR3XX_ICM3_SMI_CTRL_BASE 0xFC000000
#define SPEAR3XX_ICM3_DMA_BASE 0xFC400000
#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE 0xFC600000
#define SPEAR3XX_ICM3_TMR0_BASE 0xFC800000
#define SPEAR3XX_ICM3_WDT_BASE 0xFC880000
#define SPEAR3XX_ICM3_RTC_BASE 0xFC900000
#define SPEAR3XX_ICM3_GPIO_BASE 0xFC980000
#define SPEAR3XX_ICM3_SYS_CTRL_BASE 0xFCA00000
#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE)
#define SPEAR3XX_ICM3_MISC_REG_BASE 0xFCA80000
#define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE)
#define SPEAR3XX_ICM3_TMR1_BASE 0xFCB00000
/* Debug uart for linux, will be used for debug and uncompress messages */
#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE
#define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE
/* Sysctl base for spear platform */
#define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE
#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
#endif /* __MACH_SPEAR3XX_H */
|