Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2012-11-09 | ARM: mm: introduce present, faulting entries for PAGE_NONE | Will Deacon | 1 | -0/+4 |
2012-11-09 | ARM: mm: introduce L_PTE_VALID for page table entries | Will Deacon | 1 | -1/+1 |
2012-11-09 | ARM: mm: don't use the access flag permissions mechanism for classic MMU | Will Deacon | 1 | -2/+2 |
2012-07-09 | ARM: 7445/1: mm: update CONTEXTIDR register to contain PID of current process | Will Deacon | 1 | -0/+5 |
2012-04-17 | ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on ASID-capable CPUs | Catalin Marinas | 1 | -3/+0 |
2012-04-17 | ARM: Use TTBR1 instead of reserved context ID | Will Deacon | 1 | -6/+4 |
2011-12-08 | ARM: LPAE: Factor out classic-MMU specific code into proc-v7-2level.S | Catalin Marinas | 1 | -0/+171 |