diff options
| author | Clemens Ladisch <clemens@ladisch.de> | 2010-03-17 11:07:55 +0100 |
|---|---|---|
| committer | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2010-03-17 23:24:42 +0100 |
| commit | 8301b91ba0b2d15c86fdf5357efe7c04eb767a6e (patch) | |
| tree | 618f6ef4d1b4a35bba74af004a0aabdde4f315e2 /net/packet | |
| parent | cf36df6bfb49fd265a39f676bfc9718029fef160 (diff) | |
firewire: ohci: add cycle timer quirk for the TI TSB12LV22
Among the many entries in the TSB12LV22 errata list (TI literature
number SLLS312) is the following:
PCI Slave reads of the Cycle Timer register may occasionally get an
incorrect value.
Software may be able to validate value by reading the register
multiple times rapidly and evaluating for a reasonable difference.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de> (untested)
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de> (added #define)
Diffstat (limited to 'net/packet')
0 files changed, 0 insertions, 0 deletions