diff options
| author | Viller Hsiao <villerhsiao@gmail.com> | 2014-02-22 15:46:49 +0800 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-17 15:42:07 +0100 |
| commit | a4671094227d11985c06ee1178d7205c5fd39f8a (patch) | |
| tree | 78e1b59f3b9803c1ac6e3ef702fdc2f3da06c969 /arch/mips/ar7/prom.c | |
| parent | 86ca57b5a5525dbf89fc2a3285781fae807276b0 (diff) | |
MIPS: ftrace: Fix icache flush range error
In 32-bit mode, the start address passed to flush_icache_range is
shifted by 4 bytes before the second safe_store_code() call.
This causes system crash from time to time because the first 4 bytes
might not be flushed properly. This bug exists since linux-3.8.
Also remove obsoleted comment while at it.
Signed-off-by: Viller Hsiao <villerhsiao@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: rostedt@goodmis.org
Cc: fweisbec@gmail.com
Cc: mingo@redhat.com
Cc: Qais.Yousef@imgtec.com
Patchwork: https://patchwork.linux-mips.org/patch/6586/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ar7/prom.c')
0 files changed, 0 insertions, 0 deletions