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authorNeil Roberts <nroberts@igalia.com>2018-05-18 13:39:13 +0200
committerDylan Baker <dylan@pnwbakers.com>2018-07-05 10:00:13 -0700
commit7333112ed0fa5bcd83dfa0d3875255031d72e277 (patch)
treee9c95a0667af06790043ba20de4f2f7ba31f0145 /src/compiler/glsl/serialize.cpp
parent83716106b9f37b13277e513d8285de9b2440e779 (diff)
i965: Fix output register sizes when variable ranges are interleaved18.1-proposed
In 6f5abf31466aed this code was fixed to calculate the maximum size of an attribute in a seperate pass and then allocate the registers to that size. However this wasn’t taking into account ranges that overlap but don’t have the same starting location. For example: layout(location = 0, component = 0) out float a[4]; layout(location = 2, component = 1) out float b[4]; Previously, if ‘a’ was processed first then it would allocate a register of size 4 for location 0 and it wouldn’t allocate another register for location 2 because it would already be covered by the range of 0. Then if something tries to write to b[2] it would try to write past the end of the register allocated for ‘a’ and it would hit an assert. This patch changes it to scan for any overlapping ranges that start within each range to calculate the maximum extent and allocate that instead. Fixed Piglit’s arb_enhanced_layouts/execution/component-layout/ vs-fs-array-interleave-range.shader_test Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Fixes: 6f5abf31466 "i965: Fix output register sizes when multiple variables share a slot." (cherry picked from commit 2d5ddbe960f7c62a8f00d5e800925865f115970f)
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