diff options
| author | Ben Widawsky <benjamin.widawsky@intel.com> | 2015-01-15 16:13:21 -0800 |
|---|---|---|
| committer | Ben Widawsky <benjamin.widawsky@intel.com> | 2015-01-19 11:39:44 -0800 |
| commit | 06c5f93f50e0482a4a3661d1d20ff17bc93991d2 (patch) | |
| tree | 51d8cdf212d58179afd00830dd467bd16bce6821 | |
| parent | 3b702819f3cb8cbdf93a4e1fc5e4123331c5447b (diff) | |
Use the same mocs setting for surfacesbraswell-mocs-experiment
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index f02a0b8eb7..0671168aba 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -2426,7 +2426,7 @@ enum brw_wm_barycentric_interp_mode { */ #define BDW_MOCS_WB 0x78 #define BDW_MOCS_WT 0x58 -#define BDW_MOCS_PTE 0x18 +#define BDW_MOCS_PTE 0x78 /* Skylake: MOCS is now an index into an array of 64 different configurable * cache settings. We still use only either write-back or write-through; and |