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| author | Ben Widawsky <benjamin.widawsky@intel.com> | 2015-06-09 19:37:58 -0700 |
|---|---|---|
| committer | Ben Widawsky <benjamin.widawsky@intel.com> | 2015-06-09 19:37:58 -0700 |
| commit | f614489b0c623b82d8cd9fca91a7f2e5baa90d51 (patch) | |
| tree | f3cca4397005e5938fcbdb788c4a593cc0eafbbf | |
| parent | 8d76d78b2d4141d4d0403129a2298c6e99a509de (diff) | |
Revert "i965/gen9: Wa4x4STCOptimizationDisable (hack?)"4x4stc
This reverts commit 8d76d78b2d4141d4d0403129a2298c6e99a509de.
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_misc_state.c | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_reg.h | 1 |
2 files changed, 1 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_misc_state.c b/src/mesa/drivers/dri/i965/gen8_misc_state.c index 30b1c89b5c..b20038eaac 100644 --- a/src/mesa/drivers/dri/i965/gen8_misc_state.c +++ b/src/mesa/drivers/dri/i965/gen8_misc_state.c @@ -32,7 +32,7 @@ void gen8_upload_state_base_address(struct brw_context *brw) { uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB; - int pkt_len = brw->gen >= 9 ? (19 + 3): 16; + int pkt_len = brw->gen >= 9 ? 19 : 16; BEGIN_BATCH(pkt_len); OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (pkt_len - 2)); @@ -66,12 +66,6 @@ void gen8_upload_state_base_address(struct brw_context *brw) OUT_BATCH(1); OUT_BATCH(0); OUT_BATCH(0); - - /* XXX: Should we put this in the kernel? */ - OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); - OUT_BATCH(GEN7_CACHE_MODE_1); - OUT_BATCH(GEN8_4x4_RCPFE_STC_OPT_DISABLE | - GEN8_4x4_RCPFE_STC_OPT_DISABLE << 16); } ADVANCE_BATCH(); diff --git a/src/mesa/drivers/dri/i965/intel_reg.h b/src/mesa/drivers/dri/i965/intel_reg.h index 8e3e1e3c0e..bd14e189da 100644 --- a/src/mesa/drivers/dri/i965/intel_reg.h +++ b/src/mesa/drivers/dri/i965/intel_reg.h @@ -159,7 +159,6 @@ #define GEN7_CACHE_MODE_1 0x7004 # define GEN8_HIZ_NP_PMA_FIX_ENABLE (1 << 11) # define GEN8_HIZ_NP_EARLY_Z_FAILS_DISABLE (1 << 13) -# define GEN8_4x4_RCPFE_STC_OPT_DISABLE (1 << 6) # define GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC (1 << 1) # define GEN8_HIZ_PMA_MASK_BITS \ ((GEN8_HIZ_NP_PMA_FIX_ENABLE | GEN8_HIZ_NP_EARLY_Z_FAILS_DISABLE) << 16) |