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authorXiang, Haihao <haihao.xiang@intel.com>2011-03-11 11:10:48 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2011-03-11 11:12:43 +0800
commitc91f72c806577f8437ef5d02e21bd5443a2c9c32 (patch)
tree9806568b8915d98eb3f0084ff490e4a3ea846a69 /i965_drv_video
parent79172c79049d4d3c5927d32e8a3399d3d62996b7 (diff)
i965_drv_video: only use tiled surface for NV12 on SandyBridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Diffstat (limited to 'i965_drv_video')
-rw-r--r--i965_drv_video/i965_drv_video.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/i965_drv_video/i965_drv_video.c b/i965_drv_video/i965_drv_video.c
index 2fc2378..6e00239 100644
--- a/i965_drv_video/i965_drv_video.c
+++ b/i965_drv_video/i965_drv_video.c
@@ -59,7 +59,8 @@
#define HAS_VC1(ctx) (IS_GEN6((ctx)->intel.device_id) && (ctx)->intel.has_bsd)
-#define HAS_TILED_SURFACE(ctx) (IS_GEN6((ctx)->intel.device_id))
+#define HAS_TILED_SURFACE(ctx) (IS_GEN6((ctx)->intel.device_id) && \
+ (ctx)->render_state.interleaved_uv)
enum {
I965_SURFACETYPE_RGBA = 1,
@@ -436,7 +437,7 @@ i965_CreateSurfaces(VADriverContextP ctx,
obj_surface->orig_width = width;
obj_surface->orig_height = height;
- if (IS_GEN6(i965->intel.device_id)) {
+ if (HAS_TILED_SURFACE(i965)) {
obj_surface->width = ALIGN(obj_surface->orig_width, 128);
obj_surface->height = ALIGN(obj_surface->orig_height, 32);
} else {