diff options
| author | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-08-11 15:16:09 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-08-11 15:16:09 +0800 |
| commit | d0018a96064ee0adfe87c2d50c341bf7d2e45eb0 (patch) | |
| tree | 55a4edf8d1d52ebd86c5f015eaf8d7384aef0826 | |
| parent | fe90c0522f65f60c4c431787c889b7fb639ab61b (diff) | |
Disable display clock gating for 4 series chips
| -rw-r--r-- | src/i830_driver.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/i830_driver.c b/src/i830_driver.c index 8ea05af0..35f72424 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -971,7 +971,7 @@ i830_init_clock_gating(ScrnInfoPtr pScrn) /* Disable clock gating reported to work incorrectly according to the specs. */ - if (IS_GM45(pI830)) { + if (IS_GM45(pI830) || IS_G4X(pI830)) { OUTREG(RENCLK_GATE_D1, 0); OUTREG(RENCLK_GATE_D2, 0); OUTREG(RAMCLK_GATE_D, 0); |