diff options
| author | Keith Whitwell <keith@tungstengraphics.com> | 2001-12-05 11:30:06 +0000 |
|---|---|---|
| committer | Keith Whitwell <keith@tungstengraphics.com> | 2001-12-05 11:30:06 +0000 |
| commit | 952e91e3c3c106f0281f980c424d46fada7293da (patch) | |
| tree | 99e7852cc12002a128ccadcd24a5e5f8d39d39cb | |
| parent | e7ce909f8f0d886d4afba6be340d08dca0b55730 (diff) | |
Fix stencil clears.
| -rw-r--r-- | linux/radeon_cp.c | 16 | ||||
| -rw-r--r-- | linux/radeon_drv.h | 6 | ||||
| -rw-r--r-- | linux/radeon_state.c | 6 |
3 files changed, 14 insertions, 14 deletions
diff --git a/linux/radeon_cp.c b/linux/radeon_cp.c index 904c8b77..0acaca8e 100644 --- a/linux/radeon_cp.c +++ b/linux/radeon_cp.c @@ -744,17 +744,17 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init ) * and screwing with the clear operation. */ dev_priv->depth_clear.rb3d_cntl = (RADEON_PLANE_MASK_ENABLE | - RADEON_Z_ENABLE | (dev_priv->color_fmt << 10) | RADEON_ZBLOCK16); - dev_priv->depth_clear.rb3d_zstencilcntl = (dev_priv->depth_fmt | - RADEON_Z_TEST_ALWAYS | - RADEON_STENCIL_TEST_ALWAYS | - RADEON_STENCIL_S_FAIL_KEEP | - RADEON_STENCIL_ZPASS_KEEP | - RADEON_STENCIL_ZFAIL_KEEP | - RADEON_Z_WRITE_ENABLE); + dev_priv->depth_clear.rb3d_zstencilcntl = + (dev_priv->depth_fmt | + RADEON_Z_TEST_ALWAYS | + RADEON_STENCIL_TEST_ALWAYS | + RADEON_STENCIL_S_FAIL_REPLACE | + RADEON_STENCIL_ZPASS_REPLACE | + RADEON_STENCIL_ZFAIL_REPLACE | + RADEON_Z_WRITE_ENABLE); dev_priv->depth_clear.se_cntl = (RADEON_FFACE_CULL_CW | RADEON_BFACE_SOLID | diff --git a/linux/radeon_drv.h b/linux/radeon_drv.h index 7a0c171f..abbf7179 100644 --- a/linux/radeon_drv.h +++ b/linux/radeon_drv.h @@ -308,9 +308,9 @@ extern int radeon_cp_vertex2( struct inode *inode, struct file *filp, # define RADEON_Z_TEST_MASK (7 << 4) # define RADEON_Z_TEST_ALWAYS (7 << 4) # define RADEON_STENCIL_TEST_ALWAYS (7 << 12) -# define RADEON_STENCIL_S_FAIL_KEEP (0 << 16) -# define RADEON_STENCIL_ZPASS_KEEP (0 << 20) -# define RADEON_STENCIL_ZFAIL_KEEP (0 << 20) +# define RADEON_STENCIL_S_FAIL_REPLACE (2 << 16) +# define RADEON_STENCIL_ZPASS_REPLACE (2 << 20) +# define RADEON_STENCIL_ZFAIL_REPLACE (2 << 24) # define RADEON_Z_WRITE_ENABLE (1 << 30) #define RADEON_RBBM_SOFT_RESET 0x00f0 # define RADEON_SOFT_RESET_CP (1 << 0) diff --git a/linux/radeon_state.c b/linux/radeon_state.c index 812de5ba..6b6ef73b 100644 --- a/linux/radeon_state.c +++ b/linux/radeon_state.c @@ -440,14 +440,14 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev, { drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_depth_clear_t *depth_clear = &dev_priv->depth_clear; /* */ + drm_radeon_depth_clear_t *depth_clear = &dev_priv->depth_clear; int nbox = sarea_priv->nbox; drm_clip_rect_t *pbox = sarea_priv->boxes; unsigned int flags = clear->flags; - u32 rb3d_cntl = 0, rb3d_stencilrefmask= 0; /* */ + u32 rb3d_cntl = 0, rb3d_stencilrefmask= 0; int i; RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( __FUNCTION__": flags = 0x%x\n", flags ); if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { unsigned int tmp = flags; |