diff options
| author | Dominik Karol Piątkowski <dominik.karol.piatkowski@intel.com> | 2024-06-26 08:30:17 +0200 |
|---|---|---|
| committer | Kamil Konieczny <kamil.konieczny@linux.intel.com> | 2024-06-26 14:32:46 +0200 |
| commit | 1c3d1222287ee74e842164cc1b3f4fca1a701083 (patch) | |
| tree | 8376b688adb5cecb6ee025066ad3108b0ae95a15 /lib | |
| parent | dceed442a14a0abd09065cbade94cefe11e00422 (diff) | |
lib/gpu_cmds: Fix hardcoded buffer size
This patch enables buffers larger than one page to be successfully
submitted, allowing for large shader execution.
Based on the find by Dominik Grzegorzek.
Signed-off-by: Dominik Karol Piątkowski <dominik.karol.piatkowski@intel.com>
Reviewed-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/gpu_cmds.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/gpu_cmds.c b/lib/gpu_cmds.c index 378fa9166..2a502505e 100644 --- a/lib/gpu_cmds.c +++ b/lib/gpu_cmds.c @@ -566,13 +566,13 @@ gen8_emit_state_base_address(struct intel_bb *ibb) /* general state buffer size */ intel_bb_out(ibb, 0xfffff000 | 1); /* dynamic state buffer size */ - intel_bb_out(ibb, 1 << 12 | 1); + intel_bb_out(ibb, ALIGN(ibb->size, 1 << 12) | 1); /* indirect object buffer size */ intel_bb_out(ibb, 0xfffff000 | 1); /* instruction buffer size, must set modify enable bit, otherwise it may * result in GPU hang */ - intel_bb_out(ibb, 1 << 12 | 1); + intel_bb_out(ibb, ALIGN(ibb->size, 1 << 12) | 1); } void @@ -610,13 +610,13 @@ gen9_emit_state_base_address(struct intel_bb *ibb) /* general state buffer size */ intel_bb_out(ibb, 0xfffff000 | 1); /* dynamic state buffer size */ - intel_bb_out(ibb, 1 << 12 | 1); + intel_bb_out(ibb, ALIGN(ibb->size, 1 << 12) | 1); /* indirect object buffer size */ intel_bb_out(ibb, 0xfffff000 | 1); /* intruction buffer size, must set modify enable bit, otherwise it may * result in GPU hang */ - intel_bb_out(ibb, 1 << 12 | 1); + intel_bb_out(ibb, ALIGN(ibb->size, 1 << 12) | 1); /* Bindless surface state base address */ intel_bb_out(ibb, 0 | BASE_ADDRESS_MODIFY); @@ -1026,14 +1026,14 @@ xehp_emit_state_base_address(struct intel_bb *ibb) /* general state buffer size */ intel_bb_out(ibb, 0xfffff000 | 1); //dw12 /* dynamic state buffer size */ - intel_bb_out(ibb, 1 << 12 | 1); //dw13 + intel_bb_out(ibb, ALIGN(ibb->size, 1 << 12) | 1); //dw13 /* indirect object buffer size */ if (intel_graphics_ver(ibb->devid) >= IP_VER(20, 0)) //dw14 intel_bb_out(ibb, 0); else intel_bb_out(ibb, 0xfffff000 | 1); /* intruction buffer size */ - intel_bb_out(ibb, 1 << 12 | 1); //dw15 + intel_bb_out(ibb, ALIGN(ibb->size, 1 << 12) | 1); //dw15 /* Bindless surface state base address */ intel_bb_out(ibb, 0 | BASE_ADDRESS_MODIFY); //dw16 |