diff options
| author | Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> | 2023-03-23 15:55:31 -0700 |
|---|---|---|
| committer | Kamil Konieczny <kamil.konieczny@linux.intel.com> | 2023-03-24 13:31:39 +0100 |
| commit | 20ff42269100bc8366ffbb7a88f2a7305c3c52e2 (patch) | |
| tree | f4ee02bec6fd35d117b66d456d3a643efebb1be7 /lib/i915 | |
| parent | d796cef80eaf71c0beac5ede04eaeadc9f03657a (diff) | |
lib/i915/perf: Update MTL OA timestamp and EU thread config
MTL has configuration similar to DG2 for OA timestamp and threads per
EU. Update the same for MTL as per Wa_14015846243:mtl.
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Diffstat (limited to 'lib/i915')
| -rw-r--r-- | lib/i915/perf.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/i915/perf.c b/lib/i915/perf.c index d8624dc07..24ef38197 100644 --- a/lib/i915/perf.c +++ b/lib/i915/perf.c @@ -432,6 +432,14 @@ intel_perf_for_devinfo(uint32_t device_id, else return unsupported_i915_perf_platform(perf); } else if (devinfo->is_meteorlake) { + perf->devinfo.eu_threads_count = 8; + /* OA reports have the timestamp value shifted to the + * right by 1 bits, it also means we cannot use the + * top bit for comparison. + */ + perf->devinfo.oa_timestamp_shift = -1; + perf->devinfo.oa_timestamp_mask = 0x7fffffff; + if (is_mtl_gt2(&perf->devinfo)) intel_perf_load_metrics_mtlgt2(perf); else if (is_mtl_gt3(&perf->devinfo)) |