diff options
| author | Jesse Zhang <jesse.zhang@amd.com> | 2024-06-14 15:56:38 +0800 |
|---|---|---|
| committer | Vitaly Prosyak <vitaly.prosyak@amd.com> | 2024-06-22 19:00:23 -0400 |
| commit | f4a29e02ea0ef39bba0139cd4c9d13713ca93f21 (patch) | |
| tree | 070d14155f362a80d5c25bb53bb593b03c3293ed | |
| parent | 73e21b2bb5eec0efb0d5fa2f375fd8126ac83ba9 (diff) | |
lib/amdgpu: add gfx12 family id
To support gfx12 testing, add its family ID.
V2: using a unique subject (Kamil)
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
| -rw-r--r-- | lib/amdgpu/amd_family.h | 1 | ||||
| -rw-r--r-- | lib/amdgpu/amd_ip_blocks.c | 3 | ||||
| -rw-r--r-- | lib/amdgpu/amdgpu_asic_addr.h | 3 |
3 files changed, 7 insertions, 0 deletions
diff --git a/lib/amdgpu/amd_family.h b/lib/amdgpu/amd_family.h index bce2c6c2e..4a5731dbf 100644 --- a/lib/amdgpu/amd_family.h +++ b/lib/amdgpu/amd_family.h @@ -106,6 +106,7 @@ enum radeon_family { CHIP_GFX1103_R2, CHIP_GFX1150, CHIP_GFX1151, + CHIP_GFX1200, CHIP_LAST, }; diff --git a/lib/amdgpu/amd_ip_blocks.c b/lib/amdgpu/amd_ip_blocks.c index 2ee94105c..ff7e55525 100644 --- a/lib/amdgpu/amd_ip_blocks.c +++ b/lib/amdgpu/amd_ip_blocks.c @@ -695,6 +695,9 @@ int setup_amdgpu_ip_blocks(uint32_t major, uint32_t minor, struct amdgpu_gpu_inf identify_chip(GFX1150); identify_chip(GFX1151); break; + case FAMILY_GFX1200: + identify_chip(GFX1200); + break; } if (!info->name) { igt_info("amdgpu: unknown (family_id, chip_external_rev): (%u, %u)\n", diff --git a/lib/amdgpu/amdgpu_asic_addr.h b/lib/amdgpu/amdgpu_asic_addr.h index cbe02871e..0ecb0b803 100644 --- a/lib/amdgpu/amdgpu_asic_addr.h +++ b/lib/amdgpu/amdgpu_asic_addr.h @@ -31,6 +31,7 @@ #define FAMILY_GFX1036 0x95 #define FAMILY_GFX1150 0x96 #define FAMILY_GFX1037 0x97 +#define FAMILY_GFX1200 0x98 // AMDGPU_FAMILY_IS(familyId, familyName) #define FAMILY_IS(f, fn) (f == FAMILY_##fn) @@ -108,6 +109,7 @@ #define AMDGPU_GFX1103_R2_RANGE 0x80, 0xFF //# 128 <= x < max #define AMDGPU_GFX1150_RANGE 0x01, 0xc0 //# 01 <= x < c0 #define AMDGPU_GFX1151_RANGE 0xc1, 0xFF //# c1 <= x < 255 +#define AMDGPU_GFX1200_RANGE 0x01, 0xFF //# 01 <= x < 255 #define AMDGPU_EXPAND_FIX(x) x #define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max)) @@ -173,5 +175,6 @@ #define ASICREV_IS_GFX1103_R2(r) ASICREV_IS(r, GFX1103_R2) #define ASICREV_IS_GFX1150(r) ASICREV_IS(r, GFX1150) #define ASICREV_IS_GFX1151(r) ASICREV_IS(r, GFX1151) +#define ASICREV_IS_GFX1200(r) ASICREV_IS(r, GFX1200) #endif // _AMDGPU_ASIC_ADDR_H |