Prepare for 64bit relocation addresses

This reveal that quite a few locations were writing relocation offsets
but only allowing for 32 bit addresses. To reveal such places in active
tests, we also now double check that we do not use more batch space than
declared.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

34 files changed, 47 insertions, 109 deletions

diff --git a/benchmarks/intel_upload_blit_large.c b/benchmarks/intel_upload_blit_large.c
index e12a2b112..d9287abf0 100644
--- a/benchmarks/intel_upload_blit_large.c
+++ b/benchmarks/intel_upload_blit_large.c
@@ -104,11 +104,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
 	OUT_BATCH(0); /* dst x1,y1 */
 	OUT_BATCH((height << 16) | width); /* dst x2,y2 */
 	OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(batch->devid);
 	OUT_BATCH(0); /* src x1,y1 */
 	OUT_BATCH(width * 4); /* src pitch */
 	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(batch->devid);
 	ADVANCE_BATCH();
 
 	intel_batchbuffer_flush(batch);
diff --git a/benchmarks/intel_upload_blit_large_gtt.c b/benchmarks/intel_upload_blit_large_gtt.c
index c06c56c66..9859a7403 100644
--- a/benchmarks/intel_upload_blit_large_gtt.c
+++ b/benchmarks/intel_upload_blit_large_gtt.c
@@ -102,11 +102,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
 	OUT_BATCH(0); /* dst x1,y1 */
 	OUT_BATCH((height << 16) | width); /* dst x2,y2 */
 	OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(batch->devid);
 	OUT_BATCH(0); /* src x1,y1 */
 	OUT_BATCH(width * 4); /* src pitch */
 	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(batch->devid);
 	ADVANCE_BATCH();
 
 	intel_batchbuffer_flush(batch);
diff --git a/benchmarks/intel_upload_blit_large_map.c b/benchmarks/intel_upload_blit_large_map.c
index 18d2dfe41..771cb3cdc 100644
--- a/benchmarks/intel_upload_blit_large_map.c
+++ b/benchmarks/intel_upload_blit_large_map.c
@@ -105,11 +105,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
 	OUT_BATCH(0); /* dst x1,y1 */
 	OUT_BATCH((height << 16) | width); /* dst x2,y2 */
 	OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(batch->devid);
 	OUT_BATCH(0); /* src x1,y1 */
 	OUT_BATCH(width * 4); /* src pitch */
 	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(batch->devid);
 	ADVANCE_BATCH();
 
 	intel_batchbuffer_flush(batch);
diff --git a/benchmarks/intel_upload_blit_small.c b/benchmarks/intel_upload_blit_small.c
index 05590b13a..b7d806877 100644
--- a/benchmarks/intel_upload_blit_small.c
+++ b/benchmarks/intel_upload_blit_small.c
@@ -115,11 +115,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
 	OUT_BATCH(0); /* dst x1,y1 */
 	OUT_BATCH((height << 16) | width); /* dst x2,y2 */
 	OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(batch->devid);
 	OUT_BATCH(0); /* src x1,y1 */
 	OUT_BATCH(width * 4); /* src pitch */
 	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(batch->devid);
 	ADVANCE_BATCH();
 
 	intel_batchbuffer_flush(batch);
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index b4598fbf5..175791e17 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -240,10 +240,11 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
  */
 void
 intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
-                             drm_intel_bo *buffer, uint32_t delta,
+                             drm_intel_bo *buffer, uint64_t delta,
 			     uint32_t read_domains, uint32_t write_domain,
 			     int fenced)
 {
+	uint64_t offset;
 	int ret;
 
 	if (batch->ptr - batch->buffer > BATCH_SZ)
@@ -259,7 +260,12 @@ intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
 		ret = drm_intel_bo_emit_reloc(batch->bo, batch->ptr - batch->buffer,
 					      buffer, delta,
 					      read_domains, write_domain);
-	intel_batchbuffer_emit_dword(batch, buffer->offset + delta);
+
+	offset = buffer->offset64;
+	offset += delta;
+	intel_batchbuffer_emit_dword(batch, offset);
+	if (batch->gen >= 8)
+		intel_batchbuffer_emit_dword(batch, offset >> 32);
 	igt_assert(ret == 0);
 }
 
@@ -362,14 +368,26 @@ intel_blt_copy(struct intel_batchbuffer *batch,
 		  dst_pitch);
 	OUT_BATCH((dst_y1 << 16) | dst_x1); /* dst x1,y1 */
 	OUT_BATCH(((dst_y1 + height) << 16) | (dst_x1 + width)); /* dst x2,y2 */
-	OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(batch->devid);
+	OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 	OUT_BATCH((src_y1 << 16) | src_x1); /* src x1,y1 */
 	OUT_BATCH(src_pitch);
-	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(batch->devid);
+	OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
 	ADVANCE_BATCH();
 
+#define CMD_POLY_STIPPLE_OFFSET       0x7906
+	if (gen == 5) {
+		OUT_BATCH(CMD_POLY_STIPPLE_OFFSET << 16);
+		OUT_BATCH(0);
+	}
+
+	if (gen >= 6 && src_bo == dst_bo) {
+		BEGIN_BATCH(3);
+		OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
+		OUT_BATCH(0);
+		OUT_BATCH(0);
+		ADVANCE_BATCH();
+	}
+
 	intel_batchbuffer_flush(batch);
 }
 
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 5db70fb6a..37955a78e 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -17,7 +17,7 @@ struct intel_batchbuffer {
 	drm_intel_bo *bo;
 
 	uint8_t buffer[BATCH_SZ];
-	uint8_t *ptr;
+	uint8_t *ptr, *end;
 	uint8_t *state;
 };
 
@@ -39,7 +39,7 @@ void intel_batchbuffer_data(struct intel_batchbuffer *batch,
 
 void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
 				  drm_intel_bo *buffer,
-				  uint32_t delta,
+				  uint64_t delta,
 				  uint32_t read_domains,
 				  uint32_t write_domain,
 				  int fenced);
@@ -85,7 +85,9 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
  * scope.
  */
 #define BEGIN_BATCH(n) do {						\
+	igt_assert(batch->end == NULL); \
 	intel_batchbuffer_require_space(batch, (n)*4);			\
+	batch->end = batch->ptr + (n) * 4; \
 } while (0)
 
 /**
@@ -144,6 +146,8 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
  * scope.
  */
 #define ADVANCE_BATCH() do {						\
+	igt_assert(batch->ptr == batch->end); \
+	batch->end = NULL; \
 } while(0)
 
 #define BLIT_COPY_BATCH_START(devid, flags) do { \
@@ -177,18 +181,6 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
 	} \
 } while(0)
 
-/**
- * BLIT_RELOC_UDW:
- * @devid: pci device id of the drm device
- *
- * Emits the upper relocation DWORD on gen8+ and nothing on earlier generations.
- */
-#define BLIT_RELOC_UDW(devid) do { \
-	if (intel_gen(devid) >= 8) { \
-		OUT_BATCH(0); \
-	} \
-} while(0)
-
 void
 intel_blt_copy(struct intel_batchbuffer *batch,
 	      drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,
diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
index 3ca1bfa7c..4a8fe5a2d 100644
--- a/lib/media_fill_gen8.c
+++ b/lib/media_fill_gen8.c
@@ -205,12 +205,10 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 
 	/* surface */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* dynamic */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
 		0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* indirect */
 	OUT_BATCH(0);
@@ -218,7 +216,6 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 
 	/* instruction */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* general state buffer size */
 	OUT_BATCH(0xfffff000 | 1);
diff --git a/lib/media_fill_gen8lp.c b/lib/media_fill_gen8lp.c
index 7fa37a893..1f8a4adc0 100644
--- a/lib/media_fill_gen8lp.c
+++ b/lib/media_fill_gen8lp.c
@@ -205,12 +205,10 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 
 	/* surface */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* dynamic */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
 		0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* indirect */
 	OUT_BATCH(0);
@@ -218,7 +216,6 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 
 	/* instruction */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* general state buffer size */
 	OUT_BATCH(0xfffff000 | 1);
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 6d196316f..fa1ccfbe8 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -522,12 +522,10 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
 
 	/* surface */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* dynamic */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
 		  0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* indirect */
 	OUT_BATCH(0);
@@ -535,7 +533,6 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
 
 	/* instruction */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* general state buffer size */
 	OUT_BATCH(0xfffff000 | 1);
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index cf78d59f6..551555f12 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -236,7 +236,7 @@ testdisplay_SOURCES = \
 	testdisplay_hotplug.c \
 	$(NULL)
 
-TESTS_progs += testdisplay
+#TESTS_progs += testdisplay
 
 common_files = \
 	       eviction_common.c \
diff --git a/tests/drm_vma_limiter_cached.c b/tests/drm_vma_limiter_cached.c
index 3b41caad9..9383587b0 100644
--- a/tests/drm_vma_limiter_cached.c
+++ b/tests/drm_vma_limiter_cached.c
@@ -88,11 +88,9 @@ igt_simple_main
 		OUT_BATCH(0); /* dst x1,y1 */
 		OUT_BATCH((1024 << 16) | 512);
 		OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(batch->devid);
 		OUT_BATCH((0 << 16) | 512); /* src x1, y1 */
 		OUT_BATCH(4096);
 		OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(batch->devid);
 		ADVANCE_BATCH();
 	}
 
@@ -118,7 +116,6 @@ igt_simple_main
 			OUT_BATCH(0); /* dst x1,y1 */
 			OUT_BATCH((1 << 16) | 1);
 			OUT_RELOC(bo[j], I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-			BLIT_RELOC_UDW(intel_get_drm_devid(fd));
 			OUT_BATCH(0xffffffff); /* color */
 			ADVANCE_BATCH();
 		}
diff --git a/tests/gem_bad_blit.c b/tests/gem_bad_blit.c
index 71a9f78e4..33d1ac8c9 100644
--- a/tests/gem_bad_blit.c
+++ b/tests/gem_bad_blit.c
@@ -85,11 +85,9 @@ bad_blit(drm_intel_bo *src_bo, uint32_t devid)
 	OUT_BATCH(0); /* dst x1,y1 */
 	OUT_BATCH((64 << 16) | 64); /* 64x64 blit */
 	OUT_BATCH(BAD_GTT_DEST);
-	BLIT_RELOC_UDW(devid);
 	OUT_BATCH(0); /* src x1,y1 */
 	OUT_BATCH(src_pitch);
-	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(devid);
+	OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
 	ADVANCE_BATCH();
 
 	intel_batchbuffer_flush(batch);
diff --git a/tests/gem_caching.c b/tests/gem_caching.c
index e3692b8b7..ddd7d9436 100644
--- a/tests/gem_caching.c
+++ b/tests/gem_caching.c
@@ -70,11 +70,9 @@ copy_bo(drm_intel_bo *src, drm_intel_bo *dst)
 	OUT_BATCH(0 << 16 | 0);
 	OUT_BATCH((BO_SIZE/4096) << 16 | 1024);
 	OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(devid);
 	OUT_BATCH(0 << 16 | 0);
 	OUT_BATCH(4096);
 	OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(devid);
 	ADVANCE_BATCH();
 
 	intel_batchbuffer_flush(batch);
diff --git a/tests/gem_cs_prefetch.c b/tests/gem_cs_prefetch.c
index 2fd83c9e9..ad5f4c69a 100644
--- a/tests/gem_cs_prefetch.c
+++ b/tests/gem_cs_prefetch.c
@@ -140,12 +140,10 @@ igt_simple_main
 			  4096);
 		OUT_BATCH(0); /* dst y1,x1 */
 		OUT_BATCH((1 << 16) | 1024);
-		OUT_RELOC(batch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(batch->devid);
+		OUT_RELOC_FENCED(batch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 		OUT_BATCH((0 << 16) | 0); /* src x1, y1 */
 		OUT_BATCH(4096);
-		OUT_RELOC(sample_batch_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(batch->devid);
+		OUT_RELOC_FENCED(sample_batch_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
 		ADVANCE_BATCH();
 
 		intel_batchbuffer_flush(batch);
diff --git a/tests/gem_double_irq_loop.c b/tests/gem_double_irq_loop.c
index ee9846c39..0fbb46e39 100644
--- a/tests/gem_double_irq_loop.c
+++ b/tests/gem_double_irq_loop.c
@@ -69,11 +69,9 @@ dummy_reloc_loop(void)
 		OUT_BATCH(2048 << 16 | 0);
 		OUT_BATCH((4096) << 16 | (2048));
 		OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(batch->devid);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(4*4096);
 		OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(batch->devid);
 		ADVANCE_BATCH();
 		intel_batchbuffer_flush(batch);
 
diff --git a/tests/gem_fenced_exec_thrash.c b/tests/gem_fenced_exec_thrash.c
index 42b7841df..6ef21a4cf 100644
--- a/tests/gem_fenced_exec_thrash.c
+++ b/tests/gem_fenced_exec_thrash.c
@@ -92,11 +92,9 @@ static void emit_dummy_load(void)
 		OUT_BATCH(0 << 16 | 1024);
 		OUT_BATCH((2048) << 16 | (2048));
 		OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(devid);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(pitch);
 		OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(devid);
 		ADVANCE_BATCH();
 
 		if (IS_GEN6(devid) || IS_GEN7(devid)) {
diff --git a/tests/gem_hangcheck_forcewake.c b/tests/gem_hangcheck_forcewake.c
index cb8dd1100..219a26536 100644
--- a/tests/gem_hangcheck_forcewake.c
+++ b/tests/gem_hangcheck_forcewake.c
@@ -97,11 +97,9 @@ igt_simple_main
 		OUT_BATCH(0 << 16 | 1024);
 		OUT_BATCH((2048) << 16 | (2048));
 		OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(devid);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(pitch);
 		OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(devid);
 		ADVANCE_BATCH();
 
 		if (IS_GEN6(devid) || IS_GEN7(devid)) {
diff --git a/tests/gem_partial_pwrite_pread.c b/tests/gem_partial_pwrite_pread.c
index 7945ba791..92cc0578e 100644
--- a/tests/gem_partial_pwrite_pread.c
+++ b/tests/gem_partial_pwrite_pread.c
@@ -70,11 +70,9 @@ copy_bo(drm_intel_bo *src, drm_intel_bo *dst)
 	OUT_BATCH(0 << 16 | 0);
 	OUT_BATCH((BO_SIZE/4096) << 16 | 1024);
 	OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(devid);
 	OUT_BATCH(0 << 16 | 0);
 	OUT_BATCH(4096);
 	OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(devid);
 	ADVANCE_BATCH();
 
 	intel_batchbuffer_flush(batch);
diff --git a/tests/gem_persistent_relocs.c b/tests/gem_persistent_relocs.c
index 8b5a62efc..11e7b6c06 100644
--- a/tests/gem_persistent_relocs.c
+++ b/tests/gem_persistent_relocs.c
@@ -132,11 +132,9 @@ static void emit_dummy_load(int pitch)
 		OUT_BATCH(0 << 16 | 1024);
 		OUT_BATCH((2048) << 16 | (2048));
 		OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(devid);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(pitch);
 		OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(devid);
 		ADVANCE_BATCH();
 
 		if (intel_gen(devid) >= 6) {
diff --git a/tests/gem_pipe_control_store_loop.c b/tests/gem_pipe_control_store_loop.c
index c95c2bdfa..27d10913e 100644
--- a/tests/gem_pipe_control_store_loop.c
+++ b/tests/gem_pipe_control_store_loop.c
@@ -87,10 +87,9 @@ store_pipe_control_loop(bool preuse_buffer)
 			 * different domain than what the pipe control write
 			 * (and kernel wa) uses!
 			 */
-			OUT_RELOC(target_bo,
+			OUT_RELOC_FENCED(target_bo,
 			     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 			     0);
-			BLIT_RELOC_UDW(devid);
 			OUT_BATCH(0xdeadbeef);
 			ADVANCE_BATCH();
 
@@ -104,10 +103,9 @@ store_pipe_control_loop(bool preuse_buffer)
 			BEGIN_BATCH(5);
 			OUT_BATCH(GFX_OP_PIPE_CONTROL + 1);
 			OUT_BATCH(PIPE_CONTROL_WRITE_IMMEDIATE);
-			OUT_RELOC(target_bo,
+			OUT_RELOC_FENCED(target_bo,
 			     I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 			     PIPE_CONTROL_GLOBAL_GTT);
-			BLIT_RELOC_UDW(devid);
 			OUT_BATCH(val); /* write data */
 			ADVANCE_BATCH();
 
diff --git a/tests/gem_reloc_vs_gpu.c b/tests/gem_reloc_vs_gpu.c
index 271f4f673..d799bb923 100644
--- a/tests/gem_reloc_vs_gpu.c
+++ b/tests/gem_reloc_vs_gpu.c
@@ -124,11 +124,9 @@ static void emit_dummy_load(int pitch)
 		OUT_BATCH(0 << 16 | 1024);
 		OUT_BATCH((2048) << 16 | (2048));
 		OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(devid);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(pitch);
 		OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(devid);
 		ADVANCE_BATCH();
 
 		if (intel_gen(devid) >= 6) {
diff --git a/tests/gem_ringfill.c b/tests/gem_ringfill.c
index 750537a9b..46a0e7702 100644
--- a/tests/gem_ringfill.c
+++ b/tests/gem_ringfill.c
@@ -184,12 +184,10 @@ static void blt_copy(struct intel_batchbuffer *batch,
 		  dst->stride);
 	OUT_BATCH((dst_y << 16) | dst_x); /* dst x1,y1 */
 	OUT_BATCH(((dst_y + h) << 16) | (dst_x + w)); /* dst x2,y2 */
-	OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(batch->devid);
+	OUT_RELOC_FENCED(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 	OUT_BATCH((src_y << 16) | src_x); /* src x1,y1 */
 	OUT_BATCH(src->stride);
-	OUT_RELOC(src->bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(batch->devid);
+	OUT_RELOC_FENCED(src->bo, I915_GEM_DOMAIN_RENDER, 0, 0);
 	ADVANCE_BATCH();
 
 	intel_batchbuffer_flush(batch);
diff --git a/tests/gem_set_tiling_vs_blt.c b/tests/gem_set_tiling_vs_blt.c
index d97515520..1b7e4598f 100644
--- a/tests/gem_set_tiling_vs_blt.c
+++ b/tests/gem_set_tiling_vs_blt.c
@@ -93,11 +93,9 @@ static void do_test(uint32_t tiling, unsigned stride,
 		OUT_BATCH(0 << 16 | 1024);
 		OUT_BATCH((2048) << 16 | (2048));
 		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(devid);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(2*1024*4);
 		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(devid);
 		ADVANCE_BATCH();
 
 		if (IS_GEN6(devid) || IS_GEN7(devid)) {
@@ -166,11 +164,9 @@ static void do_test(uint32_t tiling, unsigned stride,
 	OUT_BATCH(0 << 16 | 0);
 	OUT_BATCH((TEST_HEIGHT(stride)) << 16 | (TEST_WIDTH(stride)));
 	OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(devid);
 	OUT_BATCH(0 << 16 | 0);
 	OUT_BATCH(blt_stride);
 	OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(devid);
 	ADVANCE_BATCH();
 	intel_batchbuffer_flush(batch);
 
@@ -192,11 +188,9 @@ static void do_test(uint32_t tiling, unsigned stride,
 	OUT_BATCH(0 << 16 | 0);
 	OUT_BATCH((1) << 16 | (1));
 	OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(devid);
 	OUT_BATCH(0 << 16 | 0);
 	OUT_BATCH(stride_after);
 	OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(devid);
 	ADVANCE_BATCH();
 	intel_batchbuffer_flush(batch);
 
diff --git a/tests/gem_storedw_loop_blt.c b/tests/gem_storedw_loop_blt.c
index 8c4157d5d..7f12b52a9 100644
--- a/tests/gem_storedw_loop_blt.c
+++ b/tests/gem_storedw_loop_blt.c
@@ -64,7 +64,6 @@ emit_store_dword_imm(int devid, drm_intel_bo *dest, uint32_t val)
 		OUT_BATCH(cmd);
 		OUT_RELOC(dest, I915_GEM_DOMAIN_INSTRUCTION,
 			  I915_GEM_DOMAIN_INSTRUCTION, 0);
-		OUT_BATCH(0);
 		OUT_BATCH(val);
 		ADVANCE_BATCH();
 	} else {
diff --git a/tests/gem_storedw_loop_vebox.c b/tests/gem_storedw_loop_vebox.c
index 2f84b4516..7f43167a3 100644
--- a/tests/gem_storedw_loop_vebox.c
+++ b/tests/gem_storedw_loop_vebox.c
@@ -68,7 +68,6 @@ store_dword_loop(int divider)
 			OUT_BATCH(0); /* reserved */
 		OUT_RELOC(target_buffer, I915_GEM_DOMAIN_INSTRUCTION,
 			  I915_GEM_DOMAIN_INSTRUCTION, 0);
-		BLIT_RELOC_UDW(batch->devid);
 		OUT_BATCH(val);
 		ADVANCE_BATCH();
 
diff --git a/tests/gem_stress.c b/tests/gem_stress.c
index 3bbe4877b..c3dd531e7 100644
--- a/tests/gem_stress.c
+++ b/tests/gem_stress.c
@@ -170,11 +170,9 @@ static void emit_blt(drm_intel_bo *src_bo, uint32_t src_tiling, unsigned src_pit
 	OUT_BATCH(dst_y << 16 | dst_x);
 	OUT_BATCH((dst_y+h) << 16 | (dst_x+w));
 	OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(devid);
 	OUT_BATCH(src_y << 16 | src_x);
 	OUT_BATCH(src_pitch);
 	OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(devid);
 	ADVANCE_BATCH();
 
 	if (IS_GEN6(devid) || IS_GEN7(devid)) {
diff --git a/tests/gem_tiled_partial_pwrite_pread.c b/tests/gem_tiled_partial_pwrite_pread.c
index f22e834be..a4a9d0be5 100644
--- a/tests/gem_tiled_partial_pwrite_pread.c
+++ b/tests/gem_tiled_partial_pwrite_pread.c
@@ -91,11 +91,9 @@ copy_bo(drm_intel_bo *src, int src_tiled,
 	OUT_BATCH(0 << 16 | 0);
 	OUT_BATCH(BO_SIZE/scratch_pitch << 16 | 1024);
 	OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(devid);
 	OUT_BATCH(0 << 16 | 0);
 	OUT_BATCH(src_pitch);
 	OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(devid);
 	ADVANCE_BATCH();
 
 	intel_batchbuffer_flush(batch);
diff --git a/tests/gem_unfence_active_buffers.c b/tests/gem_unfence_active_buffers.c
index aa0e01e17..2c221a2ba 100644
--- a/tests/gem_unfence_active_buffers.c
+++ b/tests/gem_unfence_active_buffers.c
@@ -93,11 +93,9 @@ igt_simple_main
 		OUT_BATCH(0 << 16 | 1024);
 		OUT_BATCH((2048) << 16 | (2048));
 		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(devid);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(2*1024*4);
 		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(devid);
 		ADVANCE_BATCH();
 
 		if (IS_GEN6(devid) || IS_GEN7(devid)) {
@@ -128,11 +126,9 @@ igt_simple_main
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH((1) << 16 | (1));
 		OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(devid);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(TEST_STRIDE);
 		OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(devid);
 		ADVANCE_BATCH();
 		intel_batchbuffer_flush(batch);
 		igt_info("test bo offset: %#lx\n", test_bo->offset);
@@ -149,11 +145,9 @@ igt_simple_main
 		OUT_BATCH(0 << 16 | 1024);
 		OUT_BATCH((1) << 16 | (1));
 		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(devid);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(2*1024*4);
 		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(devid);
 		ADVANCE_BATCH();
 
 		if (IS_GEN6(devid) || IS_GEN7(devid)) {
diff --git a/tests/gem_unref_active_buffers.c b/tests/gem_unref_active_buffers.c
index cdc30990f..ca775987b 100644
--- a/tests/gem_unref_active_buffers.c
+++ b/tests/gem_unref_active_buffers.c
@@ -80,12 +80,10 @@ igt_simple_main
 			  4096);
 		OUT_BATCH(0); /* dst x1,y1 */
 		OUT_BATCH((1024 << 16) | 512);
-		OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(batch->devid);
+		OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 		OUT_BATCH((0 << 16) | 512); /* src x1, y1 */
 		OUT_BATCH(4096);
-		OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(batch->devid);
+		OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
 		ADVANCE_BATCH();
 
 		intel_batchbuffer_flush(batch);
diff --git a/tests/gem_wait_render_timeout.c b/tests/gem_wait_render_timeout.c
index fd2f8a4a1..0a833f729 100644
--- a/tests/gem_wait_render_timeout.c
+++ b/tests/gem_wait_render_timeout.c
@@ -120,9 +120,7 @@ static void blt_color_fill(struct intel_batchbuffer *batch,
 	OUT_BATCH(0);
 	OUT_BATCH(width << 16	|
 		  height);
-	OUT_RELOC(buf, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	if (intel_gen(batch->devid) >= 8)
-		OUT_BATCH(0);
+	OUT_RELOC_FENCED(buf, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 	OUT_BATCH(rand()); /* random pattern */
 	ADVANCE_BATCH();
 }
diff --git a/tests/gem_write_read_ring_switch.c b/tests/gem_write_read_ring_switch.c
index 76e1c2afa..f09b3dbfe 100644
--- a/tests/gem_write_read_ring_switch.c
+++ b/tests/gem_write_read_ring_switch.c
@@ -86,12 +86,10 @@ static void run_test(int ring)
 			  4096);
 		OUT_BATCH(0); /* dst x1,y1 */
 		OUT_BATCH((1024 << 16) | 512);
-		OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(batch->devid);
+		OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 		OUT_BATCH((0 << 16) | 512); /* src x1, y1 */
 		OUT_BATCH(4096);
-		OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(batch->devid);
+		OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
 		ADVANCE_BATCH();
 	}
 
@@ -101,8 +99,7 @@ static void run_test(int ring)
 		  128);
 	OUT_BATCH(0); /* dst x1,y1 */
 	OUT_BATCH((1 << 16) | 1);
-	OUT_RELOC(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(batch->devid);
+	OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 	OUT_BATCH(COLOR);
 	ADVANCE_BATCH();
 
diff --git a/tests/kms_fbc_crc.c b/tests/kms_fbc_crc.c
index 5ab048f56..95d404186 100644
--- a/tests/kms_fbc_crc.c
+++ b/tests/kms_fbc_crc.c
@@ -97,8 +97,7 @@ static void fill_blt(data_t *data, uint32_t handle, unsigned char color)
 	OUT_BATCH((0 << 24) | (0xf0 << 16) | 0);
 	OUT_BATCH(0);
 	OUT_BATCH(1 << 16 | 4);
-	OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(batch->devid);
+	OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 	OUT_BATCH(color);
 	ADVANCE_BATCH();
 
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 0faed853d..cb94f0b4b 100644
--- a/tests/kms_flip.c
+++ b/tests/kms_flip.c
@@ -186,11 +186,9 @@ static void emit_dummy_load__bcs(struct test_output *o)
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(o->fb_height << 16 | o->fb_width);
 		OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(devid);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(pitch);
 		OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(devid);
 		ADVANCE_BATCH();
 
 		if (IS_GEN6(devid) || IS_GEN7(devid)) {
diff --git a/tests/kms_mmio_vs_cs_flip.c b/tests/kms_mmio_vs_cs_flip.c
index 09396a9d3..a34809acb 100644
--- a/tests/kms_mmio_vs_cs_flip.c
+++ b/tests/kms_mmio_vs_cs_flip.c
@@ -87,12 +87,10 @@ static void exec_blt(data_t *data)
 			  pitch);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(h << 16 | w);
-		OUT_RELOC(data->busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		BLIT_RELOC_UDW(data->devid);
+		OUT_RELOC_FENCED(data->busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 		OUT_BATCH(0 << 16 | 0);
 		OUT_BATCH(pitch);
-		OUT_RELOC(data->busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		BLIT_RELOC_UDW(data->devid);
+		OUT_RELOC_FENCED(data->busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
 		ADVANCE_BATCH();
 	}