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path: root/target-arm/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2011-05-08target-arm: Privatize CPU_INTERRUPT_FIQ.Richard Henderson1-0/+4
2011-04-20Implement basic part of SA-1110/SA-1100Dmitry Eremin-Solenikov1-0/+3
2011-04-10arm: basic support for ARMv4/ARMv4T emulationDmitry Eremin-Solenikov1-1/+3
2011-03-06target-arm: Implement cp15 VA->PA translationAdam Lackorzynski1-1/+2
2011-02-11arm: drop unused irq-related part of CPUARMStateDmitry Eremin-Solenikov1-4/+0
2011-02-04target-arm: Add CPU feature flag for v7MPPeter Maydell1-1/+2
2011-01-14target-arm: Set privileged bit in TB flags correctly for M profilePeter Maydell1-1/+7
2011-01-14target-arm: Add symbolic constants for bitfields in TB flagsPeter Maydell1-6/+39
2011-01-14target-arm: Add support for 'Standard FPSCR Value' as used by NeonPeter Maydell1-0/+13
2010-12-03ARM: Expose vfp_get_fpscr() and vfp_set_fpscr() to C codePeter Maydell1-0/+4
2010-12-03[PATCH] target-arm: remove unused functions cpu_lock(), cpu_unlock()Peter Maydell1-2/+0
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil1-1/+3
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini1-1/+0
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini1-5/+0
2010-05-28arm: prevent coprocessor IO resetLars Munch1-7/+7
2010-04-05ARMv7-M reset fixesPaul Brook1-1/+1
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson1-0/+3
2009-11-22ARM atomic ops rewritePaul Brook1-3/+6
2009-11-19ARM Cortex-A9 cpu supportPaul Brook1-0/+1
2009-11-19ARM FP16 supportPaul Brook1-0/+1
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
2009-07-31Save/restore ARMv6 MMU statePaul Brook1-1/+1
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
2009-03-07The _exit syscall is used for both thread termination in NPTL applications,pbrook1-1/+2
2009-02-07Fix cpu_arm_handle_mmu_fault warningaurel321-0/+2
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
2008-12-19Implement ARMv7 cp15 cache ID registers.pbrook1-0/+3
2008-12-19Implement (very) basic Thumb2-EE support. This doesn't actually implementpbrook1-1/+6
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori1-0/+13
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori1-2/+6
2008-10-22Fix ARMv6 translation table base address calculation.pbrook1-1/+3
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook1-4/+0
2008-06-30Move CPU save/load registration to common code.pbrook1-1/+1
2008-06-29Add instruction counter.pbrook1-0/+2
2008-05-30Fix typo.pbrook1-1/+1
2008-05-30Move clone() register setup to target specific code. Handle fork-like clone.pbrook1-0/+9
2008-05-29Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard1-2/+0
2008-05-29Implement ARM magic kernel page and TLS register.pbrook1-0/+5
2008-05-28moved halted field to CPU_COMMONbellard1-1/+0
2008-04-14Add basic OMAP2 chip support.balrog1-0/+1
2008-04-14Move the excess of arm_load_kernel() parameters into a struct.balrog1-6/+3
2008-04-01ARM N=Z=1 flag fix.pbrook1-5/+6
2008-03-31ARM TCG conversion 10/16.pbrook1-3/+0
2008-03-31ARM TCG conversion 1/16.pbrook1-1/+2
2007-11-13Prevent cpsr_write/_read be put out of line in op.o (fixes a segfault on some...balrog1-42/+3
2007-11-11ARMv7 support.pbrook1-25/+162
2007-11-10added cpu_model parameter to cpu_init()bellard1-2/+1
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-0/+11
2007-10-12Unify '-cpu ?' option.j_mayer1-1/+2
2007-09-27Move get_sp_from_cpustate from cpu.h to target_signal.h.ths1-5/+0
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