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authorBlue Swirl <blauwirbel@gmail.com>2010-04-17 16:25:04 +0000
committerBlue Swirl <blauwirbel@gmail.com>2010-04-17 16:25:04 +0000
commitcca1d527efaa8ce65b4a78f936af82cc7cc96e82 (patch)
tree31c7e11eb13ee479485cc8bfe9a00d37252e0208 /target-sparc
parent655feed5d9889a0391023ee518bcba4dbd09438c (diff)
Sparc: fix PC/NPC during FPU traps
All FPU instructions can trap, so save PC/NPC state before executing them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/translate.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 2c07385d5..addb1e132 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2155,6 +2155,7 @@ static void disas_sparc_insn(DisasContext * dc)
rs1 = GET_FIELD(insn, 13, 17);
rs2 = GET_FIELD(insn, 27, 31);
xop = GET_FIELD(insn, 18, 26);
+ save_state(dc, cpu_cond);
switch (xop) {
case 0x1: /* fmovs */
tcg_gen_mov_i32(cpu_fpr[rd], cpu_fpr[rs2]);
@@ -2468,6 +2469,7 @@ static void disas_sparc_insn(DisasContext * dc)
rs1 = GET_FIELD(insn, 13, 17);
rs2 = GET_FIELD(insn, 27, 31);
xop = GET_FIELD(insn, 18, 26);
+ save_state(dc, cpu_cond);
#ifdef TARGET_SPARC64
if ((xop & 0x11f) == 0x005) { // V9 fmovsr
int l1;