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-rw-r--r--src/gallium/winsys/radeon/drm/radeon_buffer.h4
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm.c3
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm.h16
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_buffer.c43
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_r300.c18
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_winsys.h3
6 files changed, 57 insertions, 30 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_buffer.h b/src/gallium/winsys/radeon/drm/radeon_buffer.h
index 218a376301..8782d675df 100644
--- a/src/gallium/winsys/radeon/drm/radeon_buffer.h
+++ b/src/gallium/winsys/radeon/drm/radeon_buffer.h
@@ -72,6 +72,10 @@ void radeon_drm_bufmgr_write_reloc(struct pb_buffer *_buf,
struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager *_mgr,
uint32_t handle);
+void radeon_drm_bufmgr_get_tiling(struct pb_buffer *_buf,
+ enum r300_buffer_tiling *microtiled,
+ enum r300_buffer_tiling *macrotiled);
+
void radeon_drm_bufmgr_set_tiling(struct pb_buffer *_buf,
enum r300_buffer_tiling microtiled,
enum r300_buffer_tiling macrotiled,
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm.c b/src/gallium/winsys/radeon/drm/radeon_drm.c
index 3dfcc5aef0..2809b57862 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm.c
@@ -100,6 +100,9 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys)
version->version_minor >= 1;
#endif
+ /* XXX */
+ winsys->tex3d_mip_bug = TRUE;
+
info.request = RADEON_INFO_DEVICE_ID;
retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
if (retval) {
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm.h b/src/gallium/winsys/radeon/drm/radeon_drm.h
index 2dc077c052..78451b6f01 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm.h
@@ -37,22 +37,6 @@ struct pipe_screen* radeon_create_screen(struct drm_api* api,
int drmFB,
struct drm_create_screen_arg *arg);
-boolean radeon_buffer_from_texture(struct drm_api* api,
- struct pipe_screen* screen,
- struct pipe_texture* texture,
- struct pipe_buffer** buffer,
- unsigned* stride);
-
-boolean radeon_handle_from_buffer(struct drm_api* api,
- struct pipe_screen* screen,
- struct pipe_buffer* buffer,
- unsigned* handle);
-
-boolean radeon_global_handle_from_buffer(struct drm_api* api,
- struct pipe_screen* screen,
- struct pipe_buffer* buffer,
- unsigned* handle);
-
void radeon_destroy_drm_api(struct drm_api* api);
/* Guess at whether this chipset should use r300g.
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c
index 66f6132245..c9179a3620 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c
@@ -72,9 +72,9 @@ radeon_drm_buffer_map(struct pb_buffer *_buf,
struct radeon_drm_buffer *buf = radeon_drm_buffer(_buf);
int write = 0;
- if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) {
- if ((_buf->base.usage & PIPE_BUFFER_USAGE_VERTEX) ||
- (_buf->base.usage & PIPE_BUFFER_USAGE_INDEX))
+ if (flags & PIPE_TRANSFER_DONTBLOCK) {
+ if ((_buf->base.usage & PIPE_BIND_VERTEX_BUFFER) ||
+ (_buf->base.usage & PIPE_BIND_INDEX_BUFFER))
if (radeon_bo_is_referenced_by_cs(buf->bo, buf->mgr->rws->cs))
return NULL;
}
@@ -82,7 +82,7 @@ radeon_drm_buffer_map(struct pb_buffer *_buf,
if (buf->bo->ptr != NULL)
return buf->bo->ptr;
- if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) {
+ if (flags & PIPE_TRANSFER_DONTBLOCK) {
uint32_t domain;
if (radeon_bo_is_busy(buf->bo, &domain))
return NULL;
@@ -92,7 +92,7 @@ radeon_drm_buffer_map(struct pb_buffer *_buf,
buf->mgr->rws->flush_cb(buf->mgr->rws->flush_data);
}
- if (flags & PIPE_BUFFER_USAGE_CPU_WRITE) {
+ if (flags & PIPE_TRANSFER_WRITE) {
write = 1;
}
@@ -148,16 +148,20 @@ static uint32_t radeon_domain_from_usage(unsigned usage)
{
uint32_t domain = 0;
- if (usage & PIPE_BUFFER_USAGE_GPU_WRITE) {
+ if (usage & PIPE_BIND_RENDER_TARGET) {
domain |= RADEON_GEM_DOMAIN_VRAM;
}
- if (usage & PIPE_BUFFER_USAGE_PIXEL) {
+ if (usage & PIPE_BIND_DEPTH_STENCIL) {
domain |= RADEON_GEM_DOMAIN_VRAM;
}
- if (usage & PIPE_BUFFER_USAGE_VERTEX) {
+ if (usage & PIPE_BIND_SAMPLER_VIEW) {
+ domain |= RADEON_GEM_DOMAIN_VRAM;
+ }
+ /* also need BIND_BLIT_SOURCE/DESTINATION ? */
+ if (usage & PIPE_BIND_VERTEX_BUFFER) {
domain |= RADEON_GEM_DOMAIN_GTT;
}
- if (usage & PIPE_BUFFER_USAGE_INDEX) {
+ if (usage & PIPE_BIND_INDEX_BUFFER) {
domain |= RADEON_GEM_DOMAIN_GTT;
}
@@ -187,7 +191,7 @@ struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager
pipe_reference_init(&buf->base.base.reference, 1);
buf->base.base.alignment = 0;
- buf->base.base.usage = PIPE_BUFFER_USAGE_PIXEL;
+ buf->base.base.usage = PIPE_BIND_SAMPLER_VIEW;
buf->base.base.size = 0;
buf->base.vtbl = &radeon_drm_buffer_vtbl;
buf->mgr = mgr;
@@ -304,7 +308,24 @@ boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf,
}
return TRUE;
}
-
+
+void radeon_drm_bufmgr_get_tiling(struct pb_buffer *_buf,
+ enum r300_buffer_tiling *microtiled,
+ enum r300_buffer_tiling *macrotiled)
+{
+ struct radeon_drm_buffer *buf = get_drm_buffer(_buf);
+ uint32_t flags = 0, pitch;
+
+ radeon_bo_get_tiling(buf->bo, &flags, &pitch);
+
+ *microtiled = R300_BUFFER_LINEAR;
+ *macrotiled = R300_BUFFER_LINEAR;
+ if (flags & RADEON_BO_FLAGS_MICRO_TILE)
+ *microtiled = R300_BUFFER_TILED;
+
+ if (flags & RADEON_BO_FLAGS_MACRO_TILE)
+ *macrotiled = R300_BUFFER_TILED;
+}
void radeon_drm_bufmgr_set_tiling(struct pb_buffer *_buf,
enum r300_buffer_tiling microtiled,
diff --git a/src/gallium/winsys/radeon/drm/radeon_r300.c b/src/gallium/winsys/radeon/drm/radeon_r300.c
index 38fcf889c8..d1e65f87c3 100644
--- a/src/gallium/winsys/radeon/drm/radeon_r300.c
+++ b/src/gallium/winsys/radeon/drm/radeon_r300.c
@@ -42,10 +42,10 @@ radeon_r300_winsys_buffer_create(struct r300_winsys_screen *rws,
desc.alignment = alignment;
desc.usage = usage;
- if (usage & PIPE_BUFFER_USAGE_CONSTANT)
+ if (usage & PIPE_BIND_CONSTANT_BUFFER)
provider = ws->mman;
- else if ((usage & PIPE_BUFFER_USAGE_VERTEX) ||
- (usage & PIPE_BUFFER_USAGE_INDEX))
+ else if ((usage & PIPE_BIND_VERTEX_BUFFER) ||
+ (usage & PIPE_BIND_INDEX_BUFFER))
provider = ws->cman;
else
provider = ws->kman;
@@ -72,6 +72,15 @@ static void radeon_r300_winsys_buffer_set_tiling(struct r300_winsys_screen *rws,
radeon_drm_bufmgr_set_tiling(_buf, microtiled, macrotiled, pitch);
}
+static void radeon_r300_winsys_buffer_get_tiling(struct r300_winsys_screen *rws,
+ struct r300_winsys_buffer *buf,
+ enum r300_buffer_tiling *microtiled,
+ enum r300_buffer_tiling *macrotiled)
+{
+ struct pb_buffer *_buf = radeon_pb_buffer(buf);
+ radeon_drm_bufmgr_get_tiling(_buf, microtiled, macrotiled);
+}
+
static void *radeon_r300_winsys_buffer_map(struct r300_winsys_screen *ws,
struct r300_winsys_buffer *buf,
unsigned usage)
@@ -255,6 +264,8 @@ static uint32_t radeon_get_value(struct r300_winsys_screen *rws,
return ws->z_pipes;
case R300_VID_SQUARE_TILING_SUPPORT:
return ws->squaretiling;
+ case R300_VID_TEX3D_MIP_BUG:
+ return ws->tex3d_mip_bug;
}
return 0;
}
@@ -320,6 +331,7 @@ radeon_setup_winsys(int fd, struct radeon_libdrm_winsys* ws)
ws->base.buffer_create = radeon_r300_winsys_buffer_create;
ws->base.buffer_destroy = radeon_r300_winsys_buffer_destroy;
ws->base.buffer_set_tiling = radeon_r300_winsys_buffer_set_tiling;
+ ws->base.buffer_get_tiling = radeon_r300_winsys_buffer_get_tiling;
ws->base.buffer_map = radeon_r300_winsys_buffer_map;
ws->base.buffer_unmap = radeon_r300_winsys_buffer_unmap;
ws->base.buffer_reference = radeon_r300_winsys_buffer_reference;
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index 4260dbaad7..396f258c31 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -60,6 +60,9 @@ struct radeon_libdrm_winsys {
/* Square tiling support. */
boolean squaretiling;
+ /* Square tiling support. */
+ boolean tex3d_mip_bug;
+
/* DRM FD */
int fd;
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-21 20:31:04 +0000