summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorThomas Hellström <thomas@tungstengraphics.com>2006-09-15 14:52:31 +0000
committerThomas Hellström <thomas@tungstengraphics.com>2006-09-15 14:52:31 +0000
commit6a33e6d2212c583f59eae4c1c7bcb8c535886e89 (patch)
tree525aa0c3dd58c6b24932bce239bc4f7bcad76a00 /src
parentfc4bc6fc97787a31501060e02e42fbf6931d809a (diff)
Wait for buffer idle unlocked before mapping in some cases.
Greatly improves responsiveness. Add an MI_FLUSH after each batchbuffer and tell the kernel we're doing so with the new DRM_I915_FENCE_FLAG_FLUSHED (Requires drm update). This can be done on a per-batchbuffer basis. The DRM handles all fence accounting and signals earlier fences that also needs a flush.
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i915/intel_batchbuffer.c14
-rw-r--r--src/mesa/drivers/dri/i915/intel_regions.c7
-rw-r--r--src/mesa/drivers/dri/i915/intel_regions.h3
-rw-r--r--src/mesa/drivers/dri/i915/intel_span.c2
-rw-r--r--src/mesa/drivers/dri/i915/intel_tex_image.c3
-rw-r--r--src/mesa/drivers/dri/i915/intel_tex_subimage.c5
6 files changed, 26 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_batchbuffer.c b/src/mesa/drivers/dri/i915/intel_batchbuffer.c
index 02c8ab92cf..ff822d46bc 100644
--- a/src/mesa/drivers/dri/i915/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i915/intel_batchbuffer.c
@@ -159,6 +159,7 @@ do_flush_locked(struct intel_batchbuffer *batch,
GLuint *ptr;
GLuint i;
struct intel_context *intel = batch->intel;
+ unsigned fenceFlags;
driBOValidateList(batch->intel->driFd, &batch->list);
@@ -213,12 +214,13 @@ do_flush_locked(struct intel_batchbuffer *batch,
driFenceUnReference(batch->last_fence);
/*
- * Kernel fencing.
+ * Kernel fencing. The flags tells the kernel that we've
+ * programmed an MI_FLUSH.
*/
-
-
+
+ fenceFlags = DRM_I915_FENCE_FLAG_FLUSHED;
batch->last_fence = driFenceBuffers(batch->intel->driFd,
- "Batch fence", 0);
+ "Batch fence", fenceFlags);
/*
* User space fencing.
@@ -254,13 +256,13 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
* performance drain that we would like to avoid.
*/
if (used & 4) {
- ((int *) batch->ptr)[0] = 0; /*intel->vtbl.flush_cmd(); */
+ ((int *) batch->ptr)[0] = intel->vtbl.flush_cmd();
((int *) batch->ptr)[1] = 0;
((int *) batch->ptr)[2] = MI_BATCH_BUFFER_END;
used += 12;
}
else {
- ((int *) batch->ptr)[0] = 0; /*intel->vtbl.flush_cmd(); */
+ ((int *) batch->ptr)[0] = intel->vtbl.flush_cmd();
((int *) batch->ptr)[1] = MI_BATCH_BUFFER_END;
used += 8;
}
diff --git a/src/mesa/drivers/dri/i915/intel_regions.c b/src/mesa/drivers/dri/i915/intel_regions.c
index 1ec729b4f3..12421c59e7 100644
--- a/src/mesa/drivers/dri/i915/intel_regions.c
+++ b/src/mesa/drivers/dri/i915/intel_regions.c
@@ -48,6 +48,13 @@
#define FILE_DEBUG_FLAG DEBUG_BUFMGR
+void
+intel_region_idle(struct intel_context *intel, struct intel_region *region)
+{
+ DBG("%s\n", __FUNCTION__);
+ if (driBOMap(region->buffer, DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0))
+ driBOUnmap(region->buffer);
+}
/* XXX: Thread safety?
*/
diff --git a/src/mesa/drivers/dri/i915/intel_regions.h b/src/mesa/drivers/dri/i915/intel_regions.h
index e3a285fe86..fcdbe2c656 100644
--- a/src/mesa/drivers/dri/i915/intel_regions.h
+++ b/src/mesa/drivers/dri/i915/intel_regions.h
@@ -78,6 +78,9 @@ struct intel_region *intel_region_create_static(struct intel_context *intel,
GLuint cpp,
GLuint pitch, GLuint height);
+void intel_region_idle(struct intel_context *intel,
+ struct intel_region *ib);
+
/* Map/unmap regions. This is refcounted also:
*/
GLubyte *intel_region_map(struct intel_context *intel,
diff --git a/src/mesa/drivers/dri/i915/intel_span.c b/src/mesa/drivers/dri/i915/intel_span.c
index efce3b7e4e..ec68bf1280 100644
--- a/src/mesa/drivers/dri/i915/intel_span.c
+++ b/src/mesa/drivers/dri/i915/intel_span.c
@@ -313,7 +313,7 @@ intelSpanRenderStart(GLcontext * ctx)
struct intel_context *intel = intel_context(ctx);
GLuint i;
- intelFlush(&intel->ctx);
+ intelFinish(&intel->ctx);
LOCK_HARDWARE(intel);
#if 0
diff --git a/src/mesa/drivers/dri/i915/intel_tex_image.c b/src/mesa/drivers/dri/i915/intel_tex_image.c
index cdf6c8c565..d32ad4d872 100644
--- a/src/mesa/drivers/dri/i915/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i915/intel_tex_image.c
@@ -461,6 +461,9 @@ intelTexImage(GLcontext * ctx,
return;
+ if (intelImage->mt)
+ intel_region_idle(intel, intelImage->mt->region);
+
LOCK_HARDWARE(intel);
if (intelImage->mt) {
diff --git a/src/mesa/drivers/dri/i915/intel_tex_subimage.c b/src/mesa/drivers/dri/i915/intel_tex_subimage.c
index e7c7220872..8ecf64fbba 100644
--- a/src/mesa/drivers/dri/i915/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i915/intel_tex_subimage.c
@@ -65,12 +65,15 @@ intelTexSubimage(GLcontext * ctx,
if (!pixels)
return;
+ if (intelImage->mt)
+ intel_region_idle(intel, intelImage->mt->region);
+
LOCK_HARDWARE(intel);
/* Map buffer if necessary. Need to lock to prevent other contexts
* from uploading the buffer under us.
*/
- if (intelImage->mt)
+ if (intelImage->mt)
texImage->Data = intel_miptree_image_map(intel,
intelImage->mt,
intelImage->face,