Merge branch 'master' into asm-shader-rework-3asm-shader-rework-3

Conflicts:
	src/mesa/shader/lex.yy.c

1 files changed, 70 insertions, 107 deletions

diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c
index 72d33150af..e12a6ad648 100644
--- a/src/gallium/drivers/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nv50/nv50_tex.c
@@ -25,106 +25,60 @@
 
 #include "nouveau/nouveau_stateobj.h"
 
+#define _(pf, tt, r, g, b, a, tf)                       	\
+{                                                       	\
+	PIPE_FORMAT_##pf,					\
+	NV50TIC_0_0_MAPR_##r | NV50TIC_0_0_TYPER_##tt |		\
+	NV50TIC_0_0_MAPG_##g | NV50TIC_0_0_TYPEG_##tt |		\
+	NV50TIC_0_0_MAPB_##b | NV50TIC_0_0_TYPEB_##tt |		\
+	NV50TIC_0_0_MAPA_##a | NV50TIC_0_0_TYPEA_##tt |		\
+	NV50TIC_0_0_FMT_##tf					\
+}
+
+struct nv50_texture_format {
+	enum pipe_format pf;
+	uint32_t hw;
+};
+
+#define NV50_TEX_FORMAT_LIST_SIZE \
+	(sizeof(nv50_tex_format_list) / sizeof(struct nv50_texture_format))
+
+static const struct nv50_texture_format nv50_tex_format_list[] =
+{
+	_(A8R8G8B8_UNORM, UNORM, C2, C1, C0, C3,  8_8_8_8),
+	_(X8R8G8B8_UNORM, UNORM, C2, C1, C0, ONE, 8_8_8_8),
+	_(A1R5G5B5_UNORM, UNORM, C2, C1, C0, C3,  1_5_5_5),
+	_(A4R4G4B4_UNORM, UNORM, C2, C1, C0, C3,  4_4_4_4),
+
+	_(R5G6B5_UNORM, UNORM, C2, C1, C0, ONE, 5_6_5),
+
+	_(L8_UNORM, UNORM, C0, C0, C0, ONE, 8),
+	_(A8_UNORM, UNORM, ZERO, ZERO, ZERO, C0, 8),
+	_(I8_UNORM, UNORM, C0, C0, C0, C0, 8),
+
+	_(A8L8_UNORM, UNORM, C0, C0, C0, C1, 8_8),
+
+	_(DXT1_RGB, UNORM, C0, C1, C2, ONE, DXT1),
+	_(DXT1_RGBA, UNORM, C0, C1, C2, C3, DXT1),
+	_(DXT3_RGBA, UNORM, C0, C1, C2, C3, DXT3),
+	_(DXT5_RGBA, UNORM, C0, C1, C2, C3, DXT5)
+};
+
+#undef _
+
 static int
 nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so,
 		   struct nv50_miptree *mt, int unit)
 {
-	switch (mt->base.base.format) {
-	case PIPE_FORMAT_A8R8G8B8_UNORM:
-		so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_8_8_8_8);
-		break;
-	case PIPE_FORMAT_X8R8G8B8_UNORM:
-		so_data(so, NV50TIC_0_0_MAPA_ONE | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_8_8_8_8);
-		break;
-	case PIPE_FORMAT_A1R5G5B5_UNORM:
-		so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_1_5_5_5);
-		break;
-	case PIPE_FORMAT_A4R4G4B4_UNORM:
-		so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_4_4_4_4);
-		break;
-	case PIPE_FORMAT_R5G6B5_UNORM:
-		so_data(so, NV50TIC_0_0_MAPA_ONE | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_5_6_5);
-		break;
-	case PIPE_FORMAT_L8_UNORM:
-		so_data(so, NV50TIC_0_0_MAPA_ONE | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C0 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_8);
-		break;
-	case PIPE_FORMAT_A8_UNORM:
-		so_data(so, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_8);
-		break;
-	case PIPE_FORMAT_I8_UNORM:
-		so_data(so, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C0 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_8);
-		break;
-	case PIPE_FORMAT_A8L8_UNORM:
-		so_data(so, NV50TIC_0_0_MAPA_C1 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C0 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_8_8);
-		break;
-	case PIPE_FORMAT_DXT1_RGB:
-		so_data(so, NV50TIC_0_0_MAPA_ONE | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_DXT1);
-		break;
-	case PIPE_FORMAT_DXT1_RGBA:
-		so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_DXT1);
-		break;
-	case PIPE_FORMAT_DXT3_RGBA:
-		so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_DXT3);
-		break;
-	case PIPE_FORMAT_DXT5_RGBA:
-		so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
-			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
-			    NV50TIC_0_0_FMT_DXT5);
-		break;
-	default:
-		return 1;
-	}
+	unsigned i;
 
+	for (i = 0; i < NV50_TEX_FORMAT_LIST_SIZE; i++)
+		if (nv50_tex_format_list[i].pf == mt->base.base.format)
+			break;
+	if (i == NV50_TEX_FORMAT_LIST_SIZE)
+                return 1;
+
+	so_data (so, nv50_tex_format_list[i].hw);
 	so_reloc(so, mt->base.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
 		     NOUVEAU_BO_RD, 0, 0);
 	if (nv50->sampler[unit]->normalized)
@@ -144,23 +98,24 @@ nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so,
 void
 nv50_tex_validate(struct nv50_context *nv50)
 {
+	struct nouveau_grobj *eng2d = nv50->screen->eng2d;
 	struct nouveau_grobj *tesla = nv50->screen->tesla;
 	struct nouveau_stateobj *so;
-	int unit, push;
+	unsigned i, unit, push;
+
+	push = MAX2(nv50->miptree_nr, nv50->state.miptree_nr) * 2 + 23 + 6;
+	so = so_new(nv50->miptree_nr * 9 + push, nv50->miptree_nr + 2);
 
-	push  = nv50->miptree_nr * 9 + 2;
-	push += MAX2(nv50->miptree_nr, nv50->state.miptree_nr) * 2;
+	nv50_so_init_sifc(nv50, so, nv50->screen->tic, NOUVEAU_BO_VRAM,
+			  nv50->miptree_nr * 8 * 4);
 
-	so = so_new(push, nv50->miptree_nr * 2);
-	so_method(so, tesla, NV50TCL_CB_ADDR, 1);
-	so_data  (so, NV50_CB_TIC);
-	for (unit = 0; unit < nv50->miptree_nr; unit++) {
+	for (i = 0, unit = 0; unit < nv50->miptree_nr; ++unit) {
 		struct nv50_miptree *mt = nv50->miptree[unit];
 
 		if (!mt)
 			continue;
 
-		so_method(so, tesla, NV50TCL_CB_DATA(0) | 0x40000000, 8);
+		so_method(so, eng2d, NV50_2D_SIFC_DATA | (2 << 29), 8);
 		if (nv50_tex_construct(nv50, so, mt, unit)) {
 			NOUVEAU_ERR("failed tex validate\n");
 			so_ref(NULL, &so);
@@ -168,17 +123,25 @@ nv50_tex_validate(struct nv50_context *nv50)
 		}
 
 		so_method(so, tesla, NV50TCL_SET_SAMPLER_TEX, 1);
-		so_data  (so, (unit << NV50TCL_SET_SAMPLER_TEX_TIC_SHIFT) |
-			(unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) |
-			NV50TCL_SET_SAMPLER_TEX_VALID);
+		so_data  (so, (i++ << NV50TCL_SET_SAMPLER_TEX_TIC_SHIFT) |
+			  (unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) |
+			  NV50TCL_SET_SAMPLER_TEX_VALID);
 	}
 
 	for (; unit < nv50->state.miptree_nr; unit++) {
 		so_method(so, tesla, NV50TCL_SET_SAMPLER_TEX, 1);
 		so_data  (so,
-			(unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) | 0);
+			  (unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) | 0);
 	}
 
+	/* not sure if the following really do what I think: */
+	so_method(so, tesla, 0x1440, 1); /* sync SIFC */
+	so_data  (so, 0);
+	so_method(so, tesla, 0x1330, 1); /* flush TIC */
+	so_data  (so, 0);
+	so_method(so, tesla, 0x1338, 1); /* flush texture caches */
+	so_data  (so, 0x20);
+
 	so_ref(so, &nv50->state.tic_upload);
 	so_ref(NULL, &so);
 	nv50->state.miptree_nr = nv50->miptree_nr;