diff options
| -rw-r--r-- | Documentation/devicetree/bindings/arm/davinci/cp-intc.txt | 27 | ||||
| -rw-r--r-- | arch/arm/mach-davinci/cp_intc.c | 16 | ||||
| -rw-r--r-- | arch/arm/mach-davinci/include/mach/cp_intc.h | 1 |
3 files changed, 41 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/arm/davinci/cp-intc.txt b/Documentation/devicetree/bindings/arm/davinci/cp-intc.txt new file mode 100644 index 00000000000..597e8a089fe --- /dev/null +++ b/Documentation/devicetree/bindings/arm/davinci/cp-intc.txt @@ -0,0 +1,27 @@ +* TI Common Platform Interrupt Controller + +Common Platform Interrupt Controller (cp_intc) is used on +OMAP-L1x SoCs and can support several configurable number +of interrupts. + +Main node required properties: + +- compatible : should be: + "ti,cp-intc" +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The type shall be a <u32> and the value shall be 1. + + The cell contains the interrupt number in the range [0-128]. +- ti,intc-size: Number of interrupts handled by the interrupt controller. +- reg: physical base address and size of the intc registers map. + +Example: + + intc: interrupt-controller@1 { + compatible = "ti,cp-intc"; + interrupt-controller; + #interrupt-cells = <1>; + ti,intc-size = <101>; + reg = <0xfffee000 0x2000>; + }; diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c index 45d52567ced..006dae8dfe4 100644 --- a/arch/arm/mach-davinci/cp_intc.c +++ b/arch/arm/mach-davinci/cp_intc.c @@ -14,6 +14,9 @@ #include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/io.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <mach/common.h> #include <mach/cp_intc.h> @@ -119,7 +122,7 @@ static const struct irq_domain_ops cp_intc_host_ops = { .xlate = irq_domain_xlate_onetwocell, }; -int __init __cp_intc_init(struct device_node *node) +int __init cp_intc_of_init(struct device_node *node, struct device_node *parent) { u32 num_irq = davinci_soc_info.intc_irq_num; u8 *irq_prio = davinci_soc_info.intc_irq_prios; @@ -128,7 +131,14 @@ int __init __cp_intc_init(struct device_node *node) int i, irq_base; davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC; - davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K); + if (node) { + davinci_intc_base = of_iomap(node, 0); + if (of_property_read_u32(node, "ti,intc-size", &num_irq)) + pr_warn("unable to get intc-size, default to %d\n", + num_irq); + } else { + davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K); + } if (WARN_ON(!davinci_intc_base)) return -EINVAL; @@ -208,5 +218,5 @@ int __init __cp_intc_init(struct device_node *node) void __init cp_intc_init(void) { - __cp_intc_init(NULL); + cp_intc_of_init(NULL, NULL); } diff --git a/arch/arm/mach-davinci/include/mach/cp_intc.h b/arch/arm/mach-davinci/include/mach/cp_intc.h index 4e8190eed67..d13d8dfa2b0 100644 --- a/arch/arm/mach-davinci/include/mach/cp_intc.h +++ b/arch/arm/mach-davinci/include/mach/cp_intc.h @@ -52,5 +52,6 @@ #define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2)) void __init cp_intc_init(void); +int __init cp_intc_of_init(struct device_node *, struct device_node *); #endif /* __ASM_HARDWARE_CP_INTC_H */ |