diff options
| author | Kyle McMartin <kyle@dreadnought.i.jkkm.org> | 2010-10-14 00:38:27 -0400 |
|---|---|---|
| committer | Kyle McMartin <kyle@dreadnought.i.jkkm.org> | 2010-10-14 01:30:16 -0400 |
| commit | f3d4605977f9f30993c670a85f75d8f3853144c5 (patch) | |
| tree | 02e63b1b9a3f5ff039e9946371e39fca389eb1d5 | |
| parent | 4d4f681dc43a06167763ec698f5de4f2b3119ad6 (diff) | |
parisc: convert iosapic interrupts to proper flow handlers
Shift the ->end call (cpu eoi) from __do_IRQ into our
unmask handler. Also nuke some redundant code.
Signed-off-by: Kyle McMartin <kyle@redhat.com>
| -rw-r--r-- | arch/parisc/kernel/irq.c | 2 | ||||
| -rw-r--r-- | drivers/parisc/iosapic.c | 37 |
2 files changed, 7 insertions, 32 deletions
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 13bfa9702fd..e873edaf274 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -241,7 +241,7 @@ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) /* for iosapic interrupts */ if (type) { - set_irq_chip_and_handler(irq, type, parisc_do_IRQ); + set_irq_chip_and_handler(irq, type, handle_level_irq); set_irq_chip_data(irq, data); cpu_unmask_irq(irq); } diff --git a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c index 13020881d08..edab2941e1d 100644 --- a/drivers/parisc/iosapic.c +++ b/drivers/parisc/iosapic.c @@ -615,7 +615,7 @@ iosapic_set_irt_data( struct vector_info *vi, u32 *dp0, u32 *dp1) } -static void iosapic_disable_irq(unsigned int irq) +static void iosapic_mask_irq(unsigned int irq) { unsigned long flags; struct vector_info *vi = get_irq_chip_data(irq); @@ -628,7 +628,7 @@ static void iosapic_disable_irq(unsigned int irq) spin_unlock_irqrestore(&iosapic_lock, flags); } -static void iosapic_enable_irq(unsigned int irq) +static void iosapic_unmask_irq(unsigned int irq) { struct vector_info *vi = get_irq_chip_data(irq); u32 d0, d1; @@ -669,31 +669,9 @@ printk("\n"); DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", irq, vi->eoi_addr, vi->eoi_data); iosapic_eoi(vi->eoi_addr, vi->eoi_data); -} - -/* - * PARISC only supports PCI devices below I/O SAPIC. - * PCI only supports level triggered in order to share IRQ lines. - * ergo I/O SAPIC must always issue EOI on parisc. - * - * i386/ia64 support ISA devices and have to deal with - * edge-triggered interrupts too. - */ -static void iosapic_end_irq(unsigned int irq) -{ - struct vector_info *vi = get_irq_chip_data(irq); - DBG(KERN_DEBUG "end_irq(%d): eoi(%p, 0x%x)\n", irq, - vi->eoi_addr, vi->eoi_data); - iosapic_eoi(vi->eoi_addr, vi->eoi_data); cpu_eoi_irq(irq); } -static unsigned int iosapic_startup_irq(unsigned int irq) -{ - iosapic_enable_irq(irq); - return 0; -} - #ifdef CONFIG_SMP static int iosapic_set_affinity_irq(unsigned int irq, const struct cpumask *dest) @@ -723,13 +701,10 @@ static int iosapic_set_affinity_irq(unsigned int irq, #endif static struct irq_chip iosapic_interrupt_type = { - .name = "IO-SAPIC-level", - .startup = iosapic_startup_irq, - .shutdown = iosapic_disable_irq, - .enable = iosapic_enable_irq, - .disable = iosapic_disable_irq, - .ack = cpu_ack_irq, - .end = iosapic_end_irq, + .name = "IO-SAPIC-level", + .unmask = iosapic_unmask_irq, + .mask = iosapic_mask_irq, + .ack = cpu_ack_irq, #ifdef CONFIG_SMP .set_affinity = iosapic_set_affinity_irq, #endif |