1 files changed, 77 insertions, 25 deletions

diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_accel.c
index 5b0223661..f42569767 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_accel.c
@@ -1,8 +1,8 @@
 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/r128/r128_accel.c,v 1.7 2000/02/23 04:47:18 martin Exp $ */
 /**************************************************************************
 
-Copyright 1999 ATI Technologies Inc. and Precision Insight, Inc.,
-                                         Cedar Park, Texas. 
+Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
+                                               Cedar Park, Texas. 
 All Rights Reserved.
 
 Permission is hereby granted, free of charge, to any person obtaining a
@@ -95,6 +95,19 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 				/* DDC support */
 #include "xf86DDC.h"
 
+				/* DRI support */
+#ifdef XF86DRI
+#include "GL/glxint.h"
+#include "xf86drm.h"
+#include "sarea.h"
+#define _XF86DRI_SERVER_
+#include "xf86dri.h"
+#include "dri.h"
+#include "r128_dri.h"
+#include "r128_dripriv.h"
+#include "r128_sarea.h"
+#endif
+
 				/* Driver data structures */
 #include "r128.h"
 #include "r128_reg.h"
@@ -122,7 +135,7 @@ static struct {
 };
 
 /* Flush all dirty data in the Pixel Cache to memory. */
-static void R128EngineFlush(ScrnInfoPtr pScrn)
+void R128EngineFlush(ScrnInfoPtr pScrn)
 {
     int i;
     R128MMIO_VARS();
@@ -134,11 +147,12 @@ static void R128EngineFlush(ScrnInfoPtr pScrn)
 }
 
 /* Reset graphics card to known state. */
-static void R128EngineReset(ScrnInfoPtr pScrn)
+void R128EngineReset(ScrnInfoPtr pScrn)
 {
-    CARD32 clock_cntl_index;
-    CARD32 mclk_cntl;
-    CARD32 gen_reset_cntl;
+    R128InfoPtr info = R128PTR(pScrn);
+    CARD32      clock_cntl_index;
+    CARD32      mclk_cntl;
+    CARD32      gen_reset_cntl;
     R128MMIO_VARS();
 	
     R128EngineFlush(pScrn);
@@ -158,17 +172,15 @@ static void R128EngineReset(ScrnInfoPtr pScrn)
     OUTPLL(R128_MCLK_CNTL,        mclk_cntl);
     OUTREG(R128_CLOCK_CNTL_INDEX, clock_cntl_index);
     OUTREG(R128_GEN_RESET_CNTL,   gen_reset_cntl);
-}
 
-#define R128WaitForFifo(pScrn, entries)                                      \
-do {                                                                         \
-    if (info->fifo_slots < entries) R128WaitForFifoFunction(pScrn, entries); \
-    info->fifo_slots -= entries;                                             \
-} while (0)
+#ifdef XF86DRI
+    if (R128CCE_USE_RING_BUFFER(info->CCEMode)) R128CCEResetRing(pScrn);
+#endif
+}
 
 /* The FIFO has 64 slots.  This routines waits until at least `entries' of
    these slots are empty. */
-static void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
+void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
 {
     R128InfoPtr info = R128PTR(pScrn);
     int         i;
@@ -186,15 +198,19 @@ static void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		   "FIFO timed out, resetting engine...\n");
 	R128EngineReset(pScrn);
+#if XF86DRI
+	if (info->CCE2D) R128CCEStart(pScrn);
+#endif
     }
 }
 
 /* Wait for the graphics engine to be completely idle: the FIFO has
    drained, the Pixel Cache is flushed, and the engine is idle.  This is a
    standard "sync" function that will make the hardware "quiescent". */
-static void R128WaitForIdle(ScrnInfoPtr pScrn)
+void R128WaitForIdle(ScrnInfoPtr pScrn)
 {
-    int i;
+    R128InfoPtr info = R128PTR(pScrn);
+    int         i;
     R128MMIO_VARS();
 
     R128WaitForFifoFunction(pScrn, 64);
@@ -213,6 +229,9 @@ static void R128WaitForIdle(ScrnInfoPtr pScrn)
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		   "Idle timed out, resetting engine...\n");
 	R128EngineReset(pScrn);
+#if XF86DRI
+	if (info->CCE2D) R128CCEStart(pScrn);
+#endif
     }
 }
 
@@ -966,19 +985,33 @@ void R128EngineInit(ScrnInfoPtr pScrn)
     OUTREG(R128_DP_SRC_BKGD_CLR,   0x00000000);
     OUTREG(R128_DP_WRITE_MASK,     0xffffffff);
 
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    OUTREGP(R128_DP_DATATYPE,
+	    R128_HOST_BIG_ENDIAN_EN, ~R128_HOST_BIG_ENDIAN_EN);
+#else
+    OUTREGP(R128_DP_DATATYPE, 0, ~R128_HOST_BIG_ENDIAN_EN);
+#endif
+
     R128WaitForIdle(pScrn);
 }
 
-/* Initialize XAA for supported acceleration and also initialize the
-   graphics hardware for acceleration. */
-Bool R128AccelInit(ScreenPtr pScreen)
+#ifdef XF86DRI
+    /* FIXME: When direct rendering is enabled, we should use the CCE to
+       draw 2D commands */
+static void R128CCEAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
 {
-    ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
-    R128InfoPtr   info  = R128PTR(pScrn);
-    XAAInfoRecPtr a;
+    a->Flags                            = 0;
+
+				/* Sync */
+    a->Sync                             = R128CCEWaitForIdle;
+
+}
+#endif
+
+static void R128MMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
+{
+    R128InfoPtr info = R128PTR(pScrn);
 
-    if (!(a = info->accel = XAACreateInfoRec())) return FALSE;
-    
     a->Flags                            = (PIXMAP_CACHE
 					   | OFFSCREEN_PIXMAPS
 					   | LINEAR_FRAMEBUFFER);
@@ -1065,7 +1098,26 @@ Bool R128AccelInit(ScreenPtr pScreen)
 					  | SCANLINE_PAD_DWORD
 					  | SYNC_AFTER_IMAGE_WRITE);
 #endif
-    
+}
+
+/* Initialize XAA for supported acceleration and also initialize the
+   graphics hardware for acceleration. */
+Bool R128AccelInit(ScreenPtr pScreen)
+{
+    ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
+    R128InfoPtr   info  = R128PTR(pScrn);
+    XAAInfoRecPtr a;
+
+    if (!(a = info->accel = XAACreateInfoRec())) return FALSE;
+
+#ifdef XF86DRI
+    /* FIXME: When direct rendering is enabled, we should use the CCE to
+       draw 2D commands */
+    if (info->CCE2D) R128CCEAccelInit(pScrn, a);
+    else
+#endif
+	R128MMIOAccelInit(pScrn, a);
+
     R128EngineInit(pScrn);
     return XAAInit(pScreen, a);
 }