diff options
Diffstat (limited to 'xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c')
| -rw-r--r-- | xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c | 72 |
1 files changed, 50 insertions, 22 deletions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c index 1cfa03f31..d81d12b3a 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c @@ -2,7 +2,7 @@ * MGA-1064, MGA-G100, MGA-G200, MGA-G400 RAMDAC driver */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c,v 1.30 1999/08/22 05:57:33 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c,v 1.33 1999/12/03 04:03:52 mvojkovi Exp $ */ /* * This is a first cut at a non-accelerated version to work with the @@ -24,6 +24,7 @@ #include "mga_bios.h" #include "mga_reg.h" +#include "mga_macros.h" #include "mga.h" #include "xf86DDC.h" @@ -330,24 +331,40 @@ MGAGInit(ScrnInfoPtr pScrn, DisplayModePtr mode) pReg->Option2 = 0x0000007; break; case PCI_CHIP_MGAG400: - if(pMga->OverclockMem) { - /* 166 Mhz but faster graphics engine clock */ - pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x13; - pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x7A; - pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x08; - pReg->Option3 = 0x0190a421; + if(pMga->Dac.maxPixelClock == 360000) { /* G400 MAX */ + if(pMga->OverclockMem) { + /* 150/200 */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x05; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x42; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x18; + pReg->Option3 = 0x019B8419; + pReg->Option = 0x50574120; + } else { + /* 125/166 */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x02; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x1B; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x18; + pReg->Option3 = 0x019B8419; + pReg->Option = 0x5053C120; + } } else { - /* 165 Mhz */ - pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x09; - pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x3C; - pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x10; - pReg->Option3 = 0x0190a419; - } + if(pMga->OverclockMem) { + /* 125/166 */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x02; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x1B; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x18; + pReg->Option3 = 0x019B8419; + pReg->Option = 0x5053C120; + } else { + /* 110/166 */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x13; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x7A; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x08; + pReg->Option3 = 0x0190a421; + pReg->Option = 0x50044120; + } + } pReg->Option2 = 0x01003000; - if(pMga->HasSDRAM) - pReg->Option = 0x50040120; - else - pReg->Option = 0x50044120; break; case PCI_CHIP_MGAG200: case PCI_CHIP_MGAG200_PCI: @@ -371,10 +388,9 @@ MGAGInit(ScrnInfoPtr pScrn, DisplayModePtr mode) break; } - if(pMga->UsePCIRetry) - pReg->Option &= ~0x20000000; - else - pReg->Option |= 0x20000000; + /* must always have the pci retries on but rely on + polling to keep them from occuring */ + pReg->Option &= ~0x20000000; switch(pLayout->bitsPerPixel) { @@ -579,6 +595,8 @@ MGAGRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg, int i; MGAPtr pMga = MGAPTR(pScrn); + CHECK_DMA_QUIESCENT( pMga, pScrn ); + /* * Code is needed to get things back to bank zero. */ @@ -656,6 +674,8 @@ MGAGSave(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg, int i; MGAPtr pMga = MGAPTR(pScrn); + CHECK_DMA_QUIESCENT( pMga, pScrn ); + /* Allocate the DacRegs space if not done already */ if (mgaReg->DacRegs == NULL) { mgaReg->DacRegs = xnfcalloc(DACREGSIZE, 1); @@ -749,6 +769,9 @@ MGAGSetCursorPosition(ScrnInfoPtr pScrn, int x, int y) x += 64; y += 64; + /* This doesn't require DMA quiescence (what about flush?) + */ + /* cursor update must never occurs during a retrace period (pp 4-160) */ while( INREG( MGAREG_Status ) & 0x08 ); @@ -915,7 +938,12 @@ MGAGRamdacInit(ScrnInfoPtr pScrn) MGAdac->maxPixelClock = 220000; break; case PCI_CHIP_MGAG400: - MGAdac->maxPixelClock = 300000; + /* We don't know the new pins format but we know that + the maxclock / 4 is where the RamdacType was in the + old pins format */ + MGAdac->maxPixelClock = pMga->Bios2.RamdacType * 4000; + if(MGAdac->maxPixelClock < 300000) + MGAdac->maxPixelClock = 300000; break; default: MGAdac->maxPixelClock = 250000; |