Import of XFree86 4.0.1fX_4_0_1f

124 files changed, 11407 insertions, 5787 deletions

diff --git a/xc/programs/Xserver/GL/dri/dri.c b/xc/programs/Xserver/GL/dri/dri.c
index 2f24f0db3..23f410b53 100644
--- a/xc/programs/Xserver/GL/dri/dri.c
+++ b/xc/programs/Xserver/GL/dri/dri.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/GL/dri/dri.c,v 1.21 2000/09/26 15:57:01 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/GL/dri/dri.c,v 1.22 2000/11/08 05:02:55 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -68,9 +68,7 @@ static int DRIScreenPrivIndex = -1;
 static int DRIWindowPrivIndex = -1;
 static unsigned long DRIGeneration = 0;
 static unsigned int DRIDrawableValidationStamp = 0;
-/* We know there will be one extra unlock during startup. Setting this to
-   -1, flags that we are in this initialization case */
-static int lockRefCount=-1;
+static int lockRefCount=0;
 
 static RESTYPE DRIDrawablePrivResType;
 static RESTYPE DRIContextPrivResType;
@@ -125,7 +123,7 @@ DRIScreenInit(ScreenPtr pScreen, DRIInfoPtr pDRIInfo, int *pDRMFD)
                  pDRIInfo->drmDriverName);
     }
 
-    pDRIPriv = (DRIScreenPrivPtr) xalloc(sizeof(DRIScreenPrivRec));
+    pDRIPriv = (DRIScreenPrivPtr) xcalloc(1, sizeof(DRIScreenPrivRec));
     if (!pDRIPriv) {
         pScreen->devPrivates[DRIScreenPrivIndex].ptr = NULL;
         return FALSE;
@@ -237,6 +235,9 @@ DRIScreenInit(ScreenPtr pScreen, DRIInfoPtr pDRIInfo, int *pDRMFD)
 	pDRIPriv->pSAREA->drawableTable[i].flags = 0;
     }
 
+    /* Grab the hardware lock */
+    DRILock(pScreen, 0);
+
     return TRUE;
 }
 
@@ -278,7 +279,7 @@ DRIFinishScreenInit(ScreenPtr pScreen)
 	
 	/* allocate memory for hidden context store */
 	pDRIPriv->hiddenContextStore
-	    = (void *)xalloc(pDRIInfo->contextSize);
+	    = (void *)xcalloc(1, pDRIInfo->contextSize);
 	if (!pDRIPriv->hiddenContextStore) {
 	    DRIDrvMsg(pScreen->myNum, X_ERROR, 
 		      "failed to allocate hidden context\n");
@@ -288,7 +289,7 @@ DRIFinishScreenInit(ScreenPtr pScreen)
 
 	/* allocate memory for partial 3D context store */
 	pDRIPriv->partial3DContextStore
-	    = (void *)xalloc(pDRIInfo->contextSize);
+	    = (void *)xcalloc(1, pDRIInfo->contextSize);
 	if (!pDRIPriv->partial3DContextStore) {
 	    DRIDrvMsg(pScreen->myNum, X_ERROR, 
 		      "[DRI] failed to allocate partial 3D context\n");
@@ -400,7 +401,7 @@ DRICloseScreen(ScreenPtr pScreen)
 	}
 
 	DRIUnlock(pScreen);
-	lockRefCount=-1;
+	lockRefCount=0;
 	DRIDrvMsg(pScreen->myNum, X_INFO,
 		  "[drm] unmapping %d bytes of SAREA 0x%08lx at %p\n",
 		  pDRIPriv->pDriverInfo->SAREASize,
@@ -558,7 +559,7 @@ DRICreateContextPrivFromHandle(ScreenPtr pScreen,
 
     contextPrivSize = sizeof(DRIContextPrivRec) +
 			    pDRIPriv->pDriverInfo->contextSize;
-    if (!(pDRIContextPriv = xalloc(contextPrivSize))) {
+    if (!(pDRIContextPriv = xcalloc(1, contextPrivSize))) {
 	return NULL;
     }
     pDRIContextPriv->pContextStore = (void *)(pDRIContextPriv + 1);
@@ -1052,7 +1053,7 @@ DRIGetDeviceInfo(ScreenPtr pScreen,
 DRIInfoPtr
 DRICreateInfoRec(void)
 {
-    DRIInfoPtr inforec = (DRIInfoPtr)xalloc(sizeof(DRIInfoRec));
+    DRIInfoPtr inforec = (DRIInfoPtr)xcalloc(1, sizeof(DRIInfoRec));
     if (!inforec) return NULL;
 
     /* Initialize defaults */
@@ -1616,10 +1617,6 @@ DRIUnlock(ScreenPtr pScreen) {
 
     if (lockRefCount>0) lockRefCount--;
     else {
-      if (lockRefCount==-1) {
-	lockRefCount=0;
-	return;
-      }
       ErrorF("DRIUnlock called when not locked\n");
       return;
     }
diff --git a/xc/programs/Xserver/Xprint/Init.c b/xc/programs/Xserver/Xprint/Init.c
index e15a67ee3..cca62f282 100644
--- a/xc/programs/Xserver/Xprint/Init.c
+++ b/xc/programs/Xserver/Xprint/Init.c
@@ -50,7 +50,7 @@ copyright holders.
 **    *********************************************************
 ** 
 ********************************************************************/
-/* $XFree86: xc/programs/Xserver/Xprint/Init.c,v 1.7 1999/12/13 02:12:46 robin Exp $ */
+/* $XFree86: xc/programs/Xserver/Xprint/Init.c,v 1.8 2000/11/14 18:20:33 dawes Exp $ */
 
 #include <unistd.h>
 #include <stdlib.h>
@@ -154,7 +154,7 @@ const char *LIST_QUEUES = "LANG=C lpstat -v | "
                             "      print substr($5, 1, x-1)"
                             "   }' | sort";
 #else
-#if defined(CSRG_BASED) || defined(linux) || defined(ISC)
+#if defined(CSRG_BASED) || defined(linux) || defined(ISC) || defined(__GNUC__)
 const char *LIST_QUEUES = "LANG=C lpc status | grep -v '^\t' | "
                             "sed -e /:/s/// | sort";
 #else
diff --git a/xc/programs/Xserver/hw/darwin/Imakefile b/xc/programs/Xserver/hw/darwin/Imakefile
new file mode 100644
index 000000000..2a1f2430a
--- /dev/null
+++ b/xc/programs/Xserver/hw/darwin/Imakefile
@@ -0,0 +1,28 @@
+XCOMM $XFree86: xc/programs/Xserver/hw/darwin/Imakefile,v 1.2 2000/11/16 03:22:18 dawes Exp $
+
+#include <Server.tmpl>
+#define IHaveSubdirs
+
+SUBDIRS = utils
+
+SRCS =	darwin.c \
+        darwinCursor.c \
+        darwinKeyboard.c
+
+OBJS =	darwin.o \
+        darwinCursor.o \
+        darwinKeyboard.o
+
+INCLUDES = -I. -I$(SERVERSRC)/mi -I$(SERVERSRC)/mfb -I$(SERVERSRC)/cfb \
+           -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(SERVERSRC)/os \
+           -I$(INCLUDESRC) -I$(FONTINCSRC)
+
+NormalLibraryObjectRule()
+NormalLibraryTarget(darwin,$(OBJS))
+
+InstallManPage(Xdarwin,$(MANDIR))
+
+DependTarget()
+
+MakeSubdirs($(SUBDIRS))
+DependSubdirs($(SUBDIRS))
diff --git a/xc/programs/Xserver/hw/darwin/Xdarwin.man b/xc/programs/Xserver/hw/darwin/Xdarwin.man
new file mode 100644
index 000000000..aee06c433
--- /dev/null
+++ b/xc/programs/Xserver/hw/darwin/Xdarwin.man
@@ -0,0 +1,63 @@
+.\" $XFree86: xc/programs/Xserver/hw/darwin/Xdarwin.man,v 1.1 2000/11/15 01:36:13 dawes Exp $
+.\"
+.TH XDARWIN 1 "Release 6.4" "X Version 11"
+.SH NAME
+Xdarwin \- X window system server for Darwin operating system
+.SH SYNOPSIS
+.B Xdarwin
+[ options ] ...
+.SH DESCRIPTION
+.I Xdarwin
+is the window server for Version 11 of the X window system on the Darwin
+operating system. It uses IOKit services to accesss the display framebuffer,
+mouse and keyboard and to provide a layer of hardware abstraction.
+.I Xdarwin
+will normally be started by the \fIxdm(1)\fP display manager or by a script
+that runs the program \fIxinit(1)\fP.
+.SH OPTIONS
+.PP
+In addition to the normal server options described in the \fIXserver(1)\fP
+manual page, \fIXdarwin\fP accepts the following command line switches:
+.TP 8
+.B \-fakebuttons
+Emulates a 3 button mouse using the Command and Option keys. Clicking the
+first mouse button while holding down Command will act like clicking
+button 2. Holding down Option will simulate button 3.
+.TP 8
+.B \-nofakebuttons
+Do not emulate a 3 button mouse. This is the default.
+.TP 8
+.B "\-size \fIwidth\fP \fIheight\fP"
+Sets the screeen resolution for the X server to use.
+.TP 8
+.B "\-depth \fIdepth\fP"
+Specifies the color bit depth to use. Currently only 8, 15, and 24 color bits
+per pixel are supported.
+.TP 8
+.B "\-refresh \fIrate\fP"
+Gives the refresh rate to use in Hz. For LCD displays this should be 0.
+.SH "SEE ALSO"
+.PP
+X(1), Xserver(1), xdm(1), xinit(1)
+.SH BUGS
+.I Xdarwin
+and this man page still have many limitations. Some of the more obvious
+ones are:
+.br
+- Only one display is supported.
+.br
+- The display mode can not be changed once the X server has started.
+.br
+- A screen saver is not supported.
+.br
+- The X server does not wake from sleep correctly.
+.br
+- The key repeat rate can not be changed.
+.PP
+.SH AUTHORS
+Original Port to Mac OS X Server - John Carmack
+.br
+Port to Darwin 1.0 - Dave Zarzycki
+.br
+Improvements and bug fixes - Torrey T. Lyons
+
diff --git a/xc/programs/Xserver/hw/darwin/darwin.c b/xc/programs/Xserver/hw/darwin/darwin.c
new file mode 100644
index 000000000..a28d07d70
--- /dev/null
+++ b/xc/programs/Xserver/hw/darwin/darwin.c
@@ -0,0 +1,1071 @@
+/**************************************************************
+ *
+ * IOKit support for the Darwin X Server
+ *
+ * HISTORY:
+ * Original port to Mac OS X Server by John Carmack
+ * Port to Darwin 1.0 by Dave Zarzycki
+ * Significantly rewritten for XFree86 4.0.1 by Torrey Lyons
+ *
+ **************************************************************/
+/* $XFree86: xc/programs/Xserver/hw/darwin/darwin.c,v 1.1 2000/11/15 01:36:13 dawes Exp $ */
+
+#define NDEBUG 1
+
+#include "X.h"
+#include "Xproto.h"
+#include "os.h"
+#include "servermd.h"
+#include "inputstr.h"
+#include "scrnintstr.h"
+#include "mi.h"
+#include "mibstore.h"
+#include "mipointer.h"
+#include "micmap.h"
+
+#include <sys/types.h>
+#include <sys/time.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <pthread.h>
+
+#include <mach/mach_interface.h>
+
+#define NO_CFPLUGIN
+#include <IOKit/IOKitLib.h>
+#include <IOKit/hidsystem/IOHIDShared.h>
+#include <IOKit/graphics/IOGraphicsLib.h>
+#include <drivers/event_status_driver.h>
+
+// Define this to work around bugs in the display drivers for
+// older PowerBook G3's. If the X server starts without this
+// #define, you don't need it.
+#undef OLD_POWERBOOK_G3
+
+#include "darwin.h"
+
+DarwinFramebufferRec    dfb;
+unsigned char           darwinKeyCommandL = 0, darwinKeyOptionL = 0;
+
+/* Fake button press/release for scroll wheel move. */
+#define	SCROLLWHEELUPFAKE	4
+#define	SCROLLWHEELDOWNFAKE	5
+
+static	int             darwinEventFD;
+static	Bool            fake3Buttons = FALSE;
+static	DeviceIntPtr    darwinPointer;
+static	DeviceIntPtr    darwinKeyboard;
+static	UInt32          darwinDesiredWidth = 0, darwinDesiredHeight = 0;
+static	IOIndex         darwinDesiredDepth = -1;
+static	SInt32          darwinDesiredRefresh = -1;
+
+// Common pixmap formats
+static PixmapFormatRec formats[] = {
+        { 1,    1,      BITMAP_SCANLINE_PAD },
+        { 4,    8,      BITMAP_SCANLINE_PAD },
+        { 8,    8,      BITMAP_SCANLINE_PAD },
+        { 15,   16,     BITMAP_SCANLINE_PAD },
+        { 16,   16,     BITMAP_SCANLINE_PAD },
+        { 24,   32,     BITMAP_SCANLINE_PAD }
+};
+const int NUMFORMATS = sizeof(formats)/sizeof(formats[0]);
+
+static Bool DarwinSaveScreen(ScreenPtr pScreen, int on)
+{	// FIXME
+	if (on == SCREEN_SAVER_FORCER) {
+	} else if (on == SCREEN_SAVER_ON) {
+	} else {
+	}
+	return TRUE;
+}
+
+/*
+ * DarwinStoreColors
+ * This is a callback from X to change the hardware colormap
+ * when using PsuedoColor
+ */
+static void DarwinStoreColors(
+    ColormapPtr     pmap,
+    int             numEntries,
+    xColorItem      *pdefs)
+{
+    kern_return_t   kr;
+    int             i;
+    IOColorEntry    *newColors;
+
+    assert( newColors = (IOColorEntry *)
+                xalloc( numEntries*sizeof(IOColorEntry) ));
+
+    // Convert xColorItem values to IOColorEntry
+    // assume the colormap is PsuedoColor
+    // as we do not support DirectColor
+    for (i = 0; i < numEntries; i++) {
+        newColors[i].index = pdefs[i].pixel;
+        newColors[i].red =   pdefs[i].red;
+        newColors[i].green = pdefs[i].green;
+        newColors[i].blue =  pdefs[i].blue;
+    }
+
+    kr = IOFBSetCLUT( dfb.fbService, 0, numEntries,
+                      kSetCLUTByValue, newColors );
+    kern_assert( kr );
+
+    xfree( newColors );
+}
+
+/*
+ * DarwinAddScreen
+ * This is a callback from X during AddScreen() from InitOutput()
+ */
+static Bool DarwinAddScreen(
+    int         index,
+    ScreenPtr   pScreen,
+    int         argc,
+    char        **argv )
+{
+    int         bitsPerRGB, i;
+    VisualPtr   visual;
+
+    /* Communicate the information about our initialized screen back to X. */
+    bitsPerRGB = dfb.pixelInfo.bitsPerComponent;
+
+    // reset the visual list
+    miClearVisualTypes();
+
+    // setup a single visual appropriate for our pixel type
+    // Note: Darwin kIORGBDirectPixels = X window TrueColor, not DirectColor
+    if (dfb.pixelInfo.pixelType == kIORGBDirectPixels) {
+        if (!miSetVisualTypes( dfb.colorBitsPerPixel, TrueColorMask,
+                                bitsPerRGB, TrueColor )) {
+            return FALSE;
+        }
+    } else if (dfb.pixelInfo.pixelType == kIOCLUTPixels) {
+        if (!miSetVisualTypes( dfb.colorBitsPerPixel, PseudoColorMask,
+                                bitsPerRGB, PseudoColor )) {
+            return FALSE;
+        }
+    } else if (dfb.pixelInfo.pixelType == kIOFixedCLUTPixels) {
+        if (!miSetVisualTypes( dfb.colorBitsPerPixel, StaticColorMask,
+                                bitsPerRGB, StaticColor )) {
+            return FALSE;
+        }
+    } else {
+        return FALSE;
+    }
+
+    // machine independent screen init
+    // setup _Screen structure in pScreen
+    if ( dfb.bitsPerPixel == 32 ) {
+        if (!cfb32ScreenInit(pScreen,
+                dfb.framebuffer,
+                dfb.width, dfb.height,
+                    75, 75,		/* screen size in dpi, which we have no accurate knowledge of */
+                dfb.pitch / (dfb.bitsPerPixel/8))) {
+            return FALSE;
+        }
+    } else if ( dfb.bitsPerPixel == 16 ) {
+        if (!cfb16ScreenInit(pScreen,
+                dfb.framebuffer,
+                dfb.width, dfb.height,
+                    75, 75,		/* screen size in dpi, which we have no accurate knowledge of */
+                dfb.pitch / (dfb.bitsPerPixel/8))) {
+            return FALSE;
+        }
+    } else if ( dfb.bitsPerPixel == 8 ) {
+        if (!cfbScreenInit(pScreen,
+                dfb.framebuffer,
+                dfb.width, dfb.height,
+                    75, 75,		/* screen size in dpi, which we have no accurate knowledge of */
+                dfb.pitch / (dfb.bitsPerPixel/8))) {
+            return FALSE;
+        }
+    } else {
+        return FALSE;
+    }
+
+    // set the RGB order correctly for TrueColor, it is byte swapped by X
+    // FIXME: make work on x86 darwin if it ever gets buildable
+    if (dfb.bitsPerPixel > 8) {
+        for (i = 0, visual = pScreen->visuals;  // someday we may have more than 1
+            i < pScreen->numVisuals; i++, visual++) {
+            if (visual->class == TrueColor) {
+                visual->offsetRed = bitsPerRGB * 2;
+                visual->offsetGreen = bitsPerRGB;
+                visual->offsetBlue = 0;
+#if FALSE
+                visual->redMask = ((1<<bitsPerRGB)-1) << visual->offsetRed;
+                visual->greenMask = ((1<<bitsPerRGB)-1) << visual->offsetGreen;
+                visual->blueMask = ((1<<bitsPerRGB)-1) << visual->offsetBlue;
+#else
+                visual->redMask = dfb.pixelInfo.componentMasks[0];
+                visual->greenMask = dfb.pixelInfo.componentMasks[1];
+                visual->blueMask = dfb.pixelInfo.componentMasks[2];
+#endif
+            }
+        }
+    }
+
+#ifdef MITSHM
+    ShmRegisterFbFuncs(pScreen);
+#endif
+
+    // setup cursor support, use hardware if possible
+    if (!DarwinInitCursor(pScreen)) {
+        return FALSE;
+    }
+
+    // this must be initialized (why doesn't X have a default?)
+    pScreen->SaveScreen = DarwinSaveScreen;
+    
+    // initialize colormap handling as needed
+    if (dfb.pixelInfo.pixelType == kIOCLUTPixels) {
+        pScreen->StoreColors = DarwinStoreColors;
+    }
+
+    // create and install the default colormap and
+    // set pScreen->blackPixel / pScreen->white
+    if (!miCreateDefColormap( pScreen )) {
+        return FALSE;
+    }
+    
+    return TRUE;
+}
+
+/*
+ * DarwinShutdownScreen
+ */
+void DarwinShutdownScreen( void )
+{
+#if 0
+    // we must close the HID System first
+    // because it is a client of the framebuffer
+    NXCloseEventStatus( dfb.hidParam );
+    IOServiceClose( dfb.hidService );
+    IOServiceClose( dfb.fbService );
+#endif
+}
+
+/*
+ =============================================================================
+
+ mouse callbacks
+ 
+ =============================================================================
+*/
+
+/*
+ * Set mouse acceleration and thresholding
+ * FIXME: We currently ignore the threshold in ctrl->threshold.
+ */
+static void DarwinChangePointerControl(
+    DeviceIntPtr    device,
+    PtrCtrl         *ctrl )
+{
+    kern_return_t   kr;
+    double          acceleration;
+
+    acceleration = ctrl->num / ctrl->den;
+    kr = IOHIDSetMouseAcceleration( dfb.hidParam, acceleration );
+    if (kr != KERN_SUCCESS)
+        ErrorF( "Could not set mouse acceleration with kernel return = 0x%x.\n", kr );
+}
+
+
+/*
+ * Motion history between events is not required to be supported.
+ */
+static int DarwinGetMotionEvents( DeviceIntPtr pDevice, xTimecoord *buff,
+                           unsigned long start, unsigned long stop, ScreenPtr pScr)
+{
+	return 0;
+}
+
+
+/*
+ * DarwinMouseProc --
+ *      Handle the initialization, etc. of a mouse
+ */
+
+static int DarwinMouseProc( DeviceIntPtr pPointer, int what ) {
+
+  char map[6];
+
+  switch (what) {
+
+  case DEVICE_INIT:
+    pPointer->public.on = FALSE;
+
+    map[1] = 1;
+    map[2] = 2;
+    map[3] = 3;
+    map[4] = 4;
+    map[5] = 5;
+    InitPointerDeviceStruct( (DevicePtr)pPointer,
+                map,
+                5,                      // numbuttons (4 & 5 are scroll wheel)
+                DarwinGetMotionEvents,  // miPointerGetMotionEvents ??
+                DarwinChangePointerControl,
+                0 );
+    break;
+
+  case DEVICE_ON:
+    pPointer->public.on = TRUE;
+      AddEnabledDevice( darwinEventFD ); 
+    return Success;
+
+  case DEVICE_CLOSE:
+  case DEVICE_OFF:
+    pPointer->public.on = FALSE;
+      RemoveEnabledDevice( darwinEventFD ); 
+    return Success;
+  }
+
+  return Success;
+}
+
+/*
+ * DarwinKeybdProc
+ * callback from X
+ */
+static int DarwinKeybdProc( DeviceIntPtr pDev, int onoff )
+{
+    switch ( onoff ) {
+        case DEVICE_INIT:
+            DarwinKeyboardInit( pDev );
+            break;
+        case DEVICE_ON:
+            pDev->public.on = TRUE;
+            AddEnabledDevice( darwinEventFD );
+            break;
+        case DEVICE_OFF:
+            pDev->public.on = FALSE;
+            RemoveEnabledDevice( darwinEventFD );
+            break;
+        case DEVICE_CLOSE:
+            break;
+    }
+
+    return Success;
+}
+
+/*
+===========================================================================
+
+ Functions needed to link against device independent X
+
+===========================================================================
+*/
+
+/*
+ * ProcessInputEvents
+ * Read events from the event queue
+ */
+void ProcessInputEvents(void)
+{
+    xEvent	xe;
+    NXEvent	ev;
+    int	r;
+    struct timeval tv;
+    struct timezone tz;
+
+    // try to read from our pipe
+    r = read( darwinEventFD, &ev, sizeof(ev));
+    if ((r == -1) && (errno != EAGAIN)) {
+        ErrorF("read(darwinEventFD) failed, errno=%d: %s\n", errno, strerror(errno));
+        return;
+    } else if ((r == -1) && (errno == EAGAIN)) {
+        return;
+    } else if ( r != sizeof( ev ) ) {
+        ErrorF( "Only read %i bytes from darwinPipe!", r );
+        return;
+    }
+
+    gettimeofday(&tv, &tz);
+
+    // translate it to an X event and post it
+    memset(&xe, 0, sizeof(xe));
+
+    xe.u.keyButtonPointer.rootX = ev.location.x;
+    xe.u.keyButtonPointer.rootY = ev.location.y;
+    //xe.u.keyButtonPointer.time = ev.time;
+    xe.u.keyButtonPointer.time = tv.tv_sec * 1000 + tv.tv_usec / 1000;
+
+    /* A newer kernel generates multi-button events by NX_SYSDEFINED.
+       See iokit/Families/IOHIDSystem/IOHIDSystem.cpp version 1.1.1.7,
+       2000/08/10 00:23:37 or later. */
+
+    switch( ev.type ) {
+        case NX_MOUSEMOVED:
+            xe.u.u.type = MotionNotify;
+            (darwinPointer->public.processInputProc)( &xe, darwinPointer, 1 );
+            break;
+ 
+        case NX_LMOUSEDOWN:
+            // Mimic multi-button mouse with Command and Option
+            if (fake3Buttons && ev.flags & (NX_COMMANDMASK | NX_ALTERNATEMASK)) {
+                if (ev.flags & NX_COMMANDMASK) {
+                    // first fool X into forgetting about Command key
+                    xe.u.u.type = KeyRelease;
+                    xe.u.u.detail = darwinKeyCommandL;
+                    (darwinKeyboard->public.processInputProc)
+                            ( &xe, darwinKeyboard, 1 );
+                    // push button 2
+                    xe.u.u.type = ButtonPress;
+                    xe.u.u.detail = 2;			// de.key = button 2
+                    (darwinPointer->public.processInputProc)
+                            ( &xe, darwinPointer, 1 );
+                    // reset Command key down
+                    xe.u.u.type = KeyPress;
+                    xe.u.u.detail = darwinKeyCommandL;
+                    (darwinKeyboard->public.processInputProc)
+                            ( &xe, darwinKeyboard, 1 );
+                } else {
+                    // first fool X into forgetting about Option key
+                    xe.u.u.type = KeyRelease;
+                    xe.u.u.detail = darwinKeyOptionL;
+                    (darwinKeyboard->public.processInputProc)
+                            ( &xe, darwinKeyboard, 1 );
+                    // push button 3
+                    xe.u.u.type = ButtonPress;
+                    xe.u.u.detail = 3;			// de.key = button 3
+                    (darwinPointer->public.processInputProc)
+                            ( &xe, darwinPointer, 1 );
+                    // reset Option key down
+                    xe.u.u.type = KeyPress;
+                    xe.u.u.detail = darwinKeyOptionL;
+                    (darwinKeyboard->public.processInputProc)
+                            ( &xe, darwinKeyboard, 1 );
+                }
+            } else {
+                xe.u.u.detail = 1;			//de.key = button 1;
+                xe.u.u.type = ButtonPress;
+                (darwinPointer->public.processInputProc)
+                        ( &xe, darwinPointer, 1 );
+            }
+            break;
+
+        case NX_LMOUSEUP:
+            // Mimic multi-button mouse with Command and Option
+            if (fake3Buttons && ev.flags & (NX_COMMANDMASK | NX_ALTERNATEMASK)) {
+                if (ev.flags & NX_COMMANDMASK) {
+                    // first fool X into forgetting about Command key
+                    xe.u.u.type = KeyRelease;
+                    xe.u.u.detail = darwinKeyCommandL;
+                    (darwinKeyboard->public.processInputProc)
+                            ( &xe, darwinKeyboard, 1 );
+                    // push button 2
+                    xe.u.u.type = ButtonRelease;
+                    xe.u.u.detail = 2;			// de.key = button 2
+                    (darwinPointer->public.processInputProc)
+                            ( &xe, darwinPointer, 1 );
+                    // reset Command key down
+                    xe.u.u.type = KeyPress;
+                    xe.u.u.detail = darwinKeyCommandL;
+                    (darwinKeyboard->public.processInputProc)
+                            ( &xe, darwinKeyboard, 1 );
+                } else {
+                    // first fool X into forgetting about Option key
+                    xe.u.u.type = KeyRelease;
+                    xe.u.u.detail = darwinKeyOptionL;
+                    (darwinKeyboard->public.processInputProc)
+                            ( &xe, darwinKeyboard, 1 );
+                    // push button 3
+                    xe.u.u.type = ButtonRelease;
+                    xe.u.u.detail = 3;			// de.key = button 3
+                    (darwinPointer->public.processInputProc)
+                            ( &xe, darwinPointer, 1 );
+                    // reset Option key down
+                    xe.u.u.type = KeyPress;
+                    xe.u.u.detail = darwinKeyOptionL;
+                    (darwinKeyboard->public.processInputProc)
+                            ( &xe, darwinKeyboard, 1 );
+                }
+            } else {
+                xe.u.u.detail = 1;			//de.key = button 1;
+                xe.u.u.type = ButtonRelease;
+                (darwinPointer->public.processInputProc)
+                        ( &xe, darwinPointer, 1 );
+            }
+            break;
+
+// Button 2 isn't handled correctly by older kernels anyway. Just let
+// NX_SYSDEFINED events handle these.
+        case NX_RMOUSEDOWN:
+#if 0
+            xe.u.u.detail = 2; //de.key;
+            xe.u.u.type = ButtonPress;
+            (darwinPointer->public.processInputProc)( &xe, darwinPointer, 1 );
+#endif
+            break;
+
+        case NX_RMOUSEUP:
+#if 0
+            xe.u.u.detail = 2; //de.key;
+            xe.u.u.type = ButtonRelease;
+            (darwinPointer->public.processInputProc)( &xe, darwinPointer, 1 );
+#endif
+            break;
+
+        case NX_KEYDOWN:
+            xe.u.u.type = KeyPress;
+            xe.u.u.detail = ev.data.key.keyCode + MIN_KEYCODE;
+            (darwinKeyboard->public.processInputProc)( &xe, darwinKeyboard, 1 );
+            break;
+
+        case NX_KEYUP:
+            xe.u.u.type = KeyRelease;
+            xe.u.u.detail = ev.data.key.keyCode + MIN_KEYCODE;
+            (darwinKeyboard->public.processInputProc)(&xe, darwinKeyboard, 1);
+            break;
+
+        case NX_FLAGSCHANGED:
+        {
+            static int old_state = 0;
+            int new_on_flags = ~old_state & ev.flags;
+            int new_off_flags = old_state & ~ev.flags;
+            old_state = ev.flags;
+            xe.u.u.detail = ev.data.key.keyCode + MIN_KEYCODE;
+
+            // alphalock is toggled rather than held on,
+            // so we have to handle it differently
+            if (new_on_flags & NX_ALPHASHIFTMASK ||
+                new_off_flags & NX_ALPHASHIFTMASK) {
+                xe.u.u.type = KeyPress;
+                (darwinKeyboard->public.processInputProc)
+                        (&xe, darwinKeyboard, 1);
+                xe.u.u.type = KeyRelease;
+                (darwinKeyboard->public.processInputProc)
+                        (&xe, darwinKeyboard, 1);
+                break;
+            }
+
+            if (new_on_flags) {
+                xe.u.u.type = KeyPress;
+            } else if (new_off_flags) {
+                xe.u.u.type = KeyRelease;
+            } else {
+                break;
+            }
+            (darwinKeyboard->public.processInputProc)(&xe, darwinKeyboard, 1);
+            break;
+        }
+
+        case NX_SYSDEFINED:
+            if (ev.data.compound.subType == 7) {
+                long hwDelta = ev.data.compound.misc.L[0];
+                long hwButtons = ev.data.compound.misc.L[1];
+                int i;
+
+                for (i = 1; i < 4; i++) {
+                    if (hwDelta & (1 << i)) {
+                        xe.u.u.detail = i + 1;
+                        if (hwButtons & (1 << i)) {
+                            xe.u.u.type = ButtonPress;
+                        } else {
+                            xe.u.u.type = ButtonRelease;
+                        }
+                        (darwinPointer->public.processInputProc)
+                            ( &xe, darwinPointer, 1 );
+                    }
+                }
+            }
+            break;
+
+        case NX_SCROLLWHEELMOVED:
+        {
+            short count = ev.data.scrollWheel.deltaAxis1;
+
+            if (count > 0) {
+                xe.u.u.detail = SCROLLWHEELUPFAKE;
+            } else {
+                xe.u.u.detail = SCROLLWHEELDOWNFAKE;
+                count = -count;
+            }
+
+            for (; count; --count) {
+                xe.u.u.type = ButtonPress;
+                (darwinPointer->public.processInputProc)
+                    ( &xe, darwinPointer, 1 );
+                xe.u.u.type = ButtonRelease;
+                (darwinPointer->public.processInputProc)
+                    ( &xe, darwinPointer, 1 );
+            }
+            break;
+        }
+
+        default:
+            ErrorF("unknown event caught: %d\n", ev.type);
+            ErrorF("\tev.type = %d\n", ev.type);
+            ErrorF("\tev.location.x,y = %d,%d\n", ev.location.x, ev.location.y);
+            ErrorF("\tev.time = %ld\n", ev.time);
+            ErrorF("\tev.flags = 0x%x\n", ev.flags);
+            ErrorF("\tev.window = %d\n", ev.window);
+            ErrorF("\tev.data.key.origCharSet = %d\n", ev.data.key.origCharSet);
+            ErrorF("\tev.data.key.charSet = %d\n", ev.data.key.charSet);
+            ErrorF("\tev.data.key.charCode = %d\n", ev.data.key.charCode);
+            ErrorF("\tev.data.key.keyCode = %d\n", ev.data.key.keyCode);
+            ErrorF("\tev.data.key.origCharCode = %d\n", ev.data.key.origCharCode);
+            break;
+    }
+
+    // why isn't this handled automatically by X???
+    //miPointerAbsoluteCursor( ev.location.x, ev.location.y, ev.time );
+    miPointerAbsoluteCursor( ev.location.x, ev.location.y,
+                             tv.tv_sec * 1000 + tv.tv_usec / 1000 );
+    miPointerUpdate();
+
+}
+
+static void *DarwinHIDThread(void *arg);
+
+/*
+ * InitInput
+ * Register the keyboard and mouse devices
+ */
+void InitInput( int  argc, char **argv )
+{	static int initialized = 0;
+	if (!initialized) {
+		int fd[2];
+
+		assert( pipe(fd) == 0 );
+		darwinEventFD = fd[0];
+		fcntl(darwinEventFD, F_SETFL, O_NONBLOCK);
+		pthread_create(&dfb.hidThread, NULL, DarwinHIDThread, (void *) fd[1]);
+    
+		darwinPointer = AddInputDevice(DarwinMouseProc, TRUE);
+		RegisterPointerDevice( darwinPointer );
+
+		darwinKeyboard = AddInputDevice(DarwinKeybdProc, TRUE);
+		RegisterKeyboardDevice( darwinKeyboard );
+	}
+}
+
+EvGlobals *     evg;
+mach_port_t     masterPort;
+mach_port_t     notificationPort;
+IONotificationPortRef NotificationPortRef;
+
+static void InitIOKit(void)
+{
+    kern_return_t           kr;
+
+    kr = IOMasterPort(bootstrap_port, &masterPort);
+    kern_assert( kr );
+}
+
+static void ClearEvent(NXEvent * ep)
+{
+    static NXEvent nullEvent = {NX_NULLEVENT, {0, 0 }, 0, -1, 0 };
+
+    *ep = nullEvent;
+    ep->data.compound.subType = ep->data.compound.misc.L[0] =
+                                ep->data.compound.misc.L[1] = 0;
+}
+
+static void *DarwinHIDThread(void *arg)
+{
+    int darwinEventWriteFD = (int)arg;
+
+    for (;;) {
+        IOReturn kr;
+        NXEvent ev;
+        NXEQElement *oldHead;
+        struct {
+            mach_msg_header_t	header;
+            mach_msg_trailer_t	trailer;
+        } msg;
+
+        kr = mach_msg((mach_msg_header_t*) &msg, MACH_RCV_MSG, 0,
+                      sizeof(msg), notificationPort, 0, MACH_PORT_NULL);
+        assert(KERN_SUCCESS == kr);
+
+        while (evg->LLEHead != evg->LLETail) {
+            oldHead = (NXEQElement*)&evg->lleq[evg->LLEHead];
+            ev_lock(&oldHead->sema);
+            ev = oldHead->event;
+            ClearEvent(&oldHead->event);
+            evg->LLEHead = oldHead->next;
+            ev_unlock(&oldHead->sema);
+
+            write(darwinEventWriteFD, &ev, sizeof(ev));
+        }
+    }
+    return NULL;
+}
+
+void SetupFBandHID(void)
+{
+    kern_return_t           kr;
+    io_service_t            service;
+    io_iterator_t           iter;
+    io_name_t               name;
+    vm_address_t            shmem, vram;
+    vm_size_t               shmemSize;
+    int                     i;
+    UInt32                  numModes;
+    IODisplayModeInformation modeInfo;
+    IODisplayModeID         displayMode, *allModes;
+    IOIndex                 displayDepth;
+    IOFramebufferInformation fbInfo;
+    StdFBShmem_t            *cshmem;
+
+    dfb.fbService = 0;
+    dfb.hidService = 0;
+
+    // find and open the IOFrameBuffer service
+    kr = IOServiceGetMatchingServices( masterPort,
+                        IOServiceMatching( IOFRAMEBUFFER_CONFORMSTO ),
+                        &iter );
+    kern_assert( kr );
+
+    assert(service = IOIteratorNext(iter));
+
+    kr = IOServiceOpen( service, mach_task_self(),
+                        kIOFBServerConnectType, &dfb.fbService );
+    if (kr != KERN_SUCCESS)
+        FatalError("failed to connect as window server!\nMake sure you have quit the Mac OS X window server.\n");
+
+    IOObjectRelease( service );
+    IOObjectRelease( iter );
+
+    // create the slice of shared memory containing cursor state data
+    kr = IOFBCreateSharedCursor( dfb.fbService, kIOFBCurrentShmemVersion,
+                               	 32, 32 );
+    kern_assert( kr );
+
+    // SET THE SCREEN PARAMETERS
+    // get the current screen resolution, refresh rate and depth
+    kr = IOFBGetCurrentDisplayModeAndDepth( dfb.fbService, &displayMode,
+                                            &displayDepth );
+    kern_assert( kr );
+
+    // use the current screen resolution if the user
+    // only wants to change the refresh rate
+    if (darwinDesiredRefresh != -1 && darwinDesiredWidth == 0) {
+        kr = IOFBGetDisplayModeInformation( dfb.fbService, displayMode,
+                                            &modeInfo );
+        kern_assert( kr );
+        darwinDesiredWidth = modeInfo.nominalWidth;
+        darwinDesiredHeight = modeInfo.nominalHeight;
+    }
+
+    // use the current resolution and refresh rate
+    // if the user doesn't have a preference
+    if (darwinDesiredWidth == 0) {
+
+        // change the pixel depth if desired
+        if (darwinDesiredDepth != -1) {
+            kr = IOFBGetDisplayModeInformation( dfb.fbService, displayMode,
+                                                &modeInfo );
+            kern_assert( kr );
+            if (modeInfo.maxDepthIndex < darwinDesiredDepth)
+                FatalError("Current screen resolution does not support desired pixel depth!\n");
+
+            displayDepth = darwinDesiredDepth;
+            kr = IOFBSetDisplayModeAndDepth( dfb.fbService, displayMode,
+                                             displayDepth );
+            kern_assert( kr );
+        }
+ 
+    // look for display mode with correct resolution and refresh rate
+    } else {
+
+        // get an array of all supported display modes
+        kr = IOFBGetDisplayModeCount( dfb.fbService, &numModes );
+        kern_assert( kr );
+        assert(allModes = (IODisplayModeID *)
+                xalloc( numModes * sizeof(IODisplayModeID) ));
+        kr = IOFBGetDisplayModes( dfb.fbService, numModes, allModes );
+        kern_assert( kr );
+
+        for (i = 0; i < numModes; i++) {
+            kr = IOFBGetDisplayModeInformation( dfb.fbService, allModes[i],
+                                                &modeInfo );
+            kern_assert( kr );
+
+            if (modeInfo.flags & kDisplayModeValidFlag &&
+                modeInfo.nominalWidth == darwinDesiredWidth &&
+                modeInfo.nominalHeight == darwinDesiredHeight) {
+
+                if (darwinDesiredDepth == -1)
+                    darwinDesiredDepth = modeInfo.maxDepthIndex;
+                if (modeInfo.maxDepthIndex < darwinDesiredDepth)
+                    FatalError("Desired screen resolution does not support desired pixel depth!\n");
+                if ((darwinDesiredRefresh == -1 ||
+                    (darwinDesiredRefresh << 16) == modeInfo.refreshRate)) {
+                    displayMode = allModes[i];
+                    displayDepth = darwinDesiredDepth;
+                    kr = IOFBSetDisplayModeAndDepth( dfb.fbService, displayMode,
+                                                     displayDepth );
+                    kern_assert( kr );
+                    break;
+                }
+            }
+        }
+
+        xfree( allModes );
+        if (i >= numModes)
+            FatalError("Desired screen resolution or refresh rate is not supported!\n");
+    }
+
+    kr = IOFBGetPixelInformation( dfb.fbService, displayMode, displayDepth,
+                                  kIOFBSystemAperture, &dfb.pixelInfo );
+    kern_assert( kr );
+
+#ifdef OLD_POWERBOOK_G3
+    if (dfb.pixelInfo.pixelType == kIOCLUTPixels)
+        dfb.pixelInfo.pixelType = kIOFixedCLUTPixels;
+#endif
+
+    kr = IOFBGetFramebufferInformationForAperture( dfb.fbService, kIOFBSystemAperture,
+                                                   &fbInfo );
+    kern_assert( kr );
+
+    kr = IOConnectMapMemory( dfb.fbService, kIOFBCursorMemory,
+                             mach_task_self(), (vm_address_t *) &cshmem,
+                             &shmemSize, kIOMapAnywhere );
+    kern_assert( kr );
+    dfb.cursorShmem = cshmem;
+
+    kr = IOConnectMapMemory( dfb.fbService, kIOFBSystemAperture, mach_task_self(),
+                             &vram, &shmemSize, kIOMapAnywhere );
+    kern_assert( kr );
+
+    dfb.framebuffer = (void*)vram;
+    dfb.width = fbInfo.activeWidth;
+    dfb.height = fbInfo.activeHeight;
+    dfb.pitch = fbInfo.bytesPerRow;
+    dfb.bitsPerPixel = fbInfo.bitsPerPixel;
+    dfb.colorBitsPerPixel = dfb.pixelInfo.componentCount *
+                            dfb.pixelInfo.bitsPerComponent;
+
+    // find and open the HID System Service
+    kr = IOServiceGetMatchingServices( masterPort,
+                                       IOServiceMatching( kIOHIDSystemClass ),
+                                       &iter );
+    kern_assert( kr );
+
+    assert( service = IOIteratorNext( iter ) );
+
+    kr = IORegistryEntryGetName( service, name );
+    kern_assert( kr );
+
+    kr = IOServiceOpen( service, mach_task_self(), kIOHIDServerConnectType,
+                        &dfb.hidService );
+    kern_assert( kr );
+
+    IOObjectRelease( service );
+    IOObjectRelease( iter );
+
+    kr = IOHIDCreateSharedMemory( dfb.hidService, kIOHIDCurrentShmemVersion );
+    kern_assert( kr );
+
+    kr = IOHIDSetEventsEnable(dfb.hidService, TRUE);
+    kern_assert( kr );
+
+    // Inform the HID system that the framebuffer is also connected to it
+    kr = IOConnectAddClient( dfb.hidService, dfb.fbService );
+    kern_assert( kr );
+
+    kr = IOHIDSetCursorEnable(dfb.hidService, TRUE);
+    kern_assert( kr );
+
+    kr = IOConnectMapMemory( dfb.hidService, kIOHIDGlobalMemory, mach_task_self(),
+                             &shmem, &shmemSize, kIOMapAnywhere );
+    kern_assert( kr );
+
+    evg = (EvGlobals *)(shmem + ((EvOffsets *)shmem)->evGlobalsOffset);
+
+    assert(sizeof(EvGlobals) == evg->structSize);
+
+    NotificationPortRef = IONotificationPortCreate( masterPort );
+
+    notificationPort = IONotificationPortGetMachPort(NotificationPortRef);
+
+    kr = IOConnectSetNotificationPort( dfb.hidService, kIOHIDEventNotification,
+                                       notificationPort, 0 );
+    kern_assert( kr );
+
+    evg->movedMask |= NX_MOUSEMOVEDMASK;
+}
+
+
+/*
+ * InitOutput --
+ *	Initialize screenInfo for all actually accessible framebuffers.
+ *
+ * FIXME: why does this get called multiple times when a session is starting? 
+ */
+void InitOutput( ScreenInfo *pScreenInfo, int argc, char **argv )
+{	int i;
+	static int initialized = 0;
+//	static PixmapFormatRec darwinFormat;
+
+	// perform one-time-only initialization
+	if ( !initialized ) {
+		initialized = 1;
+		// do our appkit or darwin device driver work to open and map a screen
+		InitIOKit();
+		SetupFBandHID();
+	}
+
+	pScreenInfo->imageByteOrder = IMAGE_BYTE_ORDER;
+	pScreenInfo->bitmapScanlineUnit = BITMAP_SCANLINE_UNIT;
+	pScreenInfo->bitmapScanlinePad = BITMAP_SCANLINE_PAD;
+	pScreenInfo->bitmapBitOrder = BITMAP_BIT_ORDER;
+
+        // list how we want common pixmap formats to be padded
+        pScreenInfo->numPixmapFormats = NUMFORMATS;
+        for (i = 0; i < NUMFORMATS; i++)
+            pScreenInfo->formats[i] = formats[i];
+
+
+	AddScreen( DarwinAddScreen, argc, argv );
+}
+
+void OsVendorFatalError( void )
+{	ErrorF( "   OsVendorFatalError\n" ); 
+}
+
+void OsVendorInit(void)
+{
+}
+
+/*
+ * ddxProcessArgument --
+ *	Process device-dependent command line args. Returns 0 if argument is
+ *      not device dependent, otherwise Count of number of elements of argv
+ *      that are part of a device dependent commandline option.
+ */
+int ddxProcessArgument( int argc, char *argv[], int i )
+{
+#if 0
+    if ( !strcmp( argv[i], "-screen" ) ) {
+    	if ( i == argc-1 ) {
+            FatalError( "-screen must be followed by a number" );
+        }
+    	darwinScreenNumber = atoi( argv[i+1] );
+        ErrorF( "Attempting to use screen number %i\n", darwinScreenNumber );
+		return 2;
+    }
+#endif
+
+    if ( !strcmp( argv[i], "-fakebuttons" ) ) {
+    	fake3Buttons = TRUE;
+        ErrorF( "Faking a three button mouse\n" );
+		return 1;
+    }
+
+    if ( !strcmp( argv[i], "-nofakebuttons" ) ) {
+    	fake3Buttons = FALSE;
+        ErrorF( "Not faking a three button mouse\n" );
+		return 1;
+    }
+
+    if ( !strcmp( argv[i], "-size" ) ) {
+    	if ( i >= argc-2 ) {
+            FatalError( "-size must be followed by two numbers" );
+        }
+#ifdef OLD_POWERBOOK_G3
+        ErrorF( "Ignoring unsupported -size option on old PowerBook G3\n");
+#else
+    	darwinDesiredWidth = atoi( argv[i+1] );
+        darwinDesiredHeight = atoi( argv[i+2] );
+        ErrorF( "Attempting to use width x height = %i x %i\n",
+                darwinDesiredWidth, darwinDesiredHeight );
+#endif
+        return 3;
+    }
+
+    if ( !strcmp( argv[i], "-depth" ) ) {
+        int     bitDepth;
+    	if ( i == argc-1 ) {
+            FatalError( "-depth must be followed by a number" );
+        }
+#ifdef OLD_POWERBOOK_G3
+        ErrorF( "Ignoring unsupported -depth option on old PowerBook G3\n");
+#else
+    	bitDepth = atoi( argv[i+1] );
+        if (bitDepth == 8)
+            darwinDesiredDepth = 0;
+        else if (bitDepth == 15)
+            darwinDesiredDepth = 1;
+        else if (bitDepth == 24)
+            darwinDesiredDepth = 2;
+        else
+            FatalError( "Unsupported pixel depth. Use 8, 15, or 24 bits" );
+        ErrorF( "Attempting to use pixel depth of %i\n", bitDepth );
+#endif
+        return 2;
+    }
+
+     if ( !strcmp( argv[i], "-refresh" ) ) {
+    	if ( i == argc-1 ) {
+            FatalError( "-refresh must be followed by a number" );
+        }
+#ifdef OLD_POWERBOOK_G3
+        ErrorF( "Ignoring unsupported -refresh option on old PowerBook G3\n");
+#else
+    	darwinDesiredRefresh = atoi( argv[i+1] );
+        ErrorF( "Attempting to use refresh rate of %i\n", darwinDesiredRefresh );
+#endif
+        return 2;
+    }
+
+   return 0;
+}
+
+/*
+ * ddxUseMsg --
+ *	Print out correct use of device dependent commandline options.
+ *      Maybe the user now knows what really to do ...
+ */
+void ddxUseMsg( void )
+{
+    ErrorF("\n");
+    ErrorF("\n");
+    ErrorF("Device Dependent Usage:\n");
+    ErrorF("\n");
+#if 0
+    ErrorF("-screen <0,1,...> : use this mac screen num.\n" );
+#endif
+    ErrorF("-fakebuttons : fake a three button mouse with Command and Option keys.\n");
+    ErrorF("-nofakebuttons : don't fake a three button mouse.\n");
+    ErrorF("-size <height> <width> : use a screen resolution of <height> x <width>.\n");
+    ErrorF("-depth <8,15,24> : use this bit depth.\n");
+    ErrorF("-refresh <rate> : use a monitor refresh rate of <rate> Hz.\n");
+    ErrorF("\n");
+}
+
+/*
+ * ddxGiveUp --
+ *      Device dependent cleanup. Called by dix before normal server death.
+ */
+void ddxGiveUp( void ) {
+    ErrorF( "   ddxGiveUp\n" ); 
+}
+
+/*
+ * AbortDDX --
+ *      DDX - specific abort routine.  Called by AbortServer(). The attempt is
+ *      made to restore all original setting of the displays. Also all devices
+ *      are closed.
+ */
+void AbortDDX( void ) {
+#if TRUE
+   ErrorF( "   AbortDDX\n" ); 
+    /*
+     * This is needed for a abnormal server exit, since the normal exit stuff
+     * MUST also be performed (i.e. the vt must be left in a defined state)
+     */
+    ddxGiveUp();
+#endif
+}
+
+Bool DPMSSupported(void)
+{	return 0;
+}
+
+void DPMSSet(void)
+{	return;
+}
diff --git a/xc/programs/Xserver/hw/darwin/darwin.h b/xc/programs/Xserver/hw/darwin/darwin.h
new file mode 100644
index 000000000..a114167fa
--- /dev/null
+++ b/xc/programs/Xserver/hw/darwin/darwin.h
@@ -0,0 +1,38 @@
+/* $XFree86: xc/programs/Xserver/hw/darwin/darwin.h,v 1.1 2000/11/15 01:36:13 dawes Exp $ */
+
+#ifndef _DARWIN_H
+#define _DARWIN_H
+
+#include <pthread.h>
+#include <IOKit/graphics/IOFramebufferShared.h>
+#include "inputstr.h"
+#include "screenint.h"
+#include "extensions/XKB.h"
+
+typedef struct {
+    pthread_t           hidThread;
+    io_connect_t        fbService;
+    io_connect_t        hidService;
+    io_connect_t        hidParam;
+    void                *framebuffer;
+    int                 width;
+    int                 height;
+    int                 pitch;
+    int                 bitsPerPixel;
+    int                 colorBitsPerPixel;
+    IOPixelInformation  pixelInfo;
+    StdFBShmem_t        *cursorShmem;
+} DarwinFramebufferRec;
+
+void DarwinKeyboardInit(DeviceIntPtr pDev);
+Bool DarwinInitCursor(ScreenPtr	pScreen);
+
+#define assert(x) { if ((x) == 0) \
+    FatalError("assert failed on line %d of %s!\n", __LINE__, __FILE__); }
+#define kern_assert(x) { if ((x) != KERN_SUCCESS) \
+    FatalError("assert failed on line %d of %s with kernel return 0x%x!\n", \
+                __LINE__, __FILE__, x); }
+
+#define MIN_KEYCODE     XkbMinLegalKeyCode     // unfortunately, this isn't 0...
+
+#endif	/* _DARWIN_H */
diff --git a/xc/programs/Xserver/hw/darwin/darwinCursor.c b/xc/programs/Xserver/hw/darwin/darwinCursor.c
new file mode 100644
index 000000000..b6ff35f5b
--- /dev/null
+++ b/xc/programs/Xserver/hw/darwin/darwinCursor.c
@@ -0,0 +1,705 @@
+/**************************************************************
+ *
+ * Cursor support for Darwin X Server
+ *
+ * Three different cursor modes are possible:
+ *  X (0)         - tracking via Darwin kernel,
+ *                  display via X machine independent
+ *  Kernel (1)    - tracking and display via Darwin kernel
+ *                  (not currently supported)
+ *  Hardware (2)  - tracking and display via hardware
+ *
+ * The X software cursor uses the Darwin software cursor
+ * routines in IOFramebuffer.cpp to track the cursor, but
+ * displays the cursor image using the X machine
+ * independent display cursor routines in midispcur.c.
+ *
+ * The kernel cursor uses IOFramebuffer.cpp routines to
+ * track and display the cursor. This gives better
+ * performance as the display calls don't have to cross
+ * the kernel boundary. Unfortunately, this mode has
+ * synchronization issues with the user land X server
+ * and isn't currently used.
+ *
+ * Hardware cursor support lets the hardware handle these
+ * details.
+ *
+ * Kernel and hardware cursor mode only work for cursors
+ * up to a certain size, currently 16x16 pixels. If a
+ * bigger cursor is set, we fallback to X cursor mode.
+ *
+ * HISTORY:
+ * 1.0 by Torrey T. Lyons, October 30, 2000
+ *
+ **************************************************************/
+/* $XFree86: xc/programs/Xserver/hw/darwin/darwinCursor.c,v 1.1 2000/11/15 01:36:13 dawes Exp $ */
+
+#include "scrnintstr.h"
+#include "cursorstr.h"
+#include "micmap.h"
+#include <IOKit/graphics/IOGraphicsLib.h>
+#include <IOKit/hidsystem/IOHIDLib.h>
+#include "darwin.h"
+#include "mipointrst.h"
+
+#define DUMP_DARWIN_CURSOR FALSE
+
+// The cursors format are documented in IOFramebufferShared.h.
+#define RGBto34WithGamma(red, green, blue)  \
+    (  0x000F                               \
+     | (((red) & 0xF) << 12)                \
+     | (((green) & 0xF) << 8)               \
+     | (((blue) & 0xF) << 4) )
+#define RGBto38WithGamma(red, green, blue)  \
+    (  0xFF << 24                           \
+     | (((red) & 0xFF) << 16)               \
+     | (((green) & 0xFF) << 8)              \
+     | (((blue) & 0xFF)) )
+#define HighBitOf32 0x80000000
+
+typedef struct {
+    Bool                    canHWCursor;
+    short                   cursorMode;
+    RecolorCursorProcPtr    RecolorCursor;
+    InstallColormapProcPtr  InstallColormap;
+    QueryBestSizeProcPtr    QueryBestSize;
+    miPointerSpriteFuncPtr  spriteFuncs;
+    ColormapPtr             pInstalledMap;
+} DarwinCursorScreenRec, *DarwinCursorScreenPtr;
+
+extern DarwinFramebufferRec dfb;
+static int darwinCursorScreenIndex = -1;
+static unsigned long darwinCursorGeneration = 0;
+
+/*
+===========================================================================
+
+ Pointer sprite functions
+
+===========================================================================
+*/
+
+/*
+    Realizing the Darwin hardware cursor (ie. converting from the
+    X representation to the Darwin representation) is complicated
+    by the fact that we have three different potential cursor
+    formats to go to, one for each bit depth (8, 15, or 24).
+    The Darwin formats are documented in IOFramebufferShared.h.
+    X cursors are represented as two pieces, a source and a mask.
+    The mask is a bitmap indicating which parts of the cursor are 
+    transparent and which parts are drawn.  The source is a bitmap
+    indicating which parts of the non-transparent portion of the the
+    cursor should be painted in the foreground color and which should
+    be painted in the background color. The bitmaps are given in
+    32-bit format with least significant byte and bit first.
+    (This is opposite PowerPC Darwin.)
+*/
+
+typedef struct {
+    unsigned char image[CURSORWIDTH*CURSORHEIGHT];
+    unsigned char mask[CURSORWIDTH*CURSORHEIGHT];
+} cursorPrivRec, *cursorPrivPtr;
+
+/*
+ * DarwinRealizeCursor8
+ * Convert the X cursor representation to an 8-bit depth
+ * format for Darwin. This function assumes the maximum cursor
+ * width is a multiple of 8.
+ */
+static Bool
+DarwinRealizeCursor8(
+    ScreenPtr pScreen,
+    CursorPtr pCursor)
+{
+    cursorPrivPtr   newCursor;
+    unsigned char   *newSourceP, *newMaskP;
+    CARD32          *oldSourceP, *oldMaskP;
+    xColorItem      fgColor, bgColor;
+    int             index, x, y, rowPad;
+    int             cursorWidth, cursorHeight;
+    ColormapPtr     pmap;
+
+    // check cursor size just to be sure
+    cursorWidth = pCursor->bits->width;
+    cursorHeight = pCursor->bits->height;
+    if (cursorHeight > CURSORHEIGHT || cursorWidth > CURSORWIDTH)
+        return FALSE;
+
+    // get cursor colors in colormap
+    index = pScreen->myNum;
+    pmap = miInstalledMaps[index];
+    if (!pmap) return FALSE;
+
+    fgColor.red = pCursor->foreRed;
+    fgColor.green = pCursor->foreGreen;
+    fgColor.blue = pCursor->foreBlue;
+    FakeAllocColor(pmap, &fgColor);
+    bgColor.red = pCursor->backRed;
+    bgColor.green = pCursor->backGreen;
+    bgColor.blue = pCursor->backBlue;
+    FakeAllocColor(pmap, &bgColor);
+    FakeFreeColor(pmap, fgColor.pixel);
+    FakeFreeColor(pmap, bgColor.pixel);
+
+    // allocate memory for new cursor image
+    newCursor = xalloc( sizeof(cursorPrivRec) );
+    if (!newCursor)
+        return FALSE;
+    memset( newCursor->image, pScreen->blackPixel, CURSORWIDTH*CURSORHEIGHT );
+    memset( newCursor->mask, 0, CURSORWIDTH*CURSORHEIGHT );
+
+    // convert to 8-bit Darwin cursor format
+    oldSourceP = (CARD32 *) pCursor->bits->source;
+    oldMaskP = (CARD32 *) pCursor->bits->mask;
+    newSourceP = newCursor->image;
+    newMaskP = newCursor->mask;
+    rowPad = CURSORWIDTH - cursorWidth;
+
+    for (y = 0; y < cursorHeight; y++) {
+        for (x = 0; x < cursorWidth; x++) {
+            if (*oldSourceP & (HighBitOf32 >> x))
+                *newSourceP = fgColor.pixel;
+            else
+                *newSourceP = bgColor.pixel;
+            if (*oldMaskP & (HighBitOf32 >> x))
+                *newMaskP = 255;
+            else
+                *newSourceP = pScreen->blackPixel;
+            newSourceP++; newMaskP++;
+        }
+        oldSourceP++; oldMaskP++;
+        newSourceP += rowPad; newMaskP += rowPad;
+    }
+
+    // save the result
+    pCursor->devPriv[pScreen->myNum] = (pointer) newCursor;
+    return TRUE;
+}
+
+
+/*
+ * DarwinRealizeCursor15
+ * Convert the X cursor representation to an 15-bit depth
+ * format for Darwin.
+ */
+static Bool
+DarwinRealizeCursor15(
+    ScreenPtr       pScreen,
+    CursorPtr       pCursor)
+{
+    unsigned short  *newCursor;
+    unsigned short  fgPixel, bgPixel;
+    unsigned short  *newSourceP;
+    CARD32          *oldSourceP, *oldMaskP;
+    int             x, y, rowPad;
+    int             cursorWidth, cursorHeight;
+
+    // check cursor size just to be sure
+    cursorWidth = pCursor->bits->width;
+    cursorHeight = pCursor->bits->height;
+    if (cursorHeight > CURSORHEIGHT || cursorWidth > CURSORWIDTH)
+       return FALSE;
+
+    // allocate memory for new cursor image
+    newCursor = xalloc( CURSORWIDTH*CURSORHEIGHT*sizeof(short) );
+    if (!newCursor)
+        return FALSE;
+    memset( newCursor, 0, CURSORWIDTH*CURSORHEIGHT*sizeof(short) );
+
+    // calculate pixel values
+    fgPixel = RGBto34WithGamma( pCursor->foreRed, pCursor->foreGreen,
+                                pCursor->foreBlue );
+    bgPixel = RGBto34WithGamma( pCursor->backRed, pCursor->backGreen,
+                                pCursor->backBlue );
+
+    // convert to 15-bit Darwin cursor format
+    oldSourceP = (CARD32 *) pCursor->bits->source;
+    oldMaskP = (CARD32 *) pCursor->bits->mask;
+    newSourceP = newCursor;
+    rowPad = CURSORWIDTH - cursorWidth;
+
+    for (y = 0; y < cursorHeight; y++) {
+        for (x = 0; x < cursorWidth; x++) {
+            if (*oldMaskP & (HighBitOf32 >> x)) {
+                if (*oldSourceP & (HighBitOf32 >> x))
+                    *newSourceP = fgPixel;
+                else
+                    *newSourceP = bgPixel;
+            } else {
+                *newSourceP = 0;
+            }
+            newSourceP++;
+        }
+        oldSourceP++; oldMaskP++;
+        newSourceP += rowPad;
+    }
+
+#if DUMP_DARWIN_CURSOR
+    // Write out the cursor
+    ErrorF("Cursor: 0x%x\n", pCursor);
+    ErrorF("Width = %i, Height = %i, RowPad = %i\n", cursorWidth,
+            cursorHeight, rowPad);
+    for (y = 0; y < cursorHeight; y++) {
+        newSourceP = newCursor + y*CURSORWIDTH;
+        for (x = 0; x < cursorWidth; x++) {
+            if (*newSourceP == fgPixel)
+                ErrorF("x");
+            else if (*newSourceP == bgPixel)
+                ErrorF("o");
+            else
+                ErrorF(" ");
+            newSourceP++;
+        }
+        ErrorF("\n");
+    }
+#endif
+
+    // save the result
+    pCursor->devPriv[pScreen->myNum] = (pointer) newCursor;
+    return TRUE;
+}
+
+
+/*
+ * DarwinRealizeCursor24
+ * Convert the X cursor representation to an 24-bit depth
+ * format for Darwin. This function assumes the maximum cursor
+ * width is a multiple of 8.
+ */
+static Bool
+DarwinRealizeCursor24(
+    ScreenPtr       pScreen,
+    CursorPtr       pCursor)
+{
+    unsigned int    *newCursor;
+    unsigned int    fgPixel, bgPixel;
+    unsigned int    *newSourceP;
+    CARD32          *oldSourceP, *oldMaskP;
+    int             x, y, rowPad;
+    int             cursorWidth, cursorHeight;
+
+    // check cursor size just to be sure
+    cursorWidth = pCursor->bits->width;
+    cursorHeight = pCursor->bits->height;
+    if (cursorHeight > CURSORHEIGHT || cursorWidth > CURSORWIDTH)
+       return FALSE;
+
+    // allocate memory for new cursor image
+    newCursor = xalloc( CURSORWIDTH*CURSORHEIGHT*sizeof(int) );
+    if (!newCursor)
+        return FALSE;
+    memset( newCursor, 0, CURSORWIDTH*CURSORHEIGHT*sizeof(int) );
+
+    // calculate pixel values
+    fgPixel = RGBto38WithGamma( pCursor->foreRed, pCursor->foreGreen,
+                                pCursor->foreBlue );
+    bgPixel = RGBto38WithGamma( pCursor->backRed, pCursor->backGreen,
+                                pCursor->backBlue );
+
+    // convert to 24-bit Darwin cursor format
+    oldSourceP = (CARD32 *) pCursor->bits->source;
+    oldMaskP = (CARD32 *) pCursor->bits->mask;
+    newSourceP = newCursor;
+    rowPad = CURSORWIDTH - cursorWidth;
+
+    for (y = 0; y < cursorHeight; y++) {
+        for (x = 0; x < cursorWidth; x++) {
+            if (*oldMaskP & (HighBitOf32 >> x)) {
+                if (*oldSourceP & (HighBitOf32 >> x))
+                    *newSourceP = fgPixel;
+                else
+                    *newSourceP = bgPixel;
+            } else {
+                *newSourceP = 0;
+            }
+            newSourceP++;
+        }
+        oldSourceP++; oldMaskP++;
+        newSourceP += rowPad;
+    }
+
+#if DUMP_DARWIN_CURSOR
+    // Write out the cursor
+    ErrorF("Cursor: 0x%x\n", pCursor);
+    ErrorF("Width = %i, Height = %i, RowPad = %i\n", cursorWidth,
+            cursorHeight, rowPad);
+    for (y = 0; y < cursorHeight; y++) {
+        newSourceP = newCursor + y*CURSORWIDTH;
+        for (x = 0; x < cursorWidth; x++) {
+            if (*newSourceP == fgPixel)
+                ErrorF("x");
+            else if (*newSourceP == bgPixel)
+                ErrorF("o");
+            else
+                ErrorF(" ");
+            newSourceP++;
+        }
+        ErrorF("\n");
+    }
+#endif
+
+    // save the result
+    pCursor->devPriv[pScreen->myNum] = (pointer) newCursor;
+    return TRUE;
+}
+
+
+/*
+ * DarwinRealizeCursor
+ * 
+ */
+static Bool
+DarwinRealizeCursor(
+    ScreenPtr       pScreen,
+    CursorPtr       pCursor)
+{
+    Bool                        result;
+    DarwinCursorScreenPtr       ScreenPriv = (DarwinCursorScreenPtr)
+        pScreen->devPrivates[darwinCursorScreenIndex].ptr;
+
+    if ((pCursor->bits->height > CURSORHEIGHT) ||
+        (pCursor->bits->width > CURSORWIDTH) ||
+        // FIXME: this condition is not needed after kernel cursor works
+        !ScreenPriv->canHWCursor) {
+        result = (*ScreenPriv->spriteFuncs->RealizeCursor)(pScreen, pCursor);
+    } else if (dfb.bitsPerPixel == 8) {
+        result = DarwinRealizeCursor8(pScreen, pCursor);
+    } else if (dfb.bitsPerPixel == 16) {
+        result = DarwinRealizeCursor15(pScreen, pCursor);
+    } else {
+        result = DarwinRealizeCursor24(pScreen, pCursor);
+    }
+
+    return result;
+}
+
+
+/*
+ * DarwinUnrealizeCursor
+ * 
+ */
+static Bool
+DarwinUnrealizeCursor(
+    ScreenPtr pScreen,
+    CursorPtr pCursor)
+{
+    Bool                        result;
+    DarwinCursorScreenPtr       ScreenPriv = (DarwinCursorScreenPtr)
+        pScreen->devPrivates[darwinCursorScreenIndex].ptr;
+
+    if ((pCursor->bits->height > CURSORHEIGHT) ||
+        (pCursor->bits->width > CURSORWIDTH) ||
+        // FIXME: this condition is not needed after kernel cursor works
+        !ScreenPriv->canHWCursor) {
+        result = (*ScreenPriv->spriteFuncs->UnrealizeCursor)(pScreen, pCursor);
+    } else {
+        xfree( pCursor->devPriv[pScreen->myNum] );
+        result = TRUE;
+    }
+
+    return result;
+}
+
+
+/*
+ * DarwinSetCursor
+ * Set the cursor sprite and position
+ * Use hardware cursor if possible
+ */
+static void
+DarwinSetCursor(
+    ScreenPtr       pScreen,
+    CursorPtr       pCursor,
+    int             x,
+    int             y)
+{
+    kern_return_t               kr;
+    StdFBShmem_t                *cshmem = dfb.cursorShmem;
+    DarwinCursorScreenPtr       ScreenPriv = (DarwinCursorScreenPtr)
+        pScreen->devPrivates[darwinCursorScreenIndex].ptr;
+
+    // are we supposed to remove the cursor?
+    if (!pCursor) {
+        if (ScreenPriv->cursorMode == 0)
+            (*ScreenPriv->spriteFuncs->SetCursor)(pScreen, 0, x, y);
+        else {
+            if (!cshmem->cursorShow) {
+                cshmem->cursorShow++;
+                if (cshmem->hardwareCursorActive) {
+                    kr = IOFBSetCursorVisible(dfb.fbService, FALSE);
+                    kern_assert( kr );
+                }
+            }
+        }
+        return;
+    } 
+ 
+    // can we use the kernel or hardware cursor?
+    if ((pCursor->bits->height <= CURSORHEIGHT) &&
+        (pCursor->bits->width <= CURSORWIDTH) &&
+        // FIXME: condition not needed when kernel cursor works
+        ScreenPriv->canHWCursor) {
+
+        if (ScreenPriv->cursorMode == 0)    // remove the X cursor
+            (*ScreenPriv->spriteFuncs->SetCursor)(pScreen, 0, x, y);
+        ScreenPriv->cursorMode = 1;         // kernel cursor
+
+        // change the cursor image in shared memory
+        if (dfb.bitsPerPixel == 8) {
+            cursorPrivPtr newCursor =
+                    (cursorPrivPtr) pCursor->devPriv[pScreen->myNum];
+            memcpy(cshmem->cursor.bw8.image[0], newCursor->image,
+                        CURSORWIDTH*CURSORHEIGHT);
+            memcpy(cshmem->cursor.bw8.mask[0], newCursor->mask,
+                        CURSORWIDTH*CURSORHEIGHT);
+        } else if (dfb.bitsPerPixel == 16) {
+            unsigned short *newCursor =
+                    (unsigned short *) pCursor->devPriv[pScreen->myNum];
+            memcpy(cshmem->cursor.rgb.image[0], newCursor,
+                        2*CURSORWIDTH*CURSORHEIGHT);
+        } else {
+            unsigned int *newCursor =
+                    (unsigned int *) pCursor->devPriv[pScreen->myNum];
+            memcpy(cshmem->cursor.rgb24.image[0], newCursor,
+                        4*CURSORWIDTH*CURSORHEIGHT);
+        }
+
+        // FIXME: We always use a full size cursor, even if the image
+        // is smaller because I couldn't get the padding to come out
+        // right otherwise.
+        cshmem->cursorSize[0].width = CURSORWIDTH;
+        cshmem->cursorSize[0].height = CURSORHEIGHT;
+        cshmem->hotSpot[0].x = pCursor->bits->xhot;
+        cshmem->hotSpot[0].y = pCursor->bits->yhot;
+
+        // try to use a hardware cursor
+        if (ScreenPriv->canHWCursor) {
+            kr = IOFBSetNewCursor(dfb.fbService, 0, 0, 0);
+            // FIXME: this is a fatal error without the kernel cursor
+            kern_assert( kr );
+#if 0
+            if (kr != KERN_SUCCESS) {
+                ErrorF("Could not set new cursor with kernel return 0x%x.\n", kr);
+                ScreenPriv->canHWCursor = FALSE;
+            }
+#endif
+        }
+
+        // make the new cursor visible
+        if (cshmem->cursorShow)
+            cshmem->cursorShow--;
+
+        if (!cshmem->cursorShow && ScreenPriv->canHWCursor) {
+            kr = IOFBSetCursorVisible(dfb.fbService, TRUE);
+            // FIXME: this is a fatal error without the kernel cursor
+            kern_assert( kr );
+#if 0
+            if (kr != KERN_SUCCESS) {
+                ErrorF("Couldn't set hardware cursor visible with kernel return 0x%x.\n", kr);
+                ScreenPriv->canHWCursor = FALSE;
+            } else
+#endif
+                ScreenPriv->cursorMode = 2;     // hardware cursor
+        }
+
+	return; 
+    }
+
+    // otherwise we use a software cursor
+    if (ScreenPriv->cursorMode) {
+	/* remove the kernel or hardware cursor */
+	DarwinSetCursor(pScreen, 0, x, y);
+    }
+
+    ScreenPriv->cursorMode = 0;
+    (*ScreenPriv->spriteFuncs->SetCursor)(pScreen, pCursor, x, y);
+}
+
+
+/*
+ * DarwinMoveCursor
+ * Move the cursor. This is a noop for a kernel or hardware cursor.
+ */
+static void
+DarwinMoveCursor(
+    ScreenPtr   pScreen,
+    int         x,
+    int         y)
+{
+    DarwinCursorScreenPtr ScreenPriv = (DarwinCursorScreenPtr)
+        pScreen->devPrivates[darwinCursorScreenIndex].ptr;
+
+    // only the X cursor needs to be explicitly moved
+    if (!ScreenPriv->cursorMode)
+	(*ScreenPriv->spriteFuncs->MoveCursor)(pScreen, x, y);
+}
+
+static miPointerSpriteFuncRec darwinSpriteFuncsRec = {
+    DarwinRealizeCursor,
+    DarwinUnrealizeCursor,
+    DarwinSetCursor,
+    DarwinMoveCursor
+};
+
+
+/*
+===========================================================================
+
+ Pointer screen functions
+
+===========================================================================
+*/
+
+/*
+ * DarwinCursorOffScreen
+ */
+static Bool DarwinCursorOffScreen(ScreenPtr *pScreen, int *x, int *y)
+{	return FALSE;
+}
+
+
+/*
+ * DarwinCrossScreen
+ */
+static void DarwinCrossScreen(ScreenPtr pScreen, Bool entering)
+{	return;
+}
+
+
+/*
+ * DarwinWarpCursor
+ * Change the cursor position without generating an event or motion history
+ */
+static void
+DarwinWarpCursor(
+    ScreenPtr               pScreen,
+    int                     x,
+    int                     y)
+{
+    kern_return_t           kr;
+
+    kr = IOHIDSetMouseLocation( dfb.hidService, x, y );
+    if (kr != KERN_SUCCESS) {
+        ErrorF("Could not set cursor position with kernel return 0x%x.\n", kr);
+    }
+    miPointerWarpCursor(pScreen, x, y);
+}
+
+static miPointerScreenFuncRec darwinScreenFuncsRec = {
+  DarwinCursorOffScreen,
+  DarwinCrossScreen,
+  DarwinWarpCursor,
+};
+
+
+/*
+===========================================================================
+
+ Other screen functions
+
+===========================================================================
+*/
+
+/*
+ * DarwinCursorQueryBestSize
+ * Handle queries for best cursor size
+ */
+static void
+DarwinCursorQueryBestSize(
+   int              class, 
+   unsigned short   *width,
+   unsigned short   *height,
+   ScreenPtr        pScreen)
+{
+    DarwinCursorScreenPtr ScreenPriv = (DarwinCursorScreenPtr)
+        pScreen->devPrivates[darwinCursorScreenIndex].ptr;
+
+    if (class == CursorShape) {
+        *width = CURSORWIDTH;
+        *height = CURSORHEIGHT;
+    } else
+        (*ScreenPriv->QueryBestSize)(class, width, height, pScreen);
+}
+
+
+/*
+ * DarwinInitCursor
+ * Initialize cursor support
+ */
+Bool 
+DarwinInitCursor(
+    ScreenPtr	pScreen)
+{
+    DarwinCursorScreenPtr   ScreenPriv;
+    miPointerScreenPtr	    PointPriv;
+    kern_return_t           kr;
+ 
+    // start with no cursor displayed
+    if (!dfb.cursorShmem->cursorShow++) {
+        if (dfb.cursorShmem->hardwareCursorActive) {
+            kr = IOFBSetCursorVisible(dfb.fbService, FALSE);
+            kern_assert( kr );
+        }
+    }
+
+    // initialize software cursor handling (always needed as backup)
+    if (!miDCInitialize(pScreen, &darwinScreenFuncsRec)) {
+        return FALSE;
+    }
+
+    // allocate private storage for this screen's hardware cursor info
+    if (darwinCursorGeneration != serverGeneration) {
+        if ((darwinCursorScreenIndex = AllocateScreenPrivateIndex()) < 0)
+            return FALSE;
+        darwinCursorGeneration = serverGeneration; 	
+    }
+
+    ScreenPriv = xcalloc( 1, sizeof(DarwinCursorScreenRec) );
+    if (!ScreenPriv) return FALSE;
+
+    pScreen->devPrivates[darwinCursorScreenIndex].ptr = (pointer) ScreenPriv;
+
+    // check if a hardware cursor is supported
+    if (!dfb.cursorShmem->hardwareCursorCapable) {
+        ScreenPriv->canHWCursor = FALSE;
+        ErrorF("Hardware cursor not supported.\n");
+    } else {
+        // we need to make sure that the hardware cursor really works
+        ScreenPriv->canHWCursor = TRUE;
+        kr = IOFBSetNewCursor(dfb.fbService, 0, 0, 0);
+        if (kr != KERN_SUCCESS) {
+            ErrorF("Could not set hardware cursor with kernel return 0x%x.\n", kr);
+            ScreenPriv->canHWCursor = FALSE;
+        }
+        kr = IOFBSetCursorVisible(dfb.fbService, TRUE);
+        if (kr != KERN_SUCCESS) {
+            ErrorF("Couldn't set hardware cursor visible with kernel return 0x%x.\n", kr);
+            ScreenPriv->canHWCursor = FALSE;
+        }
+        IOFBSetCursorVisible(dfb.fbService, FALSE);
+    }
+
+    ScreenPriv->cursorMode = 0;
+    ScreenPriv->pInstalledMap = NULL;
+
+    // override some screen procedures
+    ScreenPriv->QueryBestSize = pScreen->QueryBestSize;
+    pScreen->QueryBestSize = DarwinCursorQueryBestSize;
+//    ScreenPriv->ConstrainCursor = pScreen->ConstrainCursor;
+//    pScreen->ConstrainCursor = DarwinConstrainCursor;
+
+    // initialize hardware cursor handling
+    PointPriv = (miPointerScreenPtr)
+                    pScreen->devPrivates[miPointerScreenIndex].ptr;
+
+    ScreenPriv->spriteFuncs = PointPriv->spriteFuncs;
+    PointPriv->spriteFuncs = &darwinSpriteFuncsRec; 
+
+    /* Other routines that might be overridden */
+/*
+    CursorLimitsProcPtr		CursorLimits;
+    RecolorCursorProcPtr	RecolorCursor;
+*/
+
+    return TRUE;
+}
diff --git a/xc/programs/Xserver/hw/darwin/darwinKeyboard.c b/xc/programs/Xserver/hw/darwin/darwinKeyboard.c
new file mode 100644
index 000000000..78506587d
--- /dev/null
+++ b/xc/programs/Xserver/hw/darwin/darwinKeyboard.c
@@ -0,0 +1,503 @@
+//=============================================================================
+//
+// Keyboard support for the Darwin X Server
+//
+// By Torrey T. Lyons
+//
+// The code to parse the Darwin keymap is derived from dumpkeymap.c
+// by Eric Sunshine, which includes the following license:
+//
+//-----------------------------------------------------------------------------
+//
+// Copyright (C) 1999,2000 by Eric Sunshine <sunshine@sunshineco.com>
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+//   1. Redistributions of source code must retain the above copyright
+//      notice, this list of conditions and the following disclaimer.
+//   2. Redistributions in binary form must reproduce the above copyright
+//      notice, this list of conditions and the following disclaimer in the
+//      documentation and/or other materials provided with the distribution.
+//   3. The name of the author may not be used to endorse or promote products
+//      derived from this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+// OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+// NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+//=============================================================================
+
+/* $XFree86: xc/programs/Xserver/hw/darwin/darwinKeyboard.c,v 1.1 2000/11/15 01:36:14 dawes Exp $ */
+
+/*
+===========================================================================
+
+ An X keyCode must be in the range XkbMinLegalKeyCode (8) to
+ XkbMaxLegalKeyCode(255).
+
+ The keyCodes we get from the kernel range from 0 to 127, so we need to
+ offset the range before passing the keyCode to X.
+
+ An X KeySym is an extended ascii code that is device independent.
+
+ The modifier map is accessed by the keyCode, but the normal map is
+ accessed by keyCode - MIN_KEYCODE.  Sigh.
+ 
+===========================================================================
+*/
+
+// Define this to get a diagnostic output to stderr which is helpful
+// in determining how the X server is interpreting the Darwin keymap.
+#undef DUMP_DARWIN_KEYMAP
+
+#include <drivers/event_status_driver.h>
+#include <IOKit/hidsystem/ev_keymap.h>
+#include "darwin.h"
+extern DarwinFramebufferRec dfb;
+extern unsigned char darwinKeyCommandL, darwinKeyOptionL;
+
+#define XK_TECHNICAL		// needed to get XK_Escape
+#include "keysym.h"
+
+#define GLYPHS_PER_KEY  4
+#define NUM_KEYCODES    248		// NX_NUMKEYCODES might be better
+#define MAX_KEYCODE     NUM_KEYCODES + MIN_KEYCODE - 1
+
+#define AltMask	        Mod1Mask
+#define NumLockMask     Mod2Mask
+#define MetaMask        Mod3Mask
+#define ScrollLockMask  Mod4Mask
+
+static KeySym const ascii_to_x[256] = {
+	NoSymbol,	NoSymbol,	NoSymbol,	XK_KP_Enter,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	XK_Delete,	XK_Tab,		XK_Linefeed,	NoSymbol,
+	NoSymbol,	XK_Return,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	XK_Escape,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	XK_space,	XK_exclam,	XK_quotedbl,	XK_numbersign,
+	XK_dollar,	XK_percent,	XK_ampersand,	XK_apostrophe,
+	XK_parenleft,	XK_parenright,	XK_asterisk,	XK_plus,
+	XK_comma,	XK_minus,	XK_period,	XK_slash,
+	XK_0,		XK_1,		XK_2,		XK_3,
+	XK_4,		XK_5,		XK_6,		XK_7,
+	XK_8,		XK_9,		XK_colon,	XK_semicolon,
+	XK_less,	XK_equal,	XK_greater,	XK_question,
+	XK_at,		XK_A,		XK_B,		XK_C,
+	XK_D,		XK_E,		XK_F,		XK_G,
+	XK_H,		XK_I,		XK_J,		XK_K,
+	XK_L,		XK_M,		XK_N,		XK_O,
+	XK_P,		XK_Q,		XK_R,		XK_S,
+	XK_T,		XK_U,		XK_V,		XK_W,
+	XK_X,		XK_Y,		XK_Z,		XK_bracketleft,
+	XK_backslash,	XK_bracketright,XK_asciicircum,	XK_underscore,
+	XK_grave,	XK_a,		XK_b,		XK_c,
+	XK_d,		XK_e,		XK_f,		XK_g,
+	XK_h,		XK_i,		XK_j,		XK_k,
+	XK_l,		XK_m,		XK_n,		XK_o,
+	XK_p,		XK_q,		XK_r,		XK_s,
+	XK_t,		XK_u,		XK_v,		XK_w,
+	XK_x,		XK_y,		XK_z,		XK_braceleft,
+	XK_bar,		XK_braceright,	XK_asciitilde,	XK_BackSpace,
+// 128
+	XK_Ccedilla,	XK_udiaeresis,	XK_eacute,	XK_acircumflex,
+	XK_adiaeresis,	XK_agrave,	XK_aring,	XK_ccedilla,
+	XK_ecircumflex,	XK_ediaeresis,	XK_egrave,	XK_idiaeresis,
+	XK_icircumflex,	XK_igrave,	XK_Adiaeresis,	XK_Aring,
+	XK_Eacute,	XK_ae,		XK_AE,		XK_ocircumflex,
+	XK_odiaeresis,	XK_ograve,	XK_ntilde,	XK_ugrave,
+	XK_ydiaeresis,	XK_Odiaeresis,	XK_Udiaeresis,	XK_cent,
+	XK_sterling,	XK_yen,		XK_paragraph,	XK_section,
+// 160
+	XK_aacute,	XK_degree,	XK_cent,	XK_sterling,
+	XK_ntilde,	XK_Ntilde,	XK_paragraph,	XK_Greek_BETA,
+	XK_questiondown,XK_hyphen,	XK_notsign,	XK_onehalf,
+	XK_onequarter,	XK_exclamdown,	XK_guillemotleft,XK_guillemotright,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+// 192
+	XK_questiondown,XK_exclamdown,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	XK_AE,		XK_ae,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+	NoSymbol,	NoSymbol,	NoSymbol,	NoSymbol,
+// 224
+	XK_Greek_alpha,	XK_ssharp,	XK_Greek_GAMMA,	XK_Greek_pi,
+	XK_Greek_SIGMA,	XK_Greek_sigma,	XK_mu,	        XK_Greek_tau,
+	XK_Greek_PHI,	XK_Greek_THETA,	XK_Greek_OMEGA,	XK_Greek_delta,
+	XK_infinity,	XK_Ooblique,	XK_Greek_epsilon, XK_intersection,
+	XK_identical,	XK_plusminus,	XK_greaterthanequal, XK_lessthanequal,
+	XK_topintegral,	XK_botintegral,	XK_division,	XK_similarequal,
+	XK_degree,	NoSymbol,	NoSymbol,	XK_radical,
+	XK_Greek_eta,	XK_twosuperior,	XK_periodcentered, NoSymbol,
+  };
+
+#define MIN_SYMBOL		0xAC
+static KeySym const symbol_to_x[] = {
+    XK_Left,        XK_Up,          XK_Right,      XK_Down
+  };
+int const NUM_SYMBOL = sizeof(symbol_to_x) / sizeof(symbol_to_x[0]);
+
+#define MIN_FUNCKEY		0x20
+static KeySym const funckey_to_x[] = {
+    XK_F1,          XK_F2,          XK_F3,          XK_F4,
+    XK_F5,          XK_F6,          XK_F7,          XK_F8,
+    XK_F9,          XK_F10,         XK_F11,         XK_F12,
+    XK_Insert,      XK_Delete,      XK_Home,        XK_End,
+    XK_Page_Up,     XK_Page_Down,   XK_F13,         XK_F14,
+    XK_F15
+  };
+int const NUM_FUNCKEY = sizeof(funckey_to_x) / sizeof(funckey_to_x[0]);
+
+typedef struct {
+    KeySym		normalSym;
+    KeySym		keypadSym;
+} darwinKeyPad_t;
+
+static darwinKeyPad_t const normal_to_keypad[] = {
+    { XK_0,         XK_KP_0 },
+    { XK_1,         XK_KP_1 },
+    { XK_2,         XK_KP_2 },
+    { XK_3,         XK_KP_3 },
+    { XK_4,         XK_KP_4 },
+    { XK_5,         XK_KP_5 },
+    { XK_6,         XK_KP_6 },
+    { XK_7,         XK_KP_7 },
+    { XK_8,         XK_KP_8 },
+    { XK_9,         XK_KP_9 },
+    { XK_equal,     XK_KP_Equal },
+    { XK_asterisk,  XK_KP_Multiply },
+    { XK_plus,      XK_KP_Add },
+    { XK_comma,     XK_KP_Separator },
+    { XK_minus,     XK_KP_Subtract },
+    { XK_period,    XK_KP_Decimal },
+    { XK_slash,     XK_KP_Divide }
+};
+int const NUM_KEYPAD = sizeof(normal_to_keypad) / sizeof(normal_to_keypad[0]);
+
+static void DarwinBell( int loud, DeviceIntPtr pDevice, pointer ctrl, int fbclass) {
+    // FIXME
+}
+
+static void DarwinChangeKeyboardControl( DeviceIntPtr device, KeybdCtrl *ctrl ) {
+    // keyclick, bell volume / pitch, autorepead, LED's
+}
+
+static	CARD8 modMap[MAP_LENGTH];
+static	KeySym map[256 * GLYPHS_PER_KEY];
+
+//-----------------------------------------------------------------------------
+// Data Stream Object
+//	Can be configured to treat embedded "numbers" as being composed of
+//	either 1, 2, or 4 bytes, apiece.
+//-----------------------------------------------------------------------------
+typedef struct _DataStream
+{
+    unsigned char const *data;
+    unsigned char const *data_end;
+    short number_size;  // Size in bytes of a "number" in the stream.
+} DataStream;
+
+static DataStream* new_data_stream( unsigned char const* data, int size )
+{
+    DataStream* s = (DataStream*)xalloc( sizeof(DataStream) );
+    s->data = data;
+    s->data_end = data + size;
+    s->number_size = 1; // Default to byte-sized numbers.
+    return s;
+}
+
+static void destroy_data_stream( DataStream* s )
+{
+    xfree(s);
+}
+
+static unsigned char get_byte( DataStream* s )
+{
+    assert(s->data + 1 <= s->data_end);
+    return *s->data++;
+}
+
+static short get_word( DataStream* s )
+{
+    short hi, lo;
+    assert(s->data + 2 <= s->data_end);
+    hi = *s->data++;
+    lo = *s->data++;
+    return ((hi << 8) | lo);
+}
+
+static int get_dword( DataStream* s )
+{
+    int b1, b2, b3, b4;
+    assert(s->data + 4 <= s->data_end);
+    b4 = *s->data++;
+    b3 = *s->data++;
+    b2 = *s->data++;
+    b1 = *s->data++;
+    return ((b4 << 24) | (b3 << 16) | (b2 << 8) | b1);
+}
+
+static int get_number( DataStream* s )
+{
+    switch (s->number_size) {
+	case 4:  return get_dword(s);
+	case 2:  return get_word(s);
+	default: return get_byte(s);
+    }
+}
+
+//-----------------------------------------------------------------------------
+// Utility functions to help parse Darwin keymap
+//-----------------------------------------------------------------------------
+
+/*
+ * bits_set
+ * Calculate number of bits set in the modifier mask.
+ */
+static short bits_set( short mask )
+{
+    short n = 0;
+
+    for ( ; mask != 0; mask >>= 1)
+	if ((mask & 0x01) != 0)
+	    n++;
+    return n;
+}
+
+/*
+ * parse_next_char_code
+ * Read the next character code from the Darwin keymapping
+ * and write it to the X keymap.
+ */
+static void parse_next_char_code(
+    DataStream  *s,
+    KeySym      *k )
+{
+    const short charSet = get_number(s);
+    const short charCode = get_number(s);
+
+    if (charSet == 0) {                 // ascii character
+        if (charCode >= 0 && charCode < 256)
+            *k = ascii_to_x[charCode];
+    } else if (charSet == 0x01) {       // symbol character
+        if (charCode >= MIN_SYMBOL &&
+            charCode <= MIN_SYMBOL + NUM_SYMBOL)
+            *k = symbol_to_x[charCode - MIN_SYMBOL];
+    } else if (charSet == 0xFE) {       // function key
+        if (charCode >= MIN_FUNCKEY &&
+            charCode <= MIN_FUNCKEY + NUM_FUNCKEY)
+            *k = funckey_to_x[charCode - MIN_FUNCKEY];
+    }
+}
+
+/*
+ * DarwinKeyboardInit
+ *      Get the Darwin keyboard map and compute an equivalent
+ *      X keyboard map and modifier map. Set the new keyboard
+ *      device structure.
+ */
+void DarwinKeyboardInit(
+    DeviceIntPtr        pDev )
+{
+    KeySym              *k;
+    int                 i;
+    short		numMods, numKeys, numPadKeys = 0;
+    KeySymsRec          keySyms;
+    NXKeyMapping        keyMap;
+    DataStream		*keyMapStream;
+    unsigned char const *numPadStart = 0;
+
+    memset( modMap, NoSymbol, sizeof( modMap ) );
+    memset( map, 0, sizeof( map ) );
+
+    // Open a shared connection to the HID System.
+    // Note that the Event Status Driver is really just a wrapper
+    // for a kIOHIDParamConnectType connection.
+    assert( dfb.hidParam = NXOpenEventStatus() );
+
+    // get the Darwin keyboard map
+    keyMap.size = NXKeyMappingLength( dfb.hidParam );
+    keyMap.mapping = (char*) xalloc( keyMap.size );
+    assert( NXGetKeyMapping( dfb.hidParam, &keyMap ));
+    keyMapStream = new_data_stream( (unsigned char const*)keyMap.mapping,
+                                    keyMap.size );
+
+    // check the type of map
+    if (get_word(keyMapStream)) {
+        keyMapStream->number_size = 2;
+        ErrorF("Current 16-bit keymapping may not be interpreted correctly.\n");
+    }
+
+    // Compute the modifier map and
+    // insert X modifier KeySyms into keyboard map.
+    numMods = get_number(keyMapStream);
+    while (numMods-- > 0) {
+        int	    	left = 1;                   // first keycode is left
+        short const     charCode = get_number(keyMapStream);
+        short           numKeyCodes = get_number(keyMapStream);
+        if (charCode == NX_MODIFIERKEY_NUMERICPAD) {
+            numPadStart = keyMapStream->data;
+            numPadKeys = numKeyCodes;
+        }
+        while (numKeyCodes-- > 0) {
+            const short keyCode = get_number(keyMapStream);
+            if (charCode == NX_MODIFIERKEY_ALPHALOCK) {
+                modMap[keyCode + MIN_KEYCODE] = LockMask;
+                map[keyCode * GLYPHS_PER_KEY] = XK_Caps_Lock;
+            } else if (charCode == NX_MODIFIERKEY_SHIFT) {
+                modMap[keyCode + MIN_KEYCODE] = ShiftMask;
+                map[keyCode * GLYPHS_PER_KEY] =
+                        (left ? XK_Shift_L : XK_Shift_R);
+            } else if (charCode == NX_MODIFIERKEY_CONTROL) {
+                modMap[keyCode + MIN_KEYCODE] = ControlMask;
+                map[keyCode * GLYPHS_PER_KEY] =
+                        (left ? XK_Control_L : XK_Control_R);
+            } else if (charCode == NX_MODIFIERKEY_ALTERNATE) {
+                modMap[keyCode + MIN_KEYCODE] = AltMask;
+                if (left) {
+                    map[keyCode * GLYPHS_PER_KEY] = XK_Alt_L;
+                    darwinKeyOptionL = keyCode + MIN_KEYCODE;
+                } else
+                    map[keyCode * GLYPHS_PER_KEY] = XK_Alt_R;
+            } else if (charCode == NX_MODIFIERKEY_COMMAND) {
+                modMap[keyCode + MIN_KEYCODE] = MetaMask;
+                if (left) {
+                    map[keyCode * GLYPHS_PER_KEY] = XK_Meta_L;
+                    darwinKeyCommandL = keyCode + MIN_KEYCODE;
+                } else
+                    map[keyCode * GLYPHS_PER_KEY] = XK_Meta_R;
+            } else if (charCode == NX_MODIFIERKEY_NUMERICPAD) {
+                continue;
+            } else if (charCode == NX_MODIFIERKEY_HELP) {
+                map[keyCode * GLYPHS_PER_KEY] = XK_Help;
+            } else {
+                break;
+            }
+            left = 0;
+        }
+    }
+
+    // Convert the Darwin keyboard map to an X keyboard map.
+    // A key can have shifted and unshifted character codes.
+    // Other modifiers are ignored although they are
+    // present in the Darwin keyboard map.
+    numKeys = get_number(keyMapStream);
+    for (i = 0, k = map; i < numKeys; i++, k += GLYPHS_PER_KEY) {
+        short const     charGenMask = get_number(keyMapStream);
+        if (charGenMask != 0xFF) {              // is key bound?
+            short       numKeyCodes = 1 << bits_set(charGenMask);
+
+            // If alphalock and shift modifiers produce different codes,
+            // we only need the shift case since X handles alphalock.
+            if (charGenMask & 0x01 && charGenMask & 0x02) {
+                // record unshifted case
+                parse_next_char_code( keyMapStream, k );
+                // skip alphalock case
+                get_number(keyMapStream); get_number(keyMapStream);
+                // record shifted case
+                parse_next_char_code( keyMapStream, k+1 );
+                if (k[1] == k[0]) k[1] = NoSymbol;
+                numKeyCodes -= 3;
+                // skip the rest
+                while (numKeyCodes-- > 0) {
+                    get_number(keyMapStream); get_number(keyMapStream);
+                }
+
+            // If alphalock and shift modifiers produce same code, use it.
+            } else if (charGenMask & 0x03) {
+                // record unshifted case
+                parse_next_char_code( keyMapStream, k );
+                // record shifted case
+                parse_next_char_code( keyMapStream, k+1 );
+                if (k[1] == k[0]) k[1] = NoSymbol;
+                numKeyCodes -= 2;
+                // skip the rest
+                while (numKeyCodes-- > 0) {
+                    get_number(keyMapStream); get_number(keyMapStream);
+                }
+
+            // If neither alphalock or shift produce characters,
+            // use only one character code for this key,
+            // but it can be a special character.
+            } else {
+                parse_next_char_code( keyMapStream, k );
+                numKeyCodes--;
+                while (numKeyCodes-- > 0) {     // skip the rest
+                    get_number(keyMapStream); get_number(keyMapStream);
+                
+                }
+            }
+        }
+    }
+
+    // Now we have to go back through the list of keycodes that are on the
+    // numeric keypad and update the X keymap.
+    keyMapStream->data = numPadStart;
+    while(numPadKeys-- > 0) {
+        const short keyCode = get_number(keyMapStream);
+        k = &map[keyCode * GLYPHS_PER_KEY];
+        for (i = 0; i < NUM_KEYPAD; i++) {
+            if (*k == normal_to_keypad[i].normalSym) {
+                k[0] = normal_to_keypad[i].keypadSym;
+                break;
+            }
+        }
+    }
+
+    // free Darwin keyboard map
+    destroy_data_stream( keyMapStream );
+    xfree( keyMap.mapping );
+
+#ifdef DUMP_DARWIN_KEYMAP
+    ErrorF("Darwin -> X converted keyboard map\n");
+    for (i = 0, k = map; i < NX_NUMKEYCODES; i++, k += GLYPHS_PER_KEY) {
+        int j;
+        ErrorF("0x%02x:", i);
+        for (j = 0; j < GLYPHS_PER_KEY; j++) {
+            if (k[j] == NoSymbol) {
+                ErrorF("\tNoSym");
+            } else {
+                ErrorF("\t0x%x", k[j]);
+            }
+        }
+        ErrorF("\n");
+    }
+#endif
+
+    keySyms.map        = map;
+    keySyms.mapWidth   = GLYPHS_PER_KEY;
+    keySyms.minKeyCode = MIN_KEYCODE;
+    keySyms.maxKeyCode = MAX_KEYCODE;
+
+    assert( InitKeyboardDeviceStruct( (DevicePtr)pDev, &keySyms, modMap,
+                                      DarwinBell,
+                                      DarwinChangeKeyboardControl ));
+}
+
+/*
+ * LegalModifier
+ * This allows the driver level to prevent some keys from being remapped
+ * as modifier keys.
+ * I have no idea why this is useful.
+ */
+Bool LegalModifier(unsigned int key, DevicePtr pDev)
+{
+    return 1;
+}
diff --git a/xc/programs/Xserver/hw/darwin/utils/Imakefile b/xc/programs/Xserver/hw/darwin/utils/Imakefile
new file mode 100644
index 000000000..7947a14ce
--- /dev/null
+++ b/xc/programs/Xserver/hw/darwin/utils/Imakefile
@@ -0,0 +1,11 @@
+XCOMM $XFree86: xc/programs/Xserver/hw/darwin/utils/Imakefile,v 1.2 2000/11/16 03:22:18 dawes Exp $
+
+            SRCS = dumpkeymap.c
+            OBJS = dumpkeymap.o
+EXTRA_LOAD_FLAGS = -framework IOKit
+
+AllTarget(ProgramTargetName(dumpkeymap))
+
+SingleProgramTarget(dumpkeymap,$(OBJS),NullParameter,NullParameter)
+InstallProgram(dumpkeymap,$(BINDIR))
+
diff --git a/xc/programs/Xserver/hw/darwin/utils/dumpkeymap.c b/xc/programs/Xserver/hw/darwin/utils/dumpkeymap.c
new file mode 100644
index 000000000..a3b96ea45
--- /dev/null
+++ b/xc/programs/Xserver/hw/darwin/utils/dumpkeymap.c
@@ -0,0 +1,879 @@
+// $XFree86: xc/programs/Xserver/hw/darwin/utils/dumpkeymap.c,v 1.1 2000/11/15 01:36:14 dawes Exp $
+//
+//=============================================================================
+//
+// Copyright (C) 1999,2000 by Eric Sunshine <sunshine@sunshineco.com>
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+//   1. Redistributions of source code must retain the above copyright
+//      notice, this list of conditions and the following disclaimer.
+//   2. Redistributions in binary form must reproduce the above copyright
+//      notice, this list of conditions and the following disclaimer in the
+//      documentation and/or other materials provided with the distribution.
+//   3. The name of the author may not be used to endorse or promote products
+//      derived from this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+// OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+// NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+//=============================================================================
+//-----------------------------------------------------------------------------
+// dumpkeymap.c
+//
+//	Prints a textual representation of an Apple/NeXT .keymapping file, or
+//	the currently active key map in use by the WindowServer and the AppKit
+//	on the local machine.
+//
+// KEY MAPPING DESCRIPTION
+//
+//	Types and Data
+//	--------------
+//	The following type definitions are employed throughout this
+//	discussion:
+//
+//	typedef unsigned char  byte;
+//	typedef unsigned short word;
+//	typedef unsigned long  dword;
+//
+//	Additionally, the type definition `number' is used generically to
+//	indicate a numeric value.  The actual size of the `number' type may be
+//	one or two bytes depending upon how the data is stored in the key map.
+//	Although most key maps use byte-sized numeric values, word-sized
+//	values are also allowed.
+//
+//	Multi-byte values in a key mapping file are stored in big-endian byte
+//	order.
+//
+//	Key Mapping File and Device Mapping
+//	-----------------------------------
+//	A key mapping file begins with a magic-number and continues with a
+//	variable number of device-specific key mappings.
+//
+// 	struct KeyMappingFile {
+// 	    char magic_number[4];	// "KYM1"
+// 	    DeviceMapping maps[...]	// Variable number of maps
+// 	};
+//
+// 	struct DeviceMapping {
+// 	    dword interface;	// NX_EVS_DEVICE_INTERFACE_ACE, etc.
+// 	    dword handler_id;	// Interface subtype (0=101, 1=102 key, etc.)
+// 	    dword map_size;	// Byte count following this address
+// 	    KeyMapping map;
+// 	};
+//
+//	Together, `interface' and `handler_id' identify the exact keyboard
+//	hardware to which this mapping applies.  The `interface' value
+//	represents a family of keyboard device types (such as Intel, ADB,
+//	NeXT, Sun Type5, etc.) and `handler_id' represents a specific keyboard
+//	layout within that family.  On MacOS/X and Darwin, `interface'
+//	constants can be found in IOHIDTypes.h, whereas on MacOS/X Server,
+//	OpenStep, and NextStep, they can be found in ev_types.h.  Programs
+//	which display a visual representation of a keyboard layout, match
+//	`interface' and `handler_id' from the .keymapping file against the
+//	`interface' and `handler_id' values found in each .keyboard file.
+//
+//	Key Mapping
+//	-----------
+//	A key mapping completely defines the relationship of all scan codes
+//	with their associated functionality.  A KeyMapping structure is
+//	embedded within the DeviceMapping structure in a KeyMappingFile.  The
+//	currently active key mapping in use by the WindowServer and AppKit is
+//	also represented by a KeyMapping structure, and can be referred to
+//	directly by calling NXGetKeyMapping() and accessing the `mapping' data
+//	member of the returned NXKeyMapping structure.
+//
+// 	struct KeyMapping {
+//	    word number_size;			// 0=1 byte, non-zero=2 bytes
+//	    number num_modifier_groups;		// Modifier groups
+//	    ModifierGroup modifier_groups[...];
+//	    number num_scan_codes;		// Scan groups
+//	    ScanGroup scan_table[...];
+//	    number num_sequence_lists;		// Sequence lists
+//	    Sequence sequence_lists[...];
+//	    number num_special_keys;		// Special keys
+//	    SpecialKey special_key[...];
+// 	};
+//
+//	The `number_size' flag determines the size, in bytes, of all remaining
+//	numeric values (denoted by the type definition `number') within the
+//	key mapping.  If its value is zero, then numbers are represented by a
+//	single byte.  If it is non-zero, then numbers are represented by a
+//	word (two bytes).
+//
+//	Modifier Group
+//	--------------
+//	A modifier group defines all scan codes which map to a particular type
+//	of modifier, such as "shift", "control", etc.
+//
+// 	enum Modifier {
+// 	    ALPHALOCK = 0,
+// 	    SHIFT,
+// 	    CONTROL,
+// 	    ALTERNATE,
+// 	    COMMAND,
+// 	    KEYPAD,
+// 	    HELP
+// 	};
+//
+// 	struct ModifierGroup {
+// 	    number modifier;		// A Modifier constant
+// 	    number num_scan_codes;
+// 	    number scan_codes[...];	// Variable number of scan codes
+// 	};
+//
+//	The scan_codes[] array contains a list of all scan codes which map to
+//	the specified modifier.  The "shift", "command", and "alternate"
+//	modifiers are frequently mapped to two different scan codes, apiece,
+//	since these modifiers often appear on both the left and right sides of
+//	the keyboard.
+//
+//	Scan Group
+//	----------
+//	There is one ScanGroup for each scan code generated by the given
+//	keyboard.  This number is given by KeyMapping::num_scan_codes.  The
+//	first scan group represents hardware scan code 0, the second
+//	represents scan code 1, etc.
+//
+//	enum ModifierMask {
+// 	    ALPHALOCK_MASK	 = 1 << 0,
+// 	    SHIFT_MASK		 = 1 << 1,
+// 	    CONTROL_MASK	 = 1 << 2,
+// 	    ALTERNATE_MASK	 = 1 << 3,
+// 	    CARRIAGE_RETURN_MASK = 1 << 4
+// 	};
+// 	#define NOT_BOUND 0xff
+//
+// 	struct ScanGroup {
+// 	    number mask;
+// 	    Character characters[...];
+// 	};
+//
+//	For each scan code, `mask' defines which modifier combinations
+//	generate characters.  If `mask' is NOT_BOUND (0xff) then then this
+//	scan code does not generate any characters ever, and its characters[]
+//	array is zero length.  Otherwise, the characters[] array contains one
+//	Character record for each modifier combination.
+//
+//	The number of records in characters[] is determined by computing
+//	(1 << bits_set_in_mask).  In other words, if mask is zero, then zero
+//	bits are set, so characters[] contains only one record.  If `mask' is
+//	(SHIFT_MASK | CONTROL_MASK), then two bits are set, so characters[]
+//	contains four records.
+//
+//	The first record always represents the character which is generated by
+//	that key when no modifiers are active.  The remaining records
+//	represent characters generated by the various modifier combinations.
+//	Using the example with the "shift" and "control" masks set, record two
+//	would represent the character with the shift modifier active; record
+//	three, the control modifier active; and record four, both the shift
+//	and control modifiers active.
+//
+//	As a special case, ALPHALOCK_MASK implies SHIFT_MASK, though only
+//	ALPHALOCK_MASK appears in `mask'.  In this case the same character is
+//	generated for both the shift and alpha-lock modifiers, but only needs
+//	to appear once in the characters[] array.
+//
+//	Character
+//	---------
+//	Each Character record indicates the character generated when this key
+//	is pressed, as well as the character set which contains the character.
+//	Well known character Sets are "ASCII" and "Symbol".  The character set
+//	can also be one of the meta values FUNCTION_KEY or KEY_SEQUENCE.  If
+//	it is FUNCTION_KEY then `char_code' represents a generally well-known
+//	function key such as those enumerated by FunctionKey.  If the
+//	character set is KEY_SEQUENCE then `char_code' represents is a
+//	zero-base index into KeyMapping::sequence_lists[].
+//
+// 	enum CharacterSet {
+// 	    ASCII	 = 0x00,
+// 	    SYMBOL	 = 0x01,
+// 	    ...
+// 	    FUNCTION_KEY = 0xfe,
+// 	    KEY_SEQUENCE = 0xff
+// 	};
+//
+// 	struct Character {
+// 	    number set;		// CharacterSet of generated character
+// 	    number char_code;	// Actual character generated
+// 	};
+//
+// 	enum FunctionKey {
+// 	    F1 = 0x20, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12,
+// 	    INSERT, DELETE, HOME, END, PAGE_UP, PAGE_DOWN, PRINT_SCREEN,
+// 	    SCROLL_LOCK, PAUSE, SYS_REQUEST, BREAK, RESET, STOP, MENU, USER,
+// 	    SYSTEM, PRINT, CLEAR_LINE, CLEAR_DISPLAY, INSERT_LINE,
+// 	    DELETE_LINE, INSERT_CHAR, DELETE_CHAR, PREV, NEXT, SELECT
+// 	};
+//
+//	Sequence
+//	--------
+//	When Character::set contains the meta value KEY_SEQUENCE, the scan
+//	code is bound to a sequence of keys rather than a single character.  A
+//	sequence is a series of modifiers and characters which are
+//	automatically generated when the associated key is depressed.  Each
+//	generated Character is represented as previously described, with the
+//	exception that MODIFIER_KEY may appear in place of KEY_SEQUENCE.  When
+//	the value of Character::set is MODIFIER_KEY then Character::char_code
+//	represents a modifier key rather than an actual character.  If the
+//	modifier represented by `char_code' is non-zero, then it indicates
+//	that the associated modifier key has been depressed.  In this case,
+//	the value is one of the constants enumerated by Modifier (SHIFT,
+//	CONTROL, ALTERNATE, etc.).  If the value is zero then it means that
+//	the modifier keys have been released.
+//
+// 	#define MODIFIER_KEY 0xff
+//
+// 	struct Sequence {
+// 	    number num_chars;
+// 	    Character characters[...];
+// 	};
+//
+//	Special Key
+//	-----------
+//	A special key is one which is scanned directly by the Mach kernel
+//	rather than by the WindowServer.  In general, events are not generated
+//	for special keys.
+//
+// 	enum SpecialKeyType {
+//	    VOLUME_UP = 0,
+//	    VOLUME_DOWN,
+//	    BRIGHTNESS_UP,
+//	    BRIGHTNESS_DOWN,
+//	    ALPHA_LOCK,
+//	    HELP,
+//	    POWER,
+//	    SECONDARY_ARROW_UP,
+//	    SECONDARY_ARROW_DOWN
+// 	};
+//
+// 	struct SpecialKey {
+// 	    number type;	// A SpecialKeyType constant
+// 	    number scan_code;	// Actual scan code
+// 	};
+//
+// COMPILATION INSTRUCTIONS
+//
+//	MacOS/X, Darwin
+//	cc -Wall -o dumpkeymap dumpkeymap.c -framework IOKit
+//
+//	MacOS/X Server, OpenStep, NextStep
+//	cc -Wall -o dumpkeymap dumpkeymap.c
+//
+// USAGE INSTRUCTIONS
+//
+//	Usage: dumpkeymap [path-to-keymap ...]
+//
+//	When provided with no arguments, this program dumps the currently
+//	active key map.  Otherwise, it prints out the contents of each
+//	.keymapping files mentioned as an argument on the command line.
+//
+// CONCLUSION
+//
+//	This program and its accompanying documentation were written by Eric
+//	Sunshine and are copyright (C)1999,2000 by Eric Sunshine
+//	<sunshine@sunshineco.com>.  It is based on information gathered on
+//	September 3, 1997 by Eric Sunshine and Paul S. McCarthy
+//	<zarnuk@zarnuk.com> while reverse engineering the NeXT .keymapping
+//	file format.
+//
+// HISTORY
+//
+//	2000/11/13 Eric Sunshine <sunshine@sunshineco.com>
+//	    Converted from C++ to plain-C.
+//	    Now parses and takes into account the "number-size" flag stored
+//		with each key map.  This flag indicates the size, in bytes, of
+//		all remaining numeric values in the mapping.  Updated all code
+//		to respect the this flag.  (Previously, the purpose of this
+//		field was unknown, and it was thus denoted as
+//		`KeyMapping::fill[2]'.)
+//	    Updated all documentation; especially the "KEY MAPPING
+//		DESCRIPTION" section.  Added discussion of the "number-size"
+//		flag and revamped all structure definitions to use the generic
+//		data type `number' instead of `uchar' or 'byte'.  Clarified
+//		several sections of the documentation and added missing
+//		discussions about type definitions and the relationship of
+//		`interface' and `handler_id' to .keymapping and .keyboard
+//		files.
+//	    Updated compilation instructions to include directions for all
+//		platforms on which this program might be built.
+//	    Now published under the formal BSD license rather than a
+//		home-grown license.
+//
+//	1999/09/08 Eric Sunshine <sunshine@sunshineco.com>
+//	    Created.
+//-----------------------------------------------------------------------------
+#include <ctype.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <drivers/event_status_driver.h>
+#include <sys/stat.h>
+
+#define PROG_NAME "dumpkeymap"
+#define PROG_VERSION 2
+#define AUTHOR_NAME "Eric Sunshine"
+#define AUTHOR_EMAIL "sunshine@sunshineco.com"
+#define AUTHOR_INFO AUTHOR_NAME " <" AUTHOR_EMAIL ">"
+#define COPYRIGHT "Copyright (C) 1999,2000 by " AUTHOR_INFO
+
+typedef unsigned char byte;
+typedef unsigned short word;
+typedef unsigned int natural;
+typedef unsigned long dword;
+typedef dword number;
+
+#define ASCII_SET 0x00
+#define BIND_FUNCTION 0xfe
+#define BIND_SPECIAL 0xff
+
+//-----------------------------------------------------------------------------
+// Translation Tables
+//-----------------------------------------------------------------------------
+static char const* const SPECIAL_CODE[] =
+    {
+    "sound-up",
+    "sound-down",
+    "brightness-up",
+    "brightness-down",
+    "alpha-lock",
+    "help",
+    "power",
+    "secondary-up-arrow",
+    "secondary-down-arrow"
+    };
+#define N_SPECIAL_CODE (sizeof(SPECIAL_CODE) / sizeof(SPECIAL_CODE[0]))
+
+static char const* const MODIFIER_CODE[] =
+    {
+    "alpha-lock",
+    "shift",
+    "control",
+    "alternate",
+    "command",
+    "keypad",
+    "help"
+    };
+#define N_MODIFIER_CODE (sizeof(MODIFIER_CODE) / sizeof(MODIFIER_CODE[0]))
+
+static char const* const MODIFIER_MASK[] =
+    {
+    "-----",	// R = carriage-return
+    "----L",	// A = alternate
+    "---S-",	// C = control
+    "---SL",	// S = shift
+    "--C--",	// L = alpha-lock
+    "--C-L",
+    "--CS-",
+    "--CSL",
+    "-A---",
+    "-A--L",
+    "-A-S-",
+    "-A-SL",
+    "-AC--",
+    "-AC-L",
+    "-ACS-",
+    "-ACSL",
+    "R----",
+    "R---L",
+    "R--S-",
+    "R--SL",
+    "R-C--",
+    "R-C-L",
+    "R-CS-",
+    "R-CSL",
+    "RA---",
+    "RA--L",
+    "RA-S-",
+    "RA-SL",
+    "RAC--",
+    "RAC-L",
+    "RACS-",
+    "RACSL",
+    };
+#define N_MODIFIER_MASK (sizeof(MODIFIER_MASK) / sizeof(MODIFIER_MASK[0]))
+
+#define FUNCTION_KEY_FIRST 0x20
+static char const* const FUNCTION_KEY[] =
+    {
+    "F1",			// 0x20
+    "F2",			// 0x21
+    "F3",			// 0x22
+    "F4",			// 0x23
+    "F5",			// 0x24
+    "F6",			// 0x25
+    "F7",			// 0x26
+    "F8",			// 0x27
+    "F9",			// 0x28
+    "F10",			// 0x29
+    "F11",			// 0x2a
+    "F12",			// 0x2b
+    "insert",			// 0x2c
+    "delete",			// 0x2d
+    "home",			// 0x2e
+    "end",			// 0x2f
+    "page up",			// 0x30
+    "page down",		// 0x31
+    "print screen",		// 0x32
+    "scroll lock",		// 0x33
+    "pause",			// 0x34
+    "sys-request",		// 0x35
+    "break",			// 0x36
+    "reset (HIL)",		// 0x37
+    "stop (HIL)",		// 0x38
+    "menu (HIL)",		// 0x39
+    "user (HIL)",		// 0x3a
+    "system (HIL)",		// 0x3b
+    "print (HIL)",		// 0x3c
+    "clear line (HIL)",		// 0x3d
+    "clear display (HIL)",	// 0x3e
+    "insert line (HIL)",	// 0x3f
+    "delete line (HIL)",	// 0x40
+    "insert char (HIL)",	// 0x41
+    "delete char (HIL)",	// 0x42
+    "prev (HIL)",		// 0x43
+    "next (HIL)",		// 0x44
+    "select (HIL)",		// 0x45
+    };
+#define N_FUNCTION_KEY (sizeof(FUNCTION_KEY) / sizeof(FUNCTION_KEY[0]))
+
+
+//-----------------------------------------------------------------------------
+// Data Stream Object
+//	Can be configured to treat embedded "numbers" as being composed of
+//	either 1, 2, or 4 bytes, apiece.
+//-----------------------------------------------------------------------------
+typedef struct _DataStream
+    {
+    byte const* data;
+    byte const* data_end;
+    natural number_size; // Size in bytes of a "number" in the stream.
+    } DataStream;
+
+static DataStream* new_data_stream( byte const* data, int size )
+    {
+    DataStream* s = (DataStream*)malloc( sizeof(DataStream) );
+    s->data = data;
+    s->data_end = data + size;
+    s->number_size = 1; // Default to byte-sized numbers.
+    return s;
+    }
+
+static void destroy_data_stream( DataStream* s )
+    {
+    free(s);
+    }
+
+static int end_of_stream( DataStream* s )
+    {
+    return (s->data >= s->data_end);
+    }
+
+static void expect_nbytes( DataStream* s, int nbytes )
+    {
+    if (s->data + nbytes > s->data_end)
+	{
+	fprintf( stderr, "Insufficient data in keymapping data stream.\n" );
+	exit(-1);
+	}
+    }
+
+static byte get_byte( DataStream* s )
+    {
+    expect_nbytes( s, 1 );
+    return *s->data++;
+    }
+
+static word get_word( DataStream* s )
+    {
+    word hi, lo;
+    expect_nbytes( s, 2 );
+    hi = *s->data++;
+    lo = *s->data++;
+    return ((hi << 8) | lo);
+    }
+
+static dword get_dword( DataStream* s )
+    {
+    dword b1, b2, b3, b4;
+    expect_nbytes( s, 4 );
+    b4 = *s->data++;
+    b3 = *s->data++;
+    b2 = *s->data++;
+    b1 = *s->data++;
+    return ((b4 << 24) | (b3 << 16) | (b2 << 8) | b1);
+    }
+
+static number get_number( DataStream* s )
+    {
+    switch (s->number_size)
+	{
+	case 4:  return get_dword(s);
+	case 2:  return get_word(s);
+	default: return get_byte(s);
+	}
+    }
+
+
+//-----------------------------------------------------------------------------
+// Translation Utility Functions
+//-----------------------------------------------------------------------------
+static char const* special_code_desc( number n )
+    {
+    if (n < N_SPECIAL_CODE)
+	return SPECIAL_CODE[n];
+    else
+	return "invalid";
+    }
+
+static char const* modifier_code_desc( number n )
+    {
+    if (n < N_MODIFIER_CODE)
+	return MODIFIER_CODE[n];
+    else
+	return "invalid";
+    }
+
+static char const* modifier_mask_desc( number n )
+    {
+    if (n < N_MODIFIER_MASK)
+	return MODIFIER_MASK[n];
+    else
+	return "?????";
+    }
+
+static char const* function_key_desc( number n )
+    {
+    if (n >= FUNCTION_KEY_FIRST && n < N_FUNCTION_KEY + FUNCTION_KEY_FIRST)
+	return FUNCTION_KEY[ n - FUNCTION_KEY_FIRST ];
+    else
+	return "unknown";
+    }
+
+static number bits_set( number mask )
+    {
+    number n = 0;
+    for ( ; mask != 0; mask >>= 1)
+	if ((mask & 0x01) != 0)
+	    n++;
+    return n;
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse a list of Modifier records.
+//-----------------------------------------------------------------------------
+static void unparse_modifiers( DataStream* s )
+    {
+    number nmod = get_number(s); // Modifier count
+    printf( "\nMODIFIERS [%lu]\n", nmod );
+    while (nmod-- > 0)
+	{
+	number nscan;
+	number const code = get_number(s);
+	printf( "%s:", modifier_code_desc(code) );
+	nscan = get_number(s);
+	while (nscan-- > 0)
+	    printf( " 0x%02x", (natural)get_number(s) );
+	putchar( '\n' );
+	}
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse a list of Character records.
+//-----------------------------------------------------------------------------
+typedef void (*UnparseSpecialFunc)( number code );
+
+static void unparse_char_codes(
+    DataStream* s, number ncodes, UnparseSpecialFunc unparse_special )
+    {
+    if (ncodes != 0)
+	{
+	while (ncodes-- > 0)
+	    {
+	    number const char_set = get_number(s);
+	    number const code = get_number(s);
+	    putchar(' ');
+	    switch (char_set)
+		{
+		case ASCII_SET:
+		    {
+		    int const c = (int)code;
+		    if (isprint(c))
+			printf( "\"%c\"", c );
+		    else if (code < ' ')
+			printf( "\"^%c\"", c + '@' );
+		    else
+			printf( "%02x", c );
+		    break;
+		    }
+		case BIND_FUNCTION:
+		    printf( "[%s]", function_key_desc(code) );
+		    break;
+		case BIND_SPECIAL:
+		    unparse_special( code );
+		    break;
+		default:
+		    printf( "%02x/%02x", (natural)char_set, (natural)code );
+		    break;
+		}
+	    }
+	}
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse a list of scan code bindings.
+//-----------------------------------------------------------------------------
+static void unparse_key_special( number code )
+    {
+    printf( "{seq#%lu}", code );
+    }
+
+static void unparse_keys( DataStream* s )
+    {
+    number const NOT_BOUND = 0xff;
+    number const nkeys = get_number(s);
+    number scan;
+    printf( "\nKEYS [%lu]\n", nkeys );
+    for (scan = 0; scan < nkeys; scan++)
+	{
+	number const mask = get_number(s);
+	printf( "scan 0x%02x: ", (natural)scan );
+	if (mask == NOT_BOUND)
+	    printf( "not-bound\n" );
+	else
+	    {
+	    number const bits = bits_set( mask );
+	    number const codes = 1 << bits;
+	    printf( "%s ", modifier_mask_desc(mask) );
+	    unparse_char_codes( s, codes, unparse_key_special );
+	    putchar( '\n' );
+	    }
+	}
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse a list of key sequences.
+//-----------------------------------------------------------------------------
+static void unparse_sequence_special( number code )
+    {
+    printf( "{%s}", (code == 0 ? "unmodify" : modifier_code_desc(code)) );
+    }
+
+static void unparse_sequences( DataStream* s )
+    {
+    number const nseqs = get_number(s);
+    number seq;
+    printf( "\nSEQUENCES [%lu]\n", nseqs );
+    for (seq = 0; seq < nseqs; seq++)
+	{
+	number const nchars = get_number(s);
+	printf( "sequence %lu: ", seq );
+	unparse_char_codes( s, nchars, unparse_sequence_special );
+	putchar( '\n' );
+	}
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse a list of special keys.
+//-----------------------------------------------------------------------------
+static void unparse_specials( DataStream* s )
+    {
+    number nspecials = get_number(s);
+    printf( "\nSPECIALS [%lu]\n", nspecials );
+    while (nspecials-- > 0)
+	{
+	number const special = get_number(s);
+	number const scan = get_number(s);
+	printf( "%s: 0x%02x\n", special_code_desc(special), (natural)scan );
+	}
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse the number-size flag.
+//-----------------------------------------------------------------------------
+static void unparse_numeric_size( DataStream* s )
+    {
+    word const numbers_are_shorts = get_word(s);
+    s->number_size = numbers_are_shorts ? 2 : 1;
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse an entire key map.
+//-----------------------------------------------------------------------------
+static void unparse_keymap_data( DataStream* s )
+    {
+    unparse_numeric_size(s);
+    unparse_modifiers(s);
+    unparse_keys(s);
+    unparse_sequences(s);
+    unparse_specials(s);
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse the active key map.
+//-----------------------------------------------------------------------------
+static int unparse_active_keymap( void )
+    {
+    int rc = 1;
+    NXEventHandle const h = NXOpenEventStatus();
+    if (h == 0)
+	fprintf( stderr, "Unable to open event status driver.\n" );
+    else
+	{
+	NXKeyMapping km;
+	km.size = NXKeyMappingLength(h);
+	if (km.size <= 0)
+	    fprintf( stderr, "Bad key mapping length (%d).\n", km.size );
+	else
+	    {
+	    km.mapping = (char*)malloc( km.size );
+	    if (NXGetKeyMapping( h, &km ) == 0)
+		fprintf( stderr, "Unable to get current key mapping.\n" );
+	    else
+		{
+		DataStream* stream =
+		    new_data_stream( (byte const*)km.mapping, km.size );
+		unparse_keymap_data( stream );
+		destroy_data_stream( stream );
+		rc = 0;
+		}
+	    free( km.mapping );
+	    }
+	NXCloseEventStatus(h);
+	}
+    return rc;
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse one key map from a keymapping file.
+//-----------------------------------------------------------------------------
+static void unparse_keymap( DataStream* s )
+    {
+    dword const interface = get_dword(s);
+    dword const handler_id = get_dword(s);
+    dword const map_size = get_dword(s);
+    printf( "interface=0x%02lx handler_id=0x%02lx map_size=%lu bytes\n",
+	interface, handler_id, map_size );
+    unparse_keymap_data(s);
+    }
+
+
+//-----------------------------------------------------------------------------
+// Check the magic number of a keymapping file.
+//-----------------------------------------------------------------------------
+static int check_magic_number( DataStream* s )
+    {
+    return (get_byte(s) == 'K' &&
+	    get_byte(s) == 'Y' &&
+	    get_byte(s) == 'M' &&
+	    get_byte(s) == '1');
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse all key maps within a keymapping file.
+//-----------------------------------------------------------------------------
+static int unparse_keymaps( DataStream* s )
+    {
+    int rc = 0;
+    if (check_magic_number(s))
+	{
+	int n = 0;
+	while (!end_of_stream(s))
+	    {
+	    printf( "\nKEYMAP #%d: ", n++ );
+	    unparse_keymap(s);
+	    }
+	}
+    else
+	{
+	fprintf( stderr, "Bad magic number.\n" );
+	rc = 1;
+	}
+    return rc;
+    }
+
+
+//-----------------------------------------------------------------------------
+// Unparse a keymapping file.
+//-----------------------------------------------------------------------------
+static int unparse_keymap_file( char const* const path )
+    {
+    int rc = 1;
+    FILE* file;
+    printf( "\nKEYMAP FILE: %s\n", path );
+    file = fopen( path, "rb" );
+    if (file == 0)
+	perror( "Unable to open keymap" );
+    else
+	{
+	struct stat st;
+	if (fstat( fileno(file), &st ) != 0)
+	    perror( "Unable to determine file size" );
+	else
+	    {
+	    byte* buffer = (byte*)malloc( st.st_size );
+	    if (fread( buffer, st.st_size, 1, file ) != 1)
+		perror( "Unable to read keymap" );
+	    else
+		{
+		DataStream* stream = new_data_stream(buffer, (int)st.st_size);
+		fclose( file ); file = 0;
+		rc = unparse_keymaps( stream );
+		destroy_data_stream( stream );
+		}
+	    free( buffer );
+	    }
+	if (file != 0)
+	    fclose( file );
+	}
+    return rc;
+    }
+
+
+//-----------------------------------------------------------------------------
+// Print an informational banner.
+//-----------------------------------------------------------------------------
+static void print_banner( void )
+    {
+    printf( "\n" PROG_NAME " v%d by " AUTHOR_INFO "\n" COPYRIGHT "\n",
+	PROG_VERSION );
+    }
+
+
+//-----------------------------------------------------------------------------
+// Master dispatcher.
+//-----------------------------------------------------------------------------
+int main( int const argc, char const* const argv[] )
+    {
+    int rc = 0;
+    print_banner();
+    if (argc == 1)	// No arguments, unparse keymap currently in use.
+	rc = unparse_active_keymap();
+    else		// Unparse keymaps specified on command line.
+	{
+	int i;
+	for (i = 1; i < argc; i++)
+	    rc |= unparse_keymap_file( argv[i] );
+	}
+    return rc;
+    }
+
diff --git a/xc/programs/Xserver/hw/xfree86/CHANGELOG b/xc/programs/Xserver/hw/xfree86/CHANGELOG
index ce5a91c17..94a0edf88 100644
--- a/xc/programs/Xserver/hw/xfree86/CHANGELOG
+++ b/xc/programs/Xserver/hw/xfree86/CHANGELOG
@@ -1,3 +1,76 @@
+XFree86 4.0.1f (16 November 2000)
+ 946. Add a dumpkeymap utility for Darwin (#4248, Eric Sunshine).
+ 945. Fix a Darwin build problem with mkcfm, and get xdm closer to building
+      (#4247, Torrey T. Lyons).
+ 944. DDX for the Xdarwin server (#4246, Torrey T. Lyons).
+ 943. Enable xdm/PAM support by default for FreeBSD versions with PAM.
+ 942. Fix a problem where the X server thinks it has acquired a VT at startup
+      before it has really been released.  This is due to the ioctl()
+      returning prematurely because of a pending signal (Jeff Hartmann).
+ 941. Fix a problem with the PAM support in xdm that prevents
+      pam_start_session() from ever being called (Takanori Saneto).
+ 940. Enable PAM support for xdm on FreeBSD (#A.202, Jean-Marc Zucconi, and
+      Takanori Saneto).
+ 939. Fix xf86cfg build problem when BuildXinerama is set to NO (#A.200,
+      Jean-Marc Zucconi).
+ 938. gccmakedep has a typo which affects handling the -o and -O options
+      (A.192, Ivan Zakharyaschev).
+ 937. Specify the units for the dpms and rate commands in the xset man
+      page (#A.191, John Heidemann).
+ 936. Let makedepend ignore "//" style comments on all platforms, not
+      just Win32, and fix a bug in that code that was causing the line
+      after such comments to also be ignored (#A.189, Guenther Grau).
+ 935. Update GNU/Hurd support (#A.188, Marcus Brinkmann).
+ 934. Initial port of the ark driver to 4.x (#4242, Ani Joshi).
+ 933. Wacom input driver update, including support for 38400 link speed
+      and fix wrong advertisement of min/max values (#4241, Frederic Lepied).
+ 932. Fix some parser problems, including:
+       - parser does not write Modes section and UseModes keyword
+       - the vscan value wasn't being used
+       - make the XF86ConfModesPtr structure accessible from the
+         XF86ConfMonitorPtr structure
+       - allow xf86Parser.h to be included from in a C++ program
+      (#4238, 4243-4245, Paulo Cesar Pereira de Andrade).
+ 931. Fix the name of the Serbian xkb symbols file (rename from yu to sr)
+      (#4237, Ivan Pascal).
+ 930. Fix mkcfm bug (#4236, Juliusz Chroboczek).
+ 929. Glint/permedia3 updates (#4235, 4238, Sven Luther).
+ 928. Fix an SVR4 loader build problem introduced in 4.0.1d (#4234,
+      Takaaki Nomura).
+ 927. Fix a bug in fontenc that would cause a memory leak whenever an
+      encoding would be declared in encodings.dir but not in the encoding
+      file itself (#4233, Juliusz Chroboczek).
+ 926. Make the freetype backend use the fontenc matrix encoding support,
+      remove support for the defunct XAnti extension, and bump the version
+      of the freetype backend to 1.1.8 (#4233, Juliusz Chroboczek).
+ 925. Add proper support for matrix encodings in fontenc (including the
+      new FIRSTINDEX keyword in encoding files), and bump the version of
+      the font module ABI to 0.2 (#4233, Juliusz Chroboczek).
+ 924. Fix a problem the vesa driver (#4232, Paulo Cesar Pereira de Andrade).
+ 923. Fix problems building the C&T driver with DEBUG defined (#4231,
+      Taketoshi Sano).
+ 922. Remove lt_LT.ISO8859-1 entry from compose.dir (#4230, Nerijus Baliunas).
+ 921. s3virge driver updates, including:
+       - Stabilize GX2 support, reenable silken mouse
+       - Enable MX fixes
+       - Add support for the render extension
+       - Enable BLT_BUG for ViRGE and VX chipsets
+      (#4229, Kevin Brosius).
+ 920. Don't initialize DRI when noaccel is specified in the tdfx driver
+      (Alan Hourihane).
+ 919. Make module ABI compatibility mismatches fatal by default, and
+      add a command line option for making them non-fatal (David Dawes).
+ 918. Changed SiS driver to use fb instead of cfb (Alan Hourihane).
+ 917. Fix r128 and radeon driver source code formatting that was munged
+      during ATI merge (Kevin Martin).
+ 916. Update Markus Kuhn's UCS fonts, and add his scripts for extracting
+      subsets of them to the build process (David Dawes).
+ 915. Fix visual setting in ATI r128/radeon driver (Jeff Wiedemeier).
+ 914. Alpha fix for xf86cfg (Alan Hourihane).
+ 913. Resync DRI code/drivers with the DRI CVS (VA Linux).
+ 912. Fix tdfx driver to register resources and remove some redundant code
+      (Alan Hourihane).
+
 XFree86 4.0.1e (6 November 2000)
  911. Fix the ksc5601.1987-0 encoding file (#4226, 4228, Pablo Saratxaga).
  910. Update xdm/sessreg to write ":0" type entried in utmp on OpenBSD
@@ -11497,4 +11570,4 @@ XFree86 3.0a (28 April 1994)
 XFree86 3.0 (26 April 1994)
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/CHANGELOG,v 3.1381 2000/11/06 19:24:02 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/CHANGELOG,v 3.1400 2000/11/16 20:59:53 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/SuperProbe/Probe.h b/xc/programs/Xserver/hw/xfree86/SuperProbe/Probe.h
index 4bcc6722c..4caa19a36 100644
--- a/xc/programs/Xserver/hw/xfree86/SuperProbe/Probe.h
+++ b/xc/programs/Xserver/hw/xfree86/SuperProbe/Probe.h
@@ -26,7 +26,7 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/SuperProbe/Probe.h,v 3.74 2000/08/23 22:10:10 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/SuperProbe/Probe.h,v 3.75 2000/11/14 18:20:36 dawes Exp $ */
 
 /*
  * Includes
@@ -44,7 +44,7 @@
 #include <stdlib.h>
 #endif	/* MACH386 */
 #include <ctype.h>
-#if defined(SYSV) || defined(SVR4) || defined(linux) || defined(__QNX__) || defined(__QNXNTO__)
+#if defined(SYSV) || defined(SVR4) || defined(linux) || defined(__QNX__) || defined(__QNXNTO__) || defined(__GNU__)
 #if defined(__ia64__) || defined(ia64)
 #include <sys/io.h>
 #include <asm/io.h>
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Config.c b/xc/programs/Xserver/hw/xfree86/common/xf86Config.c
index 49e5b540a..2556136e6 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Config.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Config.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Config.c,v 3.234 2000/11/06 19:24:06 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Config.c,v 3.235 2000/11/14 18:20:36 dawes Exp $ */
 
 
 /*
@@ -41,7 +41,7 @@ extern DeviceAssocRec mouse_assoc;
 
 #if (defined(i386) || defined(__i386__)) && \
     (defined(__FreeBSD__) || defined(__NetBSD__) || defined(linux) || \
-     (defined(SVR4) && !defined(sun)))
+     (defined(SVR4) && !defined(sun)) || defined(__GNU__))
 #define SUPPORT_PC98
 #endif
 
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Helper.c b/xc/programs/Xserver/hw/xfree86/common/xf86Helper.c
index 789eedbac..21983faec 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Helper.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Helper.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Helper.c,v 1.100 2000/11/03 18:46:06 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Helper.c,v 1.101 2000/11/14 18:20:36 dawes Exp $ */
 
 /*
  * Copyright (c) 1997-1998 by The XFree86 Project, Inc.
@@ -31,7 +31,8 @@
 #include "xf86Bus.h"
 
 /* For xf86GetClocks */
-#if defined(CSRG_BASED) || defined(MACH386)
+#if defined(CSRG_BASED) || defined(MACH386) || defined(__GNU__)
+#define HAS_SETPRIORITY
 #include <sys/resource.h>
 #endif
 
@@ -2085,7 +2086,7 @@ xf86SetPriority(Bool up)
     static int saved_nice;
 
     if (up) {
-#if defined(CSRG_BASED) || defined(MACH386)
+#ifdef HAS_SETPRIORITY
 	saved_nice = getpriority(PRIO_PROCESS, 0);
 	setpriority(PRIO_PROCESS, 0, -20);
 #endif
@@ -2094,7 +2095,7 @@ xf86SetPriority(Bool up)
 	nice(-20 - saved_nice);
 #endif
     } else {
-#if defined(CSRG_BASED) || defined(MACH386)
+#ifdef HAS_SETPRIORITY
 	setpriority(PRIO_PROCESS, 0, saved_nice);
 #endif
 #if defined(SYSV) || defined(SVR4) || defined(linux)
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Init.c b/xc/programs/Xserver/hw/xfree86/common/xf86Init.c
index 19b9c198c..acdeae765 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Init.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Init.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Init.c,v 3.170 2000/11/03 18:46:07 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Init.c,v 3.171 2000/11/13 23:09:53 dawes Exp $ */
 
 /*
  * Copyright 1991-1999 by The XFree86 Project, Inc.
@@ -1249,6 +1249,13 @@ ddxProcessArgument(int argc, char **argv, int i)
     xf86BestRefresh = TRUE;
     return 1;
   }
+  if (!strcmp(argv[i],"-ignoreABI"))
+  {
+#ifdef XFree86LOADER
+    LoaderSetOptions(LDR_OPT_ABI_MISMATCH_NONFATAL);
+#endif
+    return 1;
+  }
 #ifdef DO_CHECK_BETA
   if (!strcmp(argv[i],"-extendExpiry"))
   {
@@ -1531,7 +1538,8 @@ ddxUseMsg()
   ErrorF("                       from non-local clients\n");
   ErrorF("-allowMouseOpenFail    start server even if the mouse can't be initialized\n");
 #endif
-  ErrorF("-bestRefresh           chose modes with the best refresh rate\n");
+  ErrorF("-bestRefresh           choose modes with the best refresh rate\n");
+  ErrorF("-ignoreABI             make module ABI mismatches non-fatal\n");
   ErrorF("-version               show the server version\n");
   /* OS-specific usage */
   xf86UseMsg();
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Module.h b/xc/programs/Xserver/hw/xfree86/common/xf86Module.h
index 9fd7f5c86..41c86c6bb 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Module.h
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Module.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Module.h,v 1.26 2000/08/23 22:10:11 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Module.h,v 1.27 2000/11/14 16:54:49 dawes Exp $ */
 
 /*
  * Copyright (c) 1997-1999 by The XFree86 Project, Inc.
@@ -65,7 +65,7 @@ typedef enum {
 #define ABI_VIDEODRV_VERSION	SET_ABI_VERSION(0, 3)
 #define ABI_XINPUT_VERSION	SET_ABI_VERSION(0, 1)
 #define ABI_EXTENSION_VERSION	SET_ABI_VERSION(0, 1)
-#define ABI_FONT_VERSION	SET_ABI_VERSION(0, 1)
+#define ABI_FONT_VERSION	SET_ABI_VERSION(0, 2)
 
 #define MODINFOSTRING1	0xef23fdc5
 #define MODINFOSTRING2	0x10dc023a
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.DRI b/xc/programs/Xserver/hw/xfree86/doc/README.DRI
index 3873a53a1..78b231d90 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.DRI
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.DRI
@@ -2,7 +2,7 @@
 
           VA Linux Systems, Inc. Professional Services - Graphics.
 
-                               22 August 2000
+                               24 October 2000
 
 1.  Preamble
 
@@ -47,15 +47,57 @@ can be found at http://dri.sourceforge.net/DRIcompile.html
 Edits, corrections and updates to this document may be mailed to brianp@val-
 inux.com.
 
-3.  Supported Hardware
+3.  Supported Architectures & Hardware
 
-3D acceleration is currently only available for systems with Intel-compatible
-CPUs.  Support for Alpha, and perhaps other CPUs, should be available in the
-future.
+     "
+
+3.1  Architectures
+
+     "
+
+The Architectures currently supported by the DRI have grown from the initial
+Intel i386 based machines to now include, the Alpha Processor and the Sun
+SPARC machines.
+
+The build environment for both of these new architectures have a pre-build
+environment that will correctly build the DRI drivers and Mesa meaning no
+extra configuration is necessary to build the DRI for these architectures.
+
+3.1.1  Alpha Features
+
+     "
+
+On newer Alpha processors, it should be noted that a significant performance
+increase can be seen with the addition of the -mcpu= command that should be
+passed to GCC upon compilation. Dependent of the architecture of the proces-
+sor, for example -mcpu=ev6 will build specifically for the EV6 based AXP's,
+giving both byte and word alignment access to the DRI/Mesa drivers.
+
+Use this as an example of compiling with this extra speed.  In your host.def
+file that should reside in the xc/config directory, add the line.
+
+#define DefaultCCOptions -ansi GccWarningOptions -pipe -mcpu=ev6
+
+Additional speed improvements to 3D rendering can be achieved by installing
+Compaq's Math Libraries (CPML) which can be obtained from the following URL.
+
+http://www.support.compaq.com/alpha-tools/software/index.html
+
+Once installed, you can set this option in your host.def to build against the
+CPML libraries.
+
+#define UseCompaqMathLibrary YES
+
+3.2  Graphics Hardware
+
+     "
 
 XFree86 4.0 (or later versions) includes 3D acceleration for the following
 graphics hardware:
 
+NOTE: This is a complete list of graphics hardware supported. It may not be
+supported on your platform.
+
    o 3dfx:
 
         o Voodoo5 5500
@@ -512,6 +554,14 @@ ules/dri/tdfx_dri.so.  This will be automatically loaded by libGL.so.
 
 10.1.3  Troubleshooting
 
+   o If you try to run an OpenGL application and see an error message similar
+     to
+
+                        gd error (glide): gd error (glide): grSstSelect:  non-existent SSTgd error (glide): grSstSelect:  non-existent SSTS
+
+     it means that you have the wrong version of the Glide library for your
+     hardware.
+
    o 3D acceleration for Voodoo3 is only supported in the 16 bit/pixel screen
      mode.  Use xdpyinfo to verify that all your visuals are depth 16.  Edit
      your XF86Config file if needed.
@@ -533,6 +583,38 @@ ules/dri/tdfx_dri.so.  This will be automatically loaded by libGL.so.
      the Performer Town demo, may become sluggish when falling back to soft-
      ware rendering to render in that mode.
 
+   o The Voodoo3/Banshee driver reverts to software rendering under the fol-
+     lowing conditions:
+
+        o Setting GL_LIGHT_MODEL_COLOR_CONTROL to GL_SEPARATE_SPECULAR_COLOR.
+
+        o Enabling line stippline or polygon stippling.
+
+        o Enabling point smoothing or polygon smoothing.
+
+        o Enabling line smoothing when line width is not 1.0.  That is,
+          antialiased lines are done in hardware only when the line width is
+          1.0.
+
+        o Using 1-D or 3-D texture maps.
+
+        o Using the GL_BLEND texture environment.
+
+        o Using stencil operations.
+
+        o Using the accumulation buffer.
+
+        o Using glBlendEquation(GL_LOGIC_OP).
+
+        o Using glDrawBuffer(GL_FRONT_AND_BACK).
+
+        o Using glPolygonMode(face, GL_POINT) or glPolygonMode(face,
+          GL_LINE).
+
+        o Using point size attenuation (i.e. GL_DISTANCE_ATTENUATION_EXT).
+
+        o Using glColorMask(r, g, b, a) when r!=g or g!=b.
+
 10.1.5  Known Problems
 
    o The Glide library cannot be used directly; it's only meant to be used
@@ -590,7 +672,7 @@ ules/dri/tdfx_dri.so.  This will be automatically loaded by libGL.so.
 
 The Voodoo5 supports 3D rendering in 16 and 32 bpp modes.  When running in
 32bpp mode an 8-bit stencil buffer and 24-bit Z (depth) buffer are offered.
-When running in 32bpp mode only a 16-bit Z (depth) buffer is offered and
+When running in 16bpp mode only a 16-bit Z (depth) buffer is offered and
 stencil is implemented in software.
 
 A software-based accumulation buffer is available in both 16 and 32bpp modes.
@@ -611,13 +693,30 @@ A software-based accumulation buffer is available in both 16 and 32bpp modes.
      variable indicates the maximum number of swap buffer commands can be
      buffered.  Zero allows maximum frame rate.
 
+   o Rendering with 16-bit per texel textures is faster than using 32-bit per
+     texel textures.  The internalFormat parameter to glTexImage2D can be
+     used to control texel size.
+
+   o The Voodoo5 driver reverts to software rendering under the same condi-
+     tions Voodoo3 with three exceptions.  First, stencil operations are
+     implemented in hardware when the screen is configured for 32 bits/pixel.
+     Second, the GL_BLEND texture env mode is fully supported in hardware.
+     Third, glColorMask is fully supported in hardware when the screen is
+     configured for 32 bits/pixel.
+
 10.2.5  Known Problems
 
    o The Glide library cannot be used directly; it's only meant to be used
      via the tdfx DRI driver.
 
    o 24bpp screen modes are supported by the hardware but not by the current
-     driver.
+     driver.  32bpp is fully supported.
+
+   o As of October, 2000 the second VSA-100 chip on the Voodoo5 is not yet
+     operational.  Therefore, the board isn't being used to its full capac-
+     ity.  The second VSA-100 chip will allow Scan-Line Interleave (SLI) mode
+     for full-screen applications and games, potentially doubling the sys-
+     tem's fill rate.
 
 10.3  Intel i810
 
@@ -928,7 +1027,7 @@ forge.net/resources/resources.html
    o In the future there may be IHV and Linux vendor support resources for
      the DRI.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.8 2000/09/24 13:51:26 alanh Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.12 2000/11/16 18:36:25 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.DRI,v 1.8 2000/11/06 22:07:05 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.DRI,v 1.10 2000/11/16 18:37:34 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp b/xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp
index b577262a7..8a0a8ea33 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp
@@ -2,7 +2,7 @@
 
           VA Linux Systems, Inc. Professional Services - Graphics.
 
-                                8 August 2000
+                               29 October 2000
 
 1.  Preamble
 
@@ -403,7 +403,7 @@ Issue the following commands:
                   cd /usr/X11R6/bin
                   mv Xwrapper Xwrapper.old
                   rm X
-                  ln -s /usr/X11R6-4.0.1/lib/X11/XFree86  X
+                  ln -s /usr/X11R6-DRI/bin/XFree86  X
 
 This will cause the new X server to be used instead of the original one.
 
@@ -486,7 +486,7 @@ At this point your X server should be up and running with hardware-acceler-
 ated direct rendering.  Please read the DRI User Guide for information about
 trouble shooting and how to use the DRI-enabled X server for 3D applications.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml,v 1.6 2000/09/24 13:51:26 alanh Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml,v 1.7 2000/11/08 05:03:03 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp,v 3.3 2000/11/06 22:07:05 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp,v 3.4 2000/11/16 15:50:04 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.fonts b/xc/programs/Xserver/hw/xfree86/doc/README.fonts
index b7a4bf3f5..af43461d4 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.fonts
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.fonts
@@ -390,9 +390,25 @@ encoding, high bit clear), it should be
 
      SIZE 0x75 0x80
 
-Codes outside the region defined by the size line are supposed to be unde-
-fined.  Encodings default to linear encoding with a size of 256 (0x100).
-This means that you must declare the size of all 16 bit encodings.
+In the case of a matrix encoding, a `FIRSTINDEX' may be included to specify
+the minimum glyph index in an encoding.  The keyword `FIRSTINDEX' is followed
+by two integers, the minimum row number followed by the minimum column num-
+ber:
+
+     FIRSTINDEX 0x20 0x20
+
+In the case of a linear encoding, a `FIRSTINDEX' line should usually not be
+included.  If for some reason however it is desired that it should be
+included, it should be followed by a single integer.
+
+Note that in some font backends inclusion of a `FIRSTINDEX' line has the side
+effect of disabling default glyph generation, and this keyword should there-
+fore be avoided unless absolutely necessary.
+
+Codes outside the region defined by the `SIZE' and `FIRSTINDEX' lines are
+supposed to be undefined.  Encodings default to linear encoding with a size
+of 256 (0x100).  This means that you must declare the size of all 16 bit
+encodings.
 
 What follows is one or more mapping sections.  A mapping section starts with
 a `STARTMAPPING' line stating the target of the mapping.  The target may be
@@ -769,7 +785,7 @@ used for horizontal text (e.g. the CMap `KSC-EUC-H' will be used, but not
 `KSC-EUC-V').  This limitation is due to the fact that the core X11 protocol
 only provides support for horizontal writing.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml,v 1.7 2000/03/06 22:59:25 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml,v 1.8 2000/11/14 16:54:49 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.fonts,v 1.10 2000/06/17 17:44:22 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.fonts,v 1.11 2000/11/16 15:50:04 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml
index 5ce83fb95..0771e6982 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml
@@ -12,10 +12,10 @@
       <author>
           <htmlurl url="http://www.valinux.com/"
             name="VA Linux Systems, Inc."> Professional Services - Graphics.
-      <date>22 August 2000
+      <date>24 October 2000
 
     <ident>
-    $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.8 2000/09/24 13:51:26 alanh Exp $
+    $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.12 2000/11/16 18:36:25 dawes Exp $
     </ident>
 
     <toc>
@@ -74,16 +74,53 @@
         Edits, corrections and updates to this document may be mailed
         to brianp@valinux.com.
 
+    <sect>Supported Architectures & Hardware
+	<p>
+      <sect1>Architectures
+	<p>
+          The Architectures currently supported by the DRI have grown
+          from the initial Intel i386 based machines to now include, 
+          the Alpha Processor and the Sun SPARC machines.
 
-    <sect>Supported Hardware
-<p>
-        3D acceleration is currently only available for systems with
-        Intel-compatible CPUs.
-        Support for Alpha, and perhaps other CPUs, should be available in the
-        future.
-      <p>
-        XFree86 4.0 (or later versions) includes 3D acceleration for the
-        following graphics hardware:
+          The build environment for both of these new architectures 
+          have a pre-build environment that will correctly build the 
+          DRI drivers and Mesa meaning no extra configuration is necessary
+          to build the DRI for these architectures.
+
+        <sect2>Alpha Features
+	<p>
+            On newer Alpha processors, it should be noted that a
+            significant performance increase can be seen with the 
+            addition of the -mcpu= command that should be passed to
+            GCC upon compilation. Dependent of the architecture of the 
+            processor, for example -mcpu=ev6 will build specifically
+            for the EV6 based AXP's, giving both byte and word alignment 
+            access to the DRI/Mesa drivers.
+
+            Use this as an example of compiling with this extra speed.
+            In your host.def file that should reside in the xc/config 
+            directory, add the line.
+
+            #define DefaultCCOptions -ansi GccWarningOptions -pipe -mcpu=ev6
+
+            Additional speed improvements to 3D rendering can be achieved
+            by installing Compaq's Math Libraries (CPML) which can be 
+            obtained from the following URL.
+
+            http://www.support.compaq.com/alpha-tools/software/index.html
+
+            Once installed, you can set this option in your host.def
+            to build against the CPML libraries.
+
+            #define UseCompaqMathLibrary YES
+
+      <sect1> Graphics Hardware
+	<p>
+          XFree86 4.0 (or later versions) includes 3D acceleration for the
+          following graphics hardware:
+
+          NOTE: This is a complete list of graphics hardware supported. It
+          may not be supported on your platform.
 
         <itemize>
           <item>3dfx:
@@ -614,6 +651,14 @@
 <p>
           <itemize>
             <item>
+              If you try to run an OpenGL application and see an error message
+              similar to
+              <verb>
+              gd error (glide): gd error (glide): grSstSelect:  non-existent SSTgd error (glide): grSstSelect:  non-existent SSTS
+              </verb>
+              it means that you have the wrong version of the Glide library
+              for your hardware.
+            <item>
               3D acceleration for Voodoo3 is only supported in the 16
               bit/pixel screen mode.
               Use <tt/xdpyinfo/ to verify that all your visuals are depth 16.
@@ -642,7 +687,44 @@
               Applications which use that mode, such as the Performer Town
               demo, may become sluggish when falling back to software
               rendering to render in that mode.
+            <item>
+              The Voodoo3/Banshee driver reverts to software rendering under
+              the following conditions:
+              <itemize>
+                <item>
+                  Setting <tt/GL_LIGHT_MODEL_COLOR_CONTROL/ to
+                  <tt/GL_SEPARATE_SPECULAR_COLOR/.
+                <item>
+                  Enabling line stippline or polygon stippling.
+                <item>
+                  Enabling point smoothing or polygon smoothing.
+                <item>
+                  Enabling line smoothing when line width is not 1.0.
+                  That is, antialiased lines are done in hardware only when
+                  the line width is 1.0.
+                <item>
+                  Using 1-D or 3-D texture maps.
+                <item>
+                  Using the GL_BLEND texture environment.
+                <item>
+                  Using stencil operations.
+                <item>
+                  Using the accumulation buffer.
+                <item>
+                  Using <tt/glBlendEquation(GL_LOGIC_OP)/.
+                <item>
+                  Using <tt/glDrawBuffer(GL_FRONT_AND_BACK)/.
+                <item>
+                  Using <tt/glPolygonMode(face, GL_POINT)/ or
+                  <tt/glPolygonMode(face, GL_LINE)/.
+                <item>
+                  Using point size attenuation
+                  (i.e. <tt/GL_DISTANCE_ATTENUATION_EXT/).
+                <item>
+                  Using <tt/glColorMask(r, g, b, a)/ when r!=g or g!=b.
+              </itemize>
           </itemize>
+
         <sect2>Known Problems
 <p>
           <itemize>
@@ -710,7 +792,7 @@
             The Voodoo5 supports 3D rendering in 16 and 32 bpp modes.
             When running in 32bpp mode an 8-bit stencil buffer and 24-bit
             Z (depth) buffer are offered.
-            When running in 32bpp mode only a 16-bit Z (depth) buffer is
+            When running in 16bpp mode only a 16-bit Z (depth) buffer is
             offered and stencil is implemented in software.
           <p>
             A software-based accumulation buffer is available in both
@@ -740,6 +822,19 @@
               The value of this variable indicates the maximum number of
               swap buffer commands can be buffered.
               Zero allows maximum frame rate.
+            <item>
+              Rendering with 16-bit per texel textures is faster than using
+              32-bit per texel textures.  The <tt/internalFormat/ parameter
+              to <tt/glTexImage2D/ can be used to control texel size.
+            <item>
+              The Voodoo5 driver reverts to software rendering under the
+              same conditions Voodoo3 with three exceptions.
+              First, stencil operations are implemented in hardware when the
+              screen is configured for 32 bits/pixel.
+              Second, the <tt/GL_BLEND/ texture env mode is fully supported in
+              hardware.
+              Third, <tt/glColorMask/ is fully supported in hardware when
+              the screen is configured for 32 bits/pixel.
           </itemize>
         <sect2>Known Problems
 <p>
@@ -749,7 +844,14 @@
               be used via the tdfx DRI driver.
             <item>
               24bpp screen modes are supported by the hardware but not by
-              the current driver.
+              the current driver.  32bpp is fully supported.
+            <item>
+              As of October, 2000 the second VSA-100 chip on the Voodoo5 is
+              not yet operational.
+              Therefore, the board isn't being used to its full capacity.
+              The second VSA-100 chip will allow Scan-Line Interleave (SLI)
+              mode for full-screen applications and games, potentially doubling
+              the system's fill rate.
           </itemize>
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml
index bdeaf08df..2f4032d0a 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml
@@ -12,10 +12,10 @@
       <author>
           <htmlurl url="http://www.valinux.com/"
             name="VA Linux Systems, Inc."> Professional Services - Graphics.
-      <date>8 August 2000
+      <date>29 October 2000
         
     <ident>
-    $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml,v 1.6 2000/09/24 13:51:26 alanh Exp $
+    $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml,v 1.7 2000/11/08 05:03:03 dawes Exp $
     </ident>
 
     <toc>
@@ -489,7 +489,7 @@
              cd /usr/X11R6/bin
              mv Xwrapper Xwrapper.old
              rm X
-             ln -s /usr/X11R6-4.0.1/lib/X11/XFree86  X
+             ln -s /usr/X11R6-DRI/bin/XFree86  X
           </verb>
           This will cause the new X server to be used instead of the
           original one.
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml
index 119cd0838..f4cfe4f77 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml
@@ -9,7 +9,7 @@
 <date>5 March 2000</date>
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml,v 1.7 2000/03/06 22:59:25 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml,v 1.8 2000/11/14 16:54:49 dawes Exp $
 </ident>
 
 <toc>
@@ -354,9 +354,9 @@ example,
 <p>mulearabic-2 encodings/mulearabic-2.enc
 </tscreen>
 
-Note that the name of an encoding must be specified in the encoding
-file's STARTENCODING or ALIAS line.  It is not enough to create an
-`<tt/encodings.dir/' entry.
+Note that the name of an encoding <it/must/ be specified in the
+encoding file's STARTENCODING or ALIAS line.  It is not enough to
+create an `<tt/encodings.dir/' entry.
 
 If your platform supports it (it probably does), encoding files may be
 compressed or gzipped.
@@ -405,10 +405,25 @@ should be
 <tscreen>
 SIZE 0x75 0x80
 </tscreen>
-Codes outside the region defined by the size line are supposed to be
-undefined.  Encodings default to linear encoding with a size of 256
-(0x100).  This means that you must declare the size of all 16 bit
-encodings.
+In the case of a matrix encoding, a `<tt/FIRSTINDEX/' may be included
+to specify the minimum glyph index in an encoding.  The keyword
+`<tt/FIRSTINDEX/' is followed by two integers, the minimum row number
+followed by the minimum column number:
+<tscreen>
+FIRSTINDEX 0x20 0x20
+</tscreen>
+In the case of a linear encoding, a `<tt/FIRSTINDEX/' line should
+usually not be included.  If for some reason however it is desired
+that it should be included, it should be followed by a single integer.
+
+Note that in some font backends inclusion of a `<tt/FIRSTINDEX/' line
+has the side effect of disabling default glyph generation, and this
+keyword should therefore be avoided unless absolutely necessary.
+
+Codes outside the region defined by the `<tt/SIZE/' and
+`<tt/FIRSTINDEX/' lines are supposed to be undefined.  Encodings
+default to linear encoding with a size of 256 (0x100).  This means
+that you must declare the size of all 16 bit encodings.
 
 What follows is one or more mapping sections.  A mapping section
 starts with a `<tt/STARTMAPPING/' line stating the target of the mapping.
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ark/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/ark/Imakefile
new file mode 100644
index 000000000..ba5216709
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ark/Imakefile
@@ -0,0 +1,49 @@
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ark/Imakefile,v 1.5 2000/11/15 23:13:08 dawes Exp $
+/*
+ *
+ * Copyright 2000 Ani Joshi <ajoshi@unixbox.com>
+ *
+ */
+
+#define IHaveModules
+#include <Server.tmpl>
+
+SRCS = ark_driver.c ark_accel.c
+
+OBJS = ark_driver.o ark_accel.o
+
+#if defined(XF86DriverSDK)
+INCLUDES = -I. -I../../include
+#else
+INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
+           -I$(SERVERSRC)/mfb -I$(SERVERSRC)/mi \
+           -I$(SERVERSRC)/cfb -I$(XF86SRC)/xaa \
+           -I$(XF86SRC)/xf1bpp -I$(XF86SRC)/xf4bpp \
+           -I$(XF86SRC)/xf24_32bpp -I$(SERVERSRC)/Xext \
+           -I$(XF86SRC)/vgahw -I$(XF86SRC)/ramdac \
+	   -I$(XF86SRC)/rac -I$(XF86SRC)/int10 \
+	   -I$(XF86SRC)/fbdevhw -I$(XF86SRC)/ddc \
+	   -I$(XF86SRC)/i2c \
+           -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(FONTINCSRC) \
+           -I$(EXTINCSRC) -I$(SERVERSRC)/render
+#endif
+
+#if MakeHasPosixVariableSubstitutions
+SubdirLibraryRule($(OBJS))
+#endif
+
+NormalAsmObjectRule()
+
+ModuleObjectRule()
+ObjectModuleTarget(ark, $(OBJS))
+
+InstallObjectModule(ark,$(MODULEDIR),drivers)
+
+DependTarget()
+
+InstallDriverSDKNonExecFile(Imakefile,$(DRIVERSDKDIR)/drivers/ark)
+InstallDriverSDKNonExecFile(ark.h,$(DRIVERSDKDIR)/drivers/ark)
+InstallDriverSDKNonExecFile(ark_reg.h,$(DRIVERSDKDIR)/drivers/ark)
+InstallDriverSDKNonExecFile(ark_driver.c,$(DRIVERSDKDIR)/drivers/ark)
+InstallDriverSDKNonExecFile(ark_accel.c,$(DRIVERSDKDIR)/drivers/ark)
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ark/ark.h b/xc/programs/Xserver/hw/xfree86/drivers/ark/ark.h
new file mode 100644
index 000000000..6a95f8039
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ark/ark.h
@@ -0,0 +1,71 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ark/ark.h,v 1.1 2000/11/14 17:28:12 dawes Exp $ */
+/*
+ * ark
+ */
+
+#ifndef _ARK_H
+#define _ARK_H
+
+#include "xf86.h"
+#include "xf86Pci.h"
+#include "xf86PciInfo.h"
+#include "xaa.h"
+#include "xf86_ansic.h"
+#include "vgaHW.h"
+
+typedef struct _ARKRegRec {
+	unsigned char		sr10, sr11, sr12, sr13, sr14,
+				sr15, sr16, sr17, sr18, sr20,
+				sr21, sr22, sr23, sr24, sr25,
+				sr26, sr27, sr28, sr29, sr2a,
+				sr2b;
+	unsigned char		sr1c, sr1d;
+	unsigned char		cr40, cr41, cr42, cr44, cr46;
+	unsigned char		dac_command;
+	unsigned char		stg_17xx[3];
+	unsigned char		gendac[6];
+} ARKRegRec, *ARKRegPtr;
+
+
+typedef struct _ARKRec {
+	pciVideoPtr		PciInfo;
+	PCITAG			PciTag;
+	EntityInfoPtr		pEnt;
+	CARD32			IOAddress;
+	CARD32			FBAddress;
+	unsigned char *		FBBase;
+	unsigned char *		MMIOBase;
+	unsigned long		videoRam;
+	OptionInfoPtr		Options;
+	unsigned int		Flags;
+	Bool			NoAccel;
+	CARD32			Bus;
+	XAAInfoRecPtr		pXAA;
+	int			Chipset, ChipRev;
+	int			clock_mult;
+	int			dac_width;
+	int			multiplex_threshold;
+	int			ramdac;
+	ARKRegRec		SavedRegs;	/* original mode */
+	ARKRegRec		ModeRegs;	/* current mode */
+	Bool			(*CloseScreen)(int, ScreenPtr);
+} ARKRec, *ARKPtr;
+
+
+#define ARKPTR(p)	((ARKPtr)((p)->driverPrivate))
+
+
+#define DRIVER_NAME	"ark"
+#define DRIVER_VERSION	"0.5.0"
+#define VERSION_MAJOR	0
+#define VERSION_MINOR	5
+#define PATCHLEVEL	0
+#define ARK_VERSION	((VERSION_MAJOR << 24) | \
+			 (VERSION_MINOR << 16) | \
+			  PATCHLEVEL)
+
+#define	ZOOMDAC		0x404
+#define ATT490		0x101
+
+
+#endif /* _ARK_H */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_accel.c
new file mode 100644
index 000000000..c2cefce63
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_accel.c
@@ -0,0 +1,227 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ark/ark_accel.c,v 1.4 2000/11/15 23:13:09 dawes Exp $ */
+/*
+ *      Copyright 2000  Ani Joshi <ajoshi@unixbox.com>
+ *
+ *      XFree86 4.x driver for ARK Logic chipset
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation and
+ * that the name of Ani Joshi not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  Ani Joshi makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as-is" without express or implied warranty.
+ *
+ * ANI JOSHI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ANI JOSHI BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ *
+ *      Based on the 3.3.x driver by:
+ *              Harm Hanemaayer <H.Hanemaayer@inter.nl.net>
+ *
+ */
+
+
+#include "Xarch.h"
+#include "xf86.h"
+#include "xf86_ansic.h"
+#include "xf86_OSproc.h"
+#include "xaa.h"
+#include "xf86PciInfo.h"
+#include "compiler.h"
+
+#include "ark.h"
+#include "ark_reg.h"
+
+
+int curx, cury, cmd_flags;
+
+
+static void ARKSync(ScrnInfoPtr pScrn)
+{
+	for (;;) {
+		if (!(inb(0x3cb) & 0x40))
+			break;
+	}
+}
+
+
+static void ARKSetupForSolidFill(ScrnInfoPtr pScrn, int color,
+				 int rop, unsigned int planemask)
+{
+	ARKPtr pARK = ARKPTR(pScrn);
+
+	OUTREG16(FG_COLOR, color);
+	/* ARK color mix matches X raster-ops */
+	OUTREG16(COLOR_MIX_SEL, (rop | (rop << 8)));
+	switch (pScrn->bitsPerPixel) {
+		case 8:
+			if ((planemask & 0xff) == 0xff)
+				cmd_flags = DISABLE_PLANEMASK;
+			else {
+				OUTREG16(WRITE_PLANEMASK, planemask);
+				cmd_flags = 0;
+			}
+			break;
+		case 16:
+			if ((planemask & 0xffff) == 0xffff)
+				cmd_flags = DISABLE_PLANEMASK;
+			else {
+				OUTREG16(WRITE_PLANEMASK, planemask);
+				cmd_flags = 0;
+			}
+			break;
+		case 32:
+			OUTREG16(FG_COLOR_HI, color >> 16);
+			if ((planemask & 0xffffff) == 0xffffff)
+				cmd_flags = DISABLE_PLANEMASK;
+			else {
+				OUTREG16(WRITE_PLANEMASK, planemask);
+				cmd_flags = 0;
+			}
+			break;
+	}
+
+	curx = cury = -1;
+}
+
+
+static void ARKSubsequentSolidFillRect(ScrnInfoPtr pScrn, int x,
+				       int y, int w, int h)
+{
+	ARKPtr pARK = ARKPTR(pScrn);
+	int dst_addr;
+
+	OUTREG(WIDTH, ((h - 1) << 16) | (w - 1));
+	if (x != curx || y != cury) {
+		dst_addr = y * pScrn->displayWidth + x;
+		OUTREG(DST_ADDR, dst_addr);
+		curx = x;
+		cury = y;
+	}
+	OUTREG16(COMMAND, SELECT_BG_COLOR | SELECT_FG_COLOR |
+			  STENCIL_ONES | DISABLE_CLIPPING | BITBLT |
+			  cmd_flags);
+	cury += h;
+}
+
+
+
+static void ARKSetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir,
+					  int ydir, int rop, unsigned int planemask,
+					  int trans_color)
+{
+	ARKPtr pARK = ARKPTR(pScrn);
+
+	cmd_flags = 0;
+	if (trans_color != -1) {
+		if (pScrn->bitsPerPixel <= 16)
+			OUTREG16(TRANS_COLOR, trans_color);
+		else {
+			OUTREG16(TRANS_COLOR, trans_color & 0xffff);
+			OUTREG16(TRANS_COLOR_HI, trans_color >> 16);
+		}
+		cmd_flags = STENCIL_GENERATED;
+		OUTREG16(COLOR_MIX_SEL, rop | 0x0500);
+	} else {
+		OUTREG16(COLOR_MIX_SEL, rop | (rop << 8));
+	}
+
+	if (ydir < 0)
+		cmd_flags |= UP;
+	if (xdir < 0)
+		cmd_flags |= LEFT;
+
+	/* yes, quite ugly */
+	if ((pScrn->bitsPerPixel == 8 && (planemask & 0xff) == 0xff) ||
+	    (pScrn->bitsPerPixel == 16 && (planemask & 0xffff) == 0xffff) ||
+	    (pScrn->bitsPerPixel == 32 && (planemask & 0xffffff) == 0xffffff))
+		cmd_flags |= DISABLE_PLANEMASK;
+	else
+		OUTREG16(WRITE_PLANEMASK, planemask);
+
+}
+
+
+
+static void ARKSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn,
+					    int x1, int y1,
+					    int x2, int y2,
+					    int w, int h)
+{
+	ARKPtr pARK = ARKPTR(pScrn);
+	int src_addr, dst_addr;
+
+	if (cmd_flags & UP) {
+		src_addr = (y1 + h - 1) * pScrn->displayWidth;
+		dst_addr = (y2 + h - 1) * pScrn->displayWidth;
+	} else {
+		src_addr = y1 * pScrn->displayWidth;
+		dst_addr = y2 * pScrn->displayWidth;
+	}
+	if (cmd_flags & LEFT) {
+		src_addr += x1 + w - 1;
+		dst_addr += x2 + w - 1;
+	} else {
+		src_addr += x1;
+		dst_addr += x2;
+	}
+
+	OUTREG(SRC_ADDR, src_addr);
+	OUTREG(DST_ADDR, dst_addr);
+	OUTREG(WIDTH, ((h - 1) << 16) | (w - 1));
+	OUTREG16(COMMAND, BG_BITMAP | FG_BITMAP | DISABLE_CLIPPING |
+			  BITBLT | cmd_flags);
+}
+
+
+
+Bool ARKAccelInit(ScreenPtr pScreen)
+{
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	ARKPtr pARK = ARKPTR(pScrn);
+	vgaHWPtr hwp = VGAHWPTR(pScrn);
+	XAAInfoRecPtr pXAA;
+
+	if (!(pXAA = XAACreateInfoRec()))
+		return FALSE;
+
+	pXAA->Flags = LINEAR_FRAMEBUFFER;
+
+	pXAA->Sync = ARKSync;
+	pXAA->SetupForSolidFill = ARKSetupForSolidFill;
+	pXAA->SubsequentSolidFillRect = ARKSubsequentSolidFillRect;
+	pXAA->ScreenToScreenCopyFlags = 0;
+	pXAA->SetupForScreenToScreenCopy = ARKSetupForScreenToScreenCopy;
+	pXAA->SubsequentScreenToScreenCopy = ARKSubsequentScreenToScreenCopy;
+
+	OUTREG16(COLOR_MIX_SEL, 0x0303);
+	if (pARK->Chipset == PCI_CHIP_1000PV) {
+		OUTREG16(WRITE_PLANEMASK, 0xffff);
+		OUTREG16(TRANS_COLOR_MSK, 0xffff);
+	} else {
+		OUTREG16(TRANS_COLOR, 0xffff);
+		OUTREG16(TRANS_COLOR, 0xffffffff >> 16);
+	}
+	if (pARK->Chipset == PCI_CHIP_1000PV && pScrn->bitsPerPixel == 32) {
+		OUTREG16(STENCIL_PITCH, pScrn->displayWidth * 2);
+		OUTREG16(SRC_PITCH, pScrn->displayWidth * 2);
+		OUTREG16(DST_PITCH, pScrn->displayWidth * 2);
+	} else {
+		OUTREG16(STENCIL_PITCH, pScrn->displayWidth);
+		OUTREG16(SRC_PITCH, pScrn->displayWidth);
+		OUTREG16(DST_PITCH, pScrn->displayWidth);
+	}
+
+	OUTREG16(BITMAP_CONFIG, LINEAR_STENCIL_ADDR | LINEAR_SRC_ADDR |
+				LINEAR_DST_ADDR);
+
+	return XAAInit(pScreen, pXAA);
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_driver.c
new file mode 100644
index 000000000..b7e765b5c
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_driver.c
@@ -0,0 +1,1170 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ark/ark_driver.c,v 1.8 2000/11/15 23:13:09 dawes Exp $ */
+/*
+ *	Copyright 2000	Ani Joshi <ajoshi@unixbox.com>
+ *
+ *	XFree86 4.x driver for ARK Logic chipset
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation and   
+ * that the name of Ani Joshi not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  Ani Joshi makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as-is" without express or implied warranty.
+ *
+ * ANI JOSHI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ANI JOSHI BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ *
+ *	Based on the 3.3.x driver by:
+ *		Harm Hanemaayer <H.Hanemaayer@inter.nl.net>
+ *
+ */
+
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86_ansic.h"
+#include "xf86Pci.h"
+#include "xf86PciInfo.h"
+#include "xf86Version.h"
+#include "xf86Resources.h"
+#include "xf86fbman.h"
+#include "xf86cmap.h"
+#include "compiler.h"
+#include "xaa.h"
+#include "mipointer.h"
+#include "micmap.h"
+#include "mibstore.h"
+
+#include "ark.h"
+
+
+/*
+ * prototypes
+ */
+static OptionInfoPtr ARKAvailableOptions(int chipid, int busid);
+static void ARKIdentify(int flags);
+static Bool ARKProbe(DriverPtr drv, int flags);
+static Bool ARKPreInit(ScrnInfoPtr pScrn, int flags);
+static Bool ARKEnterVT(int scrnIndex, int flags);
+static void ARKLeaveVT(int scrnIndex, int flags);
+static void ARKSave(ScrnInfoPtr pScrn);
+static Bool ARKScreenInit(int scrnIndex, ScreenPtr pScreen, int argc,
+			  char **argv);
+static Bool ARKMapMem(ScrnInfoPtr pScrn);
+static void ARKUnmapMem(ScrnInfoPtr pScrn);
+static Bool ARKModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
+static void ARKAdjustFrame(int scrnIndex, int x, int y, int flags);
+Bool ARKSwitchMode(int scrnIndex, DisplayModePtr mode, int flags);
+Bool ARKCloseScreen(int scrnIndex, ScreenPtr pScreen);
+Bool ARKSaveScreen(ScreenPtr pScreen, int mode);
+static void ARKFreeScreen(int scrnIndex, int flags);
+static void ARKLoadPalette(ScrnInfoPtr pScrn, int numColors,
+			   int *indicies, LOCO *colors,
+			   VisualPtr pVisual);
+static void ARKWriteMode(ScrnInfoPtr pScrn, vgaRegPtr pVga, ARKRegPtr new);
+
+/* helpers */
+static unsigned char get_daccomm();
+static unsigned char set_daccom(unsigned char comm);
+
+
+DriverRec ARK =
+{
+	ARK_VERSION,
+	DRIVER_NAME,
+	ARKIdentify,
+	ARKProbe,
+	ARKAvailableOptions,
+	NULL,
+	0
+};
+
+/* supported chipsets */
+static SymTabRec ARKChipsets[] = {
+	{ PCI_CHIP_1000PV, "ark1000pv" },
+	{ PCI_CHIP_2000PV, "ark2000pv" },
+	{ PCI_CHIP_2000MT, "ark2000mt" },
+	{ -1,		   NULL }
+};
+
+static PciChipsets ARKPciChipsets[] = {
+	{ PCI_CHIP_1000PV, PCI_CHIP_1000PV, RES_SHARED_VGA },
+	{ PCI_CHIP_2000PV, PCI_CHIP_2000PV, RES_SHARED_VGA },
+	{ PCI_CHIP_2000MT, PCI_CHIP_2000MT, RES_SHARED_VGA },
+	{ -1,		   -1,		    RES_UNDEFINED }
+};
+
+typedef enum {
+	OPTION_NOACCEL
+} ARKOpts;
+
+static OptionInfoRec ARKOptions[] = {
+	{ OPTION_NOACCEL, "noaccel", OPTV_BOOLEAN, {0}, FALSE }
+};
+
+static const char *fbSymbols[] = {
+	"fbScreenInit",
+	NULL
+};
+
+static const char *vgaHWSymbols[] = {
+	"vgaHWGetHWRec",
+	"vgaHWFreeHWRec",
+	"vgaHWGetIOBase",
+	"vgaHWSave",
+	"vgaHWProtect",
+	"vgaHWRestore",
+	"vgaHWMapMem",
+	"vgaHWUnmapMem",
+	"vgaHWSaveScreen",
+	"vgaHWLock",
+	NULL
+};
+
+static const char *xaaSymbols[] = {
+	"XAACreateInfoRec",
+	"XAADestroyInfoRec",
+	"XAAInit",
+	"XAAScreenIndex",
+	NULL
+};
+
+#ifdef XFree86LOADER
+
+MODULESETUPPROTO(ARKSetup);
+
+static XF86ModuleVersionInfo ARKVersRec = {
+	"ark",
+	MODULEVENDORSTRING,
+	MODINFOSTRING1,
+	MODINFOSTRING2,
+	XF86_VERSION_CURRENT,
+	VERSION_MAJOR, VERSION_MINOR, PATCHLEVEL,
+	ABI_CLASS_VIDEODRV,
+	ABI_VIDEODRV_VERSION,
+	MOD_CLASS_VIDEODRV,
+	{0, 0, 0, 0}
+};
+
+XF86ModuleData arkModuleData = { &ARKVersRec, ARKSetup, NULL };
+
+pointer ARKSetup(pointer module, pointer opts, int *errmaj, int *errmin)
+{
+	static Bool setupDone = FALSE;
+
+	if (!setupDone) {
+		setupDone = TRUE;
+		xf86AddDriver(&ARK, module, 0);
+		LoaderRefSymLists(fbSymbols, vgaHWSymbols, xaaSymbols, NULL);
+		return (pointer) 1;
+	} else {
+		if (errmaj)
+			*errmaj = LDR_ONCEONLY;
+		return NULL;
+	}
+}
+
+#endif /* XFree86LOADER */
+
+
+static Bool ARKGetRec(ScrnInfoPtr pScrn)
+{
+	if (pScrn->driverPrivate)
+		return TRUE;
+
+	pScrn->driverPrivate = xnfcalloc(sizeof(ARKRec), 1);
+
+	return TRUE;
+}
+
+static void ARKFreeRec(ScrnInfoPtr pScrn)
+{
+	if (!pScrn->driverPrivate)
+		return;
+
+	xfree(pScrn->driverPrivate);
+	pScrn->driverPrivate = NULL;
+}
+
+static OptionInfoPtr ARKAvailableOptions(int chipid, int busid)
+{
+	return ARKOptions;
+}
+
+static void ARKIdentify(int flags)
+{
+	xf86PrintChipsets("ark", "driver (version " DRIVER_VERSION " for ARK Logic chipset",
+			  ARKChipsets);
+}
+
+static Bool ARKProbe(DriverPtr drv, int flags)
+{
+	int i;
+	GDevPtr *devSections = NULL;
+	int *usedChips;
+	int numDevSections;
+	int numUsed;
+	Bool foundScreen = FALSE;
+
+	/* sanity check */
+	if ((numDevSections = xf86MatchDevice("ark", &devSections)) <= 0)
+		return FALSE;
+
+	/* do ISA later */
+	numUsed = xf86MatchPciInstances("ark", PCI_VENDOR_ARK,
+					ARKChipsets, ARKPciChipsets,
+					devSections, numDevSections, drv,
+					&usedChips);
+
+	if (devSections)
+		xfree(devSections);
+
+	if (numUsed <= 0)
+		return FALSE;
+
+	if (flags & PROBE_DETECT)
+		foundScreen = TRUE;
+	else for (i=0; i<numUsed; i++) {
+		ScrnInfoPtr pScrn = xf86AllocateScreen(drv, 0);
+
+		pScrn->driverVersion = VERSION_MAJOR;
+		pScrn->driverName = DRIVER_NAME;
+		pScrn->name = "ark";
+		pScrn->Probe = ARKProbe;
+		pScrn->PreInit = ARKPreInit;
+		pScrn->ScreenInit = ARKScreenInit;
+		pScrn->SwitchMode = ARKSwitchMode;
+		pScrn->AdjustFrame = ARKAdjustFrame;
+		pScrn->EnterVT = ARKEnterVT;
+		pScrn->LeaveVT = ARKLeaveVT;
+		pScrn->FreeScreen = ARKFreeScreen;
+		foundScreen = TRUE;
+		xf86ConfigActivePciEntity(pScrn, usedChips[i], ARKPciChipsets,
+					  NULL, NULL, NULL, NULL, NULL);
+	}
+
+	xfree(usedChips);
+
+	return foundScreen;
+}
+
+
+static Bool ARKPreInit(ScrnInfoPtr pScrn, int flags)
+{
+	EntityInfoPtr pEnt;
+	ARKPtr pARK;
+	vgaHWPtr hwp;
+	MessageType from = X_DEFAULT;
+	int i;
+	ClockRangePtr clockRanges;
+	char *mod = NULL;
+	const char *reqSym = NULL;
+	rgb zeros = {0, 0, 0};
+	Gamma gzeros = {0.0, 0.0, 0.0};
+	unsigned char tmp;
+
+	if (flags & PROBE_DETECT)
+		return FALSE;
+
+	if (!xf86LoadSubModule(pScrn, "vgahw"))
+		return FALSE;
+
+	xf86LoaderReqSymLists(vgaHWSymbols, NULL);
+
+	if (!vgaHWGetHWRec(pScrn))
+		return FALSE;
+
+	hwp = VGAHWPTR(pScrn);
+	vgaHWGetIOBase(hwp);
+
+	pScrn->monitor = pScrn->confScreen->monitor;
+
+	if (!xf86SetDepthBpp(pScrn, 8, 8, 8, Support24bppFb | Support32bppFb))
+		return FALSE;
+	else {
+		switch (pScrn->depth) {
+			case 8:
+			case 16:
+			case 24:
+			case 32:
+				/* OK */
+				break;
+			default:
+				xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+					   "Given depth (%d) is not supported by this driver\n",
+					   pScrn->depth);
+				return FALSE;
+		}
+	}
+
+	xf86PrintDepthBpp(pScrn);
+
+	if (pScrn->depth > 8) {
+		if (!xf86SetWeight(pScrn, zeros, zeros))
+			return FALSE;
+	}
+
+	if (pScrn->depth == 8)
+		pScrn->rgbBits = 8;
+
+	if (!xf86SetDefaultVisual(pScrn, -1))
+		return FALSE;
+
+	pScrn->progClock = TRUE;
+
+	if (!ARKGetRec(pScrn))
+		return FALSE;
+
+	pARK = ARKPTR(pScrn);
+
+	xf86CollectOptions(pScrn, NULL);
+	xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, ARKOptions);
+
+	if (xf86ReturnOptValBool(ARKOptions, OPTION_NOACCEL, FALSE)) {
+		pARK->NoAccel = TRUE;
+		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Option: NoAccel - acceleration disabled\n");
+	} else
+		pARK->NoAccel = FALSE;
+
+	if (pScrn->numEntities > 1) {
+		ARKFreeRec(pScrn);
+		return FALSE;
+	}
+
+	pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
+	if (pEnt->resources) {
+		xfree(pEnt);
+		ARKFreeRec(pScrn);
+		return FALSE;
+	}
+
+	pARK->PciInfo = xf86GetPciInfoForEntity(pEnt->index);
+	xf86RegisterResources(pEnt->index, NULL, ResNone);
+	xf86SetOperatingState(RES_SHARED_VGA, pEnt->index, ResUnusedOpr);
+	xf86SetOperatingState(resVgaMemShared, pEnt->index, ResDisableOpr);
+
+	if (pEnt->device->chipset && *pEnt->device->chipset) {
+		pScrn->chipset = pEnt->device->chipset;
+		pARK->Chipset = xf86StringToToken(ARKChipsets, pScrn->chipset);
+	} else if (pEnt->device->chipID >= 0) {
+		pARK->Chipset = pEnt->device->chipID;
+		pScrn->chipset = (char *)xf86TokenToString(ARKChipsets,
+							   pARK->Chipset);
+		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
+			   pARK->Chipset);
+	} else {
+		pARK->Chipset = pARK->PciInfo->chipType;
+		pScrn->chipset = (char *)xf86TokenToString(ARKChipsets,
+							   pARK->Chipset);
+	}
+
+	if (pEnt->device->chipRev >= 0) {
+		pARK->ChipRev = pEnt->device->chipRev;
+		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
+			   pARK->ChipRev);
+	} else
+		pARK->ChipRev = pARK->PciInfo->chipRev;
+
+	xfree(pEnt);
+
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Chipset: \"%s\"\n", pScrn->chipset);
+
+	pARK->PciTag = pciTag(pARK->PciInfo->bus, pARK->PciInfo->device,
+			      pARK->PciInfo->func);
+
+	/* unlock CRTC[0-7] */
+	outb(hwp->IOBase + 4, 0x11);
+	tmp = inb(hwp->IOBase + 5);
+	outb(hwp->IOBase + 5, tmp & 0x7f);
+	modinx(0x3c4, 0x1d, 0x01, 0x01);
+
+	/* use membase's later on ??? */
+	pARK->FBAddress = (rdinx(0x3c4, 0x13) << 16) +
+			  (rdinx(0x3c4, 0x14) << 24);
+
+	xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Framebuffer @ 0x%x\n",
+		   pARK->FBAddress);
+
+	if (!xf86SetGamma(pScrn, gzeros))
+		return FALSE;
+
+	if (!pScrn->videoRam) {
+		unsigned char sr10;
+
+		sr10 = rdinx(0x3c4, 0x10);
+		if (pARK->Chipset == PCI_CHIP_1000PV) {
+			if ((sr10 & 0x40) == 0)
+				pScrn->videoRam = 1024;
+			else
+				pScrn->videoRam = 2048;
+		}
+		if (pARK->Chipset == PCI_CHIP_2000PV ||
+		    pARK->Chipset == PCI_CHIP_2000MT) {
+			if ((sr10 & 0xc0) == 0)
+				pScrn->videoRam = 1024;
+			else if ((sr10 & 0xc0) == 0x40)
+				pScrn->videoRam = 2048;
+			else
+				pScrn->videoRam = 4096;
+	}
+
+	xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Detected %d bytes video ram\n",
+			pScrn->videoRam);
+
+	/* try to detect the RAMDAC */
+	{
+		int man_id, dev_id;
+
+		inb(0x3c6);		/* skip command register */
+		man_id = inb(0x3c6);	/* manufacturer id */
+		dev_id = inb(0x3c6);	/* device id */
+		if (man_id == 0x84 && dev_id == 0x98) {
+			pARK->ramdac = ZOOMDAC;
+			pARK->dac_width = 16;
+			pARK->multiplex_threshold = 40000;
+			xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+				   "Detected ZOOMDAC\n");
+		}
+	}
+
+	/* hack for this Bali32 */
+	pARK->ramdac = ATT490;
+	pARK->dac_width = 8;
+
+	pARK->clock_mult = 1;
+	if (pARK->dac_width == 16) {
+		if (pScrn->bitsPerPixel == 32)
+			pARK->clock_mult = 2;
+	}
+
+	pScrn->numClocks = 1;
+	pScrn->clock[0] = 80000;	/* safe */
+
+	clockRanges = xnfcalloc(sizeof(ClockRange), 1);
+	clockRanges->next = NULL;
+	clockRanges->minClock = 20000;
+	clockRanges->maxClock = 80000;
+	clockRanges->clockIndex = -1;
+	clockRanges->interlaceAllowed = FALSE; /* ? */
+	clockRanges->doubleScanAllowed = FALSE; /* ? */
+
+	i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
+			      pScrn->display->modes, clockRanges,
+			      NULL, 256, 2048, pScrn->bitsPerPixel,
+			      128, 2048, pScrn->virtualX,
+			      pScrn->display->virtualY, pARK->videoRam * 1024,
+			      LOOKUP_BEST_REFRESH);
+	if (i == -1) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "no valid modes left\n");
+		ARKFreeRec(pScrn);
+		return FALSE;
+	}
+
+	xf86PruneDriverModes(pScrn);
+
+	if (i == 0 || pScrn->modes == NULL) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "no valid modes found\n");
+		ARKFreeRec(pScrn);
+		return FALSE;
+	}
+
+	xf86SetCrtcForModes(pScrn, 0);
+	pScrn->currentMode = pScrn->modes;
+	xf86PrintModes(pScrn);
+	xf86SetDpi(pScrn, 0, 0);
+
+	xf86LoadSubModule(pScrn, "fb");
+	xf86LoaderReqSymbols("fbScreenInit", NULL);
+
+	if (!pARK->NoAccel) {
+		xf86LoadSubModule(pScrn, "xaa");
+		xf86LoaderReqSymLists(xaaSymbols, NULL);
+	}
+
+	return TRUE;
+}
+}
+
+static Bool ARKScreenInit(int scrnIndex, ScreenPtr pScreen, int argc,
+			  char **argv)
+{
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	ARKPtr pARK = ARKPTR(pScrn);
+	BoxRec MemBox;
+	int i;
+
+	pScrn->fbOffset = 0;
+
+	if (!ARKMapMem(pScrn)) {
+		ARKFreeRec(pScrn);
+		return FALSE;
+	}
+
+	ARKSave(pScrn);
+
+/*	vgaHWBlankScreen(pScrn, TRUE); */
+
+	if (!ARKModeInit(pScrn, pScrn->currentMode))
+		return FALSE;
+
+	ARKSaveScreen(pScreen, SCREEN_SAVER_ON);
+
+	pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
+
+	miClearVisualTypes();
+	if (pScrn->bitsPerPixel > 8) {
+		if (!miSetVisualTypes(pScrn->depth, TrueColorMask,
+				      pScrn->rgbBits, pScrn->defaultVisual))
+			return FALSE;
+	} else {
+		if (!miSetVisualTypes(pScrn->depth, miGetDefaultVisualMask(pScrn->depth),
+				      pScrn->rgbBits, pScrn->defaultVisual))
+			return FALSE;
+	}
+
+	if (!fbScreenInit(pScreen, pARK->FBBase, pScrn->virtualX,
+			  pScrn->virtualY, pScrn->xDpi, pScrn->yDpi,
+			  pScrn->displayWidth, pScrn->bitsPerPixel))
+		return FALSE;
+
+	xf86SetBlackWhitePixels(pScreen);
+
+	if (pScrn->bitsPerPixel > 8) {
+		VisualPtr pVis;
+
+		pVis = pScreen->visuals + pScreen->numVisuals;
+		while (--pVis >= pScreen->visuals) {
+			if ((pVis->class | DynamicClass) == DirectColor) {
+				pVis->offsetRed = pScrn->offset.red;
+				pVis->offsetGreen = pScrn->offset.green;
+				pVis->offsetBlue = pScrn->offset.blue;
+				pVis->redMask = pScrn->mask.red;
+				pVis->greenMask = pScrn->mask.green;
+				pVis->blueMask = pScrn->mask.blue;
+			}
+		}
+	}
+
+
+	miInitializeBackingStore(pScreen);
+	xf86SetBackingStore(pScreen);
+
+	if (!pARK->NoAccel) {
+		if (ARKAccelInit(pScreen)) {
+			xf86DrvMsg(scrnIndex, X_INFO, "Acceleration enabled\n");
+		} else {
+			xf86DrvMsg(scrnIndex, X_ERROR, "Acceleration initialization failed\n");
+			xf86DrvMsg(scrnIndex, X_INFO, "Acceleration disabled\n");
+		}
+	} else {
+			xf86DrvMsg(scrnIndex, X_INFO, "Acceleration disabled\n");
+	}
+
+	miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
+
+	if (!miCreateDefColormap(pScreen))
+		return FALSE;
+
+	if (!xf86HandleColormaps(pScreen, 256, 8, ARKLoadPalette, NULL,
+				 CMAP_RELOAD_ON_MODE_SWITCH))
+		return FALSE;
+
+/*	vgaHWBlankScreen(pScrn, TRUE); */
+
+	pScreen->SaveScreen = ARKSaveScreen;
+	pARK->CloseScreen = pScreen->CloseScreen;
+	pScreen->CloseScreen = ARKCloseScreen;
+
+	return TRUE;
+}
+
+
+
+static void ARKSave(ScrnInfoPtr pScrn)
+{
+	ARKPtr pARK = ARKPTR(pScrn);
+	ARKRegPtr save = &pARK->SavedRegs;
+	vgaHWPtr hwp = VGAHWPTR(pScrn);
+	int vgaIOBase = hwp->IOBase;
+
+	vgaHWUnlock(hwp);
+	vgaHWSave(pScrn, &hwp->SavedReg, VGA_SR_ALL);
+	vgaHWLock(hwp);
+
+	/* set read and write aperture index to 0 */
+	wrinx(0x3c4, 0x15, 0x00);
+	wrinx(0x3c4, 0x16, 0x00);
+	outb(0x3c8, 0);		/* reset DAC register access mode */
+
+	save->sr10 = rdinx(0x3c4, 0x10);
+	save->sr11 = rdinx(0x3c4, 0x11);
+	save->sr12 = rdinx(0x3c4, 0x12);
+	save->sr13 = rdinx(0x3c4, 0x13);
+	save->sr14 = rdinx(0x3c4, 0x14);
+	save->sr15 = rdinx(0x3c4, 0x15);
+	save->sr16 = rdinx(0x3c4, 0x16);
+	save->sr17 = rdinx(0x3c4, 0x17);
+	save->sr18 = rdinx(0x3c4, 0x18);
+
+#if 0
+	save->sr1d = rdinx(0x3c4, 0x1d);
+	save->sr1c = rdinx(0x3c4, 0x1c);
+
+	save->sr20 = rdinx(0x3c4, 0x20);
+	save->sr21 = rdinx(0x3c4, 0x21);
+	save->sr22 = rdinx(0x3c4, 0x22);
+	save->sr23 = rdinx(0x3c4, 0x23);
+	save->sr24 = rdinx(0x3c4, 0x24);
+	save->sr25 = rdinx(0x3c4, 0x25);
+	save->sr26 = rdinx(0x3c4, 0x26);
+	save->sr27 = rdinx(0x3c4, 0x27);
+	save->sr29 = rdinx(0x3c4, 0x29);
+	save->sr2a = rdinx(0x3c4, 0x2a);
+	if ((pARK->Chipset == PCI_CHIP_2000PV) ||
+	    (pARK->Chipset == PCI_CHIP_2000MT)) {
+		save->sr28 = rdinx(0x3c4, 0x28);
+		save->sr2b = rdinx(0x3c4, 0x2b);
+	}
+#endif
+
+	save->cr40 = rdinx(vgaIOBase + 4, 0x40);
+	save->cr41 = rdinx(vgaIOBase + 4, 0x41);
+	save->cr42 = rdinx(vgaIOBase + 4, 0x42);
+	save->cr44 = rdinx(vgaIOBase + 4, 0x44);
+
+	if ((pARK->Chipset == PCI_CHIP_2000PV) ||
+	    (pARK->Chipset == PCI_CHIP_2000MT))
+		save->cr46 = rdinx(vgaIOBase + 4, 0x46);
+
+	/* save RAMDAC regs here, based on type */
+	save->dac_command = get_daccomm();
+}
+
+
+
+static Bool ARKModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+	ARKPtr pARK = ARKPTR(pScrn);
+	ARKRegPtr new = &pARK->ModeRegs;
+	int multiplexing, dac16, modepitch;
+	vgaHWPtr hwp = VGAHWPTR(pScrn);
+	vgaRegPtr pVga = &hwp->ModeReg;
+	int vgaIOBase = hwp->IOBase;
+	unsigned char tmp;
+	int offset;
+
+	multiplexing = 0;
+
+	if ((pScrn->bitsPerPixel == 8) && (pARK->dac_width == 16) &&
+	    (mode->Clock > pARK->multiplex_threshold))
+		multiplexing = 1;
+
+	if (pARK->clock_mult == 2) {
+		if (!mode->CrtcHAdjusted) {
+			mode->CrtcHDisplay <<= 1;
+			mode->CrtcHSyncStart <<= 1;
+			mode->CrtcHSyncEnd <<= 1;
+			mode->CrtcHTotal <<= 1;
+			mode->CrtcHSkew <<= 1;
+			mode->CrtcHAdjusted = TRUE;
+		}
+	}
+
+	if (multiplexing) {
+		if (!mode->CrtcHAdjusted) {
+			mode->CrtcHDisplay >>= 1;
+			mode->CrtcHSyncStart >>= 1;
+			mode->CrtcHSyncEnd >>= 1;
+			mode->CrtcHTotal >>= 1;
+			mode->CrtcHSkew >>= 1;
+			mode->CrtcHAdjusted = TRUE;
+		}
+	}
+
+	if (!vgaHWInit(pScrn, mode))
+		return FALSE;
+
+	if ((pARK->Chipset == PCI_CHIP_2000PV) ||
+	    (pARK->Chipset == PCI_CHIP_2000MT)) {
+		new->cr46 = rdinx(vgaIOBase + 4, 0x46) & ~0x04;
+		dac16 = 0;
+		if (pScrn->bitsPerPixel > 8)
+			dac16 = 1;
+		if (dac16)
+			new->cr46 |= 0x04;
+	}
+
+	offset = (pScrn->displayWidth * (pScrn->bitsPerPixel / 8)) >> 3;
+	pVga->CRTC[0x13] = offset;
+	pVga->Attribute[0x11] = 0x00;
+	new->cr41 = (offset & 0x100) >> 5;
+
+	pVga->MiscOutReg |= 0x0c;
+
+	new->sr11 = rdinx(0x3c4, 0x11) & ~0x0f;
+	switch (pScrn->bitsPerPixel) {
+		case 8:
+			new->sr11 |= 0x06;
+			break;
+		case 16:
+			new->sr11 |= 0x0a;
+			break;
+		case 24:
+			new->sr11 |= 0x06;
+			break;
+		case 32:
+			if ((pARK->Chipset == PCI_CHIP_2000PV) ||
+			    (pARK->Chipset == PCI_CHIP_2000MT))
+				new->sr11 |= 0x0e;
+			else
+				new->sr11 |= 0x0a;
+			break;
+		default:
+			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+				   "Unsupported screen depth %d\n",
+				   pScrn->bitsPerPixel);
+			return FALSE;
+	}
+
+	switch (pScrn->displayWidth) {
+		case 640:
+			modepitch = 0;
+			break;
+		case 800:
+			modepitch = 1;
+			break;
+		case 1024:
+			modepitch = 2;
+			break;
+		case 1280:
+			modepitch = 4;
+			break;
+		case 1600:
+			modepitch = 5;
+			break;
+		case 2048:
+			modepitch = 6;
+			break;
+		default:
+			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+				   "Unsupported screen width %d\n",
+				   pScrn->displayWidth);
+			return FALSE;
+	}	
+
+	new->sr17 &= ~0xc7;
+	new->sr17 |= modepitch;
+
+	new->sr10 = rdinx(0x3c4, 0x10) & ~0x1f;
+	new->sr10 |= 0x1f;
+
+	new->sr13 = pARK->FBAddress >> 16;
+	new->sr14 = pARK->FBAddress >> 24;
+
+	new->sr12 = rdinx(0x3c4, 0x12) & ~0x03;
+	switch (pScrn->videoRam) {
+		case 1024:
+			new->sr12 |= 0x01;
+			break;
+		case 2048:
+			new->sr12 |= 0x02;
+			break;
+		case 4096:
+			new->sr12 |= 0x03;
+			break;
+		default:
+			new->sr12 |= 0x01;
+			break;
+	}
+
+	new->sr15 = new->sr16 = 0;
+
+	tmp = 0;
+	if ((mode->CrtcVTotal - 2) & 0x400)
+		tmp |= 0x80;
+	if ((mode->CrtcVDisplay - 1) & 0x400)
+		tmp |= 0x40;
+	if (mode->CrtcVSyncStart & 0x400)
+		tmp |= 0x10;
+	new->cr40 = tmp;
+
+	tmp = new->cr41;	/* initialized earlier */
+	if ((mode->CrtcHTotal / 8 - 5) & 0x100)
+		tmp |= 0x80;
+	if ((mode->CrtcHDisplay / 8 - 1) & 0x100)
+		tmp |= 0x40;
+	if ((mode->CrtcHSyncStart / 8 - 1) & 0x100)
+		tmp |= 0x20;
+	if ((mode->CrtcHSyncStart / 8) & 0x100)
+		tmp |= 0x10;
+	new->cr41 |= tmp;
+
+	new->cr44 = rdinx(vgaIOBase + 4, 0x44) & ~0x34;
+	new->cr44 &= ~0x01;
+	new->cr42 = 0;
+
+	/* check interlace here later */
+
+	/* set display FIFO threshold */
+	{
+		int threshold;
+		unsigned char tmp;
+		int bandwidthused, percentused;
+
+		/* mostly guesses here as I would need to know more about
+		 * and from the ramdac...
+		 */
+		bandwidthused = (mode->Clock / pARK->clock_mult) *
+				(pScrn->bitsPerPixel / 8);
+		/* 120000 is another guess */
+		percentused = (bandwidthused * 100) / 120000;
+		tmp = rdinx(0x3c4, 0x18);
+		if (pARK->Chipset == PCI_CHIP_1000PV) {
+			threshold = 4;
+			tmp |= 0x08;	/* enable full FIFO (8 deep) */
+			tmp &= ~0x07;
+			tmp |= threshold;
+		}
+		if ((pARK->Chipset == PCI_CHIP_2000PV) ||
+		    (pARK->Chipset == PCI_CHIP_2000MT)) {
+			threshold = 12;
+			if (percentused >= 45)
+				threshold = 8;
+			if (percentused >= 70)
+				threshold = 4;
+			tmp &= 0x40;
+			tmp |= 0x10;
+			tmp |= (threshold & 0x0e) >> 1;
+			if (threshold & 0x01)
+				tmp |= 0x80;
+			if (threshold & 0x10)
+				tmp |= 0x20;
+		}
+		new->sr18 = tmp;
+	}
+
+	/* setup the RAMDAC regs */
+	if (pARK->ramdac == ZOOMDAC) {
+		new->dac_command = 0x04;
+		if ((pScrn->bitsPerPixel == 8) && multiplexing)
+			new->dac_command = 0x24;
+		if ((pScrn->bitsPerPixel == 16) && (pARK->dac_width == 16))
+			/* assuming green weight is not 5 */
+			new->dac_command = 0x34;
+		if ((pScrn->bitsPerPixel == 16) && (pARK->dac_width == 8))
+			new->dac_command = 0x64;
+		if ((pScrn->bitsPerPixel == 24) && (pARK->dac_width == 16))
+			new->dac_command = 0xb4;	/* packed */
+		if ((pScrn->bitsPerPixel == 32) && (pARK->dac_width == 16))
+			new->dac_command = 0x54;
+	} else if (pARK->ramdac == ATT490) {
+		new->dac_command = 0x00;
+		if (pScrn->bitsPerPixel == 16)
+			/* assuming green weight is 6 */
+			new->dac_command = 0xc0;
+		if (pScrn->bitsPerPixel == 24)
+			new->dac_command = 0xe0;
+	}
+
+	/* hrmm... */
+	new->dac_command |= 0x02;
+
+#if 0
+	/* hw cursor regs */
+	new->sr20 = rdinx(0x3c4, 0x20);
+	new->sr21 = rdinx(0x3c4, 0x21);
+	new->sr22 = rdinx(0x3c4, 0x22);
+	new->sr23 = rdinx(0x3c4, 0x23);
+	new->sr24 = rdinx(0x3c4, 0x24);
+	new->sr25 = rdinx(0x3c4, 0x25);
+	new->sr26 = rdinx(0x3c4, 0x26);
+	new->sr27 = rdinx(0x3c4, 0x27);
+	new->sr29 = rdinx(0x3c4, 0x29);
+	new->sr2a = rdinx(0x3c4, 0x2a);
+	if ((pARK->Chipset == PCI_CHIP_2000PV) ||
+	    (pARK->Chipset == PCI_CHIP_2000MT)) {
+		new->sr28 = rdinx(0x3c4, 0x28);
+		new->sr2b = rdinx(0x3c4, 0x3b);
+	}
+#endif
+
+
+	ARKWriteMode(pScrn, pVga, new);
+
+	return TRUE;
+}
+
+
+static void ARKAdjustFrame(int scrnIndex, int x, int y, int flags)
+{
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+	ARKPtr pARK = ARKPTR(pScrn);
+	vgaHWPtr hwp = VGAHWPTR(pScrn);
+	int vgaIOBase = hwp->IOBase;
+	int base;
+
+	base = ((y * pScrn->displayWidth + x) *
+		(pScrn->bitsPerPixel / 8));
+
+	if (((pARK->Chipset == PCI_CHIP_2000PV) ||
+	     (pARK->Chipset == PCI_CHIP_2000MT)) &&
+	     (pScrn->videoRam >= 2048))
+		base >>= 3;
+	else
+		base >>= 2;
+	if (pScrn->bitsPerPixel == 24)
+		base -= base % 3;
+
+	outw(vgaIOBase + 4, (base & 0x00ff00) | 0x0c);
+	outw(vgaIOBase + 4, ((base & 0x00ff) << 8) | 0x0d);
+
+	modinx(vgaIOBase + 4, 0x40, 0x07, (base & 0x070000) >> 16);
+}
+
+
+
+static void ARKWriteMode(ScrnInfoPtr pScrn, vgaRegPtr pVga, ARKRegPtr new)
+{
+	ARKPtr pARK = ARKPTR(pScrn);
+	vgaHWPtr hwp = VGAHWPTR(pScrn);
+	int vgaIOBase = hwp->IOBase;
+
+	vgaHWProtect(pScrn, TRUE);
+
+	/* set read and write aperture index to 0 */
+	wrinx(0x3c4, 0x15, 0x00);
+	wrinx(0x3c4, 0x16, 0x00);
+
+	/* write the extended registers first so that textmode font
+	 * restoration can suceed
+	 */
+	wrinx(0x3c4, 0x10, new->sr10);
+	modinx(0x3c4, 0x11, 0x3f, new->sr11);
+	wrinx(0x3c4, 0x12, new->sr12);
+	wrinx(0x3c4, 0x13, new->sr13);
+	wrinx(0x3c4, 0x14, new->sr14);
+	wrinx(0x3c4, 0x15, new->sr15);
+	wrinx(0x3c4, 0x16, new->sr16);
+	wrinx(0x3c4, 0x17, new->sr17);
+
+#if 0
+	wrinx(0x3c4, 0x1c, new->sr1c);
+	wrinx(0x3c4, 0x1d, new->sr1d);
+
+	/* hw cursor regs */
+	wrinx(0x3c4, 0x20, new->sr20);
+	wrinx(0x3c4, 0x21, new->sr21);
+	wrinx(0x3c4, 0x22, new->sr22);
+	wrinx(0x3c4, 0x23, new->sr23);
+	wrinx(0x3c4, 0x24, new->sr24);
+	wrinx(0x3c4, 0x25, new->sr25);
+	wrinx(0x3c4, 0x26, new->sr26);
+	wrinx(0x3c4, 0x27, new->sr27);
+	wrinx(0x3c4, 0x29, new->sr29);
+	wrinx(0x3c4, 0x2a, new->sr2a);
+#endif
+
+	if ((pARK->Chipset == PCI_CHIP_2000PV) ||
+	    (pARK->Chipset == PCI_CHIP_2000MT)) {
+		wrinx(0x3c4, 0x28, new->sr28);
+		wrinx(0x3c4, 0x2B, new->sr2b);
+	}
+
+	wrinx(vgaIOBase + 4, 0x40, new->cr40);
+	wrinx(vgaIOBase + 4, 0x41, new->cr41);
+	wrinx(vgaIOBase + 4, 0x42, new->cr42);
+	wrinx(vgaIOBase + 4, 0x44, new->cr44);
+
+	if ((pARK->Chipset == PCI_CHIP_2000PV) ||
+	    (pARK->Chipset == PCI_CHIP_2000MT))
+		wrinx(vgaIOBase + 4, 0x46, new->cr46);
+
+	/* RAMDAC regs */
+	if (pARK->ramdac == ZOOMDAC) {
+		set_daccom(new->dac_command);
+	}
+
+	if (xf86IsPrimaryPci(pARK->PciInfo))
+		vgaHWRestore(pScrn, pVga, VGA_SR_ALL);
+	else
+		vgaHWRestore(pScrn, pVga, VGA_SR_MODE);
+
+	inb(0x3c8);
+	outb(0x3c6, 0xff);
+
+	vgaHWProtect(pScrn, FALSE);
+
+}
+
+
+static Bool ARKEnterVT(int scrnIndex, int flags)
+{
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+
+	if (!ARKModeInit(pScrn, pScrn->currentMode))
+		return FALSE;
+
+	ARKAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
+
+	return TRUE;
+}
+
+
+
+static void ARKLeaveVT(int scrnIndex, int flags)
+{
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+	ARKPtr pARK = ARKPTR(pScrn);
+	ARKRegPtr old = &pARK->SavedRegs;
+	vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+	ARKWriteMode(pScrn, &hwp->ModeReg, old);
+
+	vgaHWUnlock(hwp);
+	vgaHWRestore(pScrn, &hwp->SavedReg, VGA_SR_MODE | VGA_SR_FONTS);
+	vgaHWLock(hwp);
+
+	return;
+}
+
+
+static Bool ARKMapMem(ScrnInfoPtr pScrn)
+{
+	ARKPtr pARK = ARKPTR(pScrn);
+	vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+	/* extended to cover MMIO space at 0xB8000 */
+	hwp->MapSize = 0x20000;
+
+	pARK->MMIOBase = xf86MapVidMem(pScrn->scrnIndex, VIDMEM_MMIO,
+				       0xb8000, 0x8000);
+
+	pARK->FBBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
+				     pARK->PciTag, pARK->FBAddress,
+				     pScrn->videoRam * 1024);
+	if (!pARK->FBBase) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Cound not map framebuffer\n");
+		return FALSE;
+	}
+
+	return TRUE;
+}
+
+
+static void ARKUnmapMem(ScrnInfoPtr pScrn)
+{
+	ARKPtr pARK = ARKPTR(pScrn);
+
+	vgaHWUnmapMem(pScrn);
+
+	xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pARK->FBBase,
+			pScrn->videoRam * 1024);
+
+	return;
+}
+
+
+Bool ARKCloseScreen(int scrnIndex, ScreenPtr pScreen)
+{
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+	ARKPtr pARK = ARKPTR(pScrn);
+	vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+	if (pScrn->vtSema) {
+		vgaHWUnlock(hwp);
+		ARKWriteMode(pScrn, &hwp->SavedReg, &pARK->SavedRegs);
+		vgaHWLock(hwp);
+		ARKUnmapMem(pScrn);
+	}
+
+	pScrn->vtSema = FALSE;
+	pScreen->CloseScreen = pARK->CloseScreen;
+
+	return (*pScreen->CloseScreen)(scrnIndex, pScreen);
+}
+
+
+Bool ARKSaveScreen(ScreenPtr pScreen, int mode)
+{
+	return vgaHWSaveScreen(pScreen, mode);
+}
+
+
+Bool ARKSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
+{
+	return ARKModeInit(xf86Screens[scrnIndex], mode);
+}
+
+
+static void ARKLoadPalette(ScrnInfoPtr pScrn, int numColors,
+			   int *indicies, LOCO *colors,
+			   VisualPtr pVisual)
+{
+	int i, index;
+
+	for (i=0; i<numColors; i++) {
+		index = indicies[i];
+		outb(0x3c8, index);
+		outb(0x3c9, colors[index].red);
+		outb(0x3c9, colors[index].green);
+		outb(0x3c9, colors[index].blue);
+	}
+}
+
+
+static void ARKFreeScreen(int scrnIndex, int flags)
+{
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+
+	vgaHWFreeHWRec(pScrn);
+
+	ARKFreeRec(pScrn);
+}
+
+
+static unsigned char get_daccomm()
+{
+	unsigned char tmp;
+
+	outb(0x3c8, 0);
+	inb(0x3c6);
+	inb(0x3c6);
+	inb(0x3c6);
+	inb(0x3c6);
+	tmp = inb(0x3c6);
+	outb(0x3c8, 0);
+
+	return tmp;
+}
+
+
+static unsigned char set_daccom(unsigned char comm)
+{
+#if 0
+	outb(0x3c8, 0);
+#else
+	inb(0x3c8);
+#endif
+	inb(0x3c6);
+	inb(0x3c6);
+	inb(0x3c6);
+	inb(0x3c6);
+	outb(0x3c6, comm);
+#if 0
+	outb(0x3c8, 0);
+#else
+	inb(0x3c8);
+#endif
+
+	return inb(0x3c6);
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_reg.h
new file mode 100644
index 000000000..43bb7838f
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_reg.h
@@ -0,0 +1,88 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ark/ark_reg.h,v 1.1 2000/11/14 17:28:13 dawes Exp $ */
+
+#ifndef _ARK_REG_H
+#define _ARK_REG_H
+
+/* and let there be no 'u' in color */
+#define BG_COLOR		0x00
+#define FG_COLOR		0x02
+#define BG_COLOR_HI		0x04
+#define FG_COLOR_HI		0x06
+#define TRANS_COLOR		0x08
+#define TRANS_COLOR_MSK		0x0a
+#define TRANS_COLOR_HI		0x0c
+#define TRANS_COLOR_MSK_HI	0x0e
+#define COLOR_MIX_SEL		0x18
+#define WRITE_PLANEMASK		0x1a
+#define	ERROR_TERM		0x50
+#define AXIAL_ERROR_INC		0x54
+#define STENCIL_PITCH		0x60
+#define SRC_PITCH		0x62
+#define DST_PITCH		0x64
+#define STENCIL_ADDR		0x68
+#define	STENCIL_X		0x68
+#define STENCIL_Y		0x6a
+#define	SRC_ADDR		0x6c
+#define SRC_X			0x6c
+#define SRC_Y			0x6e
+#define DST_ADDR		0x70
+#define DST_X			0x70
+#define DST_Y			0x72
+#define WIDTH			0x74
+#define HEIGHT			0x76
+#define BITMAP_CONFIG		0x7c
+#define COMMAND			0x7e
+
+
+/* constants for COMMAND register */
+
+#define DRAWSTEP		0x0000
+#define LINEDRAW		0x1000
+#define BITBLT			0x2000
+#define TEXTBITBLT		0x3000
+#define USE_PLANEMASK		0x0000
+#define DISABLE_PLANEMASK	0x0800
+#define PATTERN_8X8		0x0400
+#define SELECT_BG_COLOR		0x0000
+#define BG_BITMAP		0x0200
+#define SELECT_FG_COLOR		0x0000
+#define FG_BITMAP		0x0100
+#define STENCIL_ONES		0x0000
+#define STENCIL_GENERATED	0x0040
+#define STENCIL_BITMAP		0x0080
+#define LINE_DRAWALL		0x0000
+#define LINE_SKIP_FIRST		0x0010
+#define LINE_SKIP_LAST		0x0020
+#define ENABLE_CLIPPING		0x0000
+#define DISABLE_CLIPPING	0x0008
+#undef DOWN
+#define DOWN			0x0000
+#undef UP
+#define UP			0x0002
+#define RIGHT			0x0000
+#define LEFT			0x0004
+#define DX_GREATER_THAN_DY	0x0000
+#define DY_GREATER_THAN_DX	0x0001
+
+
+/* constants for bitmap config register */
+
+#define SWAP_NIBLES		0x2000
+#define SWAP_BITS		0x1000
+#define SYSTEM_STENCIL		0x0200
+#define LINEAR_STENCIL_ADDR	0x0100
+#define SYSTEM_SRC		0x0020
+#define LINEAR_SRC_ADDR		0x0010
+#define SYSTEM_DST		0x0002
+#define LINEAR_DST_ADDR		0x0001
+
+
+/* IO macros */
+
+#define OUTREG16(offset, value)	\
+	*(unsigned short *)(pARK->MMIOBase + offset) = value
+#define OUTREG(offset, value) \
+	*(unsigned int *)(pARK->MMIOBase + offset) = value
+
+
+#endif /* _ARK_REG_H */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h
index cde3f03f6..680d076f0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h
@@ -1,34 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.1 2000/11/02 16:55:29 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.2 2000/11/09 03:24:35 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                      Precision Insight, Inc., Cedar Park, Texas, and
+ *                      VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
+ * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Rickard E. Faith <faith@precisioninsight.com>
- *   Kevin E. Martin <kevin@precisioninsight.com>
+ *   Rickard E. Faith <faith@valinux.com>
+ *   Kevin E. Martin <martin@valinux.com>
  *
  */
 
@@ -79,17 +82,17 @@
 #include "picturestr.h"
 #endif
 
-#define R128_DEBUG    0		/* Turn off debugging output		    */
-#define R128_TIMEOUT  2000000	/* Fall out of wait loops after this count */
+#define R128_DEBUG    0         /* Turn off debugging output                */
+#define R128_TIMEOUT  2000000   /* Fall out of wait loops after this count */
 #define R128_MMIOSIZE 0x80000
 
 #define R128_VBIOS_SIZE 0x00010000
 
 #if R128_DEBUG
-#define R128TRACE(x)					      \
-    do {						      \
+#define R128TRACE(x)                                          \
+    do {                                                      \
 	ErrorF("(**) %s(%d): ", R128_NAME, pScrn->scrnIndex); \
-	ErrorF x;					      \
+	ErrorF x;                                             \
     } while (0);
 #else
 #define R128TRACE(x)
@@ -101,16 +104,16 @@
 #define R128_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))
 #define R128PTR(pScrn) ((R128InfoPtr)(pScrn)->driverPrivate)
 
-typedef struct {	/* All values in XCLKS	  */
-    int	 ML;		/* Memory Read Latency	  */
-    int	 MB;		/* Memory Burst Length	  */
-    int	 Trcd;		/* RAS to CAS delay	  */
-    int	 Trp;		/* RAS percentage	  */
-    int	 Twr;		/* Write Recovery	  */
-    int	 CL;		/* CAS Latency		  */
-    int	 Tr2w;		/* Read to Write Delay	  */
-    int	 Rloop;		/* Loop Latency		  */
-    int	 Rloop_fudge;	/* Add to ML to get Rloop */
+typedef struct {        /* All values in XCLKS    */
+    int  ML;            /* Memory Read Latency    */
+    int  MB;            /* Memory Burst Length    */
+    int  Trcd;          /* RAS to CAS delay       */
+    int  Trp;           /* RAS percentage         */
+    int  Twr;           /* Write Recovery         */
+    int  CL;            /* CAS Latency            */
+    int  Tr2w;          /* Read to Write Delay    */
+    int  Rloop;         /* Loop Latency           */
+    int  Rloop_fudge;   /* Add to ML to get Rloop */
     char *name;
 } R128RAMRec, *R128RAMPtr;
 
@@ -167,8 +170,8 @@ typedef struct {
 				/* Computed values for PLL */
     CARD32     dot_clock_freq;
     CARD32     pll_output_freq;
-    int	       feedback_div;
-    int	       post_div;
+    int        feedback_div;
+    int        post_div;
 
 				/* PLL registers */
     CARD32     ppll_ref_div;
@@ -185,211 +188,211 @@ typedef struct {
 } R128SaveRec, *R128SavePtr;
 
 typedef struct {
-    CARD16	  reference_freq;
-    CARD16	  reference_div;
-    CARD32	  min_pll_freq;
-    CARD32	  max_pll_freq;
-    CARD16	  xclk;
+    CARD16        reference_freq;
+    CARD16        reference_div;
+    CARD32        min_pll_freq;
+    CARD32        max_pll_freq;
+    CARD16        xclk;
 } R128PLLRec, *R128PLLPtr;
 
 typedef struct {
-    int		       bitsPerPixel;
-    int		       depth;
-    int		       displayWidth;
-    int		       pixel_code;
-    int		       pixel_bytes;
+    int                bitsPerPixel;
+    int                depth;
+    int                displayWidth;
+    int                pixel_code;
+    int                pixel_bytes;
     DisplayModePtr     mode;
 } R128FBLayout;
 
 typedef struct {
     EntityInfoPtr     pEnt;
-    pciVideoPtr	      PciInfo;
-    PCITAG	      PciTag;
-    int		      Chipset;
-    Bool	      Primary;
+    pciVideoPtr       PciInfo;
+    PCITAG            PciTag;
+    int               Chipset;
+    Bool              Primary;
 
-    Bool	      FBDev;
+    Bool              FBDev;
 
-    unsigned long     LinearAddr; /* Frame buffer physical address	     */
-    unsigned long     MMIOAddr;	  /* MMIO region physical address	     */
-    unsigned long     BIOSAddr;	  /* BIOS physical address		     */
-    Bool	      BIOSFromPCI; /* BIOS is read from PCI space	     */
+    unsigned long     LinearAddr;   /* Frame buffer physical address         */
+    unsigned long     MMIOAddr;     /* MMIO region physical address          */
+    unsigned long     BIOSAddr;     /* BIOS physical address                 */
+    Bool              BIOSFromPCI;  /* BIOS is read from PCI space           */
 
-    unsigned char     *MMIO;	  /* Map of MMIO region			     */
-    unsigned char     *FB;	  /* Map of frame buffer		     */
+    unsigned char     *MMIO;        /* Map of MMIO region                    */
+    unsigned char     *FB;          /* Map of frame buffer                   */
 
-    CARD32	      MemCntl;
-    CARD32	      BusCntl;
-    unsigned long     FbMapSize;  /* Size of frame buffer, in bytes	     */
-    int		      Flags;	  /* Saved copy of mode flags		     */
+    CARD32            MemCntl;
+    CARD32            BusCntl;
+    unsigned long     FbMapSize;    /* Size of frame buffer, in bytes        */
+    int               Flags;        /* Saved copy of mode flags              */
 
-    Bool	      HasPanelRegs; /* Current chip can connect to a FP	     */
-    Bool	      CRTOnly;	    /* Only use External CRT instead of FP   */
-    CARD8	      *VBIOS;	    /* Video BIOS for mode validation on FPs */
-    int		      FPBIOSstart;  /* Start of the flat panel info	     */
+    Bool              HasPanelRegs; /* Current chip can connect to a FP      */
+    Bool              CRTOnly;      /* Only use External CRT instead of FP   */
+    CARD8             *VBIOS;       /* Video BIOS for mode validation on FPs */
+    int               FPBIOSstart;  /* Start of the flat panel info          */
 
 				/* Computed values for FPs */
-    int		      PanelXRes;
-    int		      PanelYRes;
-    int		      PanelPwrDly;
+    int               PanelXRes;
+    int               PanelYRes;
+    int               PanelPwrDly;
 
-    R128PLLRec	      pll;
-    R128RAMPtr	      ram;
+    R128PLLRec        pll;
+    R128RAMPtr        ram;
 
-    R128SaveRec	      SavedReg;	  /* Original (text) mode		     */
-    R128SaveRec	      ModeReg;	  /* Current mode			     */
-    Bool	      (*CloseScreen)(int, ScreenPtr);
+    R128SaveRec       SavedReg;     /* Original (text) mode                  */
+    R128SaveRec       ModeReg;      /* Current mode                          */
+    Bool              (*CloseScreen)(int, ScreenPtr);
 
-    Bool	      PaletteSavedOnVT; /* Palette saved on last VT switch   */
+    Bool              PaletteSavedOnVT; /* Palette saved on last VT switch   */
 
     XAAInfoRecPtr     accel;
-    Bool	      accelOn;
+    Bool              accelOn;
     xf86CursorInfoPtr cursor;
     unsigned long     cursor_start;
     unsigned long     cursor_end;
 
-    int		      fifo_slots; /* Free slots in the FIFO (64 max)	     */
-    int		      pix24bpp;	  /* Depth of pixmap for 24bpp framebuffer   */
-    Bool	      dac6bits;	  /* Use 6 bit DAC?			     */
+    int               fifo_slots;   /* Free slots in the FIFO (64 max)       */
+    int               pix24bpp;     /* Depth of pixmap for 24bpp framebuffer */
+    Bool              dac6bits;     /* Use 6 bit DAC?                        */
 
 				/* Computed values for Rage 128 */
-    int		      pitch;
-    int		      datatype;
-    CARD32	      dp_gui_master_cntl;
+    int               pitch;
+    int               datatype;
+    CARD32            dp_gui_master_cntl;
 
 				/* Saved values for ScreenToScreenCopy */
-    int		      xdir;
-    int		      ydir;
+    int               xdir;
+    int               ydir;
 
 				/* ScanlineScreenToScreenColorExpand support */
     unsigned char     *scratch_buffer[1];
     unsigned char     *scratch_save;
-    int		      scanline_x;
-    int		      scanline_y;
-    int		      scanline_h;
-    int		      scanline_h_w;
-    int		      scanline_words;
-    int		      scanline_direct;
-    int		      scanline_bpp; /* Only used for ImageWrite */
-
-    DGAModePtr	      DGAModes;
-    int		      numDGAModes;
-    Bool	      DGAactive;
-    int		      DGAViewportStatus;
+    int               scanline_x;
+    int               scanline_y;
+    int               scanline_h;
+    int               scanline_h_w;
+    int               scanline_words;
+    int               scanline_direct;
+    int               scanline_bpp; /* Only used for ImageWrite */
+
+    DGAModePtr        DGAModes;
+    int               numDGAModes;
+    Bool              DGAactive;
+    int               DGAViewportStatus;
 
     R128FBLayout      CurrentLayout;
 #ifdef XF86DRI
-    Bool	      directRenderingEnabled;
-    DRIInfoPtr	      pDRIInfo;
-    int		      drmFD;
-    int		      numVisualConfigs;
+    Bool              directRenderingEnabled;
+    DRIInfoPtr        pDRIInfo;
+    int               drmFD;
+    int               numVisualConfigs;
     __GLXvisualConfig *pVisualConfigs;
     R128ConfigPrivPtr pVisualConfigsPriv;
 
-    drmHandle	      fbHandle;
+    drmHandle         fbHandle;
 
-    drmSize	      registerSize;
-    drmHandle	      registerHandle;
+    drmSize           registerSize;
+    drmHandle         registerHandle;
 
-    Bool	      IsPCI;		/* Current card is a PCI card */
+    Bool              IsPCI;            /* Current card is a PCI card */
 
-    drmSize	      agpSize;
-    drmHandle	      agpMemHandle;	/* Handle from drmAgpAlloc */
+    drmSize           agpSize;
+    drmHandle         agpMemHandle;     /* Handle from drmAgpAlloc */
     unsigned long     agpOffset;
-    unsigned char     *AGP;		/* Map */
-    int		      agpMode;
+    unsigned char     *AGP;             /* Map */
+    int               agpMode;
 
-    Bool	      CCEInUse;		/* CCE is currently active */
-    int		      CCEMode;		/* CCE mode that server/clients use */
-    int		      CCEFifoSize;	/* Size of the CCE command FIFO */
-    Bool	      CCESecure;	/* CCE security enabled */
-    int		      CCEusecTimeout;	/* CCE timeout in usecs */
-    Bool	      CCE2D;		/* CCE is used for X server 2D prims */
+    Bool              CCEInUse;         /* CCE is currently active */
+    int               CCEMode;          /* CCE mode that server/clients use */
+    int               CCEFifoSize;      /* Size of the CCE command FIFO */
+    Bool              CCESecure;        /* CCE security enabled */
+    int               CCEusecTimeout;   /* CCE timeout in usecs */
+    Bool              CCE2D;            /* CCE is used for X server 2D prims */
 
 				/* CCE ring buffer data */
-    unsigned long     ringStart;	/* Offset into AGP space */
-    drmHandle	      ringHandle;	/* Handle from drmAddMap */
-    drmSize	      ringMapSize;	/* Size of map */
-    int		      ringSize;		/* Size of ring (in MB) */
-    unsigned char     *ring;		/* Map */
-    int		      ringSizeLog2QW;
-
-    unsigned long     ringReadOffset;	/* Offset into AGP space */
-    drmHandle	      ringReadPtrHandle; /* Handle from drmAddMap */
-    drmSize	      ringReadMapSize;	/* Size of map */
-    unsigned char     *ringReadPtr;	/* Map */
+    unsigned long     ringStart;        /* Offset into AGP space */
+    drmHandle         ringHandle;       /* Handle from drmAddMap */
+    drmSize           ringMapSize;      /* Size of map */
+    int               ringSize;         /* Size of ring (in MB) */
+    unsigned char     *ring;            /* Map */
+    int               ringSizeLog2QW;
+
+    unsigned long     ringReadOffset;   /* Offset into AGP space */
+    drmHandle         ringReadPtrHandle; /* Handle from drmAddMap */
+    drmSize           ringReadMapSize;  /* Size of map */
+    unsigned char     *ringReadPtr;     /* Map */
 
 				/* CCE vertex buffer data */
-    unsigned long     vbStart;		/* Offset into AGP space */
-    drmHandle	      vbHandle;		/* Handle from drmAddMap */
-    drmSize	      vbMapSize;	/* Size of map */
-    int		      vbSize;		/* Size of vert bufs (in MB) */
-    unsigned char     *vb;		/* Map */
-    int		      vbBufSize;	/* Size of individual vert buf */
-    int		      vbNumBufs;	/* Number of vert bufs */
-    drmBufMapPtr      vbBufs;		/* Buffer map */
+    unsigned long     vbStart;          /* Offset into AGP space */
+    drmHandle         vbHandle;         /* Handle from drmAddMap */
+    drmSize           vbMapSize;        /* Size of map */
+    int               vbSize;           /* Size of vert bufs (in MB) */
+    unsigned char     *vb;              /* Map */
+    int               vbBufSize;        /* Size of individual vert buf */
+    int               vbNumBufs;        /* Number of vert bufs */
+    drmBufMapPtr      vbBufs;           /* Buffer map */
 
 				/* CCE indirect buffer data */
-    unsigned long     indStart;		/* Offset into AGP space */
-    drmHandle	      indHandle;	/* Handle from drmAddMap */
-    drmSize	      indMapSize;	/* Size of map */
-    int		      indSize;		/* Size of indirect bufs (in MB) */
-    unsigned char     *ind;		/* Map */
+    unsigned long     indStart;         /* Offset into AGP space */
+    drmHandle         indHandle;        /* Handle from drmAddMap */
+    drmSize           indMapSize;       /* Size of map */
+    int               indSize;          /* Size of indirect bufs (in MB) */
+    unsigned char     *ind;             /* Map */
 
 				/* CCE AGP Texture data */
-    unsigned long     agpTexStart;	/* Offset into AGP space */
-    drmHandle	      agpTexHandle;	/* Handle from drmAddMap */
-    drmSize	      agpTexMapSize;	/* Size of map */
-    int		      agpTexSize;	/* Size of AGP tex space (in MB) */
-    unsigned char     *agpTex;		/* Map */
-    int		      log2AGPTexGran;
+    unsigned long     agpTexStart;      /* Offset into AGP space */
+    drmHandle         agpTexHandle;     /* Handle from drmAddMap */
+    drmSize           agpTexMapSize;    /* Size of map */
+    int               agpTexSize;       /* Size of AGP tex space (in MB) */
+    unsigned char     *agpTex;          /* Map */
+    int               log2AGPTexGran;
 
 				/* DRI screen private data */
-    int		      fbX;
-    int		      fbY;
-    int		      backX;
-    int		      backY;
-    int		      depthX;
-    int		      depthY;
-    int		      textureX;
-    int		      textureY;
-    int		      textureSize;
-    int		      log2TexGran;
+    int               fbX;
+    int               fbY;
+    int               backX;
+    int               backY;
+    int               depthX;
+    int               depthY;
+    int               textureX;
+    int               textureY;
+    int               textureSize;
+    int               log2TexGran;
 #endif
     XF86VideoAdaptorPtr adaptor;
 } R128InfoRec, *R128InfoPtr;
 
-#define R128WaitForFifo(pScrn, entries)					     \
-do {									     \
+#define R128WaitForFifo(pScrn, entries)                                      \
+do {                                                                         \
     if (info->fifo_slots < entries) R128WaitForFifoFunction(pScrn, entries); \
-    info->fifo_slots -= entries;					     \
+    info->fifo_slots -= entries;                                             \
 } while (0)
 
-extern void	   R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
-extern void	   R128WaitForIdle(ScrnInfoPtr pScrn);
-extern void	   R128EngineReset(ScrnInfoPtr pScrn);
-extern void	   R128EngineFlush(ScrnInfoPtr pScrn);
+extern void        R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
+extern void        R128WaitForIdle(ScrnInfoPtr pScrn);
+extern void        R128EngineReset(ScrnInfoPtr pScrn);
+extern void        R128EngineFlush(ScrnInfoPtr pScrn);
 
-extern int	   R128INPLL(ScrnInfoPtr pScrn, int addr);
-extern void	   R128WaitForVerticalSync(ScrnInfoPtr pScrn);
+extern int         R128INPLL(ScrnInfoPtr pScrn, int addr);
+extern void        R128WaitForVerticalSync(ScrnInfoPtr pScrn);
 
-extern Bool	   R128AccelInit(ScreenPtr pScreen);
-extern void	   R128EngineInit(ScrnInfoPtr pScrn);
-extern Bool	   R128CursorInit(ScreenPtr pScreen);
-extern Bool	   R128DGAInit(ScreenPtr pScreen);
+extern Bool        R128AccelInit(ScreenPtr pScreen);
+extern void        R128EngineInit(ScrnInfoPtr pScrn);
+extern Bool        R128CursorInit(ScreenPtr pScreen);
+extern Bool        R128DGAInit(ScreenPtr pScreen);
 
-extern int	   R128MinBits(int val);
+extern int         R128MinBits(int val);
 
-extern void	   R128InitVideo(ScreenPtr pScreen);
+extern void        R128InitVideo(ScreenPtr pScreen);
 
 #ifdef XF86DRI
-extern Bool	   R128DRIScreenInit(ScreenPtr pScreen);
-extern void	   R128DRICloseScreen(ScreenPtr pScreen);
-extern Bool	   R128DRIFinishScreenInit(ScreenPtr pScreen);
-extern void	   R128CCEStart(ScrnInfoPtr pScrn);
-extern void	   R128CCEStop(ScrnInfoPtr pScrn);
-extern void	   R128CCEResetRing(ScrnInfoPtr pScrn);
-extern void	   R128CCEWaitForIdle(ScrnInfoPtr pScrn);
+extern Bool        R128DRIScreenInit(ScreenPtr pScreen);
+extern void        R128DRICloseScreen(ScreenPtr pScreen);
+extern Bool        R128DRIFinishScreenInit(ScreenPtr pScreen);
+extern void        R128CCEStart(ScrnInfoPtr pScrn);
+extern void        R128CCEStop(ScrnInfoPtr pScrn);
+extern void        R128CCEResetRing(ScrnInfoPtr pScrn);
+extern void        R128CCEWaitForIdle(ScrnInfoPtr pScrn);
 #endif
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c
index 7595b7fe4..5b68c8cd3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c
@@ -1,34 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c,v 1.1 2000/11/02 16:55:30 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c,v 1.2 2000/11/09 03:24:35 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                      Precision Insight, Inc., Cedar Park, Texas, and
+ *                      VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
+ * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Rickard E. Faith <faith@precisioninsight.com>
- *   Kevin E. Martin <kevin@precisioninsight.com>
+ *   Rickard E. Faith <faith@valinux.com>
+ *   Kevin E. Martin <martin@valinux.com>
  *   Alan Hourihane <ahourihane@valinux.com>
  *
  * Credits:
@@ -49,33 +52,33 @@
  * Notes on unimplemented XAA optimizations:
  *
  *   SetClipping:   The Rage128 doesn't support the full 16bit registers needed
- *		    for XAA clip rect support.
+ *                  for XAA clip rect support.
  *   SolidFillTrap: This will probably work if we can compute the correct
- *		    Bresenham error values.
+ *                  Bresenham error values.
  *   TwoPointLine:  The Rage 128 supports Bresenham lines instead.
  *   DashedLine with non-power-of-two pattern length: Apparently, there is
- *		    no way to set the length of the pattern -- it is always
- *		    assumed to be 8 or 32 (or 1024?).
+ *                  no way to set the length of the pattern -- it is always
+ *                  assumed to be 8 or 32 (or 1024?).
  *   ScreenToScreenColorExpandFill: See p. 4-17 of the Technical Reference
- *		    Manual where it states that monochrome expansion of frame
- *		    buffer data is not supported.
+ *                  Manual where it states that monochrome expansion of frame
+ *                  buffer data is not supported.
  *   CPUToScreenColorExpandFill, direct: The implementation here uses a hybrid
- *		    direct/indirect method.  If we had more data registers,
- *		    then we could do better.  If XAA supported a trigger write
- *		    address, the code would be simpler.
+ *                  direct/indirect method.  If we had more data registers,
+ *                  then we could do better.  If XAA supported a trigger write
+ *                  address, the code would be simpler.
  * (Alan Hourihane) Update. We now use purely indirect and clip the full
- *		    rectangle. Seems as the direct method has some problems
- *		    with this, although this indirect method is much faster
- *		    than the old method of setting up the engine per scanline.
- *		    This code was the basis of the Radeon work we did.
+ *                  rectangle. Seems as the direct method has some problems
+ *                  with this, although this indirect method is much faster
+ *                  than the old method of setting up the engine per scanline.
+ *                  This code was the basis of the Radeon work we did.
  *   Color8x8PatternFill: Apparently, an 8x8 color brush cannot take an 8x8
- *		    pattern from frame buffer memory.
+ *                  pattern from frame buffer memory.
  *   ImageWrites:   See CPUToScreenColorExpandFill.
  *
  */
 
-#define R128_IMAGEWRITE 0	/* Disable ImageWrites - faster in software */
-#define R128_TRAPEZOIDS 0	/* Trapezoids don't work	       */
+#define R128_IMAGEWRITE 0       /* Disable ImageWrites - faster in software */
+#define R128_TRAPEZOIDS 0       /* Trapezoids don't work               */
 
 				/* X and server generic header files */
 #include "Xarch.h"
@@ -99,30 +102,30 @@ static struct {
     int rop;
     int pattern;
 } R128_ROP[] = {
-    { R128_ROP3_ZERO, R128_ROP3_ZERO }, /* GXclear	  */
-    { R128_ROP3_DSa,  R128_ROP3_DPa  }, /* Gxand	  */
-    { R128_ROP3_SDna, R128_ROP3_PDna }, /* GXandReverse	  */
-    { R128_ROP3_S,    R128_ROP3_P    }, /* GXcopy	  */
+    { R128_ROP3_ZERO, R128_ROP3_ZERO }, /* GXclear        */
+    { R128_ROP3_DSa,  R128_ROP3_DPa  }, /* Gxand          */
+    { R128_ROP3_SDna, R128_ROP3_PDna }, /* GXandReverse   */
+    { R128_ROP3_S,    R128_ROP3_P    }, /* GXcopy         */
     { R128_ROP3_DSna, R128_ROP3_DPna }, /* GXandInverted  */
-    { R128_ROP3_D,    R128_ROP3_D    }, /* GXnoop	  */
-    { R128_ROP3_DSx,  R128_ROP3_DPx  }, /* GXxor	  */
-    { R128_ROP3_DSo,  R128_ROP3_DPo  }, /* GXor		  */
-    { R128_ROP3_DSon, R128_ROP3_DPon }, /* GXnor	  */
-    { R128_ROP3_DSxn, R128_ROP3_PDxn }, /* GXequiv	  */
-    { R128_ROP3_Dn,   R128_ROP3_Dn   }, /* GXinvert	  */
-    { R128_ROP3_SDno, R128_ROP3_PDno }, /* GXorReverse	  */
+    { R128_ROP3_D,    R128_ROP3_D    }, /* GXnoop         */
+    { R128_ROP3_DSx,  R128_ROP3_DPx  }, /* GXxor          */
+    { R128_ROP3_DSo,  R128_ROP3_DPo  }, /* GXor           */
+    { R128_ROP3_DSon, R128_ROP3_DPon }, /* GXnor          */
+    { R128_ROP3_DSxn, R128_ROP3_PDxn }, /* GXequiv        */
+    { R128_ROP3_Dn,   R128_ROP3_Dn   }, /* GXinvert       */
+    { R128_ROP3_SDno, R128_ROP3_PDno }, /* GXorReverse    */
     { R128_ROP3_Sn,   R128_ROP3_Pn   }, /* GXcopyInverted */
-    { R128_ROP3_DSno, R128_ROP3_DPno }, /* GXorInverted	  */
-    { R128_ROP3_DSan, R128_ROP3_DPan }, /* GXnand	  */
-    { R128_ROP3_ONE,  R128_ROP3_ONE  }	/* GXset	  */
+    { R128_ROP3_DSno, R128_ROP3_DPno }, /* GXorInverted   */
+    { R128_ROP3_DSan, R128_ROP3_DPan }, /* GXnand         */
+    { R128_ROP3_ONE,  R128_ROP3_ONE  }  /* GXset          */
 };
 
 /* Flush all dirty data in the Pixel Cache to memory. */
 void R128EngineFlush(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     OUTREGP(R128_PC_NGUI_CTLSTAT, R128_PC_FLUSH_ALL, ~R128_PC_FLUSH_ALL);
     for (i = 0; i < R128_TIMEOUT; i++) {
@@ -133,16 +136,16 @@ void R128EngineFlush(ScrnInfoPtr pScrn)
 /* Reset graphics card to known state. */
 void R128EngineReset(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    CARD32	  clock_cntl_index;
-    CARD32	  mclk_cntl;
-    CARD32	  gen_reset_cntl;
+    CARD32        clock_cntl_index;
+    CARD32        mclk_cntl;
+    CARD32        gen_reset_cntl;
 
     R128EngineFlush(pScrn);
 
     clock_cntl_index = INREG(R128_CLOCK_CNTL_INDEX);
-    mclk_cntl	     = INPLL(pScrn, R128_MCLK_CNTL);
+    mclk_cntl        = INPLL(pScrn, R128_MCLK_CNTL);
 
     OUTPLL(R128_MCLK_CNTL, mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CP);
 
@@ -153,9 +156,9 @@ void R128EngineReset(ScrnInfoPtr pScrn)
     OUTREG(R128_GEN_RESET_CNTL, gen_reset_cntl & ~R128_SOFT_RESET_GUI);
     INREG(R128_GEN_RESET_CNTL);
 
-    OUTPLL(R128_MCLK_CNTL,	  mclk_cntl);
+    OUTPLL(R128_MCLK_CNTL,        mclk_cntl);
     OUTREG(R128_CLOCK_CNTL_INDEX, clock_cntl_index);
-    OUTREG(R128_GEN_RESET_CNTL,	  gen_reset_cntl);
+    OUTREG(R128_GEN_RESET_CNTL,   gen_reset_cntl);
 
 #ifdef XF86DRI
     if (R128CCE_USE_RING_BUFFER(info->CCEMode)) R128CCEResetRing(pScrn);
@@ -166,9 +169,9 @@ void R128EngineReset(ScrnInfoPtr pScrn)
    these slots are empty. */
 void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     for (;;) {
 	for (i = 0; i < R128_TIMEOUT; i++) {
@@ -189,13 +192,13 @@ void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
 }
 
 /* Wait for the graphics engine to be completely idle: the FIFO has
-   drained, the Pixel Cache is flushed, and the engine is idle.	 This is a
+   drained, the Pixel Cache is flushed, and the engine is idle.  This is a
    standard "sync" function that will make the hardware "quiescent". */
 void R128WaitForIdle(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     R128WaitForFifoFunction(pScrn, 64);
 
@@ -223,7 +226,7 @@ void R128WaitForIdle(ScrnInfoPtr pScrn)
 static void R128SetupForSolidFill(ScrnInfoPtr pScrn,
 				  int color, int rop, unsigned int planemask)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     R128WaitForFifo(pScrn, 4);
@@ -232,8 +235,8 @@ static void R128SetupForSolidFill(ScrnInfoPtr pScrn,
 				     | R128_GMC_SRC_DATATYPE_COLOR
 				     | R128_ROP[rop].pattern));
     OUTREG(R128_DP_BRUSH_FRGD_CLR,  color);
-    OUTREG(R128_DP_WRITE_MASK,	    planemask);
-    OUTREG(R128_DP_CNTL,	    (R128_DST_X_LEFT_TO_RIGHT
+    OUTREG(R128_DP_WRITE_MASK,      planemask);
+    OUTREG(R128_DP_CNTL,            (R128_DST_X_LEFT_TO_RIGHT
 				     | R128_DST_Y_TOP_TO_BOTTOM));
 }
 
@@ -244,11 +247,11 @@ static void R128SetupForSolidFill(ScrnInfoPtr pScrn,
 static void  R128SubsequentSolidFillRect(ScrnInfoPtr pScrn,
 					 int x, int y, int w, int h)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     R128WaitForFifo(pScrn, 2);
-    OUTREG(R128_DST_Y_X,	  (y << 16) | x);
+    OUTREG(R128_DST_Y_X,          (y << 16) | x);
     OUTREG(R128_DST_WIDTH_HEIGHT, (w << 16) | h);
 }
 
@@ -256,7 +259,7 @@ static void  R128SubsequentSolidFillRect(ScrnInfoPtr pScrn,
 static void R128SetupForSolidLine(ScrnInfoPtr pScrn,
 				  int color, int rop, unsigned int planemask)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     R128WaitForFifo(pScrn, 3);
@@ -265,7 +268,7 @@ static void R128SetupForSolidLine(ScrnInfoPtr pScrn,
 				     | R128_GMC_SRC_DATATYPE_COLOR
 				     | R128_ROP[rop].pattern));
     OUTREG(R128_DP_BRUSH_FRGD_CLR,  color);
-    OUTREG(R128_DP_WRITE_MASK,	    planemask);
+    OUTREG(R128_DP_WRITE_MASK,      planemask);
 }
 
 
@@ -277,44 +280,44 @@ static void R128SetupForSolidLine(ScrnInfoPtr pScrn,
    Mark Vojkovich's linetest program, posted 2Jun99 to devel@xfree86.org.]
 
    x11perf -line500
-			       1024x768@76Hz   1024x768@76Hz
-					8bpp	       32bpp
-   not used:			 39700.0/sec	 34100.0/sec
-   used:			 47600.0/sec	 36800.0/sec
+                               1024x768@76Hz   1024x768@76Hz
+                                        8bpp           32bpp
+   not used:                     39700.0/sec     34100.0/sec
+   used:                         47600.0/sec     36800.0/sec
 */
 static void R128SubsequentSolidBresenhamLine(ScrnInfoPtr pScrn,
 					     int x, int y,
 					     int major, int minor,
 					     int err, int len, int octant)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  flags	    = 0;
+    int           flags     = 0;
 
-    if (octant & YMAJOR)	 flags |= R128_DST_Y_MAJOR;
+    if (octant & YMAJOR)         flags |= R128_DST_Y_MAJOR;
     if (!(octant & XDECREASING)) flags |= R128_DST_X_DIR_LEFT_TO_RIGHT;
     if (!(octant & YDECREASING)) flags |= R128_DST_Y_DIR_TOP_TO_BOTTOM;
 
     R128WaitForFifo(pScrn, 6);
     OUTREG(R128_DP_CNTL_XDIR_YDIR_YMAJOR, flags);
-    OUTREG(R128_DST_Y_X,		  (y << 16) | x);
-    OUTREG(R128_DST_BRES_ERR,		  err);
-    OUTREG(R128_DST_BRES_INC,		  minor);
-    OUTREG(R128_DST_BRES_DEC,		  -major);
-    OUTREG(R128_DST_BRES_LNTH,		  len);
+    OUTREG(R128_DST_Y_X,                  (y << 16) | x);
+    OUTREG(R128_DST_BRES_ERR,             err);
+    OUTREG(R128_DST_BRES_INC,             minor);
+    OUTREG(R128_DST_BRES_DEC,             -major);
+    OUTREG(R128_DST_BRES_LNTH,            len);
 }
 
 /* Subsequent XAA solid horizontal and vertical lines
 
    1024x768@76Hz 8bpp
-			     Without		 With
-   x11perf -hseg500	 87600.0/sec	 798000.0/sec
-   x11perf -vseg500	 38100.0/sec	  38000.0/sec
+                             Without             With
+   x11perf -hseg500      87600.0/sec     798000.0/sec
+   x11perf -vseg500      38100.0/sec      38000.0/sec
 */
 static void R128SubsequentSolidHorVertLine(ScrnInfoPtr pScrn,
 					   int x, int y, int len, int dir )
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     R128WaitForFifo(pScrn, 1);
@@ -337,24 +340,24 @@ static void R128SubsequentSolidHorVertLine(ScrnInfoPtr pScrn,
    speed-up on appropriately-sized patterns.
 
    1024x768@76Hz 8bpp
-			     Without		 With
-   x11perf -dseg100	218000.0/sec	 222000.0/sec
-   x11perf -dline100	215000.0/sec	 221000.0/sec
-   x11perf -ddline100	178000.0/sec	 180000.0/sec
+                             Without             With
+   x11perf -dseg100     218000.0/sec     222000.0/sec
+   x11perf -dline100    215000.0/sec     221000.0/sec
+   x11perf -ddline100   178000.0/sec     180000.0/sec
 */
 static void R128SetupForDashedLine(ScrnInfoPtr pScrn,
 				   int fg, int bg,
 				   int rop, unsigned int planemask,
 				   int length, unsigned char *pattern)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    CARD32	  pat	    = *(CARD32 *)pattern;
+    CARD32        pat       = *(CARD32 *)pattern;
 
     switch (length) {
-    case  2: pat |= pat <<  2;	/* fall through */
-    case  4: pat |= pat <<  4;	/* fall through */
-    case  8: pat |= pat <<  8;	/* fall through */
+    case  2: pat |= pat <<  2; /* fall through */
+    case  4: pat |= pat <<  4; /* fall through */
+    case  8: pat |= pat <<  8; /* fall through */
     case 16: pat |= pat << 16;
     }
 
@@ -365,10 +368,10 @@ static void R128SetupForDashedLine(ScrnInfoPtr pScrn,
 					: R128_GMC_BRUSH_32x1_MONO_FG_BG)
 				     | R128_ROP[rop].pattern
 				     | R128_GMC_BYTE_LSB_TO_MSB));
-    OUTREG(R128_DP_WRITE_MASK,	    planemask);
+    OUTREG(R128_DP_WRITE_MASK,      planemask);
     OUTREG(R128_DP_BRUSH_FRGD_CLR,  fg);
     OUTREG(R128_DP_BRUSH_BKGD_CLR,  bg);
-    OUTREG(R128_BRUSH_DATA0,	    pat);
+    OUTREG(R128_BRUSH_DATA0,        pat);
 }
 
 /* Subsequent XAA dashed line. */
@@ -378,22 +381,22 @@ static void R128SubsequentDashedBresenhamLine(ScrnInfoPtr pScrn,
 					      int err, int len, int octant,
 					      int phase)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  flags	    = 0;
+    int           flags     = 0;
 
-    if (octant & YMAJOR)	 flags |= R128_DST_Y_MAJOR;
+    if (octant & YMAJOR)         flags |= R128_DST_Y_MAJOR;
     if (!(octant & XDECREASING)) flags |= R128_DST_X_DIR_LEFT_TO_RIGHT;
     if (!(octant & YDECREASING)) flags |= R128_DST_Y_DIR_TOP_TO_BOTTOM;
 
     R128WaitForFifo(pScrn, 7);
     OUTREG(R128_DP_CNTL_XDIR_YDIR_YMAJOR, flags);
-    OUTREG(R128_DST_Y_X,		  (y << 16) | x);
-    OUTREG(R128_BRUSH_Y_X,		  (phase << 16) | phase);
-    OUTREG(R128_DST_BRES_ERR,		  err);
-    OUTREG(R128_DST_BRES_INC,		  minor);
-    OUTREG(R128_DST_BRES_DEC,		  -major);
-    OUTREG(R128_DST_BRES_LNTH,		  len);
+    OUTREG(R128_DST_Y_X,                  (y << 16) | x);
+    OUTREG(R128_BRUSH_Y_X,                (phase << 16) | phase);
+    OUTREG(R128_DST_BRES_ERR,             err);
+    OUTREG(R128_DST_BRES_INC,             minor);
+    OUTREG(R128_DST_BRES_DEC,             -major);
+    OUTREG(R128_DST_BRES_LNTH,            len);
 }
 
 #if R128_TRAPEZOIDS
@@ -411,13 +414,13 @@ static void R128SubsequentSolidFillTrap(ScrnInfoPtr pScrn, int y, int h,
 					int left, int dxL, int dyL, int eL,
 					int right, int dxR, int dyR, int eR)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  flags	    = 0;
-    int		  Lymajor   = 0;
-    int		  Rymajor   = 0;
-    int		  origdxL   = dxL;
-    int		  origdxR   = dxR;
+    int           flags     = 0;
+    int           Lymajor   = 0;
+    int           Rymajor   = 0;
+    int           origdxL   = dxL;
+    int           origdxR   = dxR;
 
     R128TRACE(("Trap %d %d; L %d %d %d %d; R %d %d %d %d\n",
 	       y, h,
@@ -430,28 +433,28 @@ static void R128SubsequentSolidFillTrap(ScrnInfoPtr pScrn, int y, int h,
     R128WaitForFifo(pScrn, 11);
 
 #if 1
-    OUTREG(R128_DP_CNTL,	    flags | (1 << 1) | (1 << 7));
-    OUTREG(R128_DST_Y_SUB,	    ((y) << 4) | 0x0 );
-    OUTREG(R128_DST_X_SUB,	    ((left) << 4)|0x0);
-    OUTREG(R128_TRAIL_BRES_ERR,	    eR-dxR);
-    OUTREG(R128_TRAIL_BRES_INC,	    dxR);
-    OUTREG(R128_TRAIL_BRES_DEC,	    -dyR);
-    OUTREG(R128_TRAIL_X_SUB,	    ((right) << 4) | 0x0);
-    OUTREG(R128_LEAD_BRES_ERR,	    eL-dxL);
-    OUTREG(R128_LEAD_BRES_INC,	    dxL);
-    OUTREG(R128_LEAD_BRES_DEC,	    -dyL);
+    OUTREG(R128_DP_CNTL,            flags | (1 << 1) | (1 << 7));
+    OUTREG(R128_DST_Y_SUB,          ((y) << 4) | 0x0 );
+    OUTREG(R128_DST_X_SUB,          ((left) << 4)|0x0);
+    OUTREG(R128_TRAIL_BRES_ERR,     eR-dxR);
+    OUTREG(R128_TRAIL_BRES_INC,     dxR);
+    OUTREG(R128_TRAIL_BRES_DEC,     -dyR);
+    OUTREG(R128_TRAIL_X_SUB,        ((right) << 4) | 0x0);
+    OUTREG(R128_LEAD_BRES_ERR,      eL-dxL);
+    OUTREG(R128_LEAD_BRES_INC,      dxL);
+    OUTREG(R128_LEAD_BRES_DEC,      -dyL);
     OUTREG(R128_LEAD_BRES_LNTH_SUB, ((h) << 4) | 0x00);
 #else
-    OUTREG(R128_DP_CNTL,	    flags | (1 << 1) );
-    OUTREG(R128_DST_Y_SUB,	    (y << 4));
-    OUTREG(R128_DST_X_SUB,	    (right << 4));
-    OUTREG(R128_TRAIL_BRES_ERR,	    eL);
-    OUTREG(R128_TRAIL_BRES_INC,	    dxL);
-    OUTREG(R128_TRAIL_BRES_DEC,	    -dyL);
-    OUTREG(R128_TRAIL_X_SUB,	    (left << 4) | 0);
-    OUTREG(R128_LEAD_BRES_ERR,	    eR);
-    OUTREG(R128_LEAD_BRES_INC,	    dxR);
-    OUTREG(R128_LEAD_BRES_DEC,	    -dyR);
+    OUTREG(R128_DP_CNTL,            flags | (1 << 1) );
+    OUTREG(R128_DST_Y_SUB,          (y << 4));
+    OUTREG(R128_DST_X_SUB,          (right << 4));
+    OUTREG(R128_TRAIL_BRES_ERR,     eL);
+    OUTREG(R128_TRAIL_BRES_INC,     dxL);
+    OUTREG(R128_TRAIL_BRES_DEC,     -dyL);
+    OUTREG(R128_TRAIL_X_SUB,        (left << 4) | 0);
+    OUTREG(R128_LEAD_BRES_ERR,      eR);
+    OUTREG(R128_LEAD_BRES_INC,      dxR);
+    OUTREG(R128_LEAD_BRES_DEC,      -dyR);
     OUTREG(R128_LEAD_BRES_LNTH_SUB, h << 4);
 #endif
 }
@@ -466,7 +469,7 @@ static void R128SetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
 					   unsigned int planemask,
 					   int trans_color)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     info->xdir = xdir;
@@ -477,8 +480,8 @@ static void R128SetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
 				     | R128_GMC_SRC_DATATYPE_COLOR
 				     | R128_ROP[rop].rop
 				     | R128_DP_SRC_SOURCE_MEMORY));
-    OUTREG(R128_DP_WRITE_MASK,	    planemask);
-    OUTREG(R128_DP_CNTL,	    ((xdir >= 0 ? R128_DST_X_LEFT_TO_RIGHT : 0)
+    OUTREG(R128_DP_WRITE_MASK,      planemask);
+    OUTREG(R128_DP_CNTL,            ((xdir >= 0 ? R128_DST_X_LEFT_TO_RIGHT : 0)
 				     | (ydir >= 0
 					? R128_DST_Y_TOP_TO_BOTTOM
 					: 0)));
@@ -495,40 +498,40 @@ static void R128SetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
 
 /* Subsequent XAA screen-to-screen copy. */
 static void R128SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn,
-					     int xa, int ya,
-					     int xb, int yb,
+					     int x1, int y1,
+					     int x2, int y2,
 					     int w, int h)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
-    if (info->xdir < 0) xa += w - 1, xb += w - 1;
-    if (info->ydir < 0) ya += h - 1, yb += h - 1;
+    if (info->xdir < 0) x1 += w - 1, x2 += w - 1;
+    if (info->ydir < 0) y1 += h - 1, y2 += h - 1;
 
     R128WaitForFifo(pScrn, 3);
-    OUTREG(R128_SRC_Y_X,	  (ya << 16) | xa);
-    OUTREG(R128_DST_Y_X,	  (yb << 16) | xb);
+    OUTREG(R128_SRC_Y_X,          (y1 << 16) | x1);
+    OUTREG(R128_DST_Y_X,          (y2 << 16) | x2);
     OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16) | w);
 }
 
 /* Setup for XAA mono 8x8 pattern color expansion.  Patterns with
-   transparency use `bg == -1'.	 This routine is only used if the XAA
+   transparency use `bg == -1'.  This routine is only used if the XAA
    pixmap cache is turned on.
 
    Tests: xtest XFree86/fllrctngl (no other test will test this routine with
-				   both transparency and non-transparency)
+                                   both transparency and non-transparency)
 
    1024x768@76Hz 8bpp
-			     Without		 With
-   x11perf -srect100	 38600.0/sec	  85700.0/sec
-   x11perf -osrect100	 38600.0/sec	  85700.0/sec
+                             Without             With
+   x11perf -srect100     38600.0/sec      85700.0/sec
+   x11perf -osrect100    38600.0/sec      85700.0/sec
 */
 static void R128SetupForMono8x8PatternFill(ScrnInfoPtr pScrn,
 					   int patternx, int patterny,
 					   int fg, int bg, int rop,
 					   unsigned int planemask)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     R128WaitForFifo(pScrn, 6);
@@ -538,25 +541,25 @@ static void R128SetupForMono8x8PatternFill(ScrnInfoPtr pScrn,
 					: R128_GMC_BRUSH_8X8_MONO_FG_BG)
 				     | R128_ROP[rop].pattern
 				     | R128_GMC_BYTE_LSB_TO_MSB));
-    OUTREG(R128_DP_WRITE_MASK,	    planemask);
+    OUTREG(R128_DP_WRITE_MASK,      planemask);
     OUTREG(R128_DP_BRUSH_FRGD_CLR,  fg);
     OUTREG(R128_DP_BRUSH_BKGD_CLR,  bg);
-    OUTREG(R128_BRUSH_DATA0,	    patternx);
-    OUTREG(R128_BRUSH_DATA1,	    patterny);
+    OUTREG(R128_BRUSH_DATA0,        patternx);
+    OUTREG(R128_BRUSH_DATA1,        patterny);
 }
 
-/* Subsequent XAA 8x8 pattern color expansion.	Because they are used in
+/* Subsequent XAA 8x8 pattern color expansion.  Because they are used in
    the setup function, `patternx' and `patterny' are not used here. */
 static void R128SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn,
 						 int patternx, int patterny,
 						 int x, int y, int w, int h)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     R128WaitForFifo(pScrn, 3);
-    OUTREG(R128_BRUSH_Y_X,	  (patterny << 8) | patternx);
-    OUTREG(R128_DST_Y_X,	  (y << 16) | x);
+    OUTREG(R128_BRUSH_Y_X,        (patterny << 8) | patternx);
+    OUTREG(R128_DST_Y_X,          (y << 16) | x);
     OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16) | w);
 }
 
@@ -570,7 +573,7 @@ static void R128SetupForColor8x8PatternFill(ScrnInfoPtr pScrn,
 					    int rop, unsigned int planemask,
 					    int trans_color)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     R128TRACE(("Color8x8 %d %d %d\n", trans_color, patx, paty));
@@ -581,7 +584,7 @@ static void R128SetupForColor8x8PatternFill(ScrnInfoPtr pScrn,
 				     | R128_GMC_SRC_DATATYPE_COLOR
 				     | R128_ROP[rop].rop
 				     | R128_DP_SRC_SOURCE_MEMORY));
-    OUTREG(R128_DP_WRITE_MASK,	    planemask);
+    OUTREG(R128_DP_WRITE_MASK,      planemask);
 
     if (trans_color != -1) {
 				/* Set up for transparency */
@@ -598,7 +601,7 @@ static void R128SubsequentColor8x8PatternFillRect( ScrnInfoPtr pScrn,
 						   int patx, int paty,
 						   int x, int y, int w, int h)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     R128TRACE(("Color8x8 %d,%d %d,%d %d %d\n", patx, paty, x, y, w, h));
@@ -611,14 +614,14 @@ static void R128SubsequentColor8x8PatternFillRect( ScrnInfoPtr pScrn,
 
 /* Setup for XAA indirect CPU-to-screen color expansion (indirect).
    Because of how the scratch buffer is initialized, this is really a
-   mainstore-to-screen color expansion.	 Transparency is supported when `bg
+   mainstore-to-screen color expansion.  Transparency is supported when `bg
    == -1'.
 
    x11perf -ftext (pure indirect):
-			       1024x768@76Hz   1024x768@76Hz
-					8bpp	       32bpp
-   not used:			685000.0/sec	794000.0/sec
-   used:		       1070000.0/sec   1080000.0/sec
+                               1024x768@76Hz   1024x768@76Hz
+                                        8bpp           32bpp
+   not used:                    685000.0/sec    794000.0/sec
+   used:                       1070000.0/sec   1080000.0/sec
 
    We could improve this indirect routine by about 10% if the hardware
    could accept DWORD padded scanlines, or if XAA could provide bit-packed
@@ -629,27 +632,27 @@ static void R128SubsequentColor8x8PatternFillRect( ScrnInfoPtr pScrn,
    few areas:
 
    1024x768@76 8bpp
-				   Indirect	     Hybrid
-   x11perf -oddsrect10		50100.0/sec	71700.0/sec
-   x11perf -oddsrect100		 4240.0/sec	 6660.0/sec
-   x11perf -bigsrect10		50300.0/sec	71100.0/sec
-   x11perf -bigsrect100		 4190.0/sec	 6800.0/sec
-   x11perf -polytext	       584000.0/sec    714000.0/sec
-   x11perf -polytext16	       154000.0/sec    172000.0/sec
-   x11perf -seg1	      1780000.0/sec   1880000.0/sec
-   x11perf -copyplane10		42900.0/sec	58300.0/sec
-   x11perf -copyplane100	 4400.0/sec	 6710.0/sec
-   x11perf -putimagexy10	 5090.0/sec	 6670.0/sec
-   x11perf -putimagexy100	  424.0/sec	  575.0/sec
+                                   Indirect          Hybrid
+   x11perf -oddsrect10          50100.0/sec     71700.0/sec
+   x11perf -oddsrect100          4240.0/sec      6660.0/sec
+   x11perf -bigsrect10          50300.0/sec     71100.0/sec
+   x11perf -bigsrect100          4190.0/sec      6800.0/sec
+   x11perf -polytext           584000.0/sec    714000.0/sec
+   x11perf -polytext16         154000.0/sec    172000.0/sec
+   x11perf -seg1              1780000.0/sec   1880000.0/sec
+   x11perf -copyplane10         42900.0/sec     58300.0/sec
+   x11perf -copyplane100         4400.0/sec      6710.0/sec
+   x11perf -putimagexy10         5090.0/sec      6670.0/sec
+   x11perf -putimagexy100         424.0/sec       575.0/sec
 
    1024x768@76 -depth 24 -fbbpp 32
-				   Indirect	     Hybrid
-   x11perf -oddsrect100		 4240.0/sec	 6670.0/sec
-   x11perf -bigsrect100		 4190.0/sec	 6800.0/sec
-   x11perf -polytext	       585000.0/sec    719000.0/sec
-   x11perf -seg1	      2960000.0/sec   2990000.0/sec
-   x11perf -copyplane100	 4400.0/sec	 6700.0/sec
-   x11perf -putimagexy100	  138.0/sec	  191.0/sec
+                                   Indirect          Hybrid
+   x11perf -oddsrect100          4240.0/sec      6670.0/sec
+   x11perf -bigsrect100          4190.0/sec      6800.0/sec
+   x11perf -polytext           585000.0/sec    719000.0/sec
+   x11perf -seg1              2960000.0/sec   2990000.0/sec
+   x11perf -copyplane100         4400.0/sec      6700.0/sec
+   x11perf -putimagexy100         138.0/sec       191.0/sec
 
 */
 static void R128SetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
@@ -658,7 +661,7 @@ static void R128SetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
 							   unsigned int
 							   planemask)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     R128WaitForFifo(pScrn, 4);
@@ -671,7 +674,7 @@ static void R128SetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
 				     | R128_ROP[rop].rop
 				     | R128_GMC_BYTE_LSB_TO_MSB
 				     | R128_DP_SRC_SOURCE_HOST_DATA));
-    OUTREG(R128_DP_WRITE_MASK,	    planemask);
+    OUTREG(R128_DP_WRITE_MASK,      planemask);
     OUTREG(R128_DP_SRC_FRGD_CLR,    fg);
     OUTREG(R128_DP_SRC_BKGD_CLR,    bg);
 }
@@ -683,12 +686,12 @@ static void R128SubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
 							     int w, int h,
 							     int skipleft)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
     int x1clip = x+skipleft;
     int x2clip = x+w;
 
-    info->scanline_h	  = h;
+    info->scanline_h      = h;
     info->scanline_words  = (w + 31) >> 5;
 
 #if 0
@@ -705,8 +708,8 @@ static void R128SubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
 #endif
     {
 	/* Use indirect for anything else */
-	info->scratch_buffer[0]		   = info->scratch_save;
-	info->scanline_direct = 0;
+	info->scratch_buffer[0] = info->scratch_save;
+	info->scanline_direct   = 0;
     }
 
     if (pScrn->bitsPerPixel == 24) {
@@ -716,22 +719,22 @@ static void R128SubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
 
     R128WaitForFifo(pScrn, 4 + (info->scanline_direct ?
 					(info->scanline_words * h) : 0) );
-    OUTREG(R128_SC_TOP_LEFT,	 (y << 16)	 | (x1clip & 0xffff));
+    OUTREG(R128_SC_TOP_LEFT,     (y << 16)       | (x1clip & 0xffff));
     OUTREG(R128_SC_BOTTOM_RIGHT, ((y+h-1) << 16) | ((x2clip-1) & 0xffff));
-    OUTREG(R128_DST_Y_X,	 (y << 16)	 | (x & 0xffff));
+    OUTREG(R128_DST_Y_X,         (y << 16)       | (x & 0xffff));
     /* Have to pad the width here and use clipping engine */
-    OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16)	  | ((w + 31) & ~31));
+    OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16)      | ((w + 31) & ~31));
 }
 
 /* Subsequent XAA indirect CPU-to-screen color expandion.  This is called
    once for each scanline. */
 static void R128SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
 {
-    R128InfoPtr	    info      = R128PTR(pScrn);
+    R128InfoPtr     info      = R128PTR(pScrn);
     unsigned char   *R128MMIO = info->MMIO;
-    CARD32	    *p		= (CARD32 *)info->scratch_buffer[bufno];
-    int		    i;
-    int		    left	= info->scanline_words;
+    CARD32          *p        = (CARD32 *)info->scratch_buffer[bufno];
+    int             i;
+    int             left      = info->scanline_words;
     volatile CARD32 *d;
 
     if (info->scanline_direct) return;
@@ -763,12 +766,11 @@ static void R128SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
 
 /* Setup for XAA indirect image write.
 
-
    1024x768@76Hz 8bpp
-			     Without		 With
-   x11perf -putimage10	 37500.0/sec	  39300.0/sec
-   x11perf -putimage100	  2150.0/sec	   1170.0/sec
-   x11perf -putimage500	   108.0/sec	     49.8/sec
+                             Without             With
+   x11perf -putimage10   37500.0/sec      39300.0/sec
+   x11perf -putimage100   2150.0/sec       1170.0/sec
+   x11perf -putimage500    108.0/sec         49.8/sec
  */
 #if R128_IMAGEWRITE
 static void R128SetupForScanlineImageWrite(ScrnInfoPtr pScrn,
@@ -778,7 +780,7 @@ static void R128SetupForScanlineImageWrite(ScrnInfoPtr pScrn,
 					   int bpp,
 					   int depth)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     info->scanline_bpp = bpp;
@@ -791,7 +793,7 @@ static void R128SetupForScanlineImageWrite(ScrnInfoPtr pScrn,
 				     | R128_ROP[rop].rop
 				     | R128_GMC_BYTE_LSB_TO_MSB
 				     | R128_DP_SRC_SOURCE_HOST_DATA));
-    OUTREG(R128_DP_WRITE_MASK,	    planemask);
+    OUTREG(R128_DP_WRITE_MASK,      planemask);
 
     if (trans_color != -1) {
 				/* Set up for transparency */
@@ -810,7 +812,7 @@ static void R128SubsequentScanlineImageWriteRect(ScrnInfoPtr pScrn,
 						 int w, int h,
 						 int skipleft)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
     int x1clip = x+skipleft;
     int x2clip = x+w;
@@ -820,7 +822,7 @@ static void R128SubsequentScanlineImageWriteRect(ScrnInfoPtr pScrn,
     if (pScrn->bitsPerPixel == 8) shift = 3;
     else if (pScrn->bitsPerPixel == 16) shift = 1;
 
-    info->scanline_h	  = h;
+    info->scanline_h      = h;
     info->scanline_words  = (w * info->scanline_bpp + 31) >> 5;
 
 #if 0
@@ -836,8 +838,8 @@ static void R128SubsequentScanlineImageWriteRect(ScrnInfoPtr pScrn,
 #endif
     {
 	/* Use indirect for anything else */
-	info->scratch_buffer[0]		   = info->scratch_save;
-	info->scanline_direct = 0;
+	info->scratch_buffer[0] = info->scratch_save;
+	info->scanline_direct   = 0;
     }
 
     if (pScrn->bitsPerPixel == 24) {
@@ -847,22 +849,22 @@ static void R128SubsequentScanlineImageWriteRect(ScrnInfoPtr pScrn,
 
     R128WaitForFifo(pScrn, 4 + (info->scanline_direct ?
 					(info->scanline_words * h) : 0) );
-    OUTREG(R128_SC_TOP_LEFT,	  (y << 16)	  | (x1clip & 0xffff));
-    OUTREG(R128_SC_BOTTOM_RIGHT,  ((y+h-1) << 16)   | ((x2clip-1) & 0xffff));
-    OUTREG(R128_DST_Y_X,	  (y << 16)	  | (x & 0xffff));
+    OUTREG(R128_SC_TOP_LEFT,      (y << 16)       | (x1clip & 0xffff));
+    OUTREG(R128_SC_BOTTOM_RIGHT,  ((y+h-1) << 16) | ((x2clip-1) & 0xffff));
+    OUTREG(R128_DST_Y_X,          (y << 16)       | (x & 0xffff));
     /* Have to pad the width here and use clipping engine */
-    OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16)	  | ((w + shift) & ~shift));
+    OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16)       | ((w + shift) & ~shift));
 }
 
-/* Subsequent XAA indirect iamge write.	 This is called once for each
+/* Subsequent XAA indirect iamge write.  This is called once for each
    scanline. */
 static void R128SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
 {
-    R128InfoPtr	    info      = R128PTR(pScrn);
+    R128InfoPtr     info      = R128PTR(pScrn);
     unsigned char   *R128MMIO = info->MMIO;
-    CARD32	    *p		= (CARD32 *)info->scratch_buffer[bufno];
-    int		    i;
-    int		    left	= info->scanline_words;
+    CARD32          *p        = (CARD32 *)info->scratch_buffer[bufno];
+    int             i;
+    int             left      = info->scanline_words;
     volatile CARD32 *d;
 
     if (info->scanline_direct) return;
@@ -896,7 +898,7 @@ static void R128SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
 /* Initialize the acceleration hardware. */
 void R128EngineInit(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     R128TRACE(("EngineInit (%d/%d)\n", info->CurrentLayout.pixel_code, info->CurrentLayout.bitsPerPixel));
@@ -921,15 +923,15 @@ void R128EngineInit(ScrnInfoPtr pScrn)
 
     R128WaitForFifo(pScrn, 2);
     OUTREG(R128_DEFAULT_OFFSET, 0);
-    OUTREG(R128_DEFAULT_PITCH,	info->pitch);
+    OUTREG(R128_DEFAULT_PITCH,  info->pitch);
 
     R128WaitForFifo(pScrn, 4);
-    OUTREG(R128_AUX_SC_CNTL,		 0);
+    OUTREG(R128_AUX_SC_CNTL,             0);
     OUTREG(R128_DEFAULT_SC_BOTTOM_RIGHT, (R128_DEFAULT_SC_RIGHT_MAX
 					  | R128_DEFAULT_SC_BOTTOM_MAX));
-    OUTREG(R128_SC_TOP_LEFT,		 0);
-    OUTREG(R128_SC_BOTTOM_RIGHT,	 (R128_DEFAULT_SC_RIGHT_MAX
-					 | R128_DEFAULT_SC_BOTTOM_MAX));
+    OUTREG(R128_SC_TOP_LEFT,             0);
+    OUTREG(R128_SC_BOTTOM_RIGHT,         (R128_DEFAULT_SC_RIGHT_MAX
+					  | R128_DEFAULT_SC_BOTTOM_MAX));
 
     info->dp_gui_master_cntl = ((info->datatype << R128_GMC_DST_DATATYPE_SHIFT)
 				| R128_GMC_CLR_CMP_CNTL_DIS
@@ -940,14 +942,14 @@ void R128EngineInit(ScrnInfoPtr pScrn)
 				     | R128_GMC_SRC_DATATYPE_COLOR));
 
     R128WaitForFifo(pScrn, 8);
-    OUTREG(R128_DST_BRES_ERR,	   0);
-    OUTREG(R128_DST_BRES_INC,	   0);
-    OUTREG(R128_DST_BRES_DEC,	   0);
+    OUTREG(R128_DST_BRES_ERR,      0);
+    OUTREG(R128_DST_BRES_INC,      0);
+    OUTREG(R128_DST_BRES_DEC,      0);
     OUTREG(R128_DP_BRUSH_FRGD_CLR, 0xffffffff);
     OUTREG(R128_DP_BRUSH_BKGD_CLR, 0x00000000);
     OUTREG(R128_DP_SRC_FRGD_CLR,   0xffffffff);
     OUTREG(R128_DP_SRC_BKGD_CLR,   0x00000000);
-    OUTREG(R128_DP_WRITE_MASK,	   0xffffffff);
+    OUTREG(R128_DP_WRITE_MASK,     0xffffffff);
 
     R128WaitForFifo(pScrn, 1);
 #if X_BYTE_ORDER == X_BIG_ENDIAN
@@ -963,12 +965,12 @@ void R128EngineInit(ScrnInfoPtr pScrn)
 #ifdef XF86DRI
     /* FIXME: When direct rendering is enabled, we should use the CCE to
        draw 2D commands */
-static void R128CCEAccelInit(XAAInfoRecPtr a)
+static void R128CCEAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
 {
-    a->Flags				= 0;
+    a->Flags                            = 0;
 
 				/* Sync */
-    a->Sync				= R128CCEWaitForIdle;
+    a->Sync                             = R128CCEWaitForIdle;
 
 }
 #endif
@@ -977,17 +979,17 @@ static void R128MMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
 {
     R128InfoPtr info = R128PTR(pScrn);
 
-    a->Flags				= (PIXMAP_CACHE
+    a->Flags                            = (PIXMAP_CACHE
 					   | OFFSCREEN_PIXMAPS
 					   | LINEAR_FRAMEBUFFER);
 
 				/* Sync */
-    a->Sync				= R128WaitForIdle;
+    a->Sync                             = R128WaitForIdle;
 
 				/* Solid Filled Rectangle */
-    a->PolyFillRectSolidFlags		= 0;
-    a->SetupForSolidFill		= R128SetupForSolidFill;
-    a->SubsequentSolidFillRect		= R128SubsequentSolidFillRect;
+    a->PolyFillRectSolidFlags           = 0;
+    a->SetupForSolidFill                = R128SetupForSolidFill;
+    a->SubsequentSolidFillRect          = R128SubsequentSolidFillRect;
 
 				/* Screen-to-screen Copy */
 				/* Transparency uses the wrong colors for
@@ -996,23 +998,23 @@ static void R128MMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
 				   This can be seen with netscape's I-bar
 				   cursor when editing in the URL location
 				   box. */
-    a->ScreenToScreenCopyFlags		= ((pScrn->bitsPerPixel == 24)
+    a->ScreenToScreenCopyFlags          = ((pScrn->bitsPerPixel == 24)
 					   ? NO_TRANSPARENCY
 					   : 0);
-    a->SetupForScreenToScreenCopy	= R128SetupForScreenToScreenCopy;
-    a->SubsequentScreenToScreenCopy	= R128SubsequentScreenToScreenCopy;
+    a->SetupForScreenToScreenCopy       = R128SetupForScreenToScreenCopy;
+    a->SubsequentScreenToScreenCopy     = R128SubsequentScreenToScreenCopy;
 
 				/* Mono 8x8 Pattern Fill (Color Expand) */
-    a->SetupForMono8x8PatternFill	= R128SetupForMono8x8PatternFill;
+    a->SetupForMono8x8PatternFill       = R128SetupForMono8x8PatternFill;
     a->SubsequentMono8x8PatternFillRect = R128SubsequentMono8x8PatternFillRect;
-    a->Mono8x8PatternFillFlags		= (HARDWARE_PATTERN_PROGRAMMED_BITS
+    a->Mono8x8PatternFillFlags          = (HARDWARE_PATTERN_PROGRAMMED_BITS
 					   | HARDWARE_PATTERN_PROGRAMMED_ORIGIN
 					   | HARDWARE_PATTERN_SCREEN_ORIGIN
 					   | BIT_ORDER_IN_BYTE_LSBFIRST);
 
 				/* Indirect CPU-To-Screen Color Expand */
 #if X_BYTE_ORDER == X_LITTLE_ENDIAN
-    a->ScanlineCPUToScreenColorExpandFillFlags =  LEFT_EDGE_CLIPPING
+    a->ScanlineCPUToScreenColorExpandFillFlags = LEFT_EDGE_CLIPPING
 					       | LEFT_EDGE_CLIPPING_NEGATIVE_X;
 #else
     a->ScanlineCPUToScreenColorExpandFillFlags = BIT_ORDER_IN_BYTE_MSBFIRST
@@ -1021,10 +1023,10 @@ static void R128MMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
 #endif
     a->NumScanlineColorExpandBuffers   = 1;
     a->ScanlineColorExpandBuffers      = info->scratch_buffer;
-    info->scratch_save		       = xalloc(((pScrn->virtualX+31)/32*4)
+    info->scratch_save                 = xalloc(((pScrn->virtualX+31)/32*4)
 					    + (pScrn->virtualX
 					    * info->CurrentLayout.pixel_bytes));
-    info->scratch_buffer[0]	       = info->scratch_save;
+    info->scratch_buffer[0]            = info->scratch_save;
     a->SetupForScanlineCPUToScreenColorExpandFill
 	= R128SetupForScanlineCPUToScreenColorExpandFill;
     a->SubsequentScanlineCPUToScreenColorExpandFill
@@ -1032,26 +1034,26 @@ static void R128MMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
     a->SubsequentColorExpandScanline   = R128SubsequentColorExpandScanline;
 
 				/* Bresenham Solid Lines */
-    a->SetupForSolidLine	       = R128SetupForSolidLine;
+    a->SetupForSolidLine               = R128SetupForSolidLine;
     a->SubsequentSolidBresenhamLine    = R128SubsequentSolidBresenhamLine;
     a->SubsequentSolidHorVertLine      = R128SubsequentSolidHorVertLine;
 
 				/* Bresenham Dashed Lines*/
-    a->SetupForDashedLine	       = R128SetupForDashedLine;
+    a->SetupForDashedLine              = R128SetupForDashedLine;
     a->SubsequentDashedBresenhamLine   = R128SubsequentDashedBresenhamLine;
-    a->DashPatternMaxLength	       = 32;
-    a->DashedLineFlags		       = (LINE_PATTERN_LSBFIRST_LSBJUSTIFIED
+    a->DashPatternMaxLength            = 32;
+    a->DashedLineFlags                 = (LINE_PATTERN_LSBFIRST_LSBJUSTIFIED
 					  | LINE_PATTERN_POWER_OF_2_ONLY);
 
 				/* ImageWrite */
 #if R128_IMAGEWRITE
     a->NumScanlineImageWriteBuffers    = 1;
     a->ScanlineImageWriteBuffers       = info->scratch_buffer;
-    info->scratch_buffer[0]	       = info->scratch_save;
+    info->scratch_buffer[0]            = info->scratch_save;
     a->SetupForScanlineImageWrite      = R128SetupForScanlineImageWrite;
     a->SubsequentScanlineImageWriteRect= R128SubsequentScanlineImageWriteRect;
     a->SubsequentImageWriteScanline    = R128SubsequentImageWriteScanline;
-    a->ScanlineImageWriteFlags		 = CPU_TRANSFER_PAD_DWORD
+    a->ScanlineImageWriteFlags         = CPU_TRANSFER_PAD_DWORD
 		/* Performance tests show that we shouldn't use GXcopy for
 		 * uploads as a memcpy is faster */
 					  | NO_GXCOPY
@@ -1065,8 +1067,8 @@ static void R128MMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
    graphics hardware for acceleration. */
 Bool R128AccelInit(ScreenPtr pScreen)
 {
-    ScrnInfoPtr	  pScrn = xf86Screens[pScreen->myNum];
-    R128InfoPtr	  info	= R128PTR(pScrn);
+    ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
+    R128InfoPtr   info  = R128PTR(pScrn);
     XAAInfoRecPtr a;
 
     if (!(a = info->accel = XAACreateInfoRec())) return FALSE;
@@ -1074,7 +1076,7 @@ Bool R128AccelInit(ScreenPtr pScreen)
 #ifdef XF86DRI
     /* FIXME: When direct rendering is enabled, we should use the CCE to
        draw 2D commands */
-    if (info->CCE2D) R128CCEAccelInit(a);
+    if (info->CCE2D) R128CCEAccelInit(pScrn, a);
     else
 #endif
 	R128MMIOAccelInit(pScrn, a);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c
index d77c64b5a..23ae3d7da 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c
@@ -1,34 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c,v 1.1 2000/11/02 16:55:31 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c,v 1.2 2000/11/09 03:24:35 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                      Precision Insight, Inc., Cedar Park, Texas, and
+ *                      VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
+ * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Rickard E. Faith <faith@precisioninsight.com>
- *   Kevin E. Martin <kevin@precisioninsight.com>
+ *   Rickard E. Faith <faith@valinux.com>
+ *   Kevin E. Martin <martin@valinux.com>
  *
  * References:
  *
@@ -79,24 +82,24 @@
 #include "r128_reg.h"
 
 #if X_BYTE_ORDER == X_BIG_ENDIAN
-#define P_SWAP32( a , b )		  \
-       ((char *)a)[0] = ((char *)b)[3];	  \
-       ((char *)a)[1] = ((char *)b)[2];	  \
-       ((char *)a)[2] = ((char *)b)[1];	  \
+#define P_SWAP32( a , b )                \
+       ((char *)a)[0] = ((char *)b)[3];  \
+       ((char *)a)[1] = ((char *)b)[2];  \
+       ((char *)a)[2] = ((char *)b)[1];  \
        ((char *)a)[3] = ((char *)b)[0]
 
-#define P_SWAP16( a , b )		    \
-	((char *)a)[0] = ((char *)b)[1];  \
-	((char *)a)[1] = ((char *)b)[0];  \
-	((char *)a)[2] = ((char *)b)[3];  \
-	((char *)a)[3] = ((char *)b)[2]
+#define P_SWAP16( a , b )                \
+       ((char *)a)[0] = ((char *)b)[1];  \
+       ((char *)a)[1] = ((char *)b)[0];  \
+       ((char *)a)[2] = ((char *)b)[3];  \
+       ((char *)a)[3] = ((char *)b)[2]
 #endif
 
 
 /* Set cursor foreground and background colors. */
 static void R128SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     OUTREG(R128_CUR_CLR0, bg);
@@ -107,17 +110,17 @@ static void R128SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
    (xorigin,yorigin). */
 static void R128SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 {
-    R128InfoPtr		  info	    = R128PTR(pScrn);
-    unsigned char	  *R128MMIO = info->MMIO;
-    xf86CursorInfoPtr	  cursor    = info->cursor;
-    int			  xorigin   = 0;
-    int			  yorigin   = 0;
-    int			  total_y   = pScrn->frameY1 - pScrn->frameY0;
-
-    if (x < 0)			      xorigin = -x;
-    if (y < 0)			      yorigin = -y;
-    if (y > total_y)		      y	      = total_y;
-    if (info->Flags & V_DBLSCAN)      y	      *= 2;
+    R128InfoPtr           info      = R128PTR(pScrn);
+    unsigned char         *R128MMIO = info->MMIO;
+    xf86CursorInfoPtr     cursor    = info->cursor;
+    int                   xorigin   = 0;
+    int                   yorigin   = 0;
+    int                   total_y   = pScrn->frameY1 - pScrn->frameY0;
+
+    if (x < 0)                        xorigin = -x;
+    if (y < 0)                        yorigin = -y;
+    if (y > total_y)                  y       = total_y;
+    if (info->Flags & V_DBLSCAN)      y       *= 2;
     if (xorigin >= cursor->MaxWidth)  xorigin = cursor->MaxWidth - 1;
     if (yorigin >= cursor->MaxHeight) yorigin = cursor->MaxHeight - 1;
 
@@ -125,19 +128,19 @@ static void R128SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
     OUTREG(R128_CUR_HORZ_VERT_POSN, (R128_CUR_LOCK
 				     | ((xorigin ? 0 : x) << 16)
 				     | (yorigin ? 0 : y)));
-    OUTREG(R128_CUR_OFFSET,	    info->cursor_start + yorigin * 16);
+    OUTREG(R128_CUR_OFFSET,         info->cursor_start + yorigin * 16);
 }
 
 /* Copy cursor image from `image' to video memory.  R128SetCursorPosition
    will be called after this, so we can ignore xorigin and yorigin. */
 static void R128LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *image)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    CARD32	  *s	    = (CARD32 *)image;
-    CARD32	  *d	    = (CARD32 *)(info->FB + info->cursor_start);
-    int		  y;
-    CARD32	  save;
+    CARD32        *s        = (CARD32 *)image;
+    CARD32        *d        = (CARD32 *)(info->FB + info->cursor_start);
+    int           y;
+    CARD32        save;
 
     save = INREG(R128_CRTC_GEN_CNTL);
     OUTREG(R128_CRTC_GEN_CNTL, save & ~R128_CRTC_CUR_EN);
@@ -202,7 +205,7 @@ static void R128LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *image)
 /* Hide hardware cursor. */
 static void R128HideCursor(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     OUTREGP(R128_CRTC_GEN_CNTL, 0, ~R128_CRTC_CUR_EN);
@@ -211,7 +214,7 @@ static void R128HideCursor(ScrnInfoPtr pScrn)
 /* Show hardware cursor. */
 static void R128ShowCursor(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     OUTREGP(R128_CRTC_GEN_CNTL, R128_CRTC_CUR_EN, ~R128_CRTC_CUR_EN);
@@ -229,20 +232,20 @@ static Bool R128UseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
 /* Initialize hardware cursor support. */
 Bool R128CursorInit(ScreenPtr pScreen)
 {
-    ScrnInfoPtr		  pScrn	  = xf86Screens[pScreen->myNum];
-    R128InfoPtr		  info	  = R128PTR(pScrn);
-    xf86CursorInfoPtr	  cursor;
-    FBAreaPtr		  fbarea;
-    int			  width;
-    int			  height;
-    int			  size;
+    ScrnInfoPtr           pScrn   = xf86Screens[pScreen->myNum];
+    R128InfoPtr           info    = R128PTR(pScrn);
+    xf86CursorInfoPtr     cursor;
+    FBAreaPtr             fbarea;
+    int                   width;
+    int                   height;
+    int                   size;
 
 
     if (!(cursor = info->cursor = xf86CreateCursorInfoRec())) return FALSE;
 
-    cursor->MaxWidth	      = 64;
-    cursor->MaxHeight	      = 64;
-    cursor->Flags	      = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP
+    cursor->MaxWidth          = 64;
+    cursor->MaxHeight         = 64;
+    cursor->Flags             = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP
 
 #if X_BYTE_ORDER == X_LITTLE_ENDIAN
 				 | HARDWARE_CURSOR_BIT_ORDER_MSBFIRST
@@ -255,14 +258,14 @@ Bool R128CursorInit(ScreenPtr pScreen)
     cursor->SetCursorColors   = R128SetCursorColors;
     cursor->SetCursorPosition = R128SetCursorPosition;
     cursor->LoadCursorImage   = R128LoadCursorImage;
-    cursor->HideCursor	      = R128HideCursor;
-    cursor->ShowCursor	      = R128ShowCursor;
-    cursor->UseHWCursor	      = R128UseHWCursor;
-
-    size		      = (cursor->MaxWidth/4) * cursor->MaxHeight;
-    width		      = pScrn->displayWidth;
-    height		      = (size*2 + 1023) / pScrn->displayWidth;
-    fbarea		      = xf86AllocateOffscreenArea(pScreen,
+    cursor->HideCursor        = R128HideCursor;
+    cursor->ShowCursor        = R128ShowCursor;
+    cursor->UseHWCursor       = R128UseHWCursor;
+
+    size                      = (cursor->MaxWidth/4) * cursor->MaxHeight;
+    width                     = pScrn->displayWidth;
+    height                    = (size*2 + 1023) / pScrn->displayWidth;
+    fbarea                    = xf86AllocateOffscreenArea(pScreen,
 							  width,
 							  height,
 							  16,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c
index 695d49cdb..fd4b93fa0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c,v 1.1 2000/11/02 16:55:32 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c,v 1.2 2000/11/09 03:24:35 martin Exp $ */
 /*
  * Authors:
  *   Ove Kåven <ovek@transgaming.com>,
@@ -239,7 +239,7 @@ R128_SetMode(
 	R128AdjustFrame(indx, 0, 0, 0);
 	info->DGAactive = FALSE;
    } else {
-	if(!info->DGAactive) {	/* save the old parameters */
+	if(!info->DGAactive) {  /* save the old parameters */
 	    memcpy(&SavedLayouts[indx], &info->CurrentLayout, sizeof(R128FBLayout));
 	    info->DGAactive = TRUE;
 	}
@@ -249,7 +249,7 @@ R128_SetMode(
 	info->CurrentLayout.displayWidth = pMode->bytesPerScanline /
 					    (pMode->bitsPerPixel >> 3);
 	info->CurrentLayout.pixel_bytes = pMode->bitsPerPixel / 8;
-	info->CurrentLayout.pixel_code	= (pMode->bitsPerPixel != 16
+	info->CurrentLayout.pixel_code  = (pMode->bitsPerPixel != 16
 					  ? pMode->bitsPerPixel
 					  : pMode->depth);
 	/* R128ModeInit() will set the mode field */
@@ -281,7 +281,7 @@ R128_SetViewport(
    R128InfoPtr info = R128PTR(pScrn);
 
    R128AdjustFrame(pScrn->pScreen->myNum, x, y, flags);
-   info->DGAViewportStatus = 0;	 /* FIXME */
+   info->DGAViewportStatus = 0;  /* FIXME */
 }
 
 
@@ -348,7 +348,7 @@ R128_OpenFramebuffer(
 ){
     R128InfoPtr info = R128PTR(pScrn);
 
-    *name = NULL;		/* no special device */
+    *name = NULL;               /* no special device */
     *mem = (unsigned char*)info->LinearAddr;
     *size = info->FbMapSize;
     *offset = 0;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c
index 816dbebee..50dd50c7d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c
@@ -1,35 +1,38 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c,v 1.2 2000/11/03 01:15:49 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c,v 1.3 2000/11/09 03:24:35 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                      Precision Insight, Inc., Cedar Park, Texas, and
+ *                      VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
+ * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Kevin E. Martin <kevin@precisioninsight.com>
- *   Rickard E. Faith <faith@precisioninsight.com>
- *   Daryll Strauss <daryll@precisioninsight.com>
+ *   Kevin E. Martin <martin@valinux.com>
+ *   Rickard E. Faith <faith@valinux.com>
+ *   Daryll Strauss <daryll@valinux.com>
  *
  */
 
@@ -70,19 +73,19 @@
 
 static int CCEFifoSlots = 0;
 
-#define R128CCEWaitForFifo(pScrn, entries)				     \
-do {									     \
+#define R128CCEWaitForFifo(pScrn, entries)                                   \
+do {                                                                         \
     if (CCEFifoSlots < entries) R128WaitForFifoFunction(pScrn, entries);     \
-    CCEFifoSlots -= entries;						     \
+    CCEFifoSlots -= entries;                                                 \
 } while (0)
 
-/* Wait for at least `entries' slots are free.	The actual number of
+/* Wait for at least `entries' slots are free.  The actual number of
    slots available is stored in info->CCEFifoSize. */
 static void R128CCEWaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     for (;;) {
 	for (i = 0; i < R128_TIMEOUT; i++) {
@@ -98,9 +101,9 @@ static void R128CCEWaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
    CCE is idle. */
 void R128CCEWaitForIdle(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     if (!info->CCEInUse || info->CCEMode == R128_PM4_NONPM4) return;
 
@@ -148,7 +151,7 @@ void R128CCEWaitForIdle(ScrnInfoPtr pScrn)
 /* Reset the ring buffer status, if the engine was reset */
 void R128CCEResetRing(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	     info      = R128PTR(pScrn);
+    R128InfoPtr      info      = R128PTR(pScrn);
     unsigned char    *R128MMIO = info->MMIO;
     R128SAREAPrivPtr pSAREAPriv;
     volatile CARD32  *r128RingReadPtr;
@@ -156,7 +159,7 @@ void R128CCEResetRing(ScrnInfoPtr pScrn)
     if (!info->CCEInUse || info->CCEMode == R128_PM4_NONPM4) return;
 
     r128RingReadPtr = (volatile CARD32 *)(info->ringReadPtr);
-    pSAREAPriv	    = (R128SAREAPrivPtr)DRIGetSAREAPrivate(pScrn->pScreen);
+    pSAREAPriv      = (R128SAREAPrivPtr)DRIGetSAREAPrivate(pScrn->pScreen);
 
     OUTREG(R128_PM4_BUFFER_DL_WPTR, 0);
     OUTREG(R128_PM4_BUFFER_DL_RPTR, 0);
@@ -168,10 +171,10 @@ void R128CCEResetRing(ScrnInfoPtr pScrn)
 }
 
 /* Start the CCE, but only if it is not already in use and the requested
-   mode is a CCE mode.	The mode is stored in info->CCEMode. */
+   mode is a CCE mode.  The mode is stored in info->CCEMode. */
 void R128CCEStart(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     if (info->CCEInUse || info->CCEMode == R128_PM4_NONPM4) return;
@@ -188,7 +191,7 @@ void R128CCEStart(ScrnInfoPtr pScrn)
    requests before switching modes.*/
 void R128CCEStop(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     if (!info->CCEInUse || info->CCEMode == R128_PM4_NONPM4) return;
@@ -206,13 +209,13 @@ void R128CCEStop(ScrnInfoPtr pScrn)
    client. */
 static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 {
-    ScrnInfoPtr	      pScrn	       = xf86Screens[pScreen->myNum];
-    R128InfoPtr	      info	       = R128PTR(pScrn);
-    int		      numConfigs       = 0;
-    __GLXvisualConfig *pConfigs	       = 0;
+    ScrnInfoPtr       pScrn            = xf86Screens[pScreen->myNum];
+    R128InfoPtr       info             = R128PTR(pScrn);
+    int               numConfigs       = 0;
+    __GLXvisualConfig *pConfigs        = 0;
     R128ConfigPrivPtr pR128Configs     = 0;
     R128ConfigPrivPtr *pR128ConfigPtrs = 0;
-    int		      i, accum, stencil;
+    int               i, accum, stencil;
 
     switch (info->CurrentLayout.pixel_code) {
     case 8:  /* 8bpp mode is not support */
@@ -220,7 +223,7 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
     case 24: /* FIXME */
 	return FALSE;
 
-#define R128_USE_ACCUM	 1
+#define R128_USE_ACCUM   1
 #define R128_USE_STENCIL 1
 
     case 16:
@@ -252,17 +255,17 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 	    for (stencil = 0; stencil <= R128_USE_STENCIL; stencil++) {
 		pR128ConfigPtrs[i] = &pR128Configs[i];
 
-		pConfigs[i].vid		       = -1;
-		pConfigs[i].class	       = -1;
-		pConfigs[i].rgba	       = TRUE;
-		pConfigs[i].redSize	       = 5;
-		pConfigs[i].greenSize	       = 6;
-		pConfigs[i].blueSize	       = 5;
-		pConfigs[i].alphaSize	       = 0;
-		pConfigs[i].redMask	       = 0x0000F800;
-		pConfigs[i].greenMask	       = 0x000007E0;
-		pConfigs[i].blueMask	       = 0x0000001F;
-		pConfigs[i].alphaMask	       = 0x00000000;
+		pConfigs[i].vid                = -1;
+		pConfigs[i].class              = -1;
+		pConfigs[i].rgba               = TRUE;
+		pConfigs[i].redSize            = 5;
+		pConfigs[i].greenSize          = 6;
+		pConfigs[i].blueSize           = 5;
+		pConfigs[i].alphaSize          = 0;
+		pConfigs[i].redMask            = 0x0000F800;
+		pConfigs[i].greenMask          = 0x000007E0;
+		pConfigs[i].blueMask           = 0x0000001F;
+		pConfigs[i].alphaMask          = 0x00000000;
 		if (accum) { /* Simulated in software */
 		    pConfigs[i].accumRedSize   = 16;
 		    pConfigs[i].accumGreenSize = 16;
@@ -275,15 +278,15 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 		    pConfigs[i].accumAlphaSize = 0;
 		}
 		pConfigs[i].doubleBuffer       = TRUE;
-		pConfigs[i].stereo	       = FALSE;
-		pConfigs[i].bufferSize	       = 16;
-		pConfigs[i].depthSize	       = 16;
+		pConfigs[i].stereo             = FALSE;
+		pConfigs[i].bufferSize         = 16;
+		pConfigs[i].depthSize          = 16;
 		if (stencil)
 		    pConfigs[i].stencilSize    = 8; /* Simulated in software */
 		else
 		    pConfigs[i].stencilSize    = 0;
-		pConfigs[i].auxBuffers	       = 0;
-		pConfigs[i].level	       = 0;
+		pConfigs[i].auxBuffers         = 0;
+		pConfigs[i].level              = 0;
 		pConfigs[i].visualRating       = GLX_NONE_EXT;
 		pConfigs[i].transparentPixel   = GLX_NONE;
 		pConfigs[i].transparentRed     = 0;
@@ -324,17 +327,17 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 	    for (stencil = 0; stencil <= R128_USE_STENCIL; stencil++) {
 		pR128ConfigPtrs[i] = &pR128Configs[i];
 
-		pConfigs[i].vid		       = -1;
-		pConfigs[i].class	       = -1;
-		pConfigs[i].rgba	       = TRUE;
-		pConfigs[i].redSize	       = 8;
-		pConfigs[i].greenSize	       = 8;
-		pConfigs[i].blueSize	       = 8;
-		pConfigs[i].alphaSize	       = 8;
-		pConfigs[i].redMask	       = 0x00FF0000;
-		pConfigs[i].greenMask	       = 0x0000FF00;
-		pConfigs[i].blueMask	       = 0x000000FF;
-		pConfigs[i].alphaMask	       = 0xFF000000;
+		pConfigs[i].vid                = -1;
+		pConfigs[i].class              = -1;
+		pConfigs[i].rgba               = TRUE;
+		pConfigs[i].redSize            = 8;
+		pConfigs[i].greenSize          = 8;
+		pConfigs[i].blueSize           = 8;
+		pConfigs[i].alphaSize          = 8;
+		pConfigs[i].redMask            = 0x00FF0000;
+		pConfigs[i].greenMask          = 0x0000FF00;
+		pConfigs[i].blueMask           = 0x000000FF;
+		pConfigs[i].alphaMask          = 0xFF000000;
 		if (accum) { /* Simulated in software */
 		    pConfigs[i].accumRedSize   = 16;
 		    pConfigs[i].accumGreenSize = 16;
@@ -347,8 +350,8 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 		    pConfigs[i].accumAlphaSize = 0;
 		}
 		pConfigs[i].doubleBuffer       = TRUE;
-		pConfigs[i].stereo	       = FALSE;
-		pConfigs[i].bufferSize	       = 24;
+		pConfigs[i].stereo             = FALSE;
+		pConfigs[i].bufferSize         = 24;
 		if (stencil) {
 		    pConfigs[i].depthSize      = 24;
 		    pConfigs[i].stencilSize    = 8;
@@ -356,8 +359,8 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 		    pConfigs[i].depthSize      = 32;
 		    pConfigs[i].stencilSize    = 0;
 		}
-		pConfigs[i].auxBuffers	       = 0;
-		pConfigs[i].level	       = 0;
+		pConfigs[i].auxBuffers         = 0;
+		pConfigs[i].level              = 0;
 		pConfigs[i].visualRating       = GLX_NONE_EXT;
 		pConfigs[i].transparentPixel   = GLX_NONE;
 		pConfigs[i].transparentRed     = 0;
@@ -395,7 +398,7 @@ static void R128DestroyContext(ScreenPtr pScreen, drmContext hwContext,
 }
 
 /* Called when the X server is woken up to allow the last client's
-   context to be saved and the X server's context to be loaded.	 This is
+   context to be saved and the X server's context to be loaded.  This is
    not necessary for the Rage 128 since the client detects when it's
    context is not currently loaded and then load's it itself.  Since the
    registers to start and stop the CCE are privileged, only the X server
@@ -411,7 +414,7 @@ static void R128EnterServer(ScreenPtr pScreen)
     if (!info->CCE2D) R128CCEStop(pScrn);
 #else
     if (info->CCE2D) R128CCEWaitForIdle(pScrn);
-    else	     R128CCEStop(pScrn);
+    else             R128CCEStop(pScrn);
 #endif
 }
 
@@ -430,7 +433,7 @@ static void R128LeaveServer(ScreenPtr pScreen)
     if (!info->CCE2D) R128CCEStart(pScrn);
 #else
     if (info->CCE2D) R128CCEWaitForIdle(pScrn);
-    else	     R128CCEStart(pScrn);
+    else             R128CCEStart(pScrn);
 #endif
 }
 
@@ -456,12 +459,12 @@ static void R128DRISwapContext(ScreenPtr pScreen, DRISyncType syncType,
 static void R128DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 indx)
 {
     /* FIXME: This routine needs to have acceleration turned on */
-    ScreenPtr	pScreen = pWin->drawable.pScreen;
-    ScrnInfoPtr pScrn	= xf86Screens[pScreen->myNum];
+    ScreenPtr   pScreen = pWin->drawable.pScreen;
+    ScrnInfoPtr pScrn   = xf86Screens[pScreen->myNum];
     R128InfoPtr info   = R128PTR(pScrn);
-    BoxPtr	pbox;
-    int		nbox;
-    int		depth;
+    BoxPtr      pbox;
+    int         nbox;
+    int         depth;
 
     /* FIXME: Use accel when CCE 2D code is written */
     if (info->CCE2D) return;
@@ -511,8 +514,8 @@ static void R128DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 indx)
 static void R128DRIMoveBuffers(WindowPtr pWin, DDXPointRec ptOldOrg,
 			       RegionPtr prgnSrc, CARD32 indx)
 {
-    ScreenPtr	pScreen = pWin->drawable.pScreen;
-    ScrnInfoPtr pScrn	= xf86Screens[pScreen->myNum];
+    ScreenPtr   pScreen = pWin->drawable.pScreen;
+    ScrnInfoPtr pScrn   = xf86Screens[pScreen->myNum];
     R128InfoPtr info   = R128PTR(pScrn);
 
     /* FIXME: This routine needs to have acceleration turned on */
@@ -531,10 +534,10 @@ static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen)
     unsigned char *R128MMIO = info->MMIO;
     unsigned long mode;
     unsigned int  vendor, device;
-    int		  ret;
+    int           ret;
     unsigned long cntl;
-    int		  s, l;
-    int		  flags;
+    int           s, l;
+    int           flags;
 
     if (drmAgpAcquire(info->drmFD) < 0) {
 	xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] AGP not available\n");
@@ -546,13 +549,13 @@ static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen)
 				   combination of graphics card and AGP
 				   chipset. */
 
-    mode   = drmAgpGetMode(info->drmFD);	/* Default mode */
+    mode   = drmAgpGetMode(info->drmFD);        /* Default mode */
     vendor = drmAgpVendorId(info->drmFD);
     device = drmAgpDeviceId(info->drmFD);
 
     mode &= ~R128_AGP_MODE_MASK;
     switch (info->agpMode) {
-    case 2:	     mode |= R128_AGP_2X_MODE;
+    case 2:          mode |= R128_AGP_2X_MODE;
     case 1: default: mode |= R128_AGP_1X_MODE;
     }
 
@@ -588,31 +591,31 @@ static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen)
     }
 
 				/* Initialize the CCE ring buffer data */
-    info->ringStart	  = info->agpOffset;
-    info->ringMapSize	  = info->ringSize*1024*1024 + 4096;
+    info->ringStart       = info->agpOffset;
+    info->ringMapSize     = info->ringSize*1024*1024 + 4096;
     info->ringSizeLog2QW  = R128MinBits(info->ringSize*1024*1024/8) - 1;
 
     info->ringReadOffset  = info->ringStart + info->ringMapSize;
     info->ringReadMapSize = 4096;
 
 				/* Reserve space for the vertex buffer */
-    info->vbStart	  = info->ringReadOffset + info->ringReadMapSize;
-    info->vbMapSize	  = info->vbSize*1024*1024;
+    info->vbStart         = info->ringReadOffset + info->ringReadMapSize;
+    info->vbMapSize       = info->vbSize*1024*1024;
 
 				/* Reserve space for the indirect buffer */
-    info->indStart	  = info->vbStart + info->vbMapSize;
-    info->indMapSize	  = info->indSize*1024*1024;
+    info->indStart        = info->vbStart + info->vbMapSize;
+    info->indMapSize      = info->indSize*1024*1024;
 
 				/* Reserve the rest for AGP textures */
-    info->agpTexStart	  = info->indStart + info->indMapSize;
+    info->agpTexStart     = info->indStart + info->indMapSize;
     s = (info->agpSize*1024*1024 - info->agpTexStart);
     l = R128MinBits((s-1) / R128_NR_TEX_REGIONS);
     if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY;
-    info->agpTexMapSize	  = (s >> l) << l;
+    info->agpTexMapSize   = (s >> l) << l;
     info->log2AGPTexGran  = l;
 
     if (info->CCESecure) flags = DRM_READ_ONLY;
-    else		  flags = 0;
+    else                  flags = 0;
 
     if (drmAddMap(info->drmFD, info->ringStart, info->ringMapSize,
 		  DRM_AGP, flags, &info->ringHandle) < 0) {
@@ -716,11 +719,11 @@ static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen)
     switch (info->agpSize) {
     case 256: cntl |= R128_AGP_APER_SIZE_256MB; break;
     case 128: cntl |= R128_AGP_APER_SIZE_128MB; break;
-    case  64: cntl |= R128_AGP_APER_SIZE_64MB;	break;
-    case  32: cntl |= R128_AGP_APER_SIZE_32MB;	break;
-    case  16: cntl |= R128_AGP_APER_SIZE_16MB;	break;
-    case   8: cntl |= R128_AGP_APER_SIZE_8MB;	break;
-    case   4: cntl |= R128_AGP_APER_SIZE_4MB;	break;
+    case  64: cntl |= R128_AGP_APER_SIZE_64MB;  break;
+    case  32: cntl |= R128_AGP_APER_SIZE_32MB;  break;
+    case  16: cntl |= R128_AGP_APER_SIZE_16MB;  break;
+    case   8: cntl |= R128_AGP_APER_SIZE_8MB;   break;
+    case   4: cntl |= R128_AGP_APER_SIZE_4MB;   break;
     default:
 	xf86DrvMsg(pScreen->myNum, X_ERROR,
 		   "[agp] Illegal aperture size %d kB\n",
@@ -749,7 +752,7 @@ static Bool R128DRIMapInit(R128InfoPtr info, ScreenPtr pScreen)
     int flags;
 
     if (info->CCESecure) flags = DRM_READ_ONLY;
-    else		 flags = 0;
+    else                 flags = 0;
 
 				/* Map registers */
     info->registerSize = R128_MMIOSIZE;
@@ -767,7 +770,7 @@ static Bool R128DRIMapInit(R128InfoPtr info, ScreenPtr pScreen)
    DRI-based clients. */
 static void R128DRICCEInitRingBuffer(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
     unsigned long addr;
 
@@ -794,7 +797,7 @@ static void R128DRICCEInitRingBuffer(ScrnInfoPtr pScrn)
 	   | ((R128_WATERMARK_N/4) << R128_WMC_SHIFT)
 	   | ((R128_WATERMARK_K/64) << R128_WB_WM_SHIFT));
 
-    addr = INREG(R128_PM4_BUFFER_ADDR); /* Force read.	Why?  Because it's
+    addr = INREG(R128_PM4_BUFFER_ADDR); /* Force read.  Why?  Because it's
 					   in the examples... */
 
 #if 0
@@ -809,23 +812,23 @@ static void R128DRICCEInitRingBuffer(ScrnInfoPtr pScrn)
 /* Initialize the kernel data structures. */
 static int R128DRIKernelInit(R128InfoPtr info)
 {
-    drmR128Init	     drmInfo;
-
-    drmInfo.sarea_priv_offset	= sizeof(XF86DRISAREARec);
-    drmInfo.is_pci		= info->IsPCI;
-    drmInfo.cce_mode		= info->CCEMode;
-    drmInfo.cce_fifo_size	= info->CCEFifoSize;
-    drmInfo.cce_secure		= info->CCESecure;
-    drmInfo.ring_size		= info->ringSize*1024*1024;
-    drmInfo.usec_timeout	= info->CCEusecTimeout;
-
-    drmInfo.fb_offset		= info->LinearAddr;
-    drmInfo.agp_ring_offset	= info->ringHandle;
+    drmR128Init      drmInfo;
+
+    drmInfo.sarea_priv_offset   = sizeof(XF86DRISAREARec);
+    drmInfo.is_pci              = info->IsPCI;
+    drmInfo.cce_mode            = info->CCEMode;
+    drmInfo.cce_fifo_size       = info->CCEFifoSize;
+    drmInfo.cce_secure          = info->CCESecure;
+    drmInfo.ring_size           = info->ringSize*1024*1024;
+    drmInfo.usec_timeout        = info->CCEusecTimeout;
+
+    drmInfo.fb_offset           = info->LinearAddr;
+    drmInfo.agp_ring_offset     = info->ringHandle;
     drmInfo.agp_read_ptr_offset = info->ringReadPtrHandle;
     drmInfo.agp_vertbufs_offset = info->vbHandle;
-    drmInfo.agp_indbufs_offset	= info->indHandle;
+    drmInfo.agp_indbufs_offset  = info->indHandle;
     drmInfo.agp_textures_offset = info->agpTexHandle;
-    drmInfo.mmio_offset		= info->registerHandle;
+    drmInfo.mmio_offset         = info->registerHandle;
 
     if (drmR128InitCCE(info->drmFD, &drmInfo) < 0) return FALSE;
 
@@ -871,9 +874,9 @@ static Bool R128DRIBufInit(R128InfoPtr info, ScreenPtr pScreen)
 /* Load the microcode for the CCE */
 static void R128DRILoadMicrocode(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info		  = R128PTR(pScrn);
-    unsigned char *R128MMIO	  = info->MMIO;
-    int		  i;
+    R128InfoPtr   info            = R128PTR(pScrn);
+    unsigned char *R128MMIO       = info->MMIO;
+    int           i;
     unsigned long R128Microcode[] = {
 	/* CCE microcode (from ATI) */
     0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0, 1617039951,
@@ -925,20 +928,20 @@ static void R128DRILoadMicrocode(ScrnInfoPtr pScrn)
 /* Initialize the CCE state, and start the CCE (if used by the X server) */
 static void R128DRICCEInit(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
 				/* CCEMode is initialized in r128_driver.c */
     switch (info->CCEMode) {
-    case R128_PM4_NONPM4:		  info->CCEFifoSize = 0;   break;
-    case R128_PM4_192PIO:		  info->CCEFifoSize = 192; break;
-    case R128_PM4_192BM:		  info->CCEFifoSize = 192; break;
-    case R128_PM4_128PIO_64INDBM:	  info->CCEFifoSize = 128; break;
-    case R128_PM4_128BM_64INDBM:	  info->CCEFifoSize = 128; break;
-    case R128_PM4_64PIO_128INDBM:	  info->CCEFifoSize = 64;  break;
-    case R128_PM4_64BM_128INDBM:	  info->CCEFifoSize = 64;  break;
-    case R128_PM4_64PIO_64VCBM_64INDBM:	  info->CCEFifoSize = 64;  break;
-    case R128_PM4_64BM_64VCBM_64INDBM:	  info->CCEFifoSize = 64;  break;
+    case R128_PM4_NONPM4:                 info->CCEFifoSize = 0;   break;
+    case R128_PM4_192PIO:                 info->CCEFifoSize = 192; break;
+    case R128_PM4_192BM:                  info->CCEFifoSize = 192; break;
+    case R128_PM4_128PIO_64INDBM:         info->CCEFifoSize = 128; break;
+    case R128_PM4_128BM_64INDBM:          info->CCEFifoSize = 128; break;
+    case R128_PM4_64PIO_128INDBM:         info->CCEFifoSize = 64;  break;
+    case R128_PM4_64BM_128INDBM:          info->CCEFifoSize = 64;  break;
+    case R128_PM4_64PIO_64VCBM_64INDBM:   info->CCEFifoSize = 64;  break;
+    case R128_PM4_64BM_64VCBM_64INDBM:    info->CCEFifoSize = 64;  break;
     case R128_PM4_64PIO_64VCPIO_64INDPIO: info->CCEFifoSize = 64;  break;
     }
 
@@ -954,22 +957,22 @@ static void R128DRICCEInit(ScrnInfoPtr pScrn)
 
 /* Initialize the screen-specific data structures for the DRI and the
    Rage 128.  This is the main entry point to the device-specific
-   initialization code.	 It calls device-independent DRI functions to
+   initialization code.  It calls device-independent DRI functions to
    create the DRI data structures and initialize the DRI state. */
 Bool R128DRIScreenInit(ScreenPtr pScreen)
 {
-    ScrnInfoPtr	  pScrn = xf86Screens[pScreen->myNum];
-    R128InfoPtr	  info = R128PTR(pScrn);
-    DRIInfoPtr	  pDRIInfo;
-    R128DRIPtr	  pR128DRI;
-    int		  major, minor, patch;
+    ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
+    R128InfoPtr   info = R128PTR(pScrn);
+    DRIInfoPtr    pDRIInfo;
+    R128DRIPtr    pR128DRI;
+    int           major, minor, patch;
     drmVersionPtr version;
 
     /* Check that the GLX, DRI, and DRM modules have been loaded by testing
      * for known symbols in each module. */
     if (!xf86LoaderCheckSymbol("GlxSetVisualConfigs")) return FALSE;
     if (!xf86LoaderCheckSymbol("DRIScreenInit"))       return FALSE;
-    if (!xf86LoaderCheckSymbol("drmAvailable"))	       return FALSE;
+    if (!xf86LoaderCheckSymbol("drmAvailable"))        return FALSE;
     if (!xf86LoaderCheckSymbol("DRIQueryVersion")) {
       xf86DrvMsg(pScreen->myNum, X_ERROR,
 		 "R128DRIScreenInit failed (libdri.a too old)\n");
@@ -1004,24 +1007,24 @@ Bool R128DRIScreenInit(ScreenPtr pScreen)
        DRIScreenInit(). */
     if (!(pDRIInfo = DRICreateInfoRec())) return FALSE;
 
-    info->pDRIInfo			 = pDRIInfo;
-    pDRIInfo->drmDriverName		 = R128_DRIVER_NAME;
-    pDRIInfo->clientDriverName		 = R128_DRIVER_NAME;
-    pDRIInfo->busIdString		 = xalloc(64);
+    info->pDRIInfo                       = pDRIInfo;
+    pDRIInfo->drmDriverName              = R128_DRIVER_NAME;
+    pDRIInfo->clientDriverName           = R128_DRIVER_NAME;
+    pDRIInfo->busIdString                = xalloc(64);
     sprintf(pDRIInfo->busIdString,
 	    "PCI:%d:%d:%d",
 	    info->PciInfo->bus,
 	    info->PciInfo->device,
 	    info->PciInfo->func);
-    pDRIInfo->ddxDriverMajorVersion	 = R128_VERSION_MAJOR;
-    pDRIInfo->ddxDriverMinorVersion	 = R128_VERSION_MINOR;
-    pDRIInfo->ddxDriverPatchVersion	 = R128_VERSION_PATCH;
+    pDRIInfo->ddxDriverMajorVersion      = R128_VERSION_MAJOR;
+    pDRIInfo->ddxDriverMinorVersion      = R128_VERSION_MINOR;
+    pDRIInfo->ddxDriverPatchVersion      = R128_VERSION_PATCH;
     pDRIInfo->frameBufferPhysicalAddress = info->LinearAddr;
-    pDRIInfo->frameBufferSize		 = info->FbMapSize;
-    pDRIInfo->frameBufferStride		 = (pScrn->displayWidth *
+    pDRIInfo->frameBufferSize            = info->FbMapSize;
+    pDRIInfo->frameBufferStride          = (pScrn->displayWidth *
 					    info->CurrentLayout.pixel_bytes);
-    pDRIInfo->ddxDrawableTableEntry	 = R128_MAX_DRAWABLES;
-    pDRIInfo->maxDrawableTableEntry	 = (SAREA_MAX_DRAWABLES
+    pDRIInfo->ddxDrawableTableEntry      = R128_MAX_DRAWABLES;
+    pDRIInfo->maxDrawableTableEntry      = (SAREA_MAX_DRAWABLES
 					    < R128_MAX_DRAWABLES
 					    ? SAREA_MAX_DRAWABLES
 					    : R128_MAX_DRAWABLES);
@@ -1145,10 +1148,10 @@ Bool R128DRIScreenInit(ScreenPtr pScreen)
    initialization. */
 Bool R128DRIFinishScreenInit(ScreenPtr pScreen)
 {
-    ScrnInfoPtr	     pScrn	= xf86Screens[pScreen->myNum];
-    R128InfoPtr	     info      = R128PTR(pScrn);
+    ScrnInfoPtr      pScrn      = xf86Screens[pScreen->myNum];
+    R128InfoPtr      info      = R128PTR(pScrn);
     R128SAREAPrivPtr pSAREAPriv;
-    R128DRIPtr	     pR128DRI;
+    R128DRIPtr       pR128DRI;
 
     /* Init and start the CCE */
     R128DRICCEInit(pScrn);
@@ -1159,23 +1162,23 @@ Bool R128DRIFinishScreenInit(ScreenPtr pScreen)
     info->pDRIInfo->driverSwapMethod = DRI_HIDE_X_CONTEXT;
     /* info->pDRIInfo->driverSwapMethod = DRI_SERVER_SWAP; */
 
-    pR128DRI		     = (R128DRIPtr)info->pDRIInfo->devPrivate;
+    pR128DRI                 = (R128DRIPtr)info->pDRIInfo->devPrivate;
     pR128DRI->registerHandle = info->registerHandle;
     pR128DRI->registerSize   = info->registerSize;
 
     pR128DRI->ringHandle     = info->ringHandle;
     pR128DRI->ringMapSize    = info->ringMapSize;
-    pR128DRI->ringSize	     = info->ringSize*1024*1024;
+    pR128DRI->ringSize       = info->ringSize*1024*1024;
 
     pR128DRI->ringReadPtrHandle = info->ringReadPtrHandle;
-    pR128DRI->ringReadMapSize	= info->ringReadMapSize;
+    pR128DRI->ringReadMapSize   = info->ringReadMapSize;
 
-    pR128DRI->vbHandle	     = info->vbHandle;
-    pR128DRI->vbMapSize	     = info->vbMapSize;
-    pR128DRI->vbOffset	     = info->vbStart;
-    pR128DRI->vbBufSize	     = info->vbBufSize;
+    pR128DRI->vbHandle       = info->vbHandle;
+    pR128DRI->vbMapSize      = info->vbMapSize;
+    pR128DRI->vbOffset       = info->vbStart;
+    pR128DRI->vbBufSize      = info->vbBufSize;
 
-    pR128DRI->indHandle	     = info->indHandle;
+    pR128DRI->indHandle      = info->indHandle;
     pR128DRI->indMapSize     = info->indMapSize;
 
     pR128DRI->agpTexHandle   = info->agpTexHandle;
@@ -1183,26 +1186,26 @@ Bool R128DRIFinishScreenInit(ScreenPtr pScreen)
     pR128DRI->log2AGPTexGran = info->log2AGPTexGran;
     pR128DRI->agpTexOffset   = info->agpTexStart;
 
-    pR128DRI->deviceID	     = info->Chipset;
-    pR128DRI->width	     = pScrn->virtualX;
-    pR128DRI->height	     = pScrn->virtualY;
-    pR128DRI->depth	     = pScrn->depth;
-    pR128DRI->bpp	     = pScrn->bitsPerPixel;
-
-    pR128DRI->fbX	     = info->fbX;
-    pR128DRI->fbY	     = info->fbY;
-    pR128DRI->backX	     = info->backX;
-    pR128DRI->backY	     = info->backY;
-    pR128DRI->depthX	     = info->depthX;
-    pR128DRI->depthY	     = info->depthY;
-    pR128DRI->textureX	     = info->textureX;
-    pR128DRI->textureY	     = info->textureY;
+    pR128DRI->deviceID       = info->Chipset;
+    pR128DRI->width          = pScrn->virtualX;
+    pR128DRI->height         = pScrn->virtualY;
+    pR128DRI->depth          = pScrn->depth;
+    pR128DRI->bpp            = pScrn->bitsPerPixel;
+
+    pR128DRI->fbX            = info->fbX;
+    pR128DRI->fbY            = info->fbY;
+    pR128DRI->backX          = info->backX;
+    pR128DRI->backY          = info->backY;
+    pR128DRI->depthX         = info->depthX;
+    pR128DRI->depthY         = info->depthY;
+    pR128DRI->textureX       = info->textureX;
+    pR128DRI->textureY       = info->textureY;
     pR128DRI->textureSize    = info->textureSize;
     pR128DRI->log2TexGran    = info->log2TexGran;
 
-    pR128DRI->IsPCI	     = info->IsPCI;
+    pR128DRI->IsPCI          = info->IsPCI;
 
-    pR128DRI->CCEMode	     = info->CCEMode;
+    pR128DRI->CCEMode        = info->CCEMode;
     pR128DRI->CCEFifoSize    = info->CCEFifoSize;
 
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "0x%08lx %d\n",
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h
index d9cdda3aa..db0100b67 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h
@@ -1,34 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h,v 1.1 2000/11/02 16:55:33 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h,v 1.2 2000/11/09 03:24:35 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                      Precision Insight, Inc., Cedar Park, Texas, and
+ *                      VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
+ * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Kevin E. Martin <kevin@precisioninsight.com>
- *   Rickard E. Faith <faith@precisioninsight.com>
+ *   Kevin E. Martin <martin@valinux.com>
+ *   Rickard E. Faith <faith@valinux.com>
  *
  */
 
@@ -40,76 +43,76 @@
 /* DRI Driver defaults */
 #define R128_DEFAULT_CCE_PIO_MODE R128_PM4_64PIO_64VCBM_64INDBM
 #define R128_DEFAULT_CCE_BM_MODE  R128_PM4_64BM_64VCBM_64INDBM
-#define R128_DEFAULT_AGP_MODE	  2
-#define R128_DEFAULT_AGP_SIZE	  8 /* MB (must be a power of 2 and > 4MB) */
-#define R128_DEFAULT_RING_SIZE	  1 /* MB (must be page aligned) */
-#define R128_DEFAULT_VB_SIZE	  1 /* MB (must be page aligned) */
-#define R128_DEFAULT_IND_SIZE	  1 /* MB (must be page aligned) */
+#define R128_DEFAULT_AGP_MODE     2
+#define R128_DEFAULT_AGP_SIZE     8 /* MB (must be a power of 2 and > 4MB) */
+#define R128_DEFAULT_RING_SIZE    1 /* MB (must be page aligned) */
+#define R128_DEFAULT_VB_SIZE      1 /* MB (must be page aligned) */
+#define R128_DEFAULT_IND_SIZE     1 /* MB (must be page aligned) */
 #define R128_DEFAULT_AGP_TEX_SIZE 1 /* MB (must be page aligned) */
 
-#define R128_DEFAULT_VB_BUF_SIZE  16384	 /* bytes */
-#define R128_DEFAULT_CCE_TIMEOUT  10000	 /* usecs */
+#define R128_DEFAULT_VB_BUF_SIZE  16384  /* bytes */
+#define R128_DEFAULT_CCE_TIMEOUT  10000  /* usecs */
 
-#define R128_AGP_MAX_MODE	  2
+#define R128_AGP_MAX_MODE         2
 
-#define R128CCE_USE_RING_BUFFER(m)					  \
-(((m) == R128_PM4_192BM) ||						  \
- ((m) == R128_PM4_128BM_64INDBM) ||					  \
- ((m) == R128_PM4_64BM_128INDBM) ||					  \
+#define R128CCE_USE_RING_BUFFER(m)                                        \
+(((m) == R128_PM4_192BM) ||                                               \
+ ((m) == R128_PM4_128BM_64INDBM) ||                                       \
+ ((m) == R128_PM4_64BM_128INDBM) ||                                       \
  ((m) == R128_PM4_64BM_64VCBM_64INDBM))
 
 typedef struct {
     /* MMIO register data */
-    drmHandle	  registerHandle;
-    drmSize	  registerSize;
+    drmHandle     registerHandle;
+    drmSize       registerSize;
 
     /* CCE ring buffer data */
-    drmHandle	  ringHandle;
-    drmSize	  ringMapSize;
-    int		  ringSize;
+    drmHandle     ringHandle;
+    drmSize       ringMapSize;
+    int           ringSize;
 
     /* CCE ring read pointer data */
-    drmHandle	  ringReadPtrHandle;
-    drmSize	  ringReadMapSize;
+    drmHandle     ringReadPtrHandle;
+    drmSize       ringReadMapSize;
 
     /* CCE vertex buffer data */
-    drmHandle	  vbHandle;
-    drmSize	  vbMapSize;
-    int		  vbOffset;
-    int		  vbBufSize;
+    drmHandle     vbHandle;
+    drmSize       vbMapSize;
+    int           vbOffset;
+    int           vbBufSize;
 
     /* CCE indirect buffer data */
-    drmHandle	  indHandle;
-    drmSize	  indMapSize;
+    drmHandle     indHandle;
+    drmSize       indMapSize;
 
     /* CCE AGP Texture data */
-    drmHandle	  agpTexHandle;
-    drmSize	  agpTexMapSize;
-    int		  log2AGPTexGran;
-    int		  agpTexOffset;
+    drmHandle     agpTexHandle;
+    drmSize       agpTexMapSize;
+    int           log2AGPTexGran;
+    int           agpTexOffset;
 
     /* DRI screen private data */
-    int		  deviceID;	/* PCI device ID */
-    int		  width;	/* Width in pixels of display */
-    int		  height;	/* Height in scanlines of display */
-    int		  depth;	/* Depth of display (8, 15, 16, 24) */
-    int		  bpp;		/* Bit depth of display (8, 16, 24, 32) */
-
-    int		  fbX;		/* Start of frame buffer */
-    int		  fbY;
-    int		  backX;	/* Start of shared back buffer */
-    int		  backY;
-    int		  depthX;	/* Start of shared depth buffer */
-    int		  depthY;
-    int		  textureX;	/* Start of texture data in frame buffer */
-    int		  textureY;
-    int		  textureSize;
-    int		  log2TexGran;
-
-    int		  IsPCI;	/* Current card is a PCI card */
-
-    int		  CCEMode;	/* CCE mode that server/clients use */
-    int		  CCEFifoSize;	/* Size of the CCE command FIFO */
+    int           deviceID;     /* PCI device ID */
+    int           width;        /* Width in pixels of display */
+    int           height;       /* Height in scanlines of display */
+    int           depth;        /* Depth of display (8, 15, 16, 24) */
+    int           bpp;          /* Bit depth of display (8, 16, 24, 32) */
+
+    int           fbX;          /* Start of frame buffer */
+    int           fbY;
+    int           backX;        /* Start of shared back buffer */
+    int           backY;
+    int           depthX;       /* Start of shared depth buffer */
+    int           depthY;
+    int           textureX;     /* Start of texture data in frame buffer */
+    int           textureY;
+    int           textureSize;
+    int           log2TexGran;
+
+    int           IsPCI;        /* Current card is a PCI card */
+
+    int           CCEMode;      /* CCE mode that server/clients use */
+    int           CCEFifoSize;  /* Size of the CCE command FIFO */
 } R128DRIRec, *R128DRIPtr;
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dripriv.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dripriv.h
index f26fe2bba..e0fe31bbe 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dripriv.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dripriv.h
@@ -1,34 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dripriv.h,v 1.1 2000/11/02 16:55:34 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dripriv.h,v 1.2 2000/11/09 03:24:35 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                      Precision Insight, Inc., Cedar Park, Texas, and
+ *                      VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
+ * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Rickard E. Faith <faith@precisioninsight.com>
- *   Kevin E. Martin <kevin@precisioninsight.com>
+ *   Rickard E. Faith <faith@valinux.com>
+ *   Kevin E. Martin <martin@valinux.com>
  *
  */
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c
index 008c1c553..3db0ab519 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c
@@ -1,34 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c,v 1.1 2000/11/02 16:55:35 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c,v 1.3 2000/11/09 03:24:35 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                      Precision Insight, Inc., Cedar Park, Texas, and
+ *                      VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
+ * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Rickard E. Faith <faith@precisioninsight.com>
- *   Kevin E. Martin <kevin@precisioninsight.com>
+ *   Rickard E. Faith <faith@valinux.com>
+ *   Kevin E. Martin <martin@valinux.com>
  *
  * Credits:
  *
@@ -70,7 +73,7 @@
 #include "mipointer.h"
 #include "micmap.h"
 
-#define USE_FB			/* not until overlays */
+#define USE_FB                  /* not until overlays */
 #ifdef USE_FB
 #include "fb.h"
 #else
@@ -133,34 +136,34 @@ typedef enum {
 } R128Opts;
 
 OptionInfoRec R128Options[] = {
-  { OPTION_NOACCEL,	 "NoAccel",	     OPTV_BOOLEAN, {0}, FALSE },
-  { OPTION_SW_CURSOR,	 "SWcursor",	     OPTV_BOOLEAN, {0}, FALSE },
-  { OPTION_DAC_6BIT,	 "Dac6Bit",	     OPTV_BOOLEAN, {0}, FALSE },
-  { OPTION_DAC_8BIT,	 "Dac8Bit",	     OPTV_BOOLEAN, {0}, TRUE  },
+  { OPTION_NOACCEL,      "NoAccel",          OPTV_BOOLEAN, {0}, FALSE },
+  { OPTION_SW_CURSOR,    "SWcursor",         OPTV_BOOLEAN, {0}, FALSE },
+  { OPTION_DAC_6BIT,     "Dac6Bit",          OPTV_BOOLEAN, {0}, FALSE },
+  { OPTION_DAC_8BIT,     "Dac8Bit",          OPTV_BOOLEAN, {0}, TRUE  },
 #ifdef XF86DRI
-  { OPTION_IS_PCI,	 "ForcePCIMode",     OPTV_BOOLEAN, {0}, FALSE },
-  { OPTION_CCE_PIO,	 "CCEPIOMode",	     OPTV_BOOLEAN, {0}, FALSE },
-  { OPTION_NO_SECURITY,	 "CCENoSecurity",    OPTV_BOOLEAN, {0}, FALSE },
+  { OPTION_IS_PCI,       "ForcePCIMode",     OPTV_BOOLEAN, {0}, FALSE },
+  { OPTION_CCE_PIO,      "CCEPIOMode",       OPTV_BOOLEAN, {0}, FALSE },
+  { OPTION_NO_SECURITY,  "CCENoSecurity",    OPTV_BOOLEAN, {0}, FALSE },
   { OPTION_USEC_TIMEOUT, "CCEusecTimeout",   OPTV_INTEGER, {0}, FALSE },
-  { OPTION_AGP_MODE,	 "AGPMode",	     OPTV_INTEGER, {0}, FALSE },
-  { OPTION_AGP_SIZE,	 "AGPSize",	     OPTV_INTEGER, {0}, FALSE },
-  { OPTION_RING_SIZE,	 "RingSize",	     OPTV_INTEGER, {0}, FALSE },
-  { OPTION_VERT_SIZE,	 "VBListSize",	     OPTV_INTEGER, {0}, FALSE },
-  { OPTION_VBUF_SIZE,	 "VBSize",	     OPTV_INTEGER, {0}, FALSE },
-  { OPTION_USE_CCE_2D,	 "UseCCEfor2D",	     OPTV_BOOLEAN, {0}, FALSE },
+  { OPTION_AGP_MODE,     "AGPMode",          OPTV_INTEGER, {0}, FALSE },
+  { OPTION_AGP_SIZE,     "AGPSize",          OPTV_INTEGER, {0}, FALSE },
+  { OPTION_RING_SIZE,    "RingSize",         OPTV_INTEGER, {0}, FALSE },
+  { OPTION_VERT_SIZE,    "VBListSize",       OPTV_INTEGER, {0}, FALSE },
+  { OPTION_VBUF_SIZE,    "VBSize",           OPTV_INTEGER, {0}, FALSE },
+  { OPTION_USE_CCE_2D,   "UseCCEfor2D",      OPTV_BOOLEAN, {0}, FALSE },
 #endif
 #if 0
   /* FIXME: Disable CRTOnly until it is tested */
-  { OPTION_CRT,		 "CRTOnly",	     OPTV_BOOLEAN, {0}, FALSE },
+  { OPTION_CRT,          "CRTOnly",          OPTV_BOOLEAN, {0}, FALSE },
 #endif
-  { OPTION_PANEL_WIDTH,	 "PanelWidth",	     OPTV_INTEGER, {0}, FALSE },
-  { OPTION_PANEL_HEIGHT, "PanelHeight",	     OPTV_INTEGER, {0}, FALSE },
+  { OPTION_PANEL_WIDTH,  "PanelWidth",       OPTV_INTEGER, {0}, FALSE },
+  { OPTION_PANEL_HEIGHT, "PanelHeight",      OPTV_INTEGER, {0}, FALSE },
   { OPTION_PROG_FP_REGS, "ProgramFPRegs",    OPTV_BOOLEAN, {0}, FALSE },
-  { OPTION_FBDEV,	 "UseFBDev",	     OPTV_BOOLEAN, {0}, FALSE },
-  { -1,			 NULL,		     OPTV_NONE,	   {0}, FALSE }
+  { OPTION_FBDEV,        "UseFBDev",         OPTV_BOOLEAN, {0}, FALSE },
+  { -1,                  NULL,               OPTV_NONE,    {0}, FALSE }
 };
 
-R128RAMRec R128RAM[] = {	/* Memory Specifications
+R128RAMRec R128RAM[] = {        /* Memory Specifications
 				   From RAGE 128 Software Development
 				   Manual (Technical Reference Manual P/N
 				   SDK-G04000 Rev 0.01), page 3-21.  */
@@ -314,11 +317,11 @@ static void R128FreeRec(ScrnInfoPtr pScrn)
     pScrn->driverPrivate = NULL;
 }
 
-/* Memory map the MMIO region.	Used during pre-init and by R128MapMem,
+/* Memory map the MMIO region.  Used during pre-init and by R128MapMem,
    below. */
 static Bool R128MapMMIO(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr info	      = R128PTR(pScrn);
+    R128InfoPtr info          = R128PTR(pScrn);
 
     if (info->FBDev) {
 	info->MMIO = fbdevHWMapMMIO(pScrn);
@@ -338,7 +341,7 @@ static Bool R128MapMMIO(ScrnInfoPtr pScrn)
    below. */
 static Bool R128UnmapMMIO(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr info	      = R128PTR(pScrn);
+    R128InfoPtr info          = R128PTR(pScrn);
 
     if (info->FBDev)
 	fbdevHWUnmapMMIO(pScrn);
@@ -349,10 +352,10 @@ static Bool R128UnmapMMIO(ScrnInfoPtr pScrn)
     return TRUE;
 }
 
-/* Memory map the frame buffer.	 Used by R128MapMem, below. */
+/* Memory map the frame buffer.  Used by R128MapMem, below. */
 static Bool R128MapFB(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr info	      = R128PTR(pScrn);
+    R128InfoPtr info          = R128PTR(pScrn);
 
     if (info->FBDev) {
 	info->FB = fbdevHWMapVidmem(pScrn);
@@ -371,7 +374,7 @@ static Bool R128MapFB(ScrnInfoPtr pScrn)
 /* Unmap the frame buffer.  Used by R128UnmapMem, below. */
 static Bool R128UnmapFB(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr info	      = R128PTR(pScrn);
+    R128InfoPtr info          = R128PTR(pScrn);
 
     if (info->FBDev)
 	fbdevHWUnmapVidmem(pScrn);
@@ -402,7 +405,7 @@ static Bool R128UnmapMem(ScrnInfoPtr pScrn)
 /* Read PLL information */
 int R128INPLL(ScrnInfoPtr pScrn, int addr)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     OUTREG8(R128_CLOCK_CNTL_INDEX, addr & 0x1f);
@@ -413,7 +416,7 @@ int R128INPLL(ScrnInfoPtr pScrn, int addr)
 /* Read PAL information (only used for debugging). */
 static int R128INPAL(int idx)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     OUTREG(R128_PALETTE_INDEX, idx << 16);
@@ -424,9 +427,9 @@ static int R128INPAL(int idx)
 /* Wait for vertical sync. */
 void R128WaitForVerticalSync(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     OUTREG(R128_GEN_INT_STATUS, R128_VSYNC_INT_AK);
     for (i = 0; i < R128_TIMEOUT; i++) {
@@ -437,7 +440,7 @@ void R128WaitForVerticalSync(ScrnInfoPtr pScrn)
 /* Blank screen. */
 static void R128Blank(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     OUTREGP(R128_CRTC_EXT_CNTL, R128_CRTC_DISPLAY_DIS, ~R128_CRTC_DISPLAY_DIS);
@@ -446,7 +449,7 @@ static void R128Blank(ScrnInfoPtr pScrn)
 /* Unblank screen. */
 static void R128Unblank(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     OUTREGP(R128_CRTC_EXT_CNTL, 0, ~R128_CRTC_DISPLAY_DIS);
@@ -472,12 +475,12 @@ static int R128Div(int n, int d)
 static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn)
 {
     R128InfoPtr info = R128PTR(pScrn);
-    int		i;
-    int		FPHeader = 0;
+    int         i;
+    int         FPHeader = 0;
 
-#define R128ReadBIOS(offset, buffer, length)				\
-     (info->BIOSFromPCI ?						\
-      xf86ReadPciBIOS(offset, info->PciTag, 0, buffer, length) :	\
+#define R128ReadBIOS(offset, buffer, length)                            \
+     (info->BIOSFromPCI ?                                               \
+      xf86ReadPciBIOS(offset, info->PciTag, 0, buffer, length) :        \
       xf86ReadBIOS(info->BIOSAddr, offset, buffer, length))
 
 #define R128_BIOS8(v)  (info->VBIOS[v])
@@ -518,7 +521,7 @@ static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn)
 	   tables, but until we find out where that offset is stored, we
 	   must search for the ATI signature string: "M3      ". */
 	for (i = 4; i < R128_VBIOS_SIZE-8; i++) {
-	    if (R128_BIOS8(i)	== 'M' &&
+	    if (R128_BIOS8(i)   == 'M' &&
 		R128_BIOS8(i+1) == '3' &&
 		R128_BIOS8(i+2) == ' ' &&
 		R128_BIOS8(i+3) == ' ' &&
@@ -558,15 +561,15 @@ static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn)
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Panel Type: ");
 	i = R128_BIOS16(info->FPBIOSstart+29);
 	if (i & 1) ErrorF("Color, ");
-	else	   ErrorF("Monochrome, ");
+	else       ErrorF("Monochrome, ");
 	if (i & 2) ErrorF("Dual(split), ");
-	else	   ErrorF("Single, ");
+	else       ErrorF("Single, ");
 	switch ((i >> 2) & 0x3f) {
-	case 0:	 ErrorF("STN");	       break;
-	case 1:	 ErrorF("TFT");	       break;
-	case 2:	 ErrorF("Active STN"); break;
-	case 3:	 ErrorF("EL");	       break;
-	case 4:	 ErrorF("Plasma");     break;
+	case 0:  ErrorF("STN");        break;
+	case 1:  ErrorF("TFT");        break;
+	case 2:  ErrorF("Active STN"); break;
+	case 3:  ErrorF("EL");         break;
+	case 4:  ErrorF("Plasma");     break;
 	default: ErrorF("UNKNOWN");    break;
 	}
 	ErrorF("\n");
@@ -584,14 +587,14 @@ static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn)
     return TRUE;
 }
 
-/* Read PLL parameters from BIOS block.	 Default to typical values if there
+/* Read PLL parameters from BIOS block.  Default to typical values if there
    is no BIOS. */
 static Bool R128GetPLLParameters(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info = R128PTR(pScrn);
-    R128PLLPtr	  pll  = &info->pll;
-    CARD16	  bios_header;
-    CARD16	  pll_info_block;
+    R128InfoPtr   info = R128PTR(pScrn);
+    R128PLLPtr    pll  = &info->pll;
+    CARD16        bios_header;
+    CARD16        pll_info_block;
 
 
     if (!info->VBIOS) {
@@ -605,7 +608,7 @@ static Bool R128GetPLLParameters(ScrnInfoPtr pScrn)
 	pll->reference_div  = 65;
 	pll->min_pll_freq   = 12500;
 	pll->max_pll_freq   = 25000;
-	pll->xclk	    = 10300;
+	pll->xclk           = 10300;
     } else {
 	bios_header    = R128_BIOS16(0x48);
 	pll_info_block = R128_BIOS16(bios_header + 0x30);
@@ -616,7 +619,7 @@ static Bool R128GetPLLParameters(ScrnInfoPtr pScrn)
 	pll->reference_div  = R128_BIOS16(pll_info_block + 0x10);
 	pll->min_pll_freq   = R128_BIOS32(pll_info_block + 0x12);
 	pll->max_pll_freq   = R128_BIOS32(pll_info_block + 0x16);
-	pll->xclk	    = R128_BIOS16(pll_info_block + 0x08);
+	pll->xclk           = R128_BIOS16(pll_info_block + 0x08);
     }
 
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -633,7 +636,7 @@ static Bool R128GetPLLParameters(ScrnInfoPtr pScrn)
 /* This is called by R128PreInit to set up the default visual. */
 static Bool R128PreInitVisual(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr info	      = R128PTR(pScrn);
+    R128InfoPtr info          = R128PTR(pScrn);
 
     if (!xf86SetDepthBpp(pScrn, 8, 8, 8, (Support24bppFb
 					  | Support32bppFb
@@ -659,7 +662,7 @@ static Bool R128PreInitVisual(ScrnInfoPtr pScrn)
     info->fifo_slots  = 0;
     info->pix24bpp    = xf86GetBppFromDepth(pScrn, pScrn->depth);
     info->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel;
-    info->CurrentLayout.depth	     = pScrn->depth;
+    info->CurrentLayout.depth        = pScrn->depth;
     info->CurrentLayout.pixel_bytes  = pScrn->bitsPerPixel / 8;
     info->CurrentLayout.pixel_code   = (pScrn->bitsPerPixel != 16
 				       ? pScrn->bitsPerPixel
@@ -688,7 +691,7 @@ static Bool R128PreInitVisual(ScrnInfoPtr pScrn)
 /* This is called by R128PreInit to handle all color weight issues. */
 static Bool R128PreInitWeight(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr info	      = R128PTR(pScrn);
+    R128InfoPtr info          = R128PTR(pScrn);
 
 				/* Save flag for 6 bit DAC to use for
 				   setting CRTC registers.  Otherwise use
@@ -719,21 +722,21 @@ static Bool R128PreInitWeight(ScrnInfoPtr pScrn)
    If memory type ever needs an override, put it in this routine. */
 static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    EntityInfoPtr pEnt	    = info->pEnt;
-    GDevPtr	  dev	    = pEnt->device;
-    int		  offset    = 0;	/* RAM Type */
-    MessageType	  from;
+    EntityInfoPtr pEnt      = info->pEnt;
+    GDevPtr       dev       = pEnt->device;
+    int           offset    = 0;        /* RAM Type */
+    MessageType   from;
 
 				/* Chipset */
     from = X_PROBED;
     if (dev->chipset && *dev->chipset) {
 	info->Chipset  = xf86StringToToken(R128Chipsets, dev->chipset);
-	from	       = X_CONFIG;
+	from           = X_CONFIG;
     } else if (dev->chipID >= 0) {
 	info->Chipset  = dev->chipID;
-	from	       = X_CONFIG;
+	from           = X_CONFIG;
     } else {
 	info->Chipset = info->PciInfo->chipType;
     }
@@ -758,7 +761,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 
 				/* Framebuffer */
 
-    from	     = X_PROBED;
+    from             = X_PROBED;
     info->LinearAddr = info->PciInfo->memBase[0] & 0xfc000000;
     if (dev->MemBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -766,7 +769,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 		   dev->MemBase,
 		   info->LinearAddr);
 	info->LinearAddr = dev->MemBase;
-	from		 = X_CONFIG;
+	from             = X_CONFIG;
     } else if (!info->LinearAddr) {
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		   "No valid linear framebuffer address\n");
@@ -776,7 +779,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 	       "Linear framebuffer at 0x%08lx\n", info->LinearAddr);
 
 				/* MMIO registers */
-    from	     = X_PROBED;
+    from             = X_PROBED;
     info->MMIOAddr   = info->PciInfo->memBase[2] & 0xffffff00;
     if (dev->IOBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -784,7 +787,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 		   dev->IOBase,
 		   info->MMIOAddr);
 	info->MMIOAddr = dev->IOBase;
-	from	       = X_CONFIG;
+	from           = X_CONFIG;
     } else if (!info->MMIOAddr) {
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid MMIO address\n");
 	return FALSE;
@@ -793,7 +796,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 	       "MMIO registers at 0x%08lx\n", info->MMIOAddr);
 
 				/* BIOS */
-    from	      = X_PROBED;
+    from              = X_PROBED;
     info->BIOSAddr    = info->PciInfo->biosBase & 0xfffe0000;
     if (dev->BiosBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -801,7 +804,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 		   dev->BiosBase,
 		   info->BIOSAddr);
 	info->BIOSAddr = dev->BiosBase;
-	from	       = X_CONFIG;
+	from           = X_CONFIG;
     }
     if (info->BIOSAddr) {
 	xf86DrvMsg(pScrn->scrnIndex, from,
@@ -827,27 +830,27 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 	case PCI_CHIP_RAGE128RK:
 	case PCI_CHIP_RAGE128RL:
 	case PCI_CHIP_RAGE128PF:
-	default:		 info->HasPanelRegs = FALSE; break;
+	default:                 info->HasPanelRegs = FALSE; break;
 	}
     }
 
 				/* Read registers used to determine options */
-    from		     = X_PROBED;
+    from                     = X_PROBED;
     R128MapMMIO(pScrn);
-    R128MMIO		     = info->MMIO;
+    R128MMIO                 = info->MMIO;
     if (info->FBDev)
-	pScrn->videoRam	     = fbdevHWGetVidmem(pScrn) / 1024;
+	pScrn->videoRam      = fbdevHWGetVidmem(pScrn) / 1024;
     else
-	pScrn->videoRam	     = INREG(R128_CONFIG_MEMSIZE) / 1024;
-    info->MemCntl	     = INREG(R128_MEM_CNTL);
+	pScrn->videoRam      = INREG(R128_CONFIG_MEMSIZE) / 1024;
+    info->MemCntl            = INREG(R128_MEM_CNTL);
 
-    info->BusCntl	     = INREG(R128_BUS_CNTL);
-    R128MMIO		     = NULL;
+    info->BusCntl            = INREG(R128_BUS_CNTL);
+    R128MMIO                 = NULL;
     R128UnmapMMIO(pScrn);
 
 				/* RAM */
     switch (info->MemCntl & 0x3) {
-    case 0:			/* SDR SGRAM 1:1 */
+    case 0:                     /* SDR SGRAM 1:1 */
 	switch (info->Chipset) {
 	case PCI_CHIP_RAGE128LE:
 	case PCI_CHIP_RAGE128LF:
@@ -857,12 +860,12 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 	case PCI_CHIP_RAGE128RF: offset = 0; break; /* 128-bit SDR SGRAM 1:1 */
 	case PCI_CHIP_RAGE128RK:
 	case PCI_CHIP_RAGE128RL:
-	default:		 offset = 1; break; /*	64-bit SDR SGRAM 1:1 */
+	default:                 offset = 1; break; /*  64-bit SDR SGRAM 1:1 */
 	}
 	break;
-    case 1:			 offset = 2; break; /*	64-bit SDR SGRAM 2:1 */
-    case 2:			 offset = 3; break; /*	64-bit DDR SGRAM     */
-    default:			 offset = 1; break; /*	64-bit SDR SGRAM 1:1 */
+    case 1:                      offset = 2; break; /*  64-bit SDR SGRAM 2:1 */
+    case 2:                      offset = 3; break; /*  64-bit DDR SGRAM     */
+    default:                     offset = 1; break; /*  64-bit SDR SGRAM 1:1 */
     }
     info->ram = &R128RAM[offset];
 
@@ -871,8 +874,8 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 		   "Video RAM override, using %d kB instead of %d kB\n",
 		   dev->videoRam,
 		   pScrn->videoRam);
-	from		 = X_CONFIG;
-	pScrn->videoRam	 = dev->videoRam;
+	from             = X_CONFIG;
+	pScrn->videoRam  = dev->videoRam;
     }
     pScrn->videoRam  &= ~1023;
     info->FbMapSize  = pScrn->videoRam * 1024;
@@ -931,7 +934,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 	case PCI_CHIP_RAGE128RF:
 	case PCI_CHIP_RAGE128RL:
 	case PCI_CHIP_RAGE128PF:
-	default:		 info->IsPCI = FALSE; break;
+	default:                 info->IsPCI = FALSE; break;
 	}
     }
 #endif
@@ -941,7 +944,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 
 static Bool R128PreInitDDC(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info = R128PTR(pScrn);
+    R128InfoPtr   info = R128PTR(pScrn);
     vbeInfoPtr pVbe;
 
     if (!xf86LoadSubModule(pScrn, "ddc")) return FALSE;
@@ -969,19 +972,19 @@ static Bool R128PreInitGamma(ScrnInfoPtr pScrn)
    for all of the valid modes. */
 static Bool R128PreInitModes(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info = R128PTR(pScrn);
+    R128InfoPtr   info = R128PTR(pScrn);
     ClockRangePtr clockRanges;
-    int		  modesFound;
-    char	  *mod = NULL;
-    const char	  *Sym = NULL;
+    int           modesFound;
+    char          *mod = NULL;
+    const char    *Sym = NULL;
 
 				/* Get mode information */
-    pScrn->progClock		       = TRUE;
-    clockRanges			       = xnfcalloc(sizeof(*clockRanges), 1);
-    clockRanges->next		       = NULL;
-    clockRanges->minClock	       = info->pll.min_pll_freq;
-    clockRanges->maxClock	       = info->pll.max_pll_freq * 10;
-    clockRanges->clockIndex	       = -1;
+    pScrn->progClock                   = TRUE;
+    clockRanges                        = xnfcalloc(sizeof(*clockRanges), 1);
+    clockRanges->next                  = NULL;
+    clockRanges->minClock              = info->pll.min_pll_freq;
+    clockRanges->maxClock              = info->pll.max_pll_freq * 10;
+    clockRanges->clockIndex            = -1;
     if (info->HasPanelRegs) {
 	clockRanges->interlaceAllowed  = FALSE;
 	clockRanges->doubleScanAllowed = FALSE;
@@ -994,12 +997,12 @@ static Bool R128PreInitModes(ScrnInfoPtr pScrn)
 				   pScrn->monitor->Modes,
 				   pScrn->display->modes,
 				   clockRanges,
-				   NULL,	/* linePitches */
-				   8 * 64,	/* minPitch */
-				   8 * 1024,	/* maxPitch */
+				   NULL,        /* linePitches */
+				   8 * 64,      /* minPitch */
+				   8 * 1024,    /* maxPitch */
 				   64 * pScrn->bitsPerPixel, /* pitchInc */
-				   128,		/* minHeight */
-				   2048,	/* maxHeight */
+				   128,         /* minHeight */
+				   2048,        /* maxHeight */
 				   pScrn->virtualX,
 				   pScrn->virtualY,
 				   info->FbMapSize,
@@ -1034,7 +1037,7 @@ static Bool R128PreInitModes(ScrnInfoPtr pScrn)
     case 16: mod = "cfb16"; Sym = "cfb16ScreenInit"; break;
     case 24:
 	if (info->pix24bpp == 24) {
-	    mod = "cfb24";	Sym = "cfb24ScreenInit";
+	    mod = "cfb24";      Sym = "cfb24ScreenInit";
 	} else {
 	    mod = "xf24_32bpp"; Sym = "cfb24_32ScreenInit";
 	}
@@ -1076,7 +1079,7 @@ static Bool R128PreInitAccel(ScrnInfoPtr pScrn)
 
 static Bool R128PreInitInt10(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info = R128PTR(pScrn);
+    R128InfoPtr   info = R128PTR(pScrn);
 #if 1
     if (xf86LoadSubModule(pScrn, "int10")) {
 	xf86Int10InfoPtr pInt;
@@ -1091,7 +1094,7 @@ static Bool R128PreInitInt10(ScrnInfoPtr pScrn)
 #ifdef XF86DRI
 static Bool R128PreInitDRI(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info = R128PTR(pScrn);
+    R128InfoPtr   info = R128PTR(pScrn);
 
     if (info->IsPCI) {
 	info->CCEMode = R128_DEFAULT_CCE_PIO_MODE;
@@ -1111,20 +1114,20 @@ static Bool R128PreInitDRI(ScrnInfoPtr pScrn)
 
     if (xf86ReturnOptValBool(R128Options, OPTION_NO_SECURITY, FALSE)) {
 	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-		   "WARNING!!!	CCE Security checks disabled!!! **********\n");
+		   "WARNING!!!  CCE Security checks disabled!!! **********\n");
 	info->CCESecure = FALSE;
     } else {
 	info->CCESecure = TRUE;
     }
 
-    info->agpMode	 = R128_DEFAULT_AGP_MODE;
-    info->agpSize	 = R128_DEFAULT_AGP_SIZE;
-    info->ringSize	 = R128_DEFAULT_RING_SIZE;
-    info->vbSize	 = R128_DEFAULT_VB_SIZE;
-    info->indSize	 = R128_DEFAULT_IND_SIZE;
-    info->agpTexSize	 = R128_DEFAULT_AGP_TEX_SIZE;
+    info->agpMode        = R128_DEFAULT_AGP_MODE;
+    info->agpSize        = R128_DEFAULT_AGP_SIZE;
+    info->ringSize       = R128_DEFAULT_RING_SIZE;
+    info->vbSize         = R128_DEFAULT_VB_SIZE;
+    info->indSize        = R128_DEFAULT_IND_SIZE;
+    info->agpTexSize     = R128_DEFAULT_AGP_TEX_SIZE;
 
-    info->vbBufSize	 = R128_DEFAULT_VB_BUF_SIZE;
+    info->vbBufSize      = R128_DEFAULT_VB_BUF_SIZE;
 
     info->CCEusecTimeout = R128_DEFAULT_CCE_TIMEOUT;
 
@@ -1223,7 +1226,7 @@ R128ProbeDDC(ScrnInfoPtr pScrn, int indx)
 /* R128PreInit is called once at server startup. */
 Bool R128PreInit(ScrnInfoPtr pScrn, int flags)
 {
-    R128InfoPtr	  info;
+    R128InfoPtr   info;
 
     R128TRACE(("R128PreInit\n"));
 
@@ -1257,9 +1260,9 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags)
 
     if (!R128GetRec(pScrn)) return FALSE;
 
-    info	       = R128PTR(pScrn);
+    info               = R128PTR(pScrn);
 
-    info->pEnt	       = xf86GetEntityInfo(pScrn->entityList[0]);
+    info->pEnt         = xf86GetEntityInfo(pScrn->entityList[0]);
     if (info->pEnt->location.type != BUS_PCI) goto fail;
 
     if (flags & PROBE_DETECT) {
@@ -1312,8 +1315,8 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags)
 	if (!fbdevHWInit(pScrn, info->PciInfo, NULL)) return FALSE;
 	pScrn->SwitchMode    = fbdevHWSwitchMode;
 	pScrn->AdjustFrame   = fbdevHWAdjustFrame;
-	pScrn->EnterVT	     = R128EnterVTFBDev;
-	pScrn->LeaveVT	     = R128LeaveVTFBDev;
+	pScrn->EnterVT       = R128EnterVTFBDev;
+	pScrn->LeaveVT       = R128LeaveVTFBDev;
 	pScrn->ValidMode     = fbdevHWValidMode;
     }
 
@@ -1326,7 +1329,7 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags)
 
     if (!R128GetPLLParameters(pScrn))  goto fail;
 
-    if (!R128PreInitDDC(pScrn))	       goto fail;
+    if (!R128PreInitDDC(pScrn))        goto fail;
 
     if (!R128PreInitGamma(pScrn))      goto fail;
 
@@ -1337,7 +1340,7 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags)
     if (!R128PreInitAccel(pScrn))      goto fail;
 
 #ifdef XF86DRI
-    if (!R128PreInitDRI(pScrn))	       goto fail;
+    if (!R128PreInitDRI(pScrn))        goto fail;
 #endif
 
 				/* Free the video bios (if applicable) */
@@ -1366,27 +1369,27 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags)
 static void R128LoadPalette(ScrnInfoPtr pScrn, int numColors,
 			    int *indices, LOCO *colors, VisualPtr pVisual)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  i;
-    int		  idx;
+    int           i;
+    int           idx;
     unsigned char r, g, b;
 
     /* Select palette 0 (main CRTC) if using FP-enabled chip */
     if (info->HasPanelRegs) PAL_SELECT(0);
 
     if (info->CurrentLayout.depth == 15) {
-	/* 15bpp mode.	This sends 32 values. */
+	/* 15bpp mode.  This sends 32 values. */
 	for (i = 0; i < numColors; i++) {
 	    idx = indices[i];
-	    r	= colors[idx].red;
-	    g	= colors[idx].green;
-	    b	= colors[idx].blue;
+	    r   = colors[idx].red;
+	    g   = colors[idx].green;
+	    b   = colors[idx].blue;
 	    OUTPAL(idx * 8, r, g, b);
 	}
     }
     else if (info->CurrentLayout.depth == 16) {
-	/* 16bpp mode.	This sends 64 values. */
+	/* 16bpp mode.  This sends 64 values. */
 				/* There are twice as many green values as
 				   there are values for red and blue.  So,
 				   we take each red and blue pair, and
@@ -1394,9 +1397,9 @@ static void R128LoadPalette(ScrnInfoPtr pScrn, int numColors,
 				   values. */
 	for (i = 0; i < numColors; i++) {
 	    idx = indices[i];
-	    r	= colors[idx / 2].red;
-	    g	= colors[idx].green;
-	    b	= colors[idx / 2].blue;
+	    r   = colors[idx / 2].red;
+	    g   = colors[idx].green;
+	    b   = colors[idx / 2].blue;
 	    OUTPAL(idx * 4, r, g, b);
 	}
     }
@@ -1404,9 +1407,9 @@ static void R128LoadPalette(ScrnInfoPtr pScrn, int numColors,
 	/* 8bpp mode.  This sends 256 values. */
 	for (i = 0; i < numColors; i++) {
 	    idx = indices[i];
-	    r	= colors[idx].red;
-	    b	= colors[idx].blue;
-	    g	= colors[idx].green;
+	    r   = colors[idx].red;
+	    b   = colors[idx].blue;
+	    g   = colors[idx].green;
 	    OUTPAL(idx, r, g, b);
 	}
     }
@@ -1417,8 +1420,8 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 {
     ScrnInfoPtr pScrn  = xf86Screens[pScreen->myNum];
     R128InfoPtr info   = R128PTR(pScrn);
-    BoxRec	MemBox;
-    int		y2;
+    BoxRec      MemBox;
+    int         y2;
 
     R128TRACE(("R128ScreenInit %x %d\n", pScrn->memPhysBase, pScrn->fbOffset));
 
@@ -1430,8 +1433,8 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     if (!R128MapMem(pScrn)) return FALSE;
     pScrn->fbOffset    = 0;
 #ifdef XF86DRI
-    info->fbX	       = 0;
-    info->fbY	       = 0;
+    info->fbX          = 0;
+    info->fbY          = 0;
 #endif
 
     info->PaletteSavedOnVT = FALSE;
@@ -1466,7 +1469,7 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	   times the virtual size of the screen below. */
 	int width_bytes = (pScrn->displayWidth *
 			   info->CurrentLayout.pixel_bytes);
-	int maxy	= info->FbMapSize / width_bytes;
+	int maxy        = info->FbMapSize / width_bytes;
 
 	if (!xf86ReturnOptValBool(R128Options, OPTION_NOACCEL, FALSE) &&
 	    (maxy > pScrn->virtualY * 3)
@@ -1542,14 +1545,13 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     if (pScrn->bitsPerPixel > 8) {
 	VisualPtr visual;
 
-	for (visual = pScreen->visuals + pScreen->numVisuals;
-	     visual >= pScreen->visuals;
-	     visual--) {
+	visual = pScreen->visuals + pScreen->numVisuals;
+	while (--visual >= pScreen->visuals) {
 	    if ((visual->class | DynamicClass) == DirectColor) {
 		visual->offsetRed   = pScrn->offset.red;
 		visual->offsetGreen = pScrn->offset.green;
 		visual->offsetBlue  = pScrn->offset.blue;
-		visual->redMask	    = pScrn->mask.red;
+		visual->redMask     = pScrn->mask.red;
 		visual->greenMask   = pScrn->mask.green;
 		visual->blueMask    = pScrn->mask.blue;
 	    }
@@ -1562,7 +1564,7 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     MemBox.x1 = 0;
     MemBox.y1 = 0;
     MemBox.x2 = pScrn->displayWidth;
-    y2	      = (info->FbMapSize
+    y2        = (info->FbMapSize
 		 / (pScrn->displayWidth * info->CurrentLayout.pixel_bytes));
     if (y2 >= 32768) y2 = 32767; /* because MemBox.y2 is signed short */
     MemBox.y2 = y2;
@@ -1578,7 +1580,7 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 		   MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2);
 	return FALSE;
     } else {
-	int	  width, height;
+	int       width, height;
 	FBAreaPtr fbarea;
 
 	xf86DrvMsg(scrnIndex, X_INFO,
@@ -1606,10 +1608,10 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 				   as for local textures. */
     if (info->directRenderingEnabled) {
 	FBAreaPtr fbarea;
-	int	  width_bytes = (pScrn->displayWidth *
+	int       width_bytes = (pScrn->displayWidth *
 				 info->CurrentLayout.pixel_bytes);
-	int	  maxy	      = info->FbMapSize / width_bytes;
-	int	  l;
+	int       maxy        = info->FbMapSize / width_bytes;
+	int       l;
 
 	switch (info->CCEMode) {
 	case R128_DEFAULT_CCE_PIO_MODE:
@@ -1689,7 +1691,7 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	    xf86DrvMsg(scrnIndex, X_INFO,
 		       "Reserved %d kb for textures: (%d,%d)-(%d,%d)\n",
 		       info->textureSize/1024,
-		       info->textureX,	    info->textureY,
+		       info->textureX,      info->textureY,
 		       pScrn->displayWidth, maxy);
 	} else if ((fbarea = xf86AllocateOffscreenArea(pScreen,
 						       pScrn->virtualX,
@@ -1792,10 +1794,10 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	R128InitVideo(pScreen);
 
 				/* Provide SaveScreen */
-    pScreen->SaveScreen	 = R128SaveScreen;
+    pScreen->SaveScreen  = R128SaveScreen;
 
 				/* Wrap CloseScreen */
-    info->CloseScreen	 = pScreen->CloseScreen;
+    info->CloseScreen    = pScreen->CloseScreen;
     pScreen->CloseScreen = R128CloseScreen;
 
 				/* Note unused options */
@@ -1823,31 +1825,31 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 /* Write common registers (initialized to 0). */
 static void R128RestoreCommonRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
-    OUTREG(R128_OVR_CLR,	      restore->ovr_clr);
+    OUTREG(R128_OVR_CLR,              restore->ovr_clr);
     OUTREG(R128_OVR_WID_LEFT_RIGHT,   restore->ovr_wid_left_right);
     OUTREG(R128_OVR_WID_TOP_BOTTOM,   restore->ovr_wid_top_bottom);
-    OUTREG(R128_OV0_SCALE_CNTL,	      restore->ov0_scale_cntl);
-    OUTREG(R128_MPP_TB_CONFIG,	      restore->mpp_tb_config );
-    OUTREG(R128_MPP_GP_CONFIG,	      restore->mpp_gp_config );
-    OUTREG(R128_SUBPIC_CNTL,	      restore->subpic_cntl);
-    OUTREG(R128_VIPH_CONTROL,	      restore->viph_control);
-    OUTREG(R128_I2C_CNTL_1,	      restore->i2c_cntl_1);
-    OUTREG(R128_GEN_INT_CNTL,	      restore->gen_int_cntl);
-    OUTREG(R128_CAP0_TRIG_CNTL,	      restore->cap0_trig_cntl);
-    OUTREG(R128_CAP1_TRIG_CNTL,	      restore->cap1_trig_cntl);
-    OUTREG(R128_BUS_CNTL,	      restore->bus_cntl);
+    OUTREG(R128_OV0_SCALE_CNTL,       restore->ov0_scale_cntl);
+    OUTREG(R128_MPP_TB_CONFIG,        restore->mpp_tb_config );
+    OUTREG(R128_MPP_GP_CONFIG,        restore->mpp_gp_config );
+    OUTREG(R128_SUBPIC_CNTL,          restore->subpic_cntl);
+    OUTREG(R128_VIPH_CONTROL,         restore->viph_control);
+    OUTREG(R128_I2C_CNTL_1,           restore->i2c_cntl_1);
+    OUTREG(R128_GEN_INT_CNTL,         restore->gen_int_cntl);
+    OUTREG(R128_CAP0_TRIG_CNTL,       restore->cap0_trig_cntl);
+    OUTREG(R128_CAP1_TRIG_CNTL,       restore->cap1_trig_cntl);
+    OUTREG(R128_BUS_CNTL,             restore->bus_cntl);
 }
 
 /* Write CRTC registers. */
 static void R128RestoreCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
-    OUTREG(R128_CRTC_GEN_CNTL,	      restore->crtc_gen_cntl);
+    OUTREG(R128_CRTC_GEN_CNTL,        restore->crtc_gen_cntl);
 
     OUTREGP(R128_CRTC_EXT_CNTL, restore->crtc_ext_cntl,
 	    R128_CRTC_VSYNC_DIS | R128_CRTC_HSYNC_DIS | R128_CRTC_DISPLAY_DIS);
@@ -1859,28 +1861,28 @@ static void R128RestoreCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
     OUTREG(R128_CRTC_H_SYNC_STRT_WID, restore->crtc_h_sync_strt_wid);
     OUTREG(R128_CRTC_V_TOTAL_DISP,    restore->crtc_v_total_disp);
     OUTREG(R128_CRTC_V_SYNC_STRT_WID, restore->crtc_v_sync_strt_wid);
-    OUTREG(R128_CRTC_OFFSET,	      restore->crtc_offset);
+    OUTREG(R128_CRTC_OFFSET,          restore->crtc_offset);
     OUTREG(R128_CRTC_OFFSET_CNTL,     restore->crtc_offset_cntl);
-    OUTREG(R128_CRTC_PITCH,	      restore->crtc_pitch);
+    OUTREG(R128_CRTC_PITCH,           restore->crtc_pitch);
 }
 
 /* Write flat panel registers */
 static void R128RestoreFPRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    CARD32	  tmp;
+    CARD32        tmp;
 
-    OUTREG(R128_CRTC2_GEN_CNTL,	      restore->crtc2_gen_cntl);
+    OUTREG(R128_CRTC2_GEN_CNTL,       restore->crtc2_gen_cntl);
     OUTREG(R128_FP_CRTC_H_TOTAL_DISP, restore->fp_crtc_h_total_disp);
     OUTREG(R128_FP_CRTC_V_TOTAL_DISP, restore->fp_crtc_v_total_disp);
-    OUTREG(R128_FP_GEN_CNTL,	      restore->fp_gen_cntl);
+    OUTREG(R128_FP_GEN_CNTL,          restore->fp_gen_cntl);
     OUTREG(R128_FP_H_SYNC_STRT_WID,   restore->fp_h_sync_strt_wid);
     OUTREG(R128_FP_HORZ_STRETCH,      restore->fp_horz_stretch);
-    OUTREG(R128_FP_PANEL_CNTL,	      restore->fp_panel_cntl);
+    OUTREG(R128_FP_PANEL_CNTL,        restore->fp_panel_cntl);
     OUTREG(R128_FP_V_SYNC_STRT_WID,   restore->fp_v_sync_strt_wid);
     OUTREG(R128_FP_VERT_STRETCH,      restore->fp_vert_stretch);
-    OUTREG(R128_TMDS_CRC,	      restore->tmds_crc);
+    OUTREG(R128_TMDS_CRC,             restore->tmds_crc);
 
     tmp = INREG(R128_LVDS_GEN_CNTL);
     if ((tmp & (R128_LVDS_ON | R128_LVDS_BLON)) ==
@@ -1906,7 +1908,7 @@ static void R128PLLWaitForReadUpdateComplete(ScrnInfoPtr pScrn)
 
 static void R128PLLWriteUpdate(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     OUTPLLP(pScrn, R128_PPLL_REF_DIV, R128_PPLL_ATOMIC_UPDATE_W, 0xffff);
@@ -1915,7 +1917,7 @@ static void R128PLLWriteUpdate(ScrnInfoPtr pScrn)
 /* Write PLL registers. */
 static void R128RestorePLLRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     OUTREGP(R128_CLOCK_CNTL_INDEX, R128_PLL_DIV_SEL, 0xffff);
@@ -1960,7 +1962,7 @@ static void R128RestorePLLRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
 /* Write DDA registers. */
 static void R128RestoreDDARegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     OUTREG(R128_DDA_CONFIG, restore->dda_config);
@@ -1970,9 +1972,9 @@ static void R128RestoreDDARegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
 /* Write palette data. */
 static void R128RestorePalette(ScrnInfoPtr pScrn, R128SavePtr restore)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     if (!restore->palette_valid) return;
 
@@ -1983,7 +1985,7 @@ static void R128RestorePalette(ScrnInfoPtr pScrn, R128SavePtr restore)
     for (i = 0; i < 256; i++) OUTPAL_NEXT_CARD32(restore->palette[i]);
 }
 
-/* Write out state to define a new video mode.	*/
+/* Write out state to define a new video mode.  */
 static void R128RestoreMode(ScrnInfoPtr pScrn, R128SavePtr restore)
 {
     R128InfoPtr info = R128PTR(pScrn);
@@ -2002,67 +2004,67 @@ static void R128RestoreMode(ScrnInfoPtr pScrn, R128SavePtr restore)
 /* Read common registers. */
 static void R128SaveCommonRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
-    save->ovr_clr	     = INREG(R128_OVR_CLR);
+    save->ovr_clr            = INREG(R128_OVR_CLR);
     save->ovr_wid_left_right = INREG(R128_OVR_WID_LEFT_RIGHT);
     save->ovr_wid_top_bottom = INREG(R128_OVR_WID_TOP_BOTTOM);
     save->ov0_scale_cntl     = INREG(R128_OV0_SCALE_CNTL);
-    save->mpp_tb_config	     = INREG(R128_MPP_TB_CONFIG);
-    save->mpp_gp_config	     = INREG(R128_MPP_GP_CONFIG);
-    save->subpic_cntl	     = INREG(R128_SUBPIC_CNTL);
-    save->viph_control	     = INREG(R128_VIPH_CONTROL);
-    save->i2c_cntl_1	     = INREG(R128_I2C_CNTL_1);
-    save->gen_int_cntl	     = INREG(R128_GEN_INT_CNTL);
+    save->mpp_tb_config      = INREG(R128_MPP_TB_CONFIG);
+    save->mpp_gp_config      = INREG(R128_MPP_GP_CONFIG);
+    save->subpic_cntl        = INREG(R128_SUBPIC_CNTL);
+    save->viph_control       = INREG(R128_VIPH_CONTROL);
+    save->i2c_cntl_1         = INREG(R128_I2C_CNTL_1);
+    save->gen_int_cntl       = INREG(R128_GEN_INT_CNTL);
     save->cap0_trig_cntl     = INREG(R128_CAP0_TRIG_CNTL);
     save->cap1_trig_cntl     = INREG(R128_CAP1_TRIG_CNTL);
-    save->bus_cntl	     = INREG(R128_BUS_CNTL);
+    save->bus_cntl           = INREG(R128_BUS_CNTL);
 }
 
 /* Read CRTC registers. */
 static void R128SaveCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
-    save->crtc_gen_cntl	       = INREG(R128_CRTC_GEN_CNTL);
-    save->crtc_ext_cntl	       = INREG(R128_CRTC_EXT_CNTL);
-    save->dac_cntl	       = INREG(R128_DAC_CNTL);
+    save->crtc_gen_cntl        = INREG(R128_CRTC_GEN_CNTL);
+    save->crtc_ext_cntl        = INREG(R128_CRTC_EXT_CNTL);
+    save->dac_cntl             = INREG(R128_DAC_CNTL);
     save->crtc_h_total_disp    = INREG(R128_CRTC_H_TOTAL_DISP);
     save->crtc_h_sync_strt_wid = INREG(R128_CRTC_H_SYNC_STRT_WID);
     save->crtc_v_total_disp    = INREG(R128_CRTC_V_TOTAL_DISP);
     save->crtc_v_sync_strt_wid = INREG(R128_CRTC_V_SYNC_STRT_WID);
-    save->crtc_offset	       = INREG(R128_CRTC_OFFSET);
+    save->crtc_offset          = INREG(R128_CRTC_OFFSET);
     save->crtc_offset_cntl     = INREG(R128_CRTC_OFFSET_CNTL);
-    save->crtc_pitch	       = INREG(R128_CRTC_PITCH);
+    save->crtc_pitch           = INREG(R128_CRTC_PITCH);
 }
 
 /* Read flat panel registers */
 static void R128SaveFPRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
     save->crtc2_gen_cntl       = INREG(R128_CRTC2_GEN_CNTL);
     save->fp_crtc_h_total_disp = INREG(R128_FP_CRTC_H_TOTAL_DISP);
     save->fp_crtc_v_total_disp = INREG(R128_FP_CRTC_V_TOTAL_DISP);
-    save->fp_gen_cntl	       = INREG(R128_FP_GEN_CNTL);
+    save->fp_gen_cntl          = INREG(R128_FP_GEN_CNTL);
     save->fp_h_sync_strt_wid   = INREG(R128_FP_H_SYNC_STRT_WID);
     save->fp_horz_stretch      = INREG(R128_FP_HORZ_STRETCH);
-    save->fp_panel_cntl	       = INREG(R128_FP_PANEL_CNTL);
+    save->fp_panel_cntl        = INREG(R128_FP_PANEL_CNTL);
     save->fp_v_sync_strt_wid   = INREG(R128_FP_V_SYNC_STRT_WID);
     save->fp_vert_stretch      = INREG(R128_FP_VERT_STRETCH);
-    save->lvds_gen_cntl	       = INREG(R128_LVDS_GEN_CNTL);
-    save->tmds_crc	       = INREG(R128_TMDS_CRC);
+    save->lvds_gen_cntl        = INREG(R128_LVDS_GEN_CNTL);
+    save->tmds_crc             = INREG(R128_TMDS_CRC);
 }
 
 /* Read PLL registers. */
 static void R128SavePLLRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
 {
-    save->ppll_ref_div	       = INPLL(pScrn, R128_PPLL_REF_DIV);
-    save->ppll_div_3	       = INPLL(pScrn, R128_PPLL_DIV_3);
-    save->htotal_cntl	       = INPLL(pScrn, R128_HTOTAL_CNTL);
+    save->ppll_ref_div         = INPLL(pScrn, R128_PPLL_REF_DIV);
+    save->ppll_div_3           = INPLL(pScrn, R128_PPLL_DIV_3);
+    save->htotal_cntl          = INPLL(pScrn, R128_HTOTAL_CNTL);
 
     R128TRACE(("Read: 0x%08x 0x%08x 0x%08x\n",
 	       save->ppll_ref_div,
@@ -2077,19 +2079,19 @@ static void R128SavePLLRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
 /* Read DDA registers. */
 static void R128SaveDDARegisters(ScrnInfoPtr pScrn, R128SavePtr save)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
 
-    save->dda_config	       = INREG(R128_DDA_CONFIG);
-    save->dda_on_off	       = INREG(R128_DDA_ON_OFF);
+    save->dda_config           = INREG(R128_DDA_CONFIG);
+    save->dda_on_off           = INREG(R128_DDA_ON_OFF);
 }
 
 /* Read palette data. */
 static void R128SavePalette(ScrnInfoPtr pScrn, R128SavePtr save)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     /* Select palette 0 (main CRTC) if using FP-enabled chip */
     if (info->HasPanelRegs) PAL_SELECT(0);
@@ -2118,10 +2120,10 @@ static void R128SaveMode(ScrnInfoPtr pScrn, R128SavePtr save)
 /* Save everything needed to restore the original VC state. */
 static void R128Save(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    R128SavePtr	  save	    = &info->SavedReg;
-    vgaHWPtr	  hwp	    = VGAHWPTR(pScrn);
+    R128SavePtr   save      = &info->SavedReg;
+    vgaHWPtr      hwp       = VGAHWPTR(pScrn);
 
     R128TRACE(("R128Save\n"));
     if (info->FBDev) {
@@ -2134,20 +2136,20 @@ static void R128Save(ScrnInfoPtr pScrn)
 
     R128SaveMode(pScrn, save);
 
-    save->dp_datatype	   = INREG(R128_DP_DATATYPE);
+    save->dp_datatype      = INREG(R128_DP_DATATYPE);
     save->gen_reset_cntl   = INREG(R128_GEN_RESET_CNTL);
     save->clock_cntl_index = INREG(R128_CLOCK_CNTL_INDEX);
     save->amcgpio_en_reg   = INREG(R128_AMCGPIO_EN_REG);
-    save->amcgpio_mask	   = INREG(R128_AMCGPIO_MASK);
+    save->amcgpio_mask     = INREG(R128_AMCGPIO_MASK);
 }
 
 /* Restore the original (text) mode. */
 static void R128Restore(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    R128SavePtr	  restore   = &info->SavedReg;
-    vgaHWPtr	  hwp	    = VGAHWPTR(pScrn);
+    R128SavePtr   restore   = &info->SavedReg;
+    vgaHWPtr      hwp       = VGAHWPTR(pScrn);
 
     R128TRACE(("R128Restore\n"));
     if (info->FBDev) {
@@ -2156,11 +2158,11 @@ static void R128Restore(ScrnInfoPtr pScrn)
     }
 
     R128Blank(pScrn);
-    OUTREG(R128_AMCGPIO_MASK,	  restore->amcgpio_mask);
-    OUTREG(R128_AMCGPIO_EN_REG,	  restore->amcgpio_en_reg);
+    OUTREG(R128_AMCGPIO_MASK,     restore->amcgpio_mask);
+    OUTREG(R128_AMCGPIO_EN_REG,   restore->amcgpio_en_reg);
     OUTREG(R128_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
-    OUTREG(R128_GEN_RESET_CNTL,	  restore->gen_reset_cntl);
-    OUTREG(R128_DP_DATATYPE,	  restore->dp_datatype);
+    OUTREG(R128_GEN_RESET_CNTL,   restore->gen_reset_cntl);
+    OUTREG(R128_DP_DATATYPE,      restore->dp_datatype);
 
     R128RestoreMode(pScrn, restore);
     vgaHWUnlock(hwp);
@@ -2174,19 +2176,19 @@ static void R128Restore(ScrnInfoPtr pScrn)
 /* Define common registers for requested video mode. */
 static void R128InitCommonRegisters(R128SavePtr save, R128InfoPtr info)
 {
-    save->ovr_clr	     = 0;
+    save->ovr_clr            = 0;
     save->ovr_wid_left_right = 0;
     save->ovr_wid_top_bottom = 0;
     save->ov0_scale_cntl     = 0;
-    save->mpp_tb_config	     = 0;
-    save->mpp_gp_config	     = 0;
-    save->subpic_cntl	     = 0;
-    save->viph_control	     = 0;
-    save->i2c_cntl_1	     = 0;
-    save->gen_int_cntl	     = 0;
+    save->mpp_tb_config      = 0;
+    save->mpp_gp_config      = 0;
+    save->subpic_cntl        = 0;
+    save->viph_control       = 0;
+    save->i2c_cntl_1         = 0;
+    save->gen_int_cntl       = 0;
     save->cap0_trig_cntl     = 0;
     save->cap1_trig_cntl     = 0;
-    save->bus_cntl	     = info->BusCntl;
+    save->bus_cntl           = info->BusCntl;
     /*
      * If bursts are enabled, turn on discards and aborts
      */
@@ -2198,23 +2200,23 @@ static void R128InitCommonRegisters(R128SavePtr save, R128InfoPtr info)
 static Bool R128InitCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save,
 				  DisplayModePtr mode, R128InfoPtr info)
 {
-    int	   format;
-    int	   hsync_start;
-    int	   hsync_wid;
-    int	   hsync_fudge;
-    int	   vsync_wid;
-    int	   bytpp;
-    int	   hsync_fudge_default[] = { 0x00, 0x12, 0x09, 0x09, 0x06, 0x05 };
-    int	   hsync_fudge_fp[]	 = { 0x12, 0x11, 0x09, 0x09, 0x05, 0x05 };
-    int	   hsync_fudge_fp_crt[]	 = { 0x12, 0x10, 0x08, 0x08, 0x04, 0x04 };
+    int    format;
+    int    hsync_start;
+    int    hsync_wid;
+    int    hsync_fudge;
+    int    vsync_wid;
+    int    bytpp;
+    int    hsync_fudge_default[] = { 0x00, 0x12, 0x09, 0x09, 0x06, 0x05 };
+    int    hsync_fudge_fp[]      = { 0x12, 0x11, 0x09, 0x09, 0x05, 0x05 };
+    int    hsync_fudge_fp_crt[]  = { 0x12, 0x10, 0x08, 0x08, 0x04, 0x04 };
 
     switch (info->CurrentLayout.pixel_code) {
     case 4:  format = 1; bytpp = 0; break;
     case 8:  format = 2; bytpp = 1; break;
-    case 15: format = 3; bytpp = 2; break;	/*  555 */
-    case 16: format = 4; bytpp = 2; break;	/*  565 */
-    case 24: format = 5; bytpp = 3; break;	/*  RGB */
-    case 32: format = 6; bytpp = 4; break;	/* xRGB */
+    case 15: format = 3; bytpp = 2; break;      /*  555 */
+    case 16: format = 4; bytpp = 2; break;      /*  565 */
+    case 24: format = 5; bytpp = 3; break;      /*  RGB */
+    case 32: format = 6; bytpp = 4; break;      /* xRGB */
     default:
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		   "Unsupported pixel depth (%d)\n", info->CurrentLayout.bitsPerPixel);
@@ -2224,8 +2226,8 @@ static Bool R128InitCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save,
 
     if (info->HasPanelRegs)
 	if (info->CRTOnly) hsync_fudge = hsync_fudge_fp_crt[format-1];
-	else		   hsync_fudge = hsync_fudge_fp[format-1];
-    else		   hsync_fudge = hsync_fudge_default[format-1];
+	else               hsync_fudge = hsync_fudge_fp[format-1];
+    else                   hsync_fudge = hsync_fudge_default[format-1];
 
     save->crtc_gen_cntl = (R128_CRTC_EXT_DISP_EN
 			  | R128_CRTC_EN
@@ -2238,7 +2240,7 @@ static Bool R128InitCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save,
 			     : 0));
 
     save->crtc_ext_cntl = R128_VGA_ATI_LINEAR | R128_XCRT_CNT_EN;
-    save->dac_cntl	= (R128_DAC_MASK_ALL
+    save->dac_cntl      = (R128_DAC_MASK_ALL
 			   | R128_DAC_VGA_ADR_EN
 			   | (info->dac6bits ? 0 : R128_DAC_8BIT_EN));
 
@@ -2246,7 +2248,7 @@ static Bool R128InitCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save,
 			      | (((mode->CrtcHDisplay / 8) - 1) << 16));
 
     hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8;
-    if (!hsync_wid)	  hsync_wid = 1;
+    if (!hsync_wid)       hsync_wid = 1;
     if (hsync_wid > 0x3f) hsync_wid = 0x3f;
 
     hsync_start = mode->CrtcHSyncStart - 8 + hsync_fudge;
@@ -2271,7 +2273,7 @@ static Bool R128InitCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save,
 #endif
 
     vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart;
-    if (!vsync_wid)	  vsync_wid = 1;
+    if (!vsync_wid)       vsync_wid = 1;
     if (vsync_wid > 0x1f) vsync_wid = 0x1f;
 
     save->crtc_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff)
@@ -2279,9 +2281,9 @@ static Bool R128InitCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save,
 				 | ((mode->Flags & V_NVSYNC)
 				    ? R128_CRTC_V_SYNC_POL
 				    : 0));
-    save->crtc_offset	   = 0;
+    save->crtc_offset      = 0;
     save->crtc_offset_cntl = 0;
-    save->crtc_pitch	   = info->CurrentLayout.displayWidth / 8;
+    save->crtc_pitch       = info->CurrentLayout.displayWidth / 8;
 
     R128TRACE(("Pitch = %d bytes (virtualX = %d, displayWidth = %d)\n",
 	       save->crtc_pitch, pScrn->virtualX, info->CurrentLayout.displayWidth));
@@ -2292,8 +2294,8 @@ static Bool R128InitCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save,
 static void R128InitFPRegisters(R128SavePtr orig, R128SavePtr save,
 				DisplayModePtr mode, R128InfoPtr info)
 {
-    int	  xres = mode->CrtcHDisplay;
-    int	  yres = mode->CrtcVDisplay;
+    int   xres = mode->CrtcHDisplay;
+    int   yres = mode->CrtcVDisplay;
     float Hratio, Vratio;
 
     if (info->CRTOnly) {
@@ -2328,7 +2330,7 @@ static void R128InitFPRegisters(R128SavePtr orig, R128SavePtr save,
     save->fp_horz_stretch &= ~R128_HORZ_AUTO_RATIO_FIX_EN;
     if (Hratio == 1.0) save->fp_horz_stretch &= ~(R128_HORZ_STRETCH_BLEND |
 						  R128_HORZ_STRETCH_ENABLE);
-    else	       save->fp_horz_stretch |=	 (R128_HORZ_STRETCH_BLEND |
+    else               save->fp_horz_stretch |=  (R128_HORZ_STRETCH_BLEND |
 						  R128_HORZ_STRETCH_ENABLE);
 
     save->fp_vert_stretch =
@@ -2339,7 +2341,7 @@ static void R128InitFPRegisters(R128SavePtr orig, R128SavePtr save,
     save->fp_vert_stretch &= ~R128_VERT_AUTO_RATIO_EN;
     if (Vratio == 1.0) save->fp_vert_stretch &= ~(R128_VERT_STRETCH_ENABLE |
 						  R128_VERT_STRETCH_BLEND);
-    else	       save->fp_vert_stretch |=	 (R128_VERT_STRETCH_ENABLE |
+    else               save->fp_vert_stretch |=  (R128_VERT_STRETCH_ENABLE |
 						  R128_VERT_STRETCH_BLEND);
 
     save->fp_gen_cntl = (orig->fp_gen_cntl & ~(R128_FP_SEL_CRTC2 |
@@ -2352,26 +2354,26 @@ static void R128InitFPRegisters(R128SavePtr orig, R128SavePtr save,
 			      R128_FP_TDMS_EN);
     }
 
-    save->fp_panel_cntl	       = orig->fp_panel_cntl;
-    save->lvds_gen_cntl	       = orig->lvds_gen_cntl;
+    save->fp_panel_cntl        = orig->fp_panel_cntl;
+    save->lvds_gen_cntl        = orig->lvds_gen_cntl;
 
-    save->tmds_crc	       = orig->tmds_crc;
+    save->tmds_crc             = orig->tmds_crc;
 
     /* Disable CRT output by disabling CRT output and setting the CRT
        DAC to use CRTC2, which we set to 0's.  In the future, we will
        want to use the dual CRTC capabilities of the R128 to allow both
        the flat panel and external CRT to either simultaneously display
        the same image or display two different images. */
-    save->crtc_ext_cntl	 &= ~R128_CRTC_CRT_ON;
-    save->dac_cntl	 |= R128_DAC_CRT_SEL_CRTC2;
+    save->crtc_ext_cntl  &= ~R128_CRTC_CRT_ON;
+    save->dac_cntl       |= R128_DAC_CRT_SEL_CRTC2;
     save->crtc2_gen_cntl  = 0;
 
     /* WARNING: Be careful about turning on the flat panel */
 #if 1
-    save->lvds_gen_cntl	 |= (R128_LVDS_ON | R128_LVDS_BLON);
+    save->lvds_gen_cntl  |= (R128_LVDS_ON | R128_LVDS_BLON);
 #else
-    save->fp_panel_cntl	 |= (R128_FP_DIGON | R128_FP_BLON);
-    save->fp_gen_cntl	 |= (R128_FP_FPON);
+    save->fp_panel_cntl  |= (R128_FP_DIGON | R128_FP_BLON);
+    save->fp_gen_cntl    |= (R128_FP_FPON);
 #endif
 
     save->fp_crtc_h_total_disp = save->crtc_h_total_disp;
@@ -2394,15 +2396,15 @@ static void R128InitPLLRegisters(R128SavePtr save, R128PLLPtr pll,
 				   Reference Manual (Technical Reference
 				   Manual P/N RRG-G04100-C Rev. 0.04), page
 				   3-17 (PLL_DIV_[3:0]).  */
-	{  1, 0 },		/* VCLK_SRC		    */
-	{  2, 1 },		/* VCLK_SRC/2		    */
-	{  4, 2 },		/* VCLK_SRC/4		    */
-	{  8, 3 },		/* VCLK_SRC/8		    */
+	{  1, 0 },              /* VCLK_SRC                 */
+	{  2, 1 },              /* VCLK_SRC/2               */
+	{  4, 2 },              /* VCLK_SRC/4               */
+	{  8, 3 },              /* VCLK_SRC/8               */
 
-	{  3, 4 },		/* VCLK_SRC/3		    */
+	{  3, 4 },              /* VCLK_SRC/3               */
 				/* bitvalue = 5 is reserved */
-	{  6, 6 },		/* VCLK_SRC/6		    */
-	{ 12, 7 },		/* VCLK_SRC/12		    */
+	{  6, 6 },              /* VCLK_SRC/6               */
+	{ 12, 7 },              /* VCLK_SRC/12              */
 	{  0, 0 }
     };
 
@@ -2416,9 +2418,9 @@ static void R128InitPLLRegisters(R128SavePtr save, R128PLLPtr pll,
     }
 
     save->dot_clock_freq = freq;
-    save->feedback_div	 = R128Div(pll->reference_div * save->pll_output_freq,
+    save->feedback_div   = R128Div(pll->reference_div * save->pll_output_freq,
 				   pll->reference_freq);
-    save->post_div	 = post_div->divider;
+    save->post_div       = post_div->divider;
 
     R128TRACE(("dc=%d, of=%d, fd=%d, pd=%d\n",
 	       save->dot_clock_freq,
@@ -2426,24 +2428,24 @@ static void R128InitPLLRegisters(R128SavePtr save, R128PLLPtr pll,
 	       save->feedback_div,
 	       save->post_div));
 
-    save->ppll_ref_div	 = pll->reference_div;
-    save->ppll_div_3	 = (save->feedback_div | (post_div->bitvalue << 16));
-    save->htotal_cntl	 = 0;
+    save->ppll_ref_div   = pll->reference_div;
+    save->ppll_div_3     = (save->feedback_div | (post_div->bitvalue << 16));
+    save->htotal_cntl    = 0;
 }
 
 /* Define DDA registers for requested video mode. */
 static Bool R128InitDDARegisters(ScrnInfoPtr pScrn, R128SavePtr save,
 				 R128PLLPtr pll, R128InfoPtr info)
 {
-    int		DisplayFifoWidth = 128;
-    int		DisplayFifoDepth = 32;
-    int		XclkFreq;
-    int		VclkFreq;
-    int		XclksPerTransfer;
-    int		XclksPerTransferPrecise;
-    int		UseablePrecision;
-    int		Roff;
-    int		Ron;
+    int         DisplayFifoWidth = 128;
+    int         DisplayFifoDepth = 32;
+    int         XclkFreq;
+    int         VclkFreq;
+    int         XclksPerTransfer;
+    int         XclksPerTransferPrecise;
+    int         UseablePrecision;
+    int         Roff;
+    int         Ron;
 
     XclkFreq = pll->xclk;
 
@@ -2461,7 +2463,7 @@ static Bool R128InitDDARegisters(ScrnInfoPtr pScrn, R128SavePtr save,
 
     Roff  = XclksPerTransferPrecise * (DisplayFifoDepth - 4);
 
-    Ron	  = (4 * info->ram->MB
+    Ron   = (4 * info->ram->MB
 	     + 3 * MAX(info->ram->Trcd - 2, 0)
 	     + 2 * info->ram->Trp
 	     + info->ram->Twr
@@ -2505,8 +2507,8 @@ static void R128InitPalette(R128SavePtr save)
 /* Define registers for a requested video mode. */
 static Bool R128Init(ScrnInfoPtr pScrn, DisplayModePtr mode, R128SavePtr save)
 {
-    R128InfoPtr info	  = R128PTR(pScrn);
-    double	dot_clock = mode->Clock/1000.0;
+    R128InfoPtr info      = R128PTR(pScrn);
+    double      dot_clock = mode->Clock/1000.0;
 
 #if R128_DEBUG
     ErrorF("%-12.12s %7.2f  %4d %4d %4d %4d  %4d %4d %4d %4d (%d,%d)",
@@ -2526,10 +2528,10 @@ static Bool R128Init(ScrnInfoPtr pScrn, DisplayModePtr mode, R128SavePtr save)
 	   pScrn->bitsPerPixel);
     if (mode->Flags & V_DBLSCAN)   ErrorF(" D");
     if (mode->Flags & V_INTERLACE) ErrorF(" I");
-    if (mode->Flags & V_PHSYNC)	   ErrorF(" +H");
-    if (mode->Flags & V_NHSYNC)	   ErrorF(" -H");
-    if (mode->Flags & V_PVSYNC)	   ErrorF(" +V");
-    if (mode->Flags & V_NVSYNC)	   ErrorF(" -V");
+    if (mode->Flags & V_PHSYNC)    ErrorF(" +H");
+    if (mode->Flags & V_NHSYNC)    ErrorF(" -H");
+    if (mode->Flags & V_PVSYNC)    ErrorF(" +V");
+    if (mode->Flags & V_NVSYNC)    ErrorF(" -V");
     ErrorF("\n");
     ErrorF("%-12.12s %7.2f  %4d %4d %4d %4d  %4d %4d %4d %4d (%d,%d)",
 	   mode->name,
@@ -2548,10 +2550,10 @@ static Bool R128Init(ScrnInfoPtr pScrn, DisplayModePtr mode, R128SavePtr save)
 	   pScrn->bitsPerPixel);
     if (mode->Flags & V_DBLSCAN)   ErrorF(" D");
     if (mode->Flags & V_INTERLACE) ErrorF(" I");
-    if (mode->Flags & V_PHSYNC)	   ErrorF(" +H");
-    if (mode->Flags & V_NHSYNC)	   ErrorF(" -H");
-    if (mode->Flags & V_PVSYNC)	   ErrorF(" +V");
-    if (mode->Flags & V_NVSYNC)	   ErrorF(" -V");
+    if (mode->Flags & V_PHSYNC)    ErrorF(" +H");
+    if (mode->Flags & V_NHSYNC)    ErrorF(" -H");
+    if (mode->Flags & V_PVSYNC)    ErrorF(" +V");
+    if (mode->Flags & V_NVSYNC)    ErrorF(" -V");
     ErrorF("\n");
 #endif
 
@@ -2573,7 +2575,7 @@ static Bool R128Init(ScrnInfoPtr pScrn, DisplayModePtr mode, R128SavePtr save)
 /* Initialize a new mode. */
 static Bool R128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {
-    R128InfoPtr info	  = R128PTR(pScrn);
+    R128InfoPtr info      = R128PTR(pScrn);
 
     if (!R128Init(pScrn, mode, &info->ModeReg)) return FALSE;
 				/* FIXME?  DRILock/DRIUnlock here? */
@@ -2589,7 +2591,7 @@ static Bool R128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 
 static Bool R128SaveScreen(ScreenPtr pScreen, int mode)
 {
-    ScrnInfoPtr	  pScrn = xf86Screens[pScreen->myNum];
+    ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
     Bool unblank;
 
     unblank = xf86IsUnblank(mode);
@@ -2614,8 +2616,8 @@ Bool R128SwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
 int R128ValidMode(int scrnIndex, DisplayModePtr mode,
 		  Bool verbose, int flag)
 {
-    ScrnInfoPtr	  pScrn = xf86Screens[scrnIndex];
-    R128InfoPtr	  info	= R128PTR(pScrn);
+    ScrnInfoPtr   pScrn = xf86Screens[scrnIndex];
+    R128InfoPtr   info  = R128PTR(pScrn);
 
     if (info->HasPanelRegs) {
 	if (mode->Flags & V_INTERLACE) return MODE_NO_INTERLACE;
@@ -2630,27 +2632,27 @@ int R128ValidMode(int scrnIndex, DisplayModePtr mode,
 	    if (mode->CrtcHDisplay == R128_BIOS16(j) &&
 		mode->CrtcVDisplay == R128_BIOS16(j+2)) {
 		/* Assume we are using expanded mode */
-		if (R128_BIOS16(j+5)) j	 = R128_BIOS16(j+5);
-		else		      j += 9;
+		if (R128_BIOS16(j+5)) j  = R128_BIOS16(j+5);
+		else                  j += 9;
 
 		mode->Clock = (CARD32)R128_BIOS16(j) * 10;
 
-		mode->HDisplay	 = mode->CrtcHDisplay	=
+		mode->HDisplay   = mode->CrtcHDisplay   =
 		    ((R128_BIOS16(j+10) & 0x01ff)+1)*8;
 		mode->HSyncStart = mode->CrtcHSyncStart =
 		    ((R128_BIOS16(j+12) & 0x01ff)+1)*8;
-		mode->HSyncEnd	 = mode->CrtcHSyncEnd	=
+		mode->HSyncEnd   = mode->CrtcHSyncEnd   =
 		    mode->CrtcHSyncStart + (R128_BIOS8(j+14) & 0x1f);
-		mode->HTotal	 = mode->CrtcHTotal	=
-		    ((R128_BIOS16(j+8)	& 0x01ff)+1)*8;
+		mode->HTotal     = mode->CrtcHTotal     =
+		    ((R128_BIOS16(j+8)  & 0x01ff)+1)*8;
 
-		mode->VDisplay	 = mode->CrtcVDisplay	=
+		mode->VDisplay   = mode->CrtcVDisplay   =
 		    (R128_BIOS16(j+17) & 0x07ff)+1;
 		mode->VSyncStart = mode->CrtcVSyncStart =
 		    (R128_BIOS16(j+19) & 0x07ff)+1;
-		mode->VSyncEnd	 = mode->CrtcVSyncEnd	=
+		mode->VSyncEnd   = mode->CrtcVSyncEnd   =
 		    mode->CrtcVSyncStart + ((R128_BIOS16(j+19) >> 11) & 0x1f);
-		mode->VTotal	 = mode->CrtcVTotal	=
+		mode->VTotal     = mode->CrtcVTotal     =
 		    (R128_BIOS16(j+15) & 0x07ff)+1;
 
 		return MODE_OK;
@@ -2666,10 +2668,10 @@ int R128ValidMode(int scrnIndex, DisplayModePtr mode,
    is (x,y) in virtual space. */
 void R128AdjustFrame(int scrnIndex, int x, int y, int flags)
 {
-    ScrnInfoPtr	  pScrn	    = xf86Screens[scrnIndex];
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    ScrnInfoPtr   pScrn     = xf86Screens[scrnIndex];
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  Base;
+    int           Base;
 
     Base = y * info->CurrentLayout.displayWidth + x;
 
@@ -2680,7 +2682,7 @@ void R128AdjustFrame(int scrnIndex, int x, int y, int flags)
     case 32: Base *= 4; break;
     }
 
-    Base &= ~7;			/* 3 lower bits are always 0 */
+    Base &= ~7;                 /* 3 lower bits are always 0 */
 
     if (info->CurrentLayout.pixel_code == 24)
 	Base += 8 * (Base % 3); /* Must be multiple of 8 and 3 */
@@ -2753,7 +2755,7 @@ static void R128LeaveVTFBDev(int scrnIndex, int flags)
     fbdevHWLeaveVT(scrnIndex,flags);
 }
 
-/* Called at the end of each server generation.	 Restore the original text
+/* Called at the end of each server generation.  Restore the original text
    mode, unmap video memory, and unwrap and call the saved CloseScreen
    function.  */
 static Bool R128CloseScreen(int scrnIndex, ScreenPtr pScreen)
@@ -2776,17 +2778,17 @@ static Bool R128CloseScreen(int scrnIndex, ScreenPtr pScreen)
 	R128UnmapMem(pScrn);
     }
 
-    if (info->accel)		 XAADestroyInfoRec(info->accel);
-    info->accel			 = NULL;
+    if (info->accel)             XAADestroyInfoRec(info->accel);
+    info->accel                  = NULL;
 
-    if (info->scratch_save)	 xfree(info->scratch_save);
-    info->scratch_save		 = NULL;
+    if (info->scratch_save)      xfree(info->scratch_save);
+    info->scratch_save           = NULL;
 
-    if (info->cursor)		 xf86DestroyCursorInfoRec(info->cursor);
-    info->cursor		 = NULL;
+    if (info->cursor)            xf86DestroyCursorInfoRec(info->cursor);
+    info->cursor                 = NULL;
 
-    if (info->DGAModes)		 xfree(info->DGAModes);
-    info->DGAModes		 = NULL;
+    if (info->DGAModes)          xfree(info->DGAModes);
+    info->DGAModes               = NULL;
 
     pScrn->vtSema = FALSE;
 
@@ -2809,9 +2811,9 @@ void R128FreeScreen(int scrnIndex, int flags)
 static void R128DisplayPowerManagementSet(ScrnInfoPtr pScrn,
 					  int PowerManagementMode, int flags)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
-    int		  mask	    = (R128_CRTC_DISPLAY_DIS
+    int           mask      = (R128_CRTC_DISPLAY_DIS
 			       | R128_CRTC_HSYNC_DIS
 			       | R128_CRTC_VSYNC_DIS);
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c
index 03fa17a4c..b96bb4702 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c
@@ -1,34 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c,v 1.1 2000/11/02 16:55:37 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c,v 1.2 2000/11/09 03:24:36 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                      Precision Insight, Inc., Cedar Park, Texas, and
+ *                      VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
+ * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Rickard E. Faith <faith@precisioninsight.com>
- *   Kevin E. Martin <kevin@precisioninsight.com>
+ *   Rickard E. Faith <faith@valinux.com>
+ *   Kevin E. Martin <martin@valinux.com>
  *
  * Modified by Marc Aurele La France <tsi@xfree86.org> for ATI driver merge.
  */
@@ -55,7 +58,7 @@ SymTabRec R128Chipsets[] = {
     { PCI_CHIP_RAGE128LF, "ATI Rage 128 Mobility LF (AGP)" },
     { PCI_CHIP_RAGE128MF, "ATI Rage 128 Mobility MF (AGP)" },
     { PCI_CHIP_RAGE128ML, "ATI Rage 128 Mobility ML (AGP)" },
-    { -1,		  NULL }
+    { -1,                 NULL }
 };
 
 PciChipsets R128PciChipsets[] = {
@@ -68,7 +71,7 @@ PciChipsets R128PciChipsets[] = {
     { PCI_CHIP_RAGE128LF, PCI_CHIP_RAGE128LF, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128MF, PCI_CHIP_RAGE128MF, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128ML, PCI_CHIP_RAGE128ML, RES_SHARED_VGA },
-    { -1,		  -1,		      RES_UNDEFINED }
+    { -1,                 -1,                 RES_UNDEFINED }
 };
 
 /* Return the options for supported chipset 'n'; NULL otherwise */
@@ -101,13 +104,13 @@ R128Identify(int flags)
 Bool
 R128Probe(DriverPtr drv, int flags)
 {
-    int		  numUsed;
-    int		  numDevSections, nATIGDev, nR128GDev;
-    int		  *usedChips;
-    GDevPtr	  *devSections, *ATIGDevs, *R128GDevs;
+    int           numUsed;
+    int           numDevSections, nATIGDev, nR128GDev;
+    int           *usedChips;
+    GDevPtr       *devSections, *ATIGDevs, *R128GDevs;
     EntityInfoPtr pEnt;
-    Bool	  foundScreen = FALSE;
-    int		  i;
+    Bool          foundScreen = FALSE;
+    int           i;
 
     if (!xf86GetPciVideoInfo()) return FALSE;
 
@@ -154,7 +157,7 @@ R128Probe(DriverPtr drv, int flags)
 	pEnt = xf86GetEntityInfo(usedChips[i]);
 
 	if (pEnt->active) {
-	    ScrnInfoPtr pScrn	 = xf86AllocateScreen(drv, 0);
+	    ScrnInfoPtr pScrn    = xf86AllocateScreen(drv, 0);
 
 #ifdef XFree86LOADER
 	    if (!xf86LoadSubModule(pScrn, "r128")) {
@@ -168,19 +171,19 @@ R128Probe(DriverPtr drv, int flags)
 #endif
 
 	    pScrn->driverVersion = R128_VERSION_CURRENT;
-	    pScrn->driverName	 = R128_DRIVER_NAME;
-	    pScrn->name		 = R128_NAME;
-	    pScrn->Probe	 = R128Probe;
-	    pScrn->PreInit	 = R128PreInit;
-	    pScrn->ScreenInit	 = R128ScreenInit;
-	    pScrn->SwitchMode	 = R128SwitchMode;
-	    pScrn->AdjustFrame	 = R128AdjustFrame;
-	    pScrn->EnterVT	 = R128EnterVT;
-	    pScrn->LeaveVT	 = R128LeaveVT;
-	    pScrn->FreeScreen	 = R128FreeScreen;
-	    pScrn->ValidMode	 = R128ValidMode;
-
-	    foundScreen		 = TRUE;
+	    pScrn->driverName    = R128_DRIVER_NAME;
+	    pScrn->name          = R128_NAME;
+	    pScrn->Probe         = R128Probe;
+	    pScrn->PreInit       = R128PreInit;
+	    pScrn->ScreenInit    = R128ScreenInit;
+	    pScrn->SwitchMode    = R128SwitchMode;
+	    pScrn->AdjustFrame   = R128AdjustFrame;
+	    pScrn->EnterVT       = R128EnterVT;
+	    pScrn->LeaveVT       = R128LeaveVT;
+	    pScrn->FreeScreen    = R128FreeScreen;
+	    pScrn->ValidMode     = R128ValidMode;
+
+	    foundScreen          = TRUE;
 
 	    xf86ConfigActivePciEntity(pScrn, usedChips[i], R128PciChipsets,
 				      0, 0, 0, 0, 0);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.h
index 11d71749f..9d09c7ef3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.h
@@ -1,28 +1,30 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.h,v 1.1 2000/11/02 16:55:37 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.h,v 1.2 2000/11/09 03:24:36 martin Exp $ */
 /*
- * Copyright 2000 ATI Technologies Inc., Markham, Ontario
- *	      and VA Linux Systems, Inc., Sunnyvale, California.
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
  */
 
 /*
@@ -42,30 +44,30 @@
 /* r128_probe.c */
 extern OptionInfoPtr R128AvailableOptions
 		     FunctionPrototype((int, int));
-extern void	     R128Identify
+extern void          R128Identify
 		     FunctionPrototype((int));
-extern Bool	     R128Probe
+extern Bool          R128Probe
 		     FunctionPrototype((DriverPtr, int));
 
 extern SymTabRec     R128Chipsets[];
 extern PciChipsets   R128PciChipsets[];
 
 /* r128_driver.c */
-extern Bool	     R128PreInit
+extern Bool          R128PreInit
 		     FunctionPrototype((ScrnInfoPtr, int));
-extern Bool	     R128ScreenInit
+extern Bool          R128ScreenInit
 		     FunctionPrototype((int, ScreenPtr, int, char **));
-extern Bool	     R128SwitchMode
+extern Bool          R128SwitchMode
 		     FunctionPrototype((int, DisplayModePtr, int));
-extern void	     R128AdjustFrame
+extern void          R128AdjustFrame
 		     FunctionPrototype((int, int, int, int));
-extern Bool	     R128EnterVT
+extern Bool          R128EnterVT
 		     FunctionPrototype((int, int));
-extern void	     R128LeaveVT
+extern void          R128LeaveVT
 		     FunctionPrototype((int, int));
-extern void	     R128FreeScreen
+extern void          R128FreeScreen
 		     FunctionPrototype((int, int));
-extern int	     R128ValidMode
+extern int           R128ValidMode
 		     FunctionPrototype((int, DisplayModePtr, Bool, int));
 
 extern OptionInfoRec R128Options[];
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h
index cc71a015e..f94b74dfe 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h
@@ -1,34 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h,v 1.1 2000/11/02 16:55:37 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h,v 1.2 2000/11/09 03:24:36 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                      Precision Insight, Inc., Cedar Park, Texas, and
+ *                      VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
+ * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Rickard E. Faith <faith@precisioninsight.com>
- *   Kevin E. Martin <kevin@precisioninsight.com>
+ *   Rickard E. Faith <faith@valinux.com>
+ *   Kevin E. Martin <martin@valinux.com>
  *
  * References:
  *
@@ -46,1414 +49,1414 @@
 #include <compiler.h>
 
 				/* Memory mapped register access macros */
-#define INREG8(addr)	    MMIO_IN8(R128MMIO, addr)
-#define INREG16(addr)	    MMIO_IN16(R128MMIO, addr)
-#define INREG(addr)	    MMIO_IN32(R128MMIO, addr)
+#define INREG8(addr)        MMIO_IN8(R128MMIO, addr)
+#define INREG16(addr)       MMIO_IN16(R128MMIO, addr)
+#define INREG(addr)         MMIO_IN32(R128MMIO, addr)
 #define OUTREG8(addr, val)  MMIO_OUT8(R128MMIO, addr, val)
 #define OUTREG16(addr, val) MMIO_OUT16(R128MMIO, addr, val)
 #define OUTREG(addr, val)   MMIO_OUT32(R128MMIO, addr, val)
 
-#define ADDRREG(addr)	    ((volatile CARD32 *)(R128MMIO + (addr)))
+#define ADDRREG(addr)       ((volatile CARD32 *)(R128MMIO + (addr)))
 
 
 #define OUTREGP(addr, val, mask)   \
-    do {			   \
+    do {                           \
 	CARD32 tmp = INREG(addr);  \
-	tmp &= (mask);		   \
-	tmp |= (val);		   \
-	OUTREG(addr, tmp);	   \
+	tmp &= (mask);             \
+	tmp |= (val);              \
+	OUTREG(addr, tmp);         \
     } while (0)
 
 #define INPLL(pScrn, addr) R128INPLL(pScrn, addr)
 
-#define OUTPLL(addr, val)						  \
-    do {								  \
+#define OUTPLL(addr, val)                                                 \
+    do {                                                                  \
 	OUTREG8(R128_CLOCK_CNTL_INDEX, ((addr) & 0x1f) | R128_PLL_WR_EN); \
-	OUTREG(R128_CLOCK_CNTL_DATA, val);				  \
+	OUTREG(R128_CLOCK_CNTL_DATA, val);                                \
     } while (0)
 
-#define OUTPLLP(pScrn, addr, val, mask)					  \
-    do {								  \
-	CARD32 tmp = INPLL(pScrn, addr);				  \
-	tmp &= (mask);							  \
-	tmp |= (val);							  \
-	OUTPLL(addr, tmp);						  \
+#define OUTPLLP(pScrn, addr, val, mask)                                   \
+    do {                                                                  \
+	CARD32 tmp = INPLL(pScrn, addr);                                  \
+	tmp &= (mask);                                                    \
+	tmp |= (val);                                                     \
+	OUTPLL(addr, tmp);                                                \
     } while (0)
 
-#define OUTPAL_START(idx)						  \
-    do {								  \
-	OUTREG8(R128_PALETTE_INDEX, (idx));				  \
+#define OUTPAL_START(idx)                                                 \
+    do {                                                                  \
+	OUTREG8(R128_PALETTE_INDEX, (idx));                               \
     } while (0)
 
-#define OUTPAL_NEXT(r, g, b)						  \
-    do {								  \
-	OUTREG(R128_PALETTE_DATA, ((r) << 16) | ((g) << 8) | (b));	  \
+#define OUTPAL_NEXT(r, g, b)                                              \
+    do {                                                                  \
+	OUTREG(R128_PALETTE_DATA, ((r) << 16) | ((g) << 8) | (b));        \
     } while (0)
 
-#define OUTPAL_NEXT_CARD32(v)						  \
-    do {								  \
-	OUTREG(R128_PALETTE_DATA, (v & 0x00ffffff));			  \
+#define OUTPAL_NEXT_CARD32(v)                                             \
+    do {                                                                  \
+	OUTREG(R128_PALETTE_DATA, (v & 0x00ffffff));                      \
     } while (0)
 
-#define OUTPAL(idx, r, g, b)						  \
-    do {								  \
-	OUTPAL_START((idx));						  \
-	OUTPAL_NEXT((r), (g), (b));					  \
+#define OUTPAL(idx, r, g, b)                                              \
+    do {                                                                  \
+	OUTPAL_START((idx));                                              \
+	OUTPAL_NEXT((r), (g), (b));                                       \
     } while (0)
 
-#define INPAL_START(idx)						  \
-    do {								  \
-	OUTREG(R128_PALETTE_INDEX, (idx) << 16);			  \
+#define INPAL_START(idx)                                                  \
+    do {                                                                  \
+	OUTREG(R128_PALETTE_INDEX, (idx) << 16);                          \
     } while (0)
 
 #define INPAL_NEXT() INREG(R128_PALETTE_DATA)
 
-#define PAL_SELECT(idx)							  \
-    do {								  \
-	if (idx) {							  \
-	    OUTREG(R128_DAC_CNTL, INREG(R128_DAC_CNTL) |		  \
-		   R128_DAC_PALETTE_ACC_CTL);				  \
-	} else {							  \
-	    OUTREG(R128_DAC_CNTL, INREG(R128_DAC_CNTL) &		  \
-		   ~R128_DAC_PALETTE_ACC_CTL);				  \
-	}								  \
+#define PAL_SELECT(idx)                                                   \
+    do {                                                                  \
+	if (idx) {                                                        \
+	    OUTREG(R128_DAC_CNTL, INREG(R128_DAC_CNTL) |                  \
+		   R128_DAC_PALETTE_ACC_CTL);                             \
+	} else {                                                          \
+	    OUTREG(R128_DAC_CNTL, INREG(R128_DAC_CNTL) &                  \
+		   ~R128_DAC_PALETTE_ACC_CTL);                            \
+	}                                                                 \
     } while (0)
 
-#define R128_ADAPTER_ID			  0x0f2c /* PCI */
-#define R128_AGP_APER_OFFSET		  0x0178
-#define R128_AGP_BASE			  0x0170
-#define R128_AGP_CNTL			  0x0174
-#	define R128_AGP_APER_SIZE_256MB	  (0x00 << 0)
-#	define R128_AGP_APER_SIZE_128MB	  (0x20 << 0)
-#	define R128_AGP_APER_SIZE_64MB	  (0x30 << 0)
-#	define R128_AGP_APER_SIZE_32MB	  (0x38 << 0)
-#	define R128_AGP_APER_SIZE_16MB	  (0x3c << 0)
-#	define R128_AGP_APER_SIZE_8MB	  (0x3e << 0)
-#	define R128_AGP_APER_SIZE_4MB	  (0x3f << 0)
-#	define R128_AGP_APER_SIZE_MASK	  (0x3f << 0)
-#define R128_AGP_CNTL_B			  0x0b44
-#define R128_AGP_COMMAND		  0x0f58 /* PCI */
-#define R128_AGP_PLL_CNTL		  0x0010 /* PLL */
-#define R128_AGP_STATUS			  0x0f54 /* PCI */
-#	define R128_AGP_1X_MODE		  0x01
-#	define R128_AGP_2X_MODE		  0x02
-#	define R128_AGP_4X_MODE		  0x04
-#	define R128_AGP_MODE_MASK	  0x07
-#define R128_AMCGPIO_A_REG		  0x01a0
-#define R128_AMCGPIO_EN_REG		  0x01a8
-#define R128_AMCGPIO_MASK		  0x0194
-#define R128_AMCGPIO_Y_REG		  0x01a4
-#define R128_ATTRDR			  0x03c1 /* VGA */
-#define R128_ATTRDW			  0x03c0 /* VGA */
-#define R128_ATTRX			  0x03c0 /* VGA */
-#	define R128_AUX1_SC_EN		  (1 << 0)
-#	define R128_AUX1_SC_MODE_OR	  (0 << 1)
-#	define R128_AUX1_SC_MODE_NAND	  (1 << 1)
-#	define R128_AUX2_SC_EN		  (1 << 2)
-#	define R128_AUX2_SC_MODE_OR	  (0 << 3)
-#	define R128_AUX2_SC_MODE_NAND	  (1 << 3)
-#	define R128_AUX3_SC_EN		  (1 << 4)
-#	define R128_AUX3_SC_MODE_OR	  (0 << 5)
-#	define R128_AUX3_SC_MODE_NAND	  (1 << 5)
-#define R128_AUX_SC_CNTL		  0x1660
-#define R128_AUX1_SC_BOTTOM		  0x1670
-#define R128_AUX1_SC_LEFT		  0x1664
-#define R128_AUX1_SC_RIGHT		  0x1668
-#define R128_AUX1_SC_TOP		  0x166c
-#define R128_AUX2_SC_BOTTOM		  0x1680
-#define R128_AUX2_SC_LEFT		  0x1674
-#define R128_AUX2_SC_RIGHT		  0x1678
-#define R128_AUX2_SC_TOP		  0x167c
-#define R128_AUX3_SC_BOTTOM		  0x1690
-#define R128_AUX3_SC_LEFT		  0x1684
-#define R128_AUX3_SC_RIGHT		  0x1688
-#define R128_AUX3_SC_TOP		  0x168c
-#define R128_AUX_WINDOW_HORZ_CNTL	  0x02d8
-#define R128_AUX_WINDOW_VERT_CNTL	  0x02dc
+#define R128_ADAPTER_ID                   0x0f2c /* PCI */
+#define R128_AGP_APER_OFFSET              0x0178
+#define R128_AGP_BASE                     0x0170
+#define R128_AGP_CNTL                     0x0174
+#       define R128_AGP_APER_SIZE_256MB   (0x00 << 0)
+#       define R128_AGP_APER_SIZE_128MB   (0x20 << 0)
+#       define R128_AGP_APER_SIZE_64MB    (0x30 << 0)
+#       define R128_AGP_APER_SIZE_32MB    (0x38 << 0)
+#       define R128_AGP_APER_SIZE_16MB    (0x3c << 0)
+#       define R128_AGP_APER_SIZE_8MB     (0x3e << 0)
+#       define R128_AGP_APER_SIZE_4MB     (0x3f << 0)
+#       define R128_AGP_APER_SIZE_MASK    (0x3f << 0)
+#define R128_AGP_CNTL_B                   0x0b44
+#define R128_AGP_COMMAND                  0x0f58 /* PCI */
+#define R128_AGP_PLL_CNTL                 0x0010 /* PLL */
+#define R128_AGP_STATUS                   0x0f54 /* PCI */
+#       define R128_AGP_1X_MODE           0x01
+#       define R128_AGP_2X_MODE           0x02
+#       define R128_AGP_4X_MODE           0x04
+#       define R128_AGP_MODE_MASK         0x07
+#define R128_AMCGPIO_A_REG                0x01a0
+#define R128_AMCGPIO_EN_REG               0x01a8
+#define R128_AMCGPIO_MASK                 0x0194
+#define R128_AMCGPIO_Y_REG                0x01a4
+#define R128_ATTRDR                       0x03c1 /* VGA */
+#define R128_ATTRDW                       0x03c0 /* VGA */
+#define R128_ATTRX                        0x03c0 /* VGA */
+#       define R128_AUX1_SC_EN            (1 << 0)
+#       define R128_AUX1_SC_MODE_OR       (0 << 1)
+#       define R128_AUX1_SC_MODE_NAND     (1 << 1)
+#       define R128_AUX2_SC_EN            (1 << 2)
+#       define R128_AUX2_SC_MODE_OR       (0 << 3)
+#       define R128_AUX2_SC_MODE_NAND     (1 << 3)
+#       define R128_AUX3_SC_EN            (1 << 4)
+#       define R128_AUX3_SC_MODE_OR       (0 << 5)
+#       define R128_AUX3_SC_MODE_NAND     (1 << 5)
+#define R128_AUX_SC_CNTL                  0x1660
+#define R128_AUX1_SC_BOTTOM               0x1670
+#define R128_AUX1_SC_LEFT                 0x1664
+#define R128_AUX1_SC_RIGHT                0x1668
+#define R128_AUX1_SC_TOP                  0x166c
+#define R128_AUX2_SC_BOTTOM               0x1680
+#define R128_AUX2_SC_LEFT                 0x1674
+#define R128_AUX2_SC_RIGHT                0x1678
+#define R128_AUX2_SC_TOP                  0x167c
+#define R128_AUX3_SC_BOTTOM               0x1690
+#define R128_AUX3_SC_LEFT                 0x1684
+#define R128_AUX3_SC_RIGHT                0x1688
+#define R128_AUX3_SC_TOP                  0x168c
+#define R128_AUX_WINDOW_HORZ_CNTL         0x02d8
+#define R128_AUX_WINDOW_VERT_CNTL         0x02dc
 
-#define R128_BASE_CODE			  0x0f0b
-#define R128_BIOS_0_SCRATCH		  0x0010
-#define R128_BIOS_1_SCRATCH		  0x0014
-#define R128_BIOS_2_SCRATCH		  0x0018
-#define R128_BIOS_3_SCRATCH		  0x001c
-#define R128_BIOS_ROM			  0x0f30 /* PCI */
-#define R128_BIST			  0x0f0f /* PCI */
-#define R128_BRUSH_DATA0		  0x1480
-#define R128_BRUSH_DATA1		  0x1484
-#define R128_BRUSH_DATA10		  0x14a8
-#define R128_BRUSH_DATA11		  0x14ac
-#define R128_BRUSH_DATA12		  0x14b0
-#define R128_BRUSH_DATA13		  0x14b4
-#define R128_BRUSH_DATA14		  0x14b8
-#define R128_BRUSH_DATA15		  0x14bc
-#define R128_BRUSH_DATA16		  0x14c0
-#define R128_BRUSH_DATA17		  0x14c4
-#define R128_BRUSH_DATA18		  0x14c8
-#define R128_BRUSH_DATA19		  0x14cc
-#define R128_BRUSH_DATA2		  0x1488
-#define R128_BRUSH_DATA20		  0x14d0
-#define R128_BRUSH_DATA21		  0x14d4
-#define R128_BRUSH_DATA22		  0x14d8
-#define R128_BRUSH_DATA23		  0x14dc
-#define R128_BRUSH_DATA24		  0x14e0
-#define R128_BRUSH_DATA25		  0x14e4
-#define R128_BRUSH_DATA26		  0x14e8
-#define R128_BRUSH_DATA27		  0x14ec
-#define R128_BRUSH_DATA28		  0x14f0
-#define R128_BRUSH_DATA29		  0x14f4
-#define R128_BRUSH_DATA3		  0x148c
-#define R128_BRUSH_DATA30		  0x14f8
-#define R128_BRUSH_DATA31		  0x14fc
-#define R128_BRUSH_DATA32		  0x1500
-#define R128_BRUSH_DATA33		  0x1504
-#define R128_BRUSH_DATA34		  0x1508
-#define R128_BRUSH_DATA35		  0x150c
-#define R128_BRUSH_DATA36		  0x1510
-#define R128_BRUSH_DATA37		  0x1514
-#define R128_BRUSH_DATA38		  0x1518
-#define R128_BRUSH_DATA39		  0x151c
-#define R128_BRUSH_DATA4		  0x1490
-#define R128_BRUSH_DATA40		  0x1520
-#define R128_BRUSH_DATA41		  0x1524
-#define R128_BRUSH_DATA42		  0x1528
-#define R128_BRUSH_DATA43		  0x152c
-#define R128_BRUSH_DATA44		  0x1530
-#define R128_BRUSH_DATA45		  0x1534
-#define R128_BRUSH_DATA46		  0x1538
-#define R128_BRUSH_DATA47		  0x153c
-#define R128_BRUSH_DATA48		  0x1540
-#define R128_BRUSH_DATA49		  0x1544
-#define R128_BRUSH_DATA5		  0x1494
-#define R128_BRUSH_DATA50		  0x1548
-#define R128_BRUSH_DATA51		  0x154c
-#define R128_BRUSH_DATA52		  0x1550
-#define R128_BRUSH_DATA53		  0x1554
-#define R128_BRUSH_DATA54		  0x1558
-#define R128_BRUSH_DATA55		  0x155c
-#define R128_BRUSH_DATA56		  0x1560
-#define R128_BRUSH_DATA57		  0x1564
-#define R128_BRUSH_DATA58		  0x1568
-#define R128_BRUSH_DATA59		  0x156c
-#define R128_BRUSH_DATA6		  0x1498
-#define R128_BRUSH_DATA60		  0x1570
-#define R128_BRUSH_DATA61		  0x1574
-#define R128_BRUSH_DATA62		  0x1578
-#define R128_BRUSH_DATA63		  0x157c
-#define R128_BRUSH_DATA7		  0x149c
-#define R128_BRUSH_DATA8		  0x14a0
-#define R128_BRUSH_DATA9		  0x14a4
-#define R128_BRUSH_SCALE		  0x1470
-#define R128_BRUSH_Y_X			  0x1474
-#define R128_BUS_CNTL			  0x0030
-#	define R128_BUS_MASTER_DIS	   (1 << 6)
-#	define R128_BUS_RD_DISCARD_EN	   (1 << 24)
-#	define R128_BUS_RD_ABORT_EN	   (1 << 25)
-#	define R128_BUS_MSTR_DISCONNECT_EN (1 << 28)
-#	define R128_BUS_WRT_BURST	   (1 << 29)
-#	define R128_BUS_READ_BURST	   (1 << 30)
-#define R128_BUS_CNTL1			  0x0034
-#	define R128_BUS_WAIT_ON_LOCK_EN	   (1 << 4)
+#define R128_BASE_CODE                    0x0f0b
+#define R128_BIOS_0_SCRATCH               0x0010
+#define R128_BIOS_1_SCRATCH               0x0014
+#define R128_BIOS_2_SCRATCH               0x0018
+#define R128_BIOS_3_SCRATCH               0x001c
+#define R128_BIOS_ROM                     0x0f30 /* PCI */
+#define R128_BIST                         0x0f0f /* PCI */
+#define R128_BRUSH_DATA0                  0x1480
+#define R128_BRUSH_DATA1                  0x1484
+#define R128_BRUSH_DATA10                 0x14a8
+#define R128_BRUSH_DATA11                 0x14ac
+#define R128_BRUSH_DATA12                 0x14b0
+#define R128_BRUSH_DATA13                 0x14b4
+#define R128_BRUSH_DATA14                 0x14b8
+#define R128_BRUSH_DATA15                 0x14bc
+#define R128_BRUSH_DATA16                 0x14c0
+#define R128_BRUSH_DATA17                 0x14c4
+#define R128_BRUSH_DATA18                 0x14c8
+#define R128_BRUSH_DATA19                 0x14cc
+#define R128_BRUSH_DATA2                  0x1488
+#define R128_BRUSH_DATA20                 0x14d0
+#define R128_BRUSH_DATA21                 0x14d4
+#define R128_BRUSH_DATA22                 0x14d8
+#define R128_BRUSH_DATA23                 0x14dc
+#define R128_BRUSH_DATA24                 0x14e0
+#define R128_BRUSH_DATA25                 0x14e4
+#define R128_BRUSH_DATA26                 0x14e8
+#define R128_BRUSH_DATA27                 0x14ec
+#define R128_BRUSH_DATA28                 0x14f0
+#define R128_BRUSH_DATA29                 0x14f4
+#define R128_BRUSH_DATA3                  0x148c
+#define R128_BRUSH_DATA30                 0x14f8
+#define R128_BRUSH_DATA31                 0x14fc
+#define R128_BRUSH_DATA32                 0x1500
+#define R128_BRUSH_DATA33                 0x1504
+#define R128_BRUSH_DATA34                 0x1508
+#define R128_BRUSH_DATA35                 0x150c
+#define R128_BRUSH_DATA36                 0x1510
+#define R128_BRUSH_DATA37                 0x1514
+#define R128_BRUSH_DATA38                 0x1518
+#define R128_BRUSH_DATA39                 0x151c
+#define R128_BRUSH_DATA4                  0x1490
+#define R128_BRUSH_DATA40                 0x1520
+#define R128_BRUSH_DATA41                 0x1524
+#define R128_BRUSH_DATA42                 0x1528
+#define R128_BRUSH_DATA43                 0x152c
+#define R128_BRUSH_DATA44                 0x1530
+#define R128_BRUSH_DATA45                 0x1534
+#define R128_BRUSH_DATA46                 0x1538
+#define R128_BRUSH_DATA47                 0x153c
+#define R128_BRUSH_DATA48                 0x1540
+#define R128_BRUSH_DATA49                 0x1544
+#define R128_BRUSH_DATA5                  0x1494
+#define R128_BRUSH_DATA50                 0x1548
+#define R128_BRUSH_DATA51                 0x154c
+#define R128_BRUSH_DATA52                 0x1550
+#define R128_BRUSH_DATA53                 0x1554
+#define R128_BRUSH_DATA54                 0x1558
+#define R128_BRUSH_DATA55                 0x155c
+#define R128_BRUSH_DATA56                 0x1560
+#define R128_BRUSH_DATA57                 0x1564
+#define R128_BRUSH_DATA58                 0x1568
+#define R128_BRUSH_DATA59                 0x156c
+#define R128_BRUSH_DATA6                  0x1498
+#define R128_BRUSH_DATA60                 0x1570
+#define R128_BRUSH_DATA61                 0x1574
+#define R128_BRUSH_DATA62                 0x1578
+#define R128_BRUSH_DATA63                 0x157c
+#define R128_BRUSH_DATA7                  0x149c
+#define R128_BRUSH_DATA8                  0x14a0
+#define R128_BRUSH_DATA9                  0x14a4
+#define R128_BRUSH_SCALE                  0x1470
+#define R128_BRUSH_Y_X                    0x1474
+#define R128_BUS_CNTL                     0x0030
+#       define R128_BUS_MASTER_DIS         (1 << 6)
+#       define R128_BUS_RD_DISCARD_EN      (1 << 24)
+#       define R128_BUS_RD_ABORT_EN        (1 << 25)
+#       define R128_BUS_MSTR_DISCONNECT_EN (1 << 28)
+#       define R128_BUS_WRT_BURST          (1 << 29)
+#       define R128_BUS_READ_BURST         (1 << 30)
+#define R128_BUS_CNTL1                    0x0034
+#       define R128_BUS_WAIT_ON_LOCK_EN    (1 << 4)
 
-#define R128_CACHE_CNTL			  0x1724
-#define R128_CACHE_LINE			  0x0f0c /* PCI */
-#define R128_CAP0_TRIG_CNTL		  0x0950 /* ? */
-#define R128_CAP1_TRIG_CNTL		  0x09c0 /* ? */
-#define R128_CAPABILITIES_ID		  0x0f50 /* PCI */
-#define R128_CAPABILITIES_PTR		  0x0f34 /* PCI */
-#define R128_CLK_PIN_CNTL		  0x0001 /* PLL */
-#define R128_CLOCK_CNTL_DATA		  0x000c
-#define R128_CLOCK_CNTL_INDEX		  0x0008
-#	define R128_PLL_WR_EN		  (1 << 7)
-#	define R128_PLL_DIV_SEL		  (3 << 8)
-#define R128_CLR_CMP_CLR_3D		  0x1a24
-#define R128_CLR_CMP_CLR_DST		  0x15c8
-#define R128_CLR_CMP_CLR_SRC		  0x15c4
-#define R128_CLR_CMP_CNTL		  0x15c0
-#	define R128_SRC_CMP_EQ_COLOR	  (4 <<	 0)
-#	define R128_SRC_CMP_NEQ_COLOR	  (5 <<	 0)
-#	define R128_CLR_CMP_SRC_SOURCE	  (1 << 24)
-#define R128_CLR_CMP_MASK		  0x15cc
-#	define R128_CLR_CMP_MSK		  0xffffffff
-#define R128_CLR_CMP_MASK_3D		  0x1A28
-#define R128_COMMAND			  0x0f04 /* PCI */
-#define R128_COMPOSITE_SHADOW_ID	  0x1a0c
-#define R128_CONFIG_APER_0_BASE		  0x0100
-#define R128_CONFIG_APER_1_BASE		  0x0104
-#define R128_CONFIG_APER_SIZE		  0x0108
-#define R128_CONFIG_BONDS		  0x00e8
-#define R128_CONFIG_CNTL		  0x00e0
-#define R128_CONFIG_MEMSIZE		  0x00f8
-#define R128_CONFIG_MEMSIZE_EMBEDDED	  0x0114
-#define R128_CONFIG_REG_1_BASE		  0x010c
-#define R128_CONFIG_REG_APER_SIZE	  0x0110
-#define R128_CONFIG_XSTRAP		  0x00e4
-#define R128_CONSTANT_COLOR_C		  0x1d34
-#	define R128_CONSTANT_COLOR_MASK	  0x00ffffff
-#	define R128_CONSTANT_COLOR_ONE	  0x00ffffff
-#	define R128_CONSTANT_COLOR_ZERO	  0x00000000
-#define R128_CRC_CMDFIFO_ADDR		  0x0740
-#define R128_CRC_CMDFIFO_DOUT		  0x0744
-#define R128_CRTC_CRNT_FRAME		  0x0214
-#define R128_CRTC_DEBUG			  0x021c
-#define R128_CRTC_EXT_CNTL		  0x0054
-#	define R128_CRTC_VGA_XOVERSCAN	  (1 <<	 0)
-#	define R128_VGA_ATI_LINEAR	  (1 <<	 3)
-#	define R128_XCRT_CNT_EN		  (1 <<	 6)
-#	define R128_CRTC_HSYNC_DIS	  (1 <<	 8)
-#	define R128_CRTC_VSYNC_DIS	  (1 <<	 9)
-#	define R128_CRTC_DISPLAY_DIS	  (1 << 10)
-#	define R128_CRTC_CRT_ON		  (1 << 15)
-#define R128_CRTC_EXT_CNTL_DPMS_BYTE	  0x0055
-#	define R128_CRTC_HSYNC_DIS_BYTE	  (1 <<	 0)
-#	define R128_CRTC_VSYNC_DIS_BYTE	  (1 <<	 1)
-#	define R128_CRTC_DISPLAY_DIS_BYTE (1 <<	 2)
-#define R128_CRTC_GEN_CNTL		  0x0050
-#	define R128_CRTC_DBL_SCAN_EN	  (1 <<	 0)
-#	define R128_CRTC_INTERLACE_EN	  (1 <<	 1)
-#	define R128_CRTC_CSYNC_EN	  (1 <<	 4)
-#	define R128_CRTC_CUR_EN		  (1 << 16)
-#	define R128_CRTC_CUR_MODE_MASK	  (7 << 17)
-#	define R128_CRTC_ICON_EN	  (1 << 20)
-#	define R128_CRTC_EXT_DISP_EN	  (1 << 24)
-#	define R128_CRTC_EN		  (1 << 25)
-#	define R128_CRTC_DISP_REQ_EN_B	  (1 << 26)
-#define R128_CRTC_GUI_TRIG_VLINE	  0x0218
-#define R128_CRTC_H_SYNC_STRT_WID	  0x0204
-#	define R128_CRTC_H_SYNC_STRT_PIX	(0x07  <<  0)
-#	define R128_CRTC_H_SYNC_STRT_CHAR	(0x1ff <<  3)
-#	define R128_CRTC_H_SYNC_STRT_CHAR_SHIFT 3
-#	define R128_CRTC_H_SYNC_WID		(0x3f  << 16)
-#	define R128_CRTC_H_SYNC_WID_SHIFT	16
-#	define R128_CRTC_H_SYNC_POL		(1     << 23)
-#define R128_CRTC_H_TOTAL_DISP		  0x0200
-#	define R128_CRTC_H_TOTAL	  (0x01ff << 0)
-#	define R128_CRTC_H_TOTAL_SHIFT	  0
-#	define R128_CRTC_H_DISP		  (0x00ff << 16)
-#	define R128_CRTC_H_DISP_SHIFT	  16
-#define R128_CRTC_OFFSET		  0x0224
-#define R128_CRTC_OFFSET_CNTL		  0x0228
-#define R128_CRTC_PITCH			  0x022c
-#define R128_CRTC_STATUS		  0x005c
-#	define R128_CRTC_VBLANK_SAVE	  (1 <<	 1)
-#define R128_CRTC_V_SYNC_STRT_WID	  0x020c
-#	define R128_CRTC_V_SYNC_STRT	   (0x7ff <<  0)
-#	define R128_CRTC_V_SYNC_STRT_SHIFT 0
-#	define R128_CRTC_V_SYNC_WID	   (0x1f  << 16)
-#	define R128_CRTC_V_SYNC_WID_SHIFT  16
-#	define R128_CRTC_V_SYNC_POL	   (1	  << 23)
-#define R128_CRTC_V_TOTAL_DISP		  0x0208
-#	define R128_CRTC_V_TOTAL	  (0x07ff << 0)
-#	define R128_CRTC_V_TOTAL_SHIFT	  0
-#	define R128_CRTC_V_DISP		  (0x07ff << 16)
-#	define R128_CRTC_V_DISP_SHIFT	  16
-#define R128_CRTC_VLINE_CRNT_VLINE	  0x0210
-#	define R128_CRTC_CRNT_VLINE_MASK  (0x7ff << 16)
-#define R128_CRTC2_CRNT_FRAME		  0x0314
-#define R128_CRTC2_DEBUG		  0x031c
-#define R128_CRTC2_GEN_CNTL		  0x03f8
-#define R128_CRTC2_GUI_TRIG_VLINE	  0x0318
-#define R128_CRTC2_H_SYNC_STRT_WID	  0x0304
-#define R128_CRTC2_H_TOTAL_DISP		  0x0300
-#define R128_CRTC2_OFFSET		  0x0324
-#define R128_CRTC2_OFFSET_CNTL		  0x0328
-#define R128_CRTC2_PITCH		  0x032c
-#define R128_CRTC2_STATUS		  0x03fc
-#define R128_CRTC2_V_SYNC_STRT_WID	  0x030c
-#define R128_CRTC2_V_TOTAL_DISP		  0x0308
-#define R128_CRTC2_VLINE_CRNT_VLINE	  0x0310
-#define R128_CRTC8_DATA			  0x03d5 /* VGA, 0x3b5 */
-#define R128_CRTC8_IDX			  0x03d4 /* VGA, 0x3b4 */
-#define R128_CUR_CLR0			  0x026c
-#define R128_CUR_CLR1			  0x0270
-#define R128_CUR_HORZ_VERT_OFF		  0x0268
-#define R128_CUR_HORZ_VERT_POSN		  0x0264
-#define R128_CUR_OFFSET			  0x0260
-#	define R128_CUR_LOCK		  (1 << 31)
+#define R128_CACHE_CNTL                   0x1724
+#define R128_CACHE_LINE                   0x0f0c /* PCI */
+#define R128_CAP0_TRIG_CNTL               0x0950 /* ? */
+#define R128_CAP1_TRIG_CNTL               0x09c0 /* ? */
+#define R128_CAPABILITIES_ID              0x0f50 /* PCI */
+#define R128_CAPABILITIES_PTR             0x0f34 /* PCI */
+#define R128_CLK_PIN_CNTL                 0x0001 /* PLL */
+#define R128_CLOCK_CNTL_DATA              0x000c
+#define R128_CLOCK_CNTL_INDEX             0x0008
+#       define R128_PLL_WR_EN             (1 << 7)
+#       define R128_PLL_DIV_SEL           (3 << 8)
+#define R128_CLR_CMP_CLR_3D               0x1a24
+#define R128_CLR_CMP_CLR_DST              0x15c8
+#define R128_CLR_CMP_CLR_SRC              0x15c4
+#define R128_CLR_CMP_CNTL                 0x15c0
+#       define R128_SRC_CMP_EQ_COLOR      (4 <<  0)
+#       define R128_SRC_CMP_NEQ_COLOR     (5 <<  0)
+#       define R128_CLR_CMP_SRC_SOURCE    (1 << 24)
+#define R128_CLR_CMP_MASK                 0x15cc
+#       define R128_CLR_CMP_MSK           0xffffffff
+#define R128_CLR_CMP_MASK_3D              0x1A28
+#define R128_COMMAND                      0x0f04 /* PCI */
+#define R128_COMPOSITE_SHADOW_ID          0x1a0c
+#define R128_CONFIG_APER_0_BASE           0x0100
+#define R128_CONFIG_APER_1_BASE           0x0104
+#define R128_CONFIG_APER_SIZE             0x0108
+#define R128_CONFIG_BONDS                 0x00e8
+#define R128_CONFIG_CNTL                  0x00e0
+#define R128_CONFIG_MEMSIZE               0x00f8
+#define R128_CONFIG_MEMSIZE_EMBEDDED      0x0114
+#define R128_CONFIG_REG_1_BASE            0x010c
+#define R128_CONFIG_REG_APER_SIZE         0x0110
+#define R128_CONFIG_XSTRAP                0x00e4
+#define R128_CONSTANT_COLOR_C             0x1d34
+#       define R128_CONSTANT_COLOR_MASK   0x00ffffff
+#       define R128_CONSTANT_COLOR_ONE    0x00ffffff
+#       define R128_CONSTANT_COLOR_ZERO   0x00000000
+#define R128_CRC_CMDFIFO_ADDR             0x0740
+#define R128_CRC_CMDFIFO_DOUT             0x0744
+#define R128_CRTC_CRNT_FRAME              0x0214
+#define R128_CRTC_DEBUG                   0x021c
+#define R128_CRTC_EXT_CNTL                0x0054
+#       define R128_CRTC_VGA_XOVERSCAN    (1 <<  0)
+#       define R128_VGA_ATI_LINEAR        (1 <<  3)
+#       define R128_XCRT_CNT_EN           (1 <<  6)
+#       define R128_CRTC_HSYNC_DIS        (1 <<  8)
+#       define R128_CRTC_VSYNC_DIS        (1 <<  9)
+#       define R128_CRTC_DISPLAY_DIS      (1 << 10)
+#       define R128_CRTC_CRT_ON           (1 << 15)
+#define R128_CRTC_EXT_CNTL_DPMS_BYTE      0x0055
+#       define R128_CRTC_HSYNC_DIS_BYTE   (1 <<  0)
+#       define R128_CRTC_VSYNC_DIS_BYTE   (1 <<  1)
+#       define R128_CRTC_DISPLAY_DIS_BYTE (1 <<  2)
+#define R128_CRTC_GEN_CNTL                0x0050
+#       define R128_CRTC_DBL_SCAN_EN      (1 <<  0)
+#       define R128_CRTC_INTERLACE_EN     (1 <<  1)
+#       define R128_CRTC_CSYNC_EN         (1 <<  4)
+#       define R128_CRTC_CUR_EN           (1 << 16)
+#       define R128_CRTC_CUR_MODE_MASK    (7 << 17)
+#       define R128_CRTC_ICON_EN          (1 << 20)
+#       define R128_CRTC_EXT_DISP_EN      (1 << 24)
+#       define R128_CRTC_EN               (1 << 25)
+#       define R128_CRTC_DISP_REQ_EN_B    (1 << 26)
+#define R128_CRTC_GUI_TRIG_VLINE          0x0218
+#define R128_CRTC_H_SYNC_STRT_WID         0x0204
+#       define R128_CRTC_H_SYNC_STRT_PIX        (0x07  <<  0)
+#       define R128_CRTC_H_SYNC_STRT_CHAR       (0x1ff <<  3)
+#       define R128_CRTC_H_SYNC_STRT_CHAR_SHIFT 3
+#       define R128_CRTC_H_SYNC_WID             (0x3f  << 16)
+#       define R128_CRTC_H_SYNC_WID_SHIFT       16
+#       define R128_CRTC_H_SYNC_POL             (1     << 23)
+#define R128_CRTC_H_TOTAL_DISP            0x0200
+#       define R128_CRTC_H_TOTAL          (0x01ff << 0)
+#       define R128_CRTC_H_TOTAL_SHIFT    0
+#       define R128_CRTC_H_DISP           (0x00ff << 16)
+#       define R128_CRTC_H_DISP_SHIFT     16
+#define R128_CRTC_OFFSET                  0x0224
+#define R128_CRTC_OFFSET_CNTL             0x0228
+#define R128_CRTC_PITCH                   0x022c
+#define R128_CRTC_STATUS                  0x005c
+#       define R128_CRTC_VBLANK_SAVE      (1 <<  1)
+#define R128_CRTC_V_SYNC_STRT_WID         0x020c
+#       define R128_CRTC_V_SYNC_STRT       (0x7ff <<  0)
+#       define R128_CRTC_V_SYNC_STRT_SHIFT 0
+#       define R128_CRTC_V_SYNC_WID        (0x1f  << 16)
+#       define R128_CRTC_V_SYNC_WID_SHIFT  16
+#       define R128_CRTC_V_SYNC_POL        (1     << 23)
+#define R128_CRTC_V_TOTAL_DISP            0x0208
+#       define R128_CRTC_V_TOTAL          (0x07ff << 0)
+#       define R128_CRTC_V_TOTAL_SHIFT    0
+#       define R128_CRTC_V_DISP           (0x07ff << 16)
+#       define R128_CRTC_V_DISP_SHIFT     16
+#define R128_CRTC_VLINE_CRNT_VLINE        0x0210
+#       define R128_CRTC_CRNT_VLINE_MASK  (0x7ff << 16)
+#define R128_CRTC2_CRNT_FRAME             0x0314
+#define R128_CRTC2_DEBUG                  0x031c
+#define R128_CRTC2_GEN_CNTL               0x03f8
+#define R128_CRTC2_GUI_TRIG_VLINE         0x0318
+#define R128_CRTC2_H_SYNC_STRT_WID        0x0304
+#define R128_CRTC2_H_TOTAL_DISP           0x0300
+#define R128_CRTC2_OFFSET                 0x0324
+#define R128_CRTC2_OFFSET_CNTL            0x0328
+#define R128_CRTC2_PITCH                  0x032c
+#define R128_CRTC2_STATUS                 0x03fc
+#define R128_CRTC2_V_SYNC_STRT_WID        0x030c
+#define R128_CRTC2_V_TOTAL_DISP           0x0308
+#define R128_CRTC2_VLINE_CRNT_VLINE       0x0310
+#define R128_CRTC8_DATA                   0x03d5 /* VGA, 0x3b5 */
+#define R128_CRTC8_IDX                    0x03d4 /* VGA, 0x3b4 */
+#define R128_CUR_CLR0                     0x026c
+#define R128_CUR_CLR1                     0x0270
+#define R128_CUR_HORZ_VERT_OFF            0x0268
+#define R128_CUR_HORZ_VERT_POSN           0x0264
+#define R128_CUR_OFFSET                   0x0260
+#       define R128_CUR_LOCK              (1 << 31)
 
-#define R128_DAC_CNTL			  0x0058
-#	define R128_DAC_RANGE_CNTL	  (3 <<	 0)
-#	define R128_DAC_BLANKING	  (1 <<	 2)
-#	define R128_DAC_CRT_SEL_CRTC2	  (1 <<	 4)
-#	define R128_DAC_PALETTE_ACC_CTL	  (1 <<	 5)
-#	define R128_DAC_8BIT_EN		  (1 <<	 8)
-#	define R128_DAC_VGA_ADR_EN	  (1 << 13)
-#	define R128_DAC_MASK_ALL	  (0xff << 24)
-#define R128_DAC_CRC_SIG		  0x02cc
-#define R128_DAC_DATA			  0x03c9 /* VGA */
-#define R128_DAC_MASK			  0x03c6 /* VGA */
-#define R128_DAC_R_INDEX		  0x03c7 /* VGA */
-#define R128_DAC_W_INDEX		  0x03c8 /* VGA */
-#define R128_DDA_CONFIG			  0x02e0
-#define R128_DDA_ON_OFF			  0x02e4
-#define R128_DEFAULT_OFFSET		  0x16e0
-#define R128_DEFAULT_PITCH		  0x16e4
-#define R128_DEFAULT_SC_BOTTOM_RIGHT	  0x16e8
-#	define R128_DEFAULT_SC_RIGHT_MAX  (0x1fff <<  0)
-#	define R128_DEFAULT_SC_BOTTOM_MAX (0x1fff << 16)
-#define R128_DESTINATION_3D_CLR_CMP_VAL	  0x1820
-#define R128_DESTINATION_3D_CLR_CMP_MSK	  0x1824
-#define R128_DEVICE_ID			  0x0f02 /* PCI */
-#define R128_DP_BRUSH_BKGD_CLR		  0x1478
-#define R128_DP_BRUSH_FRGD_CLR		  0x147c
-#define R128_DP_CNTL			  0x16c0
-#	define R128_DST_X_LEFT_TO_RIGHT	  (1 <<	 0)
-#	define R128_DST_Y_TOP_TO_BOTTOM	  (1 <<	 1)
-#define R128_DP_CNTL_XDIR_YDIR_YMAJOR	  0x16d0
-#	define R128_DST_Y_MAJOR		    (1 <<  2)
-#	define R128_DST_Y_DIR_TOP_TO_BOTTOM (1 << 15)
-#	define R128_DST_X_DIR_LEFT_TO_RIGHT (1 << 31)
-#define R128_DP_DATATYPE		  0x16c4
-#	define R128_HOST_BIG_ENDIAN_EN	  (1 << 29)
-#define R128_DP_GUI_MASTER_CNTL		  0x146c
-#	define R128_GMC_SRC_PITCH_OFFSET_CNTL (1    <<	0)
-#	define R128_GMC_DST_PITCH_OFFSET_CNTL (1    <<	1)
-#	define R128_GMC_SRC_CLIPPING	      (1    <<	2)
-#	define R128_GMC_DST_CLIPPING	      (1    <<	3)
-#	define R128_GMC_BRUSH_DATATYPE_MASK   (0x0f <<	4)
-#	define R128_GMC_BRUSH_8X8_MONO_FG_BG  (0    <<	4)
-#	define R128_GMC_BRUSH_8X8_MONO_FG_LA  (1    <<	4)
-#	define R128_GMC_BRUSH_1X8_MONO_FG_BG  (4    <<	4)
-#	define R128_GMC_BRUSH_1X8_MONO_FG_LA  (5    <<	4)
-#	define R128_GMC_BRUSH_32x1_MONO_FG_BG (6    <<	4)
-#	define R128_GMC_BRUSH_32x1_MONO_FG_LA (7    <<	4)
-#	define R128_GMC_BRUSH_8x8_COLOR	      (10   <<	4)
-#	define R128_GMC_BRUSH_1X8_COLOR	      (12   <<	4)
-#	define R128_GMC_BRUSH_SOLID_COLOR     (13   <<	4)
-#	define R128_GMC_BRUSH_NONE	      (15   <<	4)
-#	define R128_GMC_DST_8BPP_CI	      (2    <<	8)
-#	define R128_GMC_DST_15BPP	      (3    <<	8)
-#	define R128_GMC_DST_16BPP	      (4    <<	8)
-#	define R128_GMC_DST_24BPP	      (5    <<	8)
-#	define R128_GMC_DST_32BPP	      (6    <<	8)
-#	define R128_GMC_DST_8BPP_RGB	      (7    <<	8)
-#	define R128_GMC_DST_Y8		      (8    <<	8)
-#	define R128_GMC_DST_RGB8	      (9    <<	8)
-#	define R128_GMC_DST_VYUY	      (11   <<	8)
-#	define R128_GMC_DST_YVYU	      (12   <<	8)
-#	define R128_GMC_DST_AYUV444	      (14   <<	8)
-#	define R128_GMC_DST_ARGB4444	      (15   <<	8)
-#	define R128_GMC_DST_DATATYPE_MASK     (0x0f <<	8)
-#	define R128_GMC_DST_DATATYPE_SHIFT    8
-#	define R128_GMC_SRC_DATATYPE_MASK	(3    << 12)
-#	define R128_GMC_SRC_DATATYPE_MONO_FG_BG (0    << 12)
-#	define R128_GMC_SRC_DATATYPE_MONO_FG_LA (1    << 12)
-#	define R128_GMC_SRC_DATATYPE_COLOR	(3    << 12)
-#	define R128_GMC_BYTE_PIX_ORDER	      (1    << 14)
-#	define R128_GMC_BYTE_MSB_TO_LSB	      (0    << 14)
-#	define R128_GMC_BYTE_LSB_TO_MSB	      (1    << 14)
-#	define R128_GMC_CONVERSION_TEMP	      (1    << 15)
-#	define R128_GMC_CONVERSION_TEMP_6500  (0    << 15)
-#	define R128_GMC_CONVERSION_TEMP_9300  (1    << 15)
-#	define R128_GMC_ROP3_MASK	      (0xff << 16)
-#	define R128_DP_SRC_SOURCE_MASK	      (7    << 24)
-#	define R128_DP_SRC_SOURCE_MEMORY      (2    << 24)
-#	define R128_DP_SRC_SOURCE_HOST_DATA   (3    << 24)
-#	define R128_GMC_3D_FCN_EN	      (1    << 27)
-#	define R128_GMC_CLR_CMP_CNTL_DIS      (1    << 28)
-#	define R128_GMC_AUX_CLIP_DIS	      (1    << 29)
-#	define R128_GMC_WR_MSK_DIS	      (1    << 30)
-#	define R128_GMC_LD_BRUSH_Y_X	      (1    << 31)
-#	define R128_ROP3_ZERO		  0x00000000
-#	define R128_ROP3_DSa		  0x00880000
-#	define R128_ROP3_SDna		  0x00440000
-#	define R128_ROP3_S		  0x00cc0000
-#	define R128_ROP3_DSna		  0x00220000
-#	define R128_ROP3_D		  0x00aa0000
-#	define R128_ROP3_DSx		  0x00660000
-#	define R128_ROP3_DSo		  0x00ee0000
-#	define R128_ROP3_DSon		  0x00110000
-#	define R128_ROP3_DSxn		  0x00990000
-#	define R128_ROP3_Dn		  0x00550000
-#	define R128_ROP3_SDno		  0x00dd0000
-#	define R128_ROP3_Sn		  0x00330000
-#	define R128_ROP3_DSno		  0x00bb0000
-#	define R128_ROP3_DSan		  0x00770000
-#	define R128_ROP3_ONE		  0x00ff0000
-#	define R128_ROP3_DPa		  0x00a00000
-#	define R128_ROP3_PDna		  0x00500000
-#	define R128_ROP3_P		  0x00f00000
-#	define R128_ROP3_DPna		  0x000a0000
-#	define R128_ROP3_D		  0x00aa0000
-#	define R128_ROP3_DPx		  0x005a0000
-#	define R128_ROP3_DPo		  0x00fa0000
-#	define R128_ROP3_DPon		  0x00050000
-#	define R128_ROP3_PDxn		  0x00a50000
-#	define R128_ROP3_PDno		  0x00f50000
-#	define R128_ROP3_Pn		  0x000f0000
-#	define R128_ROP3_DPno		  0x00af0000
-#	define R128_ROP3_DPan		  0x005f0000
+#define R128_DAC_CNTL                     0x0058
+#       define R128_DAC_RANGE_CNTL        (3 <<  0)
+#       define R128_DAC_BLANKING          (1 <<  2)
+#       define R128_DAC_CRT_SEL_CRTC2     (1 <<  4)
+#       define R128_DAC_PALETTE_ACC_CTL   (1 <<  5)
+#       define R128_DAC_8BIT_EN           (1 <<  8)
+#       define R128_DAC_VGA_ADR_EN        (1 << 13)
+#       define R128_DAC_MASK_ALL          (0xff << 24)
+#define R128_DAC_CRC_SIG                  0x02cc
+#define R128_DAC_DATA                     0x03c9 /* VGA */
+#define R128_DAC_MASK                     0x03c6 /* VGA */
+#define R128_DAC_R_INDEX                  0x03c7 /* VGA */
+#define R128_DAC_W_INDEX                  0x03c8 /* VGA */
+#define R128_DDA_CONFIG                   0x02e0
+#define R128_DDA_ON_OFF                   0x02e4
+#define R128_DEFAULT_OFFSET               0x16e0
+#define R128_DEFAULT_PITCH                0x16e4
+#define R128_DEFAULT_SC_BOTTOM_RIGHT      0x16e8
+#       define R128_DEFAULT_SC_RIGHT_MAX  (0x1fff <<  0)
+#       define R128_DEFAULT_SC_BOTTOM_MAX (0x1fff << 16)
+#define R128_DESTINATION_3D_CLR_CMP_VAL   0x1820
+#define R128_DESTINATION_3D_CLR_CMP_MSK   0x1824
+#define R128_DEVICE_ID                    0x0f02 /* PCI */
+#define R128_DP_BRUSH_BKGD_CLR            0x1478
+#define R128_DP_BRUSH_FRGD_CLR            0x147c
+#define R128_DP_CNTL                      0x16c0
+#       define R128_DST_X_LEFT_TO_RIGHT   (1 <<  0)
+#       define R128_DST_Y_TOP_TO_BOTTOM   (1 <<  1)
+#define R128_DP_CNTL_XDIR_YDIR_YMAJOR     0x16d0
+#       define R128_DST_Y_MAJOR             (1 <<  2)
+#       define R128_DST_Y_DIR_TOP_TO_BOTTOM (1 << 15)
+#       define R128_DST_X_DIR_LEFT_TO_RIGHT (1 << 31)
+#define R128_DP_DATATYPE                  0x16c4
+#       define R128_HOST_BIG_ENDIAN_EN    (1 << 29)
+#define R128_DP_GUI_MASTER_CNTL           0x146c
+#       define R128_GMC_SRC_PITCH_OFFSET_CNTL (1    <<  0)
+#       define R128_GMC_DST_PITCH_OFFSET_CNTL (1    <<  1)
+#       define R128_GMC_SRC_CLIPPING          (1    <<  2)
+#       define R128_GMC_DST_CLIPPING          (1    <<  3)
+#       define R128_GMC_BRUSH_DATATYPE_MASK   (0x0f <<  4)
+#       define R128_GMC_BRUSH_8X8_MONO_FG_BG  (0    <<  4)
+#       define R128_GMC_BRUSH_8X8_MONO_FG_LA  (1    <<  4)
+#       define R128_GMC_BRUSH_1X8_MONO_FG_BG  (4    <<  4)
+#       define R128_GMC_BRUSH_1X8_MONO_FG_LA  (5    <<  4)
+#       define R128_GMC_BRUSH_32x1_MONO_FG_BG (6    <<  4)
+#       define R128_GMC_BRUSH_32x1_MONO_FG_LA (7    <<  4)
+#       define R128_GMC_BRUSH_8x8_COLOR       (10   <<  4)
+#       define R128_GMC_BRUSH_1X8_COLOR       (12   <<  4)
+#       define R128_GMC_BRUSH_SOLID_COLOR     (13   <<  4)
+#       define R128_GMC_BRUSH_NONE            (15   <<  4)
+#       define R128_GMC_DST_8BPP_CI           (2    <<  8)
+#       define R128_GMC_DST_15BPP             (3    <<  8)
+#       define R128_GMC_DST_16BPP             (4    <<  8)
+#       define R128_GMC_DST_24BPP             (5    <<  8)
+#       define R128_GMC_DST_32BPP             (6    <<  8)
+#       define R128_GMC_DST_8BPP_RGB          (7    <<  8)
+#       define R128_GMC_DST_Y8                (8    <<  8)
+#       define R128_GMC_DST_RGB8              (9    <<  8)
+#       define R128_GMC_DST_VYUY              (11   <<  8)
+#       define R128_GMC_DST_YVYU              (12   <<  8)
+#       define R128_GMC_DST_AYUV444           (14   <<  8)
+#       define R128_GMC_DST_ARGB4444          (15   <<  8)
+#       define R128_GMC_DST_DATATYPE_MASK     (0x0f <<  8)
+#       define R128_GMC_DST_DATATYPE_SHIFT    8
+#       define R128_GMC_SRC_DATATYPE_MASK       (3    << 12)
+#       define R128_GMC_SRC_DATATYPE_MONO_FG_BG (0    << 12)
+#       define R128_GMC_SRC_DATATYPE_MONO_FG_LA (1    << 12)
+#       define R128_GMC_SRC_DATATYPE_COLOR      (3    << 12)
+#       define R128_GMC_BYTE_PIX_ORDER        (1    << 14)
+#       define R128_GMC_BYTE_MSB_TO_LSB       (0    << 14)
+#       define R128_GMC_BYTE_LSB_TO_MSB       (1    << 14)
+#       define R128_GMC_CONVERSION_TEMP       (1    << 15)
+#       define R128_GMC_CONVERSION_TEMP_6500  (0    << 15)
+#       define R128_GMC_CONVERSION_TEMP_9300  (1    << 15)
+#       define R128_GMC_ROP3_MASK             (0xff << 16)
+#       define R128_DP_SRC_SOURCE_MASK        (7    << 24)
+#       define R128_DP_SRC_SOURCE_MEMORY      (2    << 24)
+#       define R128_DP_SRC_SOURCE_HOST_DATA   (3    << 24)
+#       define R128_GMC_3D_FCN_EN             (1    << 27)
+#       define R128_GMC_CLR_CMP_CNTL_DIS      (1    << 28)
+#       define R128_GMC_AUX_CLIP_DIS          (1    << 29)
+#       define R128_GMC_WR_MSK_DIS            (1    << 30)
+#       define R128_GMC_LD_BRUSH_Y_X          (1    << 31)
+#       define R128_ROP3_ZERO             0x00000000
+#       define R128_ROP3_DSa              0x00880000
+#       define R128_ROP3_SDna             0x00440000
+#       define R128_ROP3_S                0x00cc0000
+#       define R128_ROP3_DSna             0x00220000
+#       define R128_ROP3_D                0x00aa0000
+#       define R128_ROP3_DSx              0x00660000
+#       define R128_ROP3_DSo              0x00ee0000
+#       define R128_ROP3_DSon             0x00110000
+#       define R128_ROP3_DSxn             0x00990000
+#       define R128_ROP3_Dn               0x00550000
+#       define R128_ROP3_SDno             0x00dd0000
+#       define R128_ROP3_Sn               0x00330000
+#       define R128_ROP3_DSno             0x00bb0000
+#       define R128_ROP3_DSan             0x00770000
+#       define R128_ROP3_ONE              0x00ff0000
+#       define R128_ROP3_DPa              0x00a00000
+#       define R128_ROP3_PDna             0x00500000
+#       define R128_ROP3_P                0x00f00000
+#       define R128_ROP3_DPna             0x000a0000
+#       define R128_ROP3_D                0x00aa0000
+#       define R128_ROP3_DPx              0x005a0000
+#       define R128_ROP3_DPo              0x00fa0000
+#       define R128_ROP3_DPon             0x00050000
+#       define R128_ROP3_PDxn             0x00a50000
+#       define R128_ROP3_PDno             0x00f50000
+#       define R128_ROP3_Pn               0x000f0000
+#       define R128_ROP3_DPno             0x00af0000
+#       define R128_ROP3_DPan             0x005f0000
 
 
-#define R128_DP_GUI_MASTER_CNTL_C	  0x1c84
-#define R128_DP_MIX			  0x16c8
-#define R128_DP_SRC_BKGD_CLR		  0x15dc
-#define R128_DP_SRC_FRGD_CLR		  0x15d8
-#define R128_DP_WRITE_MASK		  0x16cc
-#define R128_DST_BRES_DEC		  0x1630
-#define R128_DST_BRES_ERR		  0x1628
-#define R128_DST_BRES_INC		  0x162c
-#define R128_DST_BRES_LNTH		  0x1634
-#define R128_DST_BRES_LNTH_SUB		  0x1638
-#define R128_DST_HEIGHT			  0x1410
-#define R128_DST_HEIGHT_WIDTH		  0x143c
-#define R128_DST_HEIGHT_WIDTH_8		  0x158c
-#define R128_DST_HEIGHT_WIDTH_BW	  0x15b4
-#define R128_DST_HEIGHT_Y		  0x15a0
-#define R128_DST_OFFSET			  0x1404
-#define R128_DST_PITCH			  0x1408
-#define R128_DST_PITCH_OFFSET		  0x142c
-#define R128_DST_PITCH_OFFSET_C		  0x1c80
-#	define R128_PITCH_SHIFT		      21
-#define R128_DST_WIDTH			  0x140c
-#define R128_DST_WIDTH_HEIGHT		  0x1598
-#define R128_DST_WIDTH_X		  0x1588
-#define R128_DST_WIDTH_X_INCY		  0x159c
-#define R128_DST_X			  0x141c
-#define R128_DST_X_SUB			  0x15a4
-#define R128_DST_X_Y			  0x1594
-#define R128_DST_Y			  0x1420
-#define R128_DST_Y_SUB			  0x15a8
-#define R128_DST_Y_X			  0x1438
+#define R128_DP_GUI_MASTER_CNTL_C         0x1c84
+#define R128_DP_MIX                       0x16c8
+#define R128_DP_SRC_BKGD_CLR              0x15dc
+#define R128_DP_SRC_FRGD_CLR              0x15d8
+#define R128_DP_WRITE_MASK                0x16cc
+#define R128_DST_BRES_DEC                 0x1630
+#define R128_DST_BRES_ERR                 0x1628
+#define R128_DST_BRES_INC                 0x162c
+#define R128_DST_BRES_LNTH                0x1634
+#define R128_DST_BRES_LNTH_SUB            0x1638
+#define R128_DST_HEIGHT                   0x1410
+#define R128_DST_HEIGHT_WIDTH             0x143c
+#define R128_DST_HEIGHT_WIDTH_8           0x158c
+#define R128_DST_HEIGHT_WIDTH_BW          0x15b4
+#define R128_DST_HEIGHT_Y                 0x15a0
+#define R128_DST_OFFSET                   0x1404
+#define R128_DST_PITCH                    0x1408
+#define R128_DST_PITCH_OFFSET             0x142c
+#define R128_DST_PITCH_OFFSET_C           0x1c80
+#       define R128_PITCH_SHIFT               21
+#define R128_DST_WIDTH                    0x140c
+#define R128_DST_WIDTH_HEIGHT             0x1598
+#define R128_DST_WIDTH_X                  0x1588
+#define R128_DST_WIDTH_X_INCY             0x159c
+#define R128_DST_X                        0x141c
+#define R128_DST_X_SUB                    0x15a4
+#define R128_DST_X_Y                      0x1594
+#define R128_DST_Y                        0x1420
+#define R128_DST_Y_SUB                    0x15a8
+#define R128_DST_Y_X                      0x1438
 
-#define R128_EXT_MEM_CNTL		  0x0144
+#define R128_EXT_MEM_CNTL                 0x0144
 
-#define R128_FCP_CNTL			  0x0012 /* PLL */
-#define R128_FLUSH_1			  0x1704
-#define R128_FLUSH_2			  0x1708
-#define R128_FLUSH_3			  0x170c
-#define R128_FLUSH_4			  0x1710
-#define R128_FLUSH_5			  0x1714
-#define R128_FLUSH_6			  0x1718
-#define R128_FLUSH_7			  0x171c
-#define R128_FOG_3D_TABLE_START		  0x1810
-#define R128_FOG_3D_TABLE_END		  0x1814
-#define R128_FOG_3D_TABLE_DENSITY	  0x181c
-#define R128_FOG_TABLE_INDEX		  0x1a14
-#define R128_FOG_TABLE_DATA		  0x1a18
-#define R128_FP_CRTC_H_TOTAL_DISP	  0x0250
-#define R128_FP_CRTC_V_TOTAL_DISP	  0x0254
-#define R128_FP_GEN_CNTL		  0x0284
-#	define R128_FP_FPON		     (1 << 0)
-#	define R128_FP_TDMS_EN		     (1 <<  2)
-#	define R128_FP_DETECT_SENSE	     (1 <<  8)
-#	define R128_FP_SEL_CRTC2	     (1 << 13)
-#	define R128_FP_CRTC_DONT_SHADOW_VPAR (1 << 16)
-#	define R128_FP_CRTC_USE_SHADOW_VEND  (1 << 18)
-#	define R128_FP_CRTC_HORZ_DIV2_EN     (1 << 20)
-#	define R128_FP_CRTC_HOR_CRT_DIV2_DIS (1 << 21)
-#	define R128_FP_USE_SHADOW_EN	     (1 << 24)
-#define R128_FP_H_SYNC_STRT_WID		  0x02c4
-#define R128_FP_HORZ_STRETCH		  0x028c
-#	define R128_HORZ_STRETCH_RATIO_MASK  0xffff
-#	define R128_HORZ_STRETCH_RATIO_SHIFT 0
-#	define R128_HORZ_STRETCH_RATIO_MAX   4096
-#	define R128_HORZ_PANEL_SIZE	     (0xff   << 16)
-#	define R128_HORZ_PANEL_SHIFT	     16
-#	define R128_HORZ_STRETCH_PIXREP	     (0	     << 25)
-#	define R128_HORZ_STRETCH_BLEND	     (1	     << 25)
-#	define R128_HORZ_STRETCH_ENABLE	     (1	     << 26)
-#	define R128_HORZ_FP_LOOP_STRETCH     (0x7    << 27)
-#	define R128_HORZ_STRETCH_RESERVED    (1	     << 30)
-#	define R128_HORZ_AUTO_RATIO_FIX_EN   (1	     << 31)
+#define R128_FCP_CNTL                     0x0012 /* PLL */
+#define R128_FLUSH_1                      0x1704
+#define R128_FLUSH_2                      0x1708
+#define R128_FLUSH_3                      0x170c
+#define R128_FLUSH_4                      0x1710
+#define R128_FLUSH_5                      0x1714
+#define R128_FLUSH_6                      0x1718
+#define R128_FLUSH_7                      0x171c
+#define R128_FOG_3D_TABLE_START           0x1810
+#define R128_FOG_3D_TABLE_END             0x1814
+#define R128_FOG_3D_TABLE_DENSITY         0x181c
+#define R128_FOG_TABLE_INDEX              0x1a14
+#define R128_FOG_TABLE_DATA               0x1a18
+#define R128_FP_CRTC_H_TOTAL_DISP         0x0250
+#define R128_FP_CRTC_V_TOTAL_DISP         0x0254
+#define R128_FP_GEN_CNTL                  0x0284
+#       define R128_FP_FPON                  (1 << 0)
+#       define R128_FP_TDMS_EN               (1 <<  2)
+#       define R128_FP_DETECT_SENSE          (1 <<  8)
+#       define R128_FP_SEL_CRTC2             (1 << 13)
+#       define R128_FP_CRTC_DONT_SHADOW_VPAR (1 << 16)
+#       define R128_FP_CRTC_USE_SHADOW_VEND  (1 << 18)
+#       define R128_FP_CRTC_HORZ_DIV2_EN     (1 << 20)
+#       define R128_FP_CRTC_HOR_CRT_DIV2_DIS (1 << 21)
+#       define R128_FP_USE_SHADOW_EN         (1 << 24)
+#define R128_FP_H_SYNC_STRT_WID           0x02c4
+#define R128_FP_HORZ_STRETCH              0x028c
+#       define R128_HORZ_STRETCH_RATIO_MASK  0xffff
+#       define R128_HORZ_STRETCH_RATIO_SHIFT 0
+#       define R128_HORZ_STRETCH_RATIO_MAX   4096
+#       define R128_HORZ_PANEL_SIZE          (0xff   << 16)
+#       define R128_HORZ_PANEL_SHIFT         16
+#       define R128_HORZ_STRETCH_PIXREP      (0      << 25)
+#       define R128_HORZ_STRETCH_BLEND       (1      << 25)
+#       define R128_HORZ_STRETCH_ENABLE      (1      << 26)
+#       define R128_HORZ_FP_LOOP_STRETCH     (0x7    << 27)
+#       define R128_HORZ_STRETCH_RESERVED    (1      << 30)
+#       define R128_HORZ_AUTO_RATIO_FIX_EN   (1      << 31)
 
-#define R128_FP_PANEL_CNTL		  0x0288
-#	define R128_FP_DIGON		  (1 << 0)
-#	define R128_FP_BLON		  (1 << 1)
-#define R128_FP_V_SYNC_STRT_WID		  0x02c8
-#define R128_FP_VERT_STRETCH		  0x0290
-#	define R128_VERT_PANEL_SIZE	     (0x7ff <<	0)
-#	define R128_VERT_PANEL_SHIFT	     0
-#	define R128_VERT_STRETCH_RATIO_MASK  0x3ff
-#	define R128_VERT_STRETCH_RATIO_SHIFT 11
-#	define R128_VERT_STRETCH_RATIO_MAX   1024
-#	define R128_VERT_STRETCH_ENABLE	     (1	    << 24)
-#	define R128_VERT_STRETCH_LINEREP     (0	    << 25)
-#	define R128_VERT_STRETCH_BLEND	     (1	    << 25)
-#	define R128_VERT_AUTO_RATIO_EN	     (1	    << 26)
-#	define R128_VERT_STRETCH_RESERVED    0xf8e00000
+#define R128_FP_PANEL_CNTL                0x0288
+#       define R128_FP_DIGON              (1 << 0)
+#       define R128_FP_BLON               (1 << 1)
+#define R128_FP_V_SYNC_STRT_WID           0x02c8
+#define R128_FP_VERT_STRETCH              0x0290
+#       define R128_VERT_PANEL_SIZE          (0x7ff <<  0)
+#       define R128_VERT_PANEL_SHIFT         0
+#       define R128_VERT_STRETCH_RATIO_MASK  0x3ff
+#       define R128_VERT_STRETCH_RATIO_SHIFT 11
+#       define R128_VERT_STRETCH_RATIO_MAX   1024
+#       define R128_VERT_STRETCH_ENABLE      (1     << 24)
+#       define R128_VERT_STRETCH_LINEREP     (0     << 25)
+#       define R128_VERT_STRETCH_BLEND       (1     << 25)
+#       define R128_VERT_AUTO_RATIO_EN       (1     << 26)
+#       define R128_VERT_STRETCH_RESERVED    0xf8e00000
 
-#define R128_GEN_INT_CNTL		  0x0040
-#define R128_GEN_INT_STATUS		  0x0044
-#	define R128_VSYNC_INT_AK	  (1 <<	 2)
-#	define R128_VSYNC_INT		  (1 <<	 2)
-#define R128_GEN_RESET_CNTL		  0x00f0
-#	define R128_SOFT_RESET_GUI	    (1 <<  0)
-#	define R128_SOFT_RESET_VCLK	    (1 <<  8)
-#	define R128_SOFT_RESET_PCLK	    (1 <<  9)
-#	define R128_SOFT_RESET_DISPENG_XCLK (1 << 11)
-#	define R128_SOFT_RESET_MEMCTLR_XCLK (1 << 12)
-#define R128_GENENB			  0x03c3 /* VGA */
-#define R128_GENFC_RD			  0x03ca /* VGA */
-#define R128_GENFC_WT			  0x03da /* VGA, 0x03ba */
-#define R128_GENMO_RD			  0x03cc /* VGA */
-#define R128_GENMO_WT			  0x03c2 /* VGA */
-#define R128_GENS0			  0x03c2 /* VGA */
-#define R128_GENS1			  0x03da /* VGA, 0x03ba */
-#define R128_GPIO_MONID			  0x0068
-#	define R128_GPIO_MONID_A_0	  (1 <<	 0)
-#	define R128_GPIO_MONID_A_1	  (1 <<	 1)
-#	define R128_GPIO_MONID_A_2	  (1 <<	 2)
-#	define R128_GPIO_MONID_A_3	  (1 <<	 3)
-#	define R128_GPIO_MONID_Y_0	  (1 <<	 8)
-#	define R128_GPIO_MONID_Y_1	  (1 <<	 9)
-#	define R128_GPIO_MONID_Y_2	  (1 << 10)
-#	define R128_GPIO_MONID_Y_3	  (1 << 11)
-#	define R128_GPIO_MONID_EN_0	  (1 << 16)
-#	define R128_GPIO_MONID_EN_1	  (1 << 17)
-#	define R128_GPIO_MONID_EN_2	  (1 << 18)
-#	define R128_GPIO_MONID_EN_3	  (1 << 19)
-#	define R128_GPIO_MONID_MASK_0	  (1 << 24)
-#	define R128_GPIO_MONID_MASK_1	  (1 << 25)
-#	define R128_GPIO_MONID_MASK_2	  (1 << 26)
-#	define R128_GPIO_MONID_MASK_3	  (1 << 27)
-#define R128_GPIO_MONIDB		  0x006c
-#define R128_GRPH8_DATA			  0x03cf /* VGA */
-#define R128_GRPH8_IDX			  0x03ce /* VGA */
-#define R128_GUI_DEBUG0			  0x16a0
-#define R128_GUI_DEBUG1			  0x16a4
-#define R128_GUI_DEBUG2			  0x16a8
-#define R128_GUI_DEBUG3			  0x16ac
-#define R128_GUI_DEBUG4			  0x16b0
-#define R128_GUI_DEBUG5			  0x16b4
-#define R128_GUI_DEBUG6			  0x16b8
-#define R128_GUI_PROBE			  0x16bc
-#define R128_GUI_SCRATCH_REG0		  0x15e0
-#define R128_GUI_SCRATCH_REG1		  0x15e4
-#define R128_GUI_SCRATCH_REG2		  0x15e8
-#define R128_GUI_SCRATCH_REG3		  0x15ec
-#define R128_GUI_SCRATCH_REG4		  0x15f0
-#define R128_GUI_SCRATCH_REG5		  0x15f4
-#define R128_GUI_STAT			  0x1740
-#	define R128_GUI_FIFOCNT_MASK	  0x0fff
-#	define R128_GUI_ACTIVE		  (1 << 31)
+#define R128_GEN_INT_CNTL                 0x0040
+#define R128_GEN_INT_STATUS               0x0044
+#       define R128_VSYNC_INT_AK          (1 <<  2)
+#       define R128_VSYNC_INT             (1 <<  2)
+#define R128_GEN_RESET_CNTL               0x00f0
+#       define R128_SOFT_RESET_GUI          (1 <<  0)
+#       define R128_SOFT_RESET_VCLK         (1 <<  8)
+#       define R128_SOFT_RESET_PCLK         (1 <<  9)
+#       define R128_SOFT_RESET_DISPENG_XCLK (1 << 11)
+#       define R128_SOFT_RESET_MEMCTLR_XCLK (1 << 12)
+#define R128_GENENB                       0x03c3 /* VGA */
+#define R128_GENFC_RD                     0x03ca /* VGA */
+#define R128_GENFC_WT                     0x03da /* VGA, 0x03ba */
+#define R128_GENMO_RD                     0x03cc /* VGA */
+#define R128_GENMO_WT                     0x03c2 /* VGA */
+#define R128_GENS0                        0x03c2 /* VGA */
+#define R128_GENS1                        0x03da /* VGA, 0x03ba */
+#define R128_GPIO_MONID                   0x0068
+#       define R128_GPIO_MONID_A_0        (1 <<  0)
+#       define R128_GPIO_MONID_A_1        (1 <<  1)
+#       define R128_GPIO_MONID_A_2        (1 <<  2)
+#       define R128_GPIO_MONID_A_3        (1 <<  3)
+#       define R128_GPIO_MONID_Y_0        (1 <<  8)
+#       define R128_GPIO_MONID_Y_1        (1 <<  9)
+#       define R128_GPIO_MONID_Y_2        (1 << 10)
+#       define R128_GPIO_MONID_Y_3        (1 << 11)
+#       define R128_GPIO_MONID_EN_0       (1 << 16)
+#       define R128_GPIO_MONID_EN_1       (1 << 17)
+#       define R128_GPIO_MONID_EN_2       (1 << 18)
+#       define R128_GPIO_MONID_EN_3       (1 << 19)
+#       define R128_GPIO_MONID_MASK_0     (1 << 24)
+#       define R128_GPIO_MONID_MASK_1     (1 << 25)
+#       define R128_GPIO_MONID_MASK_2     (1 << 26)
+#       define R128_GPIO_MONID_MASK_3     (1 << 27)
+#define R128_GPIO_MONIDB                  0x006c
+#define R128_GRPH8_DATA                   0x03cf /* VGA */
+#define R128_GRPH8_IDX                    0x03ce /* VGA */
+#define R128_GUI_DEBUG0                   0x16a0
+#define R128_GUI_DEBUG1                   0x16a4
+#define R128_GUI_DEBUG2                   0x16a8
+#define R128_GUI_DEBUG3                   0x16ac
+#define R128_GUI_DEBUG4                   0x16b0
+#define R128_GUI_DEBUG5                   0x16b4
+#define R128_GUI_DEBUG6                   0x16b8
+#define R128_GUI_PROBE                    0x16bc
+#define R128_GUI_SCRATCH_REG0             0x15e0
+#define R128_GUI_SCRATCH_REG1             0x15e4
+#define R128_GUI_SCRATCH_REG2             0x15e8
+#define R128_GUI_SCRATCH_REG3             0x15ec
+#define R128_GUI_SCRATCH_REG4             0x15f0
+#define R128_GUI_SCRATCH_REG5             0x15f4
+#define R128_GUI_STAT                     0x1740
+#       define R128_GUI_FIFOCNT_MASK      0x0fff
+#       define R128_GUI_ACTIVE            (1 << 31)
 
-#define R128_HEADER			  0x0f0e /* PCI */
-#define R128_HOST_DATA0			  0x17c0
-#define R128_HOST_DATA1			  0x17c4
-#define R128_HOST_DATA2			  0x17c8
-#define R128_HOST_DATA3			  0x17cc
-#define R128_HOST_DATA4			  0x17d0
-#define R128_HOST_DATA5			  0x17d4
-#define R128_HOST_DATA6			  0x17d8
-#define R128_HOST_DATA7			  0x17dc
-#define R128_HOST_DATA_LAST		  0x17e0
-#define R128_HOST_PATH_CNTL		  0x0130
-#define R128_HTOTAL_CNTL		  0x0009 /* PLL */
-#define R128_HW_DEBUG			  0x0128
-#define R128_HW_DEBUG2			  0x011c
+#define R128_HEADER                       0x0f0e /* PCI */
+#define R128_HOST_DATA0                   0x17c0
+#define R128_HOST_DATA1                   0x17c4
+#define R128_HOST_DATA2                   0x17c8
+#define R128_HOST_DATA3                   0x17cc
+#define R128_HOST_DATA4                   0x17d0
+#define R128_HOST_DATA5                   0x17d4
+#define R128_HOST_DATA6                   0x17d8
+#define R128_HOST_DATA7                   0x17dc
+#define R128_HOST_DATA_LAST               0x17e0
+#define R128_HOST_PATH_CNTL               0x0130
+#define R128_HTOTAL_CNTL                  0x0009 /* PLL */
+#define R128_HW_DEBUG                     0x0128
+#define R128_HW_DEBUG2                    0x011c
 
-#define R128_I2C_CNTL_1			  0x0094 /* ? */
-#define R128_INTERRUPT_LINE		  0x0f3c /* PCI */
-#define R128_INTERRUPT_PIN		  0x0f3d /* PCI */
-#define R128_IO_BASE			  0x0f14 /* PCI */
+#define R128_I2C_CNTL_1                   0x0094 /* ? */
+#define R128_INTERRUPT_LINE               0x0f3c /* PCI */
+#define R128_INTERRUPT_PIN                0x0f3d /* PCI */
+#define R128_IO_BASE                      0x0f14 /* PCI */
 
-#define R128_LATENCY			  0x0f0d /* PCI */
-#define R128_LEAD_BRES_DEC		  0x1608
-#define R128_LEAD_BRES_ERR		  0x1600
-#define R128_LEAD_BRES_INC		  0x1604
-#define R128_LEAD_BRES_LNTH		  0x161c
-#define R128_LEAD_BRES_LNTH_SUB		  0x1624
-#define R128_LVDS_GEN_CNTL		  0x02d0
-#	define R128_LVDS_ON		  (1   <<  0)
-#	define R128_LVDS_BLON		  (1   << 19)
-#	define R128_LVDS_SEL_CRTC2	  (1   << 23)
-#	define R128_HSYNC_DELAY_SHIFT	  28
-#	define R128_HSYNC_DELAY_MASK	  (0xf << 28)
+#define R128_LATENCY                      0x0f0d /* PCI */
+#define R128_LEAD_BRES_DEC                0x1608
+#define R128_LEAD_BRES_ERR                0x1600
+#define R128_LEAD_BRES_INC                0x1604
+#define R128_LEAD_BRES_LNTH               0x161c
+#define R128_LEAD_BRES_LNTH_SUB           0x1624
+#define R128_LVDS_GEN_CNTL                0x02d0
+#       define R128_LVDS_ON               (1   <<  0)
+#       define R128_LVDS_BLON             (1   << 19)
+#       define R128_LVDS_SEL_CRTC2        (1   << 23)
+#       define R128_HSYNC_DELAY_SHIFT     28
+#       define R128_HSYNC_DELAY_MASK      (0xf << 28)
 
-#define R128_MAX_LATENCY		  0x0f3f /* PCI */
-#define R128_MCLK_CNTL			  0x000f /* PLL */
-#	define R128_FORCE_GCP		  (1 << 16)
-#	define R128_FORCE_PIPE3D_CP	  (1 << 17)
-#	define R128_FORCE_RCP		  (1 << 18)
-#define R128_MDGPIO_A_REG		  0x01ac
-#define R128_MDGPIO_EN_REG		  0x01b0
-#define R128_MDGPIO_MASK		  0x0198
-#define R128_MDGPIO_Y_REG		  0x01b4
-#define R128_MEM_ADDR_CONFIG		  0x0148
-#define R128_MEM_BASE			  0x0f10 /* PCI */
-#define R128_MEM_CNTL			  0x0140
-#define R128_MEM_INIT_LAT_TIMER		  0x0154
-#define R128_MEM_INTF_CNTL		  0x014c
-#define R128_MEM_SDRAM_MODE_REG		  0x0158
-#define R128_MEM_STR_CNTL		  0x0150
-#define R128_MEM_VGA_RP_SEL		  0x003c
-#define R128_MEM_VGA_WP_SEL		  0x0038
-#define R128_MIN_GRANT			  0x0f3e /* PCI */
-#define R128_MM_DATA			  0x0004
-#define R128_MM_INDEX			  0x0000
-#define R128_MPLL_CNTL			  0x000e /* PLL */
-#define R128_MPP_TB_CONFIG		  0x01c0 /* ? */
-#define R128_MPP_GP_CONFIG		  0x01c8 /* ? */
+#define R128_MAX_LATENCY                  0x0f3f /* PCI */
+#define R128_MCLK_CNTL                    0x000f /* PLL */
+#       define R128_FORCE_GCP             (1 << 16)
+#       define R128_FORCE_PIPE3D_CP       (1 << 17)
+#       define R128_FORCE_RCP             (1 << 18)
+#define R128_MDGPIO_A_REG                 0x01ac
+#define R128_MDGPIO_EN_REG                0x01b0
+#define R128_MDGPIO_MASK                  0x0198
+#define R128_MDGPIO_Y_REG                 0x01b4
+#define R128_MEM_ADDR_CONFIG              0x0148
+#define R128_MEM_BASE                     0x0f10 /* PCI */
+#define R128_MEM_CNTL                     0x0140
+#define R128_MEM_INIT_LAT_TIMER           0x0154
+#define R128_MEM_INTF_CNTL                0x014c
+#define R128_MEM_SDRAM_MODE_REG           0x0158
+#define R128_MEM_STR_CNTL                 0x0150
+#define R128_MEM_VGA_RP_SEL               0x003c
+#define R128_MEM_VGA_WP_SEL               0x0038
+#define R128_MIN_GRANT                    0x0f3e /* PCI */
+#define R128_MM_DATA                      0x0004
+#define R128_MM_INDEX                     0x0000
+#define R128_MPLL_CNTL                    0x000e /* PLL */
+#define R128_MPP_TB_CONFIG                0x01c0 /* ? */
+#define R128_MPP_GP_CONFIG                0x01c8 /* ? */
 
-#define R128_N_VIF_COUNT		  0x0248
+#define R128_N_VIF_COUNT                  0x0248
 
-#define R128_OVR_CLR			  0x0230
-#define R128_OVR_WID_LEFT_RIGHT		  0x0234
-#define R128_OVR_WID_TOP_BOTTOM		  0x0238
+#define R128_OVR_CLR                      0x0230
+#define R128_OVR_WID_LEFT_RIGHT           0x0234
+#define R128_OVR_WID_TOP_BOTTOM           0x0238
 
 /* first overlay unit (there is only one) */
 
-#define R128_OV0_Y_X_START		  0x0400
-#define R128_OV0_Y_X_END		  0x0404
-#define R128_OV0_EXCLUSIVE_HORZ		  0x0408
-#	define	R128_EXCL_HORZ_START_MASK	0x000000ff
-#	define	R128_EXCL_HORZ_END_MASK		0x0000ff00
-#	define	R128_EXCL_HORZ_BACK_PORCH_MASK	0x00ff0000
-#	define	R128_EXCL_HORZ_EXCLUSIVE_EN	0x80000000
-#define R128_OV0_EXCLUSIVE_VERT		  0x040C
-#	define	R128_EXCL_VERT_START_MASK	0x000003ff
-#	define	R128_EXCL_VERT_END_MASK		0x03ff0000
-#define R128_OV0_REG_LOAD_CNTL		  0x0410
-#	define	R128_REG_LD_CTL_LOCK			0x00000001L
-#	define	R128_REG_LD_CTL_VBLANK_DURING_LOCK	0x00000002L
-#	define	R128_REG_LD_CTL_STALL_GUI_UNTIL_FLIP	0x00000004L
-#	define	R128_REG_LD_CTL_LOCK_READBACK		0x00000008L
-#define R128_OV0_SCALE_CNTL		  0x0420
-#	define	R128_SCALER_PIX_EXPAND		0x00000001L
-#	define	R128_SCALER_Y2R_TEMP		0x00000002L
-#	define	R128_SCALER_HORZ_PICK_NEAREST	0x00000003L
-#	define	R128_SCALER_VERT_PICK_NEAREST	0x00000004L
-#	define	R128_SCALER_SIGNED_UV		0x00000010L
-#	define	R128_SCALER_GAMMA_SEL_MASK	0x00000060L
-#	define	R128_SCALER_GAMMA_SEL_BRIGHT	0x00000000L
-#	define	R128_SCALER_GAMMA_SEL_G22	0x00000020L
-#	define	R128_SCALER_GAMMA_SEL_G18	0x00000040L
-#	define	R128_SCALER_GAMMA_SEL_G14	0x00000060L
-#	define	R128_SCALER_COMCORE_SHIFT_UP_ONE	0x00000080L
-#	define	R128_SCALER_SURFAC_FORMAT	0x00000f00L
-#	define	R128_SCALER_SOURCE_15BPP	0x00000300L
-#	define	R128_SCALER_SOURCE_16BPP	0x00000400L
-#	define	R128_SCALER_SOURCE_32BPP	0x00000600L
-#	define	R128_SCALER_SOURCE_YUV9		0x00000900L
-#	define	R128_SCALER_SOURCE_YUV12	0x00000A00L
-#	define	R128_SCALER_SOURCE_VYUY422	0x00000B00L
-#	define	R128_SCALER_SOURCE_YVYU422	0x00000C00L
-#	define	R128_SCALER_SMART_SWITCH	0x00008000L
-#	define	R128_SCALER_BURST_PER_PLANE	0x00ff0000L
-#	define	R128_SCALER_DOUBLE_BUFFER	0x01000000L
-#	define	R128_SCALER_DIS_LIMIT		0x08000000L
-#	define	R128_SCALER_PRG_LOAD_START	0x10000000L
-#	define	R128_SCALER_INT_EMU		0x20000000L
-#	define	R128_SCALER_ENABLE		0x40000000L
-#	define	R128_SCALER_SOFT_RESET		0x80000000L
-#define R128_OV0_V_INC			  0x0424
-#define R128_OV0_P1_V_ACCUM_INIT	  0x0428
-#	define	R128_OV0_P1_MAX_LN_IN_PER_LN_OUT	0x00000003L
-#	define	R128_OV0_P1_V_ACCUM_INIT_MASK		0x01ff8000L
-#define R128_OV0_P23_V_ACCUM_INIT	  0x042C
-#define R128_OV0_P1_BLANK_LINES_AT_TOP	  0x0430
-#	define	R128_P1_BLNK_LN_AT_TOP_M1_MASK	0x00000fffL
-#	define	R128_P1_ACTIVE_LINES_M1		0x0fff0000L
-#define R128_OV0_P23_BLANK_LINES_AT_TOP	  0x0434
-#	define	R128_P23_BLNK_LN_AT_TOP_M1_MASK 0x000007ffL
-#	define	R128_P23_ACTIVE_LINES_M1	0x07ff0000L
-#define R128_OV0_VID_BUF0_BASE_ADRS	  0x0440
-#	define	R128_VIF_BUF0_PITCH_SEL		0x00000001L
-#	define	R128_VIF_BUF0_TILE_ADRS		0x00000002L
-#	define	R128_VIF_BUF0_BASE_ADRS_MASK	0x03fffff0L
-#	define	R128_VIF_BUF0_1ST_LINE_LSBS_MASK 0x48000000L
-#define R128_OV0_VID_BUF1_BASE_ADRS	  0x0444
-#	define	R128_VIF_BUF1_PITCH_SEL		0x00000001L
-#	define	R128_VIF_BUF1_TILE_ADRS		0x00000002L
-#	define	R128_VIF_BUF1_BASE_ADRS_MASK	0x03fffff0L
-#	define	R128_VIF_BUF1_1ST_LINE_LSBS_MASK 0x48000000L
-#define R128_OV0_VID_BUF2_BASE_ADRS	  0x0448
-#	define	R128_VIF_BUF2_PITCH_SEL		0x00000001L
-#	define	R128_VIF_BUF2_TILE_ADRS		0x00000002L
-#	define	R128_VIF_BUF2_BASE_ADRS_MASK	0x03fffff0L
-#	define	R128_VIF_BUF2_1ST_LINE_LSBS_MASK 0x48000000L
-#define R128_OV0_VID_BUF3_BASE_ADRS	  0x044C
-#define R128_OV0_VID_BUF4_BASE_ADRS	  0x0450
-#define R128_OV0_VID_BUF5_BASE_ADRS	  0x0454
-#define R128_OV0_VID_BUF_PITCH0_VALUE	  0x0460
-#define R128_OV0_VID_BUF_PITCH1_VALUE	  0x0464
-#define R128_OV0_AUTO_FLIP_CNTL		  0x0470
-#define R128_OV0_DEINTERLACE_PATTERN	  0x0474
-#define R128_OV0_H_INC			  0x0480
-#define R128_OV0_STEP_BY		  0x0484
-#define R128_OV0_P1_H_ACCUM_INIT	  0x0488
-#define R128_OV0_P23_H_ACCUM_INIT	  0x048C
-#define R128_OV0_P1_X_START_END		  0x0494
-#define R128_OV0_P2_X_START_END		  0x0498
-#define R128_OV0_P3_X_START_END		  0x049C
-#define R128_OV0_FILTER_CNTL		  0x04A0
-#define R128_OV0_FOUR_TAP_COEF_0	  0x04B0
-#define R128_OV0_FOUR_TAP_COEF_1	  0x04B4
-#define R128_OV0_FOUR_TAP_COEF_2	  0x04B8
-#define R128_OV0_FOUR_TAP_COEF_3	  0x04BC
-#define R128_OV0_FOUR_TAP_COEF_4	  0x04C0
-#define R128_OV0_COLOUR_CNTL		  0x04E0
-#define R128_OV0_VIDEO_KEY_CLR		  0x04E4
-#define R128_OV0_VIDEO_KEY_MSK		  0x04E8
-#define R128_OV0_GRAPHICS_KEY_CLR	  0x04EC
-#define R128_OV0_GRAPHICS_KEY_MSK	  0x04F0
-#define R128_OV0_KEY_CNTL		  0x04F4
-#	define	R128_VIDEO_KEY_FN_MASK		0x00000007L
-#	define	R128_VIDEO_KEY_FN_FALSE		0x00000000L
-#	define	R128_VIDEO_KEY_FN_TRUE		0x00000001L
-#	define	R128_VIDEO_KEY_FN_EQ		0x00000004L
-#	define	R128_VIDEO_KEY_FN_NE		0x00000005L
-#	define	R128_GRAPHIC_KEY_FN_MASK	0x00000070L
-#	define	R128_GRAPHIC_KEY_FN_FALSE	0x00000000L
-#	define	R128_GRAPHIC_KEY_FN_TRUE	0x00000010L
-#	define	R128_GRAPHIC_KEY_FN_EQ		0x00000040L
-#	define	R128_GRAPHIC_KEY_FN_NE		0x00000050L
-#	define	R128_CMP_MIX_MASK		0x00000100L
-#	define	R128_CMP_MIX_OR			0x00000000L
-#	define	R128_CMP_MIX_AND		0x00000100L
-#define R128_OV0_TEST			  0x04F8
+#define R128_OV0_Y_X_START                0x0400
+#define R128_OV0_Y_X_END                  0x0404
+#define R128_OV0_EXCLUSIVE_HORZ           0x0408
+#       define  R128_EXCL_HORZ_START_MASK        0x000000ff
+#       define  R128_EXCL_HORZ_END_MASK          0x0000ff00
+#       define  R128_EXCL_HORZ_BACK_PORCH_MASK   0x00ff0000
+#       define  R128_EXCL_HORZ_EXCLUSIVE_EN      0x80000000
+#define R128_OV0_EXCLUSIVE_VERT           0x040C
+#       define  R128_EXCL_VERT_START_MASK        0x000003ff
+#       define  R128_EXCL_VERT_END_MASK          0x03ff0000
+#define R128_OV0_REG_LOAD_CNTL            0x0410
+#       define  R128_REG_LD_CTL_LOCK                 0x00000001L
+#       define  R128_REG_LD_CTL_VBLANK_DURING_LOCK   0x00000002L
+#       define  R128_REG_LD_CTL_STALL_GUI_UNTIL_FLIP 0x00000004L
+#       define  R128_REG_LD_CTL_LOCK_READBACK        0x00000008L
+#define R128_OV0_SCALE_CNTL               0x0420
+#       define  R128_SCALER_PIX_EXPAND           0x00000001L
+#       define  R128_SCALER_Y2R_TEMP             0x00000002L
+#       define  R128_SCALER_HORZ_PICK_NEAREST    0x00000003L
+#       define  R128_SCALER_VERT_PICK_NEAREST    0x00000004L
+#       define  R128_SCALER_SIGNED_UV            0x00000010L
+#       define  R128_SCALER_GAMMA_SEL_MASK       0x00000060L
+#       define  R128_SCALER_GAMMA_SEL_BRIGHT     0x00000000L
+#       define  R128_SCALER_GAMMA_SEL_G22        0x00000020L
+#       define  R128_SCALER_GAMMA_SEL_G18        0x00000040L
+#       define  R128_SCALER_GAMMA_SEL_G14        0x00000060L
+#       define  R128_SCALER_COMCORE_SHIFT_UP_ONE 0x00000080L
+#       define  R128_SCALER_SURFAC_FORMAT        0x00000f00L
+#       define  R128_SCALER_SOURCE_15BPP         0x00000300L
+#       define  R128_SCALER_SOURCE_16BPP         0x00000400L
+#       define  R128_SCALER_SOURCE_32BPP         0x00000600L
+#       define  R128_SCALER_SOURCE_YUV9          0x00000900L
+#       define  R128_SCALER_SOURCE_YUV12         0x00000A00L
+#       define  R128_SCALER_SOURCE_VYUY422       0x00000B00L
+#       define  R128_SCALER_SOURCE_YVYU422       0x00000C00L
+#       define  R128_SCALER_SMART_SWITCH         0x00008000L
+#       define  R128_SCALER_BURST_PER_PLANE      0x00ff0000L
+#       define  R128_SCALER_DOUBLE_BUFFER        0x01000000L
+#       define  R128_SCALER_DIS_LIMIT            0x08000000L
+#       define  R128_SCALER_PRG_LOAD_START       0x10000000L
+#       define  R128_SCALER_INT_EMU              0x20000000L
+#       define  R128_SCALER_ENABLE               0x40000000L
+#       define  R128_SCALER_SOFT_RESET           0x80000000L
+#define R128_OV0_V_INC                    0x0424
+#define R128_OV0_P1_V_ACCUM_INIT          0x0428
+#       define  R128_OV0_P1_MAX_LN_IN_PER_LN_OUT        0x00000003L
+#       define  R128_OV0_P1_V_ACCUM_INIT_MASK           0x01ff8000L
+#define R128_OV0_P23_V_ACCUM_INIT         0x042C
+#define R128_OV0_P1_BLANK_LINES_AT_TOP    0x0430
+#       define  R128_P1_BLNK_LN_AT_TOP_M1_MASK   0x00000fffL
+#       define  R128_P1_ACTIVE_LINES_M1          0x0fff0000L
+#define R128_OV0_P23_BLANK_LINES_AT_TOP   0x0434
+#       define  R128_P23_BLNK_LN_AT_TOP_M1_MASK  0x000007ffL
+#       define  R128_P23_ACTIVE_LINES_M1         0x07ff0000L
+#define R128_OV0_VID_BUF0_BASE_ADRS       0x0440
+#       define  R128_VIF_BUF0_PITCH_SEL          0x00000001L
+#       define  R128_VIF_BUF0_TILE_ADRS          0x00000002L
+#       define  R128_VIF_BUF0_BASE_ADRS_MASK     0x03fffff0L
+#       define  R128_VIF_BUF0_1ST_LINE_LSBS_MASK 0x48000000L
+#define R128_OV0_VID_BUF1_BASE_ADRS       0x0444
+#       define  R128_VIF_BUF1_PITCH_SEL          0x00000001L
+#       define  R128_VIF_BUF1_TILE_ADRS          0x00000002L
+#       define  R128_VIF_BUF1_BASE_ADRS_MASK     0x03fffff0L
+#       define  R128_VIF_BUF1_1ST_LINE_LSBS_MASK 0x48000000L
+#define R128_OV0_VID_BUF2_BASE_ADRS       0x0448
+#       define  R128_VIF_BUF2_PITCH_SEL          0x00000001L
+#       define  R128_VIF_BUF2_TILE_ADRS          0x00000002L
+#       define  R128_VIF_BUF2_BASE_ADRS_MASK     0x03fffff0L
+#       define  R128_VIF_BUF2_1ST_LINE_LSBS_MASK 0x48000000L
+#define R128_OV0_VID_BUF3_BASE_ADRS       0x044C
+#define R128_OV0_VID_BUF4_BASE_ADRS       0x0450
+#define R128_OV0_VID_BUF5_BASE_ADRS       0x0454
+#define R128_OV0_VID_BUF_PITCH0_VALUE     0x0460
+#define R128_OV0_VID_BUF_PITCH1_VALUE     0x0464
+#define R128_OV0_AUTO_FLIP_CNTL           0x0470
+#define R128_OV0_DEINTERLACE_PATTERN      0x0474
+#define R128_OV0_H_INC                    0x0480
+#define R128_OV0_STEP_BY                  0x0484
+#define R128_OV0_P1_H_ACCUM_INIT          0x0488
+#define R128_OV0_P23_H_ACCUM_INIT         0x048C
+#define R128_OV0_P1_X_START_END           0x0494
+#define R128_OV0_P2_X_START_END           0x0498
+#define R128_OV0_P3_X_START_END           0x049C
+#define R128_OV0_FILTER_CNTL              0x04A0
+#define R128_OV0_FOUR_TAP_COEF_0          0x04B0
+#define R128_OV0_FOUR_TAP_COEF_1          0x04B4
+#define R128_OV0_FOUR_TAP_COEF_2          0x04B8
+#define R128_OV0_FOUR_TAP_COEF_3          0x04BC
+#define R128_OV0_FOUR_TAP_COEF_4          0x04C0
+#define R128_OV0_COLOUR_CNTL              0x04E0
+#define R128_OV0_VIDEO_KEY_CLR            0x04E4
+#define R128_OV0_VIDEO_KEY_MSK            0x04E8
+#define R128_OV0_GRAPHICS_KEY_CLR         0x04EC
+#define R128_OV0_GRAPHICS_KEY_MSK         0x04F0
+#define R128_OV0_KEY_CNTL                 0x04F4
+#       define  R128_VIDEO_KEY_FN_MASK           0x00000007L
+#       define  R128_VIDEO_KEY_FN_FALSE          0x00000000L
+#       define  R128_VIDEO_KEY_FN_TRUE           0x00000001L
+#       define  R128_VIDEO_KEY_FN_EQ             0x00000004L
+#       define  R128_VIDEO_KEY_FN_NE             0x00000005L
+#       define  R128_GRAPHIC_KEY_FN_MASK         0x00000070L
+#       define  R128_GRAPHIC_KEY_FN_FALSE        0x00000000L
+#       define  R128_GRAPHIC_KEY_FN_TRUE         0x00000010L
+#       define  R128_GRAPHIC_KEY_FN_EQ           0x00000040L
+#       define  R128_GRAPHIC_KEY_FN_NE           0x00000050L
+#       define  R128_CMP_MIX_MASK                0x00000100L
+#       define  R128_CMP_MIX_OR                  0x00000000L
+#       define  R128_CMP_MIX_AND                 0x00000100L
+#define R128_OV0_TEST                     0x04F8
 
 
-#define R128_PALETTE_DATA		  0x00b4
-#define R128_PALETTE_INDEX		  0x00b0
-#define R128_PC_DEBUG_MODE		  0x1760
-#define R128_PC_GUI_CTLSTAT		  0x1748
-#define R128_PC_GUI_MODE		  0x1744
-#	define R128_PC_IGNORE_UNIFY	  (1 << 5)
-#define R128_PC_MISC_CNTL		  0x0188
-#define R128_PC_NGUI_CTLSTAT		  0x0184
-#	define R128_PC_FLUSH_GUI	  (3 << 0)
-#	define R128_PC_RI_GUI		  (1 << 2)
-#	define R128_PC_FLUSH_ALL	  0x00ff
-#	define R128_PC_BUSY		  (1 << 31)
-#define R128_PC_NGUI_MODE		  0x0180
-#define R128_PCI_GART_PAGE		  0x017c
-#define R128_PLANE_3D_MASK_C		  0x1d44
-#define R128_PLL_TEST_CNTL		  0x0013 /* PLL */
-#define R128_PMI_CAP_ID			  0x0f5c /* PCI */
-#define R128_PMI_DATA			  0x0f63 /* PCI */
-#define R128_PMI_NXT_CAP_PTR		  0x0f5d /* PCI */
-#define R128_PMI_PMC_REG		  0x0f5e /* PCI */
-#define R128_PMI_PMCSR_REG		  0x0f60 /* PCI */
-#define R128_PMI_REGISTER		  0x0f5c /* PCI */
-#define R128_PPLL_CNTL			  0x0002 /* PLL */
-#	define R128_PPLL_RESET		      (1 <<  0)
-#	define R128_PPLL_SLEEP		      (1 <<  1)
-#	define R128_PPLL_ATOMIC_UPDATE_EN     (1 << 16)
-#	define R128_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17)
-#define R128_PPLL_DIV_0			  0x0004 /* PLL */
-#define R128_PPLL_DIV_1			  0x0005 /* PLL */
-#define R128_PPLL_DIV_2			  0x0006 /* PLL */
-#define R128_PPLL_DIV_3			  0x0007 /* PLL */
-#	define R128_PPLL_FB3_DIV_MASK	  0x07ff
-#	define R128_PPLL_POST3_DIV_MASK	  0x00070000
-#define R128_PPLL_REF_DIV		  0x0003 /* PLL */
-#	define R128_PPLL_REF_DIV_MASK	  0x03ff
-#	define R128_PPLL_ATOMIC_UPDATE_R  (1 << 15) /* same as _W */
-#	define R128_PPLL_ATOMIC_UPDATE_W  (1 << 15) /* same as _R */
-#define R128_PWR_MNGMT_CNTL_STATUS	  0x0f60 /* PCI */
-#define R128_REG_BASE			  0x0f18 /* PCI */
-#define R128_REGPROG_INF		  0x0f09 /* PCI */
-#define R128_REVISION_ID		  0x0f08 /* PCI */
+#define R128_PALETTE_DATA                 0x00b4
+#define R128_PALETTE_INDEX                0x00b0
+#define R128_PC_DEBUG_MODE                0x1760
+#define R128_PC_GUI_CTLSTAT               0x1748
+#define R128_PC_GUI_MODE                  0x1744
+#       define R128_PC_IGNORE_UNIFY       (1 << 5)
+#define R128_PC_MISC_CNTL                 0x0188
+#define R128_PC_NGUI_CTLSTAT              0x0184
+#       define R128_PC_FLUSH_GUI          (3 << 0)
+#       define R128_PC_RI_GUI             (1 << 2)
+#       define R128_PC_FLUSH_ALL          0x00ff
+#       define R128_PC_BUSY               (1 << 31)
+#define R128_PC_NGUI_MODE                 0x0180
+#define R128_PCI_GART_PAGE                0x017c
+#define R128_PLANE_3D_MASK_C              0x1d44
+#define R128_PLL_TEST_CNTL                0x0013 /* PLL */
+#define R128_PMI_CAP_ID                   0x0f5c /* PCI */
+#define R128_PMI_DATA                     0x0f63 /* PCI */
+#define R128_PMI_NXT_CAP_PTR              0x0f5d /* PCI */
+#define R128_PMI_PMC_REG                  0x0f5e /* PCI */
+#define R128_PMI_PMCSR_REG                0x0f60 /* PCI */
+#define R128_PMI_REGISTER                 0x0f5c /* PCI */
+#define R128_PPLL_CNTL                    0x0002 /* PLL */
+#       define R128_PPLL_RESET                (1 <<  0)
+#       define R128_PPLL_SLEEP                (1 <<  1)
+#       define R128_PPLL_ATOMIC_UPDATE_EN     (1 << 16)
+#       define R128_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17)
+#define R128_PPLL_DIV_0                   0x0004 /* PLL */
+#define R128_PPLL_DIV_1                   0x0005 /* PLL */
+#define R128_PPLL_DIV_2                   0x0006 /* PLL */
+#define R128_PPLL_DIV_3                   0x0007 /* PLL */
+#       define R128_PPLL_FB3_DIV_MASK     0x07ff
+#       define R128_PPLL_POST3_DIV_MASK   0x00070000
+#define R128_PPLL_REF_DIV                 0x0003 /* PLL */
+#       define R128_PPLL_REF_DIV_MASK     0x03ff
+#       define R128_PPLL_ATOMIC_UPDATE_R  (1 << 15) /* same as _W */
+#       define R128_PPLL_ATOMIC_UPDATE_W  (1 << 15) /* same as _R */
+#define R128_PWR_MNGMT_CNTL_STATUS        0x0f60 /* PCI */
+#define R128_REG_BASE                     0x0f18 /* PCI */
+#define R128_REGPROG_INF                  0x0f09 /* PCI */
+#define R128_REVISION_ID                  0x0f08 /* PCI */
 
-#define R128_SC_BOTTOM			  0x164c
-#define R128_SC_BOTTOM_RIGHT		  0x16f0
-#define R128_SC_BOTTOM_RIGHT_C		  0x1c8c
-#define R128_SC_LEFT			  0x1640
-#define R128_SC_RIGHT			  0x1644
-#define R128_SC_TOP			  0x1648
-#define R128_SC_TOP_LEFT		  0x16ec
-#define R128_SC_TOP_LEFT_C		  0x1c88
-#define R128_SEQ8_DATA			  0x03c5 /* VGA */
-#define R128_SEQ8_IDX			  0x03c4 /* VGA */
-#define R128_SNAPSHOT_F_COUNT		  0x0244
-#define R128_SNAPSHOT_VH_COUNTS		  0x0240
-#define R128_SNAPSHOT_VIF_COUNT		  0x024c
-#define R128_SRC_OFFSET			  0x15ac
-#define R128_SRC_PITCH			  0x15b0
-#define R128_SRC_PITCH_OFFSET		  0x1428
-#define R128_SRC_SC_BOTTOM		  0x165c
-#define R128_SRC_SC_BOTTOM_RIGHT	  0x16f4
-#define R128_SRC_SC_RIGHT		  0x1654
-#define R128_SRC_X			  0x1414
-#define R128_SRC_X_Y			  0x1590
-#define R128_SRC_Y			  0x1418
-#define R128_SRC_Y_X			  0x1434
-#define R128_STATUS			  0x0f06 /* PCI */
-#define R128_SUBPIC_CNTL		  0x0540 /* ? */
-#define R128_SUB_CLASS			  0x0f0a /* PCI */
-#define R128_SURFACE_DELAY		  0x0b00
-#define R128_SURFACE0_INFO		  0x0b0c
-#define R128_SURFACE0_LOWER_BOUND	  0x0b04
-#define R128_SURFACE0_UPPER_BOUND	  0x0b08
-#define R128_SURFACE1_INFO		  0x0b1c
-#define R128_SURFACE1_LOWER_BOUND	  0x0b14
-#define R128_SURFACE1_UPPER_BOUND	  0x0b18
-#define R128_SURFACE2_INFO		  0x0b2c
-#define R128_SURFACE2_LOWER_BOUND	  0x0b24
-#define R128_SURFACE2_UPPER_BOUND	  0x0b28
-#define R128_SURFACE3_INFO		  0x0b3c
-#define R128_SURFACE3_LOWER_BOUND	  0x0b34
-#define R128_SURFACE3_UPPER_BOUND	  0x0b38
-#define R128_SW_SEMAPHORE		  0x013c
+#define R128_SC_BOTTOM                    0x164c
+#define R128_SC_BOTTOM_RIGHT              0x16f0
+#define R128_SC_BOTTOM_RIGHT_C            0x1c8c
+#define R128_SC_LEFT                      0x1640
+#define R128_SC_RIGHT                     0x1644
+#define R128_SC_TOP                       0x1648
+#define R128_SC_TOP_LEFT                  0x16ec
+#define R128_SC_TOP_LEFT_C                0x1c88
+#define R128_SEQ8_DATA                    0x03c5 /* VGA */
+#define R128_SEQ8_IDX                     0x03c4 /* VGA */
+#define R128_SNAPSHOT_F_COUNT             0x0244
+#define R128_SNAPSHOT_VH_COUNTS           0x0240
+#define R128_SNAPSHOT_VIF_COUNT           0x024c
+#define R128_SRC_OFFSET                   0x15ac
+#define R128_SRC_PITCH                    0x15b0
+#define R128_SRC_PITCH_OFFSET             0x1428
+#define R128_SRC_SC_BOTTOM                0x165c
+#define R128_SRC_SC_BOTTOM_RIGHT          0x16f4
+#define R128_SRC_SC_RIGHT                 0x1654
+#define R128_SRC_X                        0x1414
+#define R128_SRC_X_Y                      0x1590
+#define R128_SRC_Y                        0x1418
+#define R128_SRC_Y_X                      0x1434
+#define R128_STATUS                       0x0f06 /* PCI */
+#define R128_SUBPIC_CNTL                  0x0540 /* ? */
+#define R128_SUB_CLASS                    0x0f0a /* PCI */
+#define R128_SURFACE_DELAY                0x0b00
+#define R128_SURFACE0_INFO                0x0b0c
+#define R128_SURFACE0_LOWER_BOUND         0x0b04
+#define R128_SURFACE0_UPPER_BOUND         0x0b08
+#define R128_SURFACE1_INFO                0x0b1c
+#define R128_SURFACE1_LOWER_BOUND         0x0b14
+#define R128_SURFACE1_UPPER_BOUND         0x0b18
+#define R128_SURFACE2_INFO                0x0b2c
+#define R128_SURFACE2_LOWER_BOUND         0x0b24
+#define R128_SURFACE2_UPPER_BOUND         0x0b28
+#define R128_SURFACE3_INFO                0x0b3c
+#define R128_SURFACE3_LOWER_BOUND         0x0b34
+#define R128_SURFACE3_UPPER_BOUND         0x0b38
+#define R128_SW_SEMAPHORE                 0x013c
 
-#define R128_TEST_DEBUG_CNTL		  0x0120
-#define R128_TEST_DEBUG_MUX		  0x0124
-#define R128_TEST_DEBUG_OUT		  0x012c
-#define R128_TMDS_CRC			  0x02a0
-#define R128_TRAIL_BRES_DEC		  0x1614
-#define R128_TRAIL_BRES_ERR		  0x160c
-#define R128_TRAIL_BRES_INC		  0x1610
-#define R128_TRAIL_X			  0x1618
-#define R128_TRAIL_X_SUB		  0x1620
+#define R128_TEST_DEBUG_CNTL              0x0120
+#define R128_TEST_DEBUG_MUX               0x0124
+#define R128_TEST_DEBUG_OUT               0x012c
+#define R128_TMDS_CRC                     0x02a0
+#define R128_TRAIL_BRES_DEC               0x1614
+#define R128_TRAIL_BRES_ERR               0x160c
+#define R128_TRAIL_BRES_INC               0x1610
+#define R128_TRAIL_X                      0x1618
+#define R128_TRAIL_X_SUB                  0x1620
 
-#define R128_VCLK_ECP_CNTL		  0x0008 /* PLL */
-#define R128_VENDOR_ID			  0x0f00 /* PCI */
-#define R128_VGA_DDA_CONFIG		  0x02e8
-#define R128_VGA_DDA_ON_OFF		  0x02ec
-#define R128_VID_BUFFER_CONTROL		  0x0900
-#define R128_VIDEOMUX_CNTL		  0x0190
-#define R128_VIPH_CONTROL		  0x01D0 /* ? */
+#define R128_VCLK_ECP_CNTL                0x0008 /* PLL */
+#define R128_VENDOR_ID                    0x0f00 /* PCI */
+#define R128_VGA_DDA_CONFIG               0x02e8
+#define R128_VGA_DDA_ON_OFF               0x02ec
+#define R128_VID_BUFFER_CONTROL           0x0900
+#define R128_VIDEOMUX_CNTL                0x0190
+#define R128_VIPH_CONTROL                 0x01D0 /* ? */
 
-#define R128_WAIT_UNTIL			  0x1720
+#define R128_WAIT_UNTIL                   0x1720
 
-#define R128_X_MPLL_REF_FB_DIV		  0x000a /* PLL */
-#define R128_XCLK_CNTL			  0x000d /* PLL */
-#define R128_XDLL_CNTL			  0x000c /* PLL */
-#define R128_XPLL_CNTL			  0x000b /* PLL */
+#define R128_X_MPLL_REF_FB_DIV            0x000a /* PLL */
+#define R128_XCLK_CNTL                    0x000d /* PLL */
+#define R128_XDLL_CNTL                    0x000c /* PLL */
+#define R128_XPLL_CNTL                    0x000b /* PLL */
 
 				/* Registers for CCE and Microcode Engine */
-#define R128_PM4_MICROCODE_ADDR		  0x07d4
-#define R128_PM4_MICROCODE_RADDR	  0x07d8
-#define R128_PM4_MICROCODE_DATAH	  0x07dc
-#define R128_PM4_MICROCODE_DATAL	  0x07e0
+#define R128_PM4_MICROCODE_ADDR           0x07d4
+#define R128_PM4_MICROCODE_RADDR          0x07d8
+#define R128_PM4_MICROCODE_DATAH          0x07dc
+#define R128_PM4_MICROCODE_DATAL          0x07e0
 
-#define R128_PM4_BUFFER_OFFSET		  0x0700
-#define R128_PM4_BUFFER_CNTL		  0x0704
-#	define R128_PM4_NONPM4		       (0  << 28)
-#	define R128_PM4_192PIO		       (1  << 28)
-#	define R128_PM4_192BM		       (2  << 28)
-#	define R128_PM4_128PIO_64INDBM	       (3  << 28)
-#	define R128_PM4_128BM_64INDBM	       (4  << 28)
-#	define R128_PM4_64PIO_128INDBM	       (5  << 28)
-#	define R128_PM4_64BM_128INDBM	       (6  << 28)
-#	define R128_PM4_64PIO_64VCBM_64INDBM   (7  << 28)
-#	define R128_PM4_64BM_64VCBM_64INDBM    (8  << 28)
-#	define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28)
-#define R128_PM4_BUFFER_WM_CNTL		  0x0708
-#	define R128_WMA_SHIFT		       0
-#	define R128_WMB_SHIFT		       8
-#	define R128_WMC_SHIFT		      16
-#	define R128_WB_WM_SHIFT		      24
-#define R128_PM4_BUFFER_DL_RPTR_ADDR	  0x070c
-#define R128_PM4_BUFFER_DL_RPTR		  0x0710
-#define R128_PM4_BUFFER_DL_WPTR		  0x0714
-#	define R128_PM4_BUFFER_DL_DONE	  (1 << 31)
-#define R128_PM4_BUFFER_DL_WPTR_DELAY	  0x0718
-#	define R128_PRE_WRITE_TIMER_SHIFT      0
-#	define R128_PRE_WRITE_LIMIT_SHIFT     23
-#define R128_PM4_VC_FPU_SETUP		  0x071c
-#	define R128_FRONT_DIR_CW	  (0 <<	 0)
-#	define R128_FRONT_DIR_CCW	  (1 <<	 0)
-#	define R128_FRONT_DIR_MASK	  (1 <<	 0)
-#	define R128_BACKFACE_CULL	  (0 <<	 1)
-#	define R128_BACKFACE_POINTS	  (1 <<	 1)
-#	define R128_BACKFACE_LINES	  (2 <<	 1)
-#	define R128_BACKFACE_SOLID	  (3 <<	 1)
-#	define R128_BACKFACE_MASK	  (3 <<	 1)
-#	define R128_FRONTFACE_CULL	  (0 <<	 3)
-#	define R128_FRONTFACE_POINTS	  (1 <<	 3)
-#	define R128_FRONTFACE_LINES	  (2 <<	 3)
-#	define R128_FRONTFACE_SOLID	  (3 <<	 3)
-#	define R128_FRONTFACE_MASK	  (3 <<	 3)
-#	define R128_FPU_COLOR_SOLID	  (0 <<	 5)
-#	define R128_FPU_COLOR_FLAT	  (1 <<	 5)
-#	define R128_FPU_COLOR_GOURAUD	  (2 <<	 5)
-#	define R128_FPU_COLOR_GOURAUD2	  (3 <<	 5)
-#	define R128_FPU_COLOR_MASK	  (3 <<	 5)
-#	define R128_FPU_SUB_PIX_2BITS	  (0 <<	 7)
-#	define R128_FPU_SUB_PIX_4BITS	  (1 <<	 7)
-#	define R128_FPU_MODE_2D		  (0 <<	 8)
-#	define R128_FPU_MODE_3D		  (1 <<	 8)
-#	define R128_TRAP_BITS_DISABLE	  (1 <<	 9)
-#	define R128_EDGE_ANTIALIAS	  (1 << 10)
-#	define R128_SUPERSAMPLE		  (1 << 11)
-#	define R128_XFACTOR_2		  (0 << 12)
-#	define R128_XFACTOR_4		  (1 << 12)
-#	define R128_YFACTOR_2		  (0 << 13)
-#	define R128_YFACTOR_4		  (1 << 13)
-#	define R128_FLAT_SHADE_VERTEX_D3D (0 << 14)
-#	define R128_FLAT_SHADE_VERTEX_OGL (1 << 14)
-#	define R128_FPU_ROUND_TRUNCATE	  (0 << 15)
-#	define R128_FPU_ROUND_NEAREST	  (1 << 15)
-#	define R128_WM_SEL_8DW		  (0 << 16)
-#	define R128_WM_SEL_16DW		  (1 << 16)
-#	define R128_WM_SEL_32DW		  (2 << 16)
-#define R128_PM4_VC_DEBUG_CONFIG	  0x07a4
-#define R128_PM4_VC_STAT		  0x07a8
-#define R128_PM4_VC_TIMESTAMP0		  0x07b0
-#define R128_PM4_VC_TIMESTAMP1		  0x07b4
-#define R128_PM4_STAT			  0x07b8
-#	define R128_PM4_FIFOCNT_MASK	  0x0fff
-#	define R128_PM4_BUSY		  (1 << 16)
-#	define R128_PM4_GUI_ACTIVE	  (1 << 31)
-#define R128_PM4_BUFFER_ADDR		  0x07f0
-#define R128_PM4_MICRO_CNTL		  0x07fc
-#	define R128_PM4_MICRO_FREERUN	  (1 << 30)
-#define R128_PM4_FIFO_DATA_EVEN		  0x1000
-#define R128_PM4_FIFO_DATA_ODD		  0x1004
+#define R128_PM4_BUFFER_OFFSET            0x0700
+#define R128_PM4_BUFFER_CNTL              0x0704
+#       define R128_PM4_NONPM4                 (0  << 28)
+#       define R128_PM4_192PIO                 (1  << 28)
+#       define R128_PM4_192BM                  (2  << 28)
+#       define R128_PM4_128PIO_64INDBM         (3  << 28)
+#       define R128_PM4_128BM_64INDBM          (4  << 28)
+#       define R128_PM4_64PIO_128INDBM         (5  << 28)
+#       define R128_PM4_64BM_128INDBM          (6  << 28)
+#       define R128_PM4_64PIO_64VCBM_64INDBM   (7  << 28)
+#       define R128_PM4_64BM_64VCBM_64INDBM    (8  << 28)
+#       define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28)
+#define R128_PM4_BUFFER_WM_CNTL           0x0708
+#       define R128_WMA_SHIFT                  0
+#       define R128_WMB_SHIFT                  8
+#       define R128_WMC_SHIFT                 16
+#       define R128_WB_WM_SHIFT               24
+#define R128_PM4_BUFFER_DL_RPTR_ADDR      0x070c
+#define R128_PM4_BUFFER_DL_RPTR           0x0710
+#define R128_PM4_BUFFER_DL_WPTR           0x0714
+#       define R128_PM4_BUFFER_DL_DONE    (1 << 31)
+#define R128_PM4_BUFFER_DL_WPTR_DELAY     0x0718
+#       define R128_PRE_WRITE_TIMER_SHIFT      0
+#       define R128_PRE_WRITE_LIMIT_SHIFT     23
+#define R128_PM4_VC_FPU_SETUP             0x071c
+#       define R128_FRONT_DIR_CW          (0 <<  0)
+#       define R128_FRONT_DIR_CCW         (1 <<  0)
+#       define R128_FRONT_DIR_MASK        (1 <<  0)
+#       define R128_BACKFACE_CULL         (0 <<  1)
+#       define R128_BACKFACE_POINTS       (1 <<  1)
+#       define R128_BACKFACE_LINES        (2 <<  1)
+#       define R128_BACKFACE_SOLID        (3 <<  1)
+#       define R128_BACKFACE_MASK         (3 <<  1)
+#       define R128_FRONTFACE_CULL        (0 <<  3)
+#       define R128_FRONTFACE_POINTS      (1 <<  3)
+#       define R128_FRONTFACE_LINES       (2 <<  3)
+#       define R128_FRONTFACE_SOLID       (3 <<  3)
+#       define R128_FRONTFACE_MASK        (3 <<  3)
+#       define R128_FPU_COLOR_SOLID       (0 <<  5)
+#       define R128_FPU_COLOR_FLAT        (1 <<  5)
+#       define R128_FPU_COLOR_GOURAUD     (2 <<  5)
+#       define R128_FPU_COLOR_GOURAUD2    (3 <<  5)
+#       define R128_FPU_COLOR_MASK        (3 <<  5)
+#       define R128_FPU_SUB_PIX_2BITS     (0 <<  7)
+#       define R128_FPU_SUB_PIX_4BITS     (1 <<  7)
+#       define R128_FPU_MODE_2D           (0 <<  8)
+#       define R128_FPU_MODE_3D           (1 <<  8)
+#       define R128_TRAP_BITS_DISABLE     (1 <<  9)
+#       define R128_EDGE_ANTIALIAS        (1 << 10)
+#       define R128_SUPERSAMPLE           (1 << 11)
+#       define R128_XFACTOR_2             (0 << 12)
+#       define R128_XFACTOR_4             (1 << 12)
+#       define R128_YFACTOR_2             (0 << 13)
+#       define R128_YFACTOR_4             (1 << 13)
+#       define R128_FLAT_SHADE_VERTEX_D3D (0 << 14)
+#       define R128_FLAT_SHADE_VERTEX_OGL (1 << 14)
+#       define R128_FPU_ROUND_TRUNCATE    (0 << 15)
+#       define R128_FPU_ROUND_NEAREST     (1 << 15)
+#       define R128_WM_SEL_8DW            (0 << 16)
+#       define R128_WM_SEL_16DW           (1 << 16)
+#       define R128_WM_SEL_32DW           (2 << 16)
+#define R128_PM4_VC_DEBUG_CONFIG          0x07a4
+#define R128_PM4_VC_STAT                  0x07a8
+#define R128_PM4_VC_TIMESTAMP0            0x07b0
+#define R128_PM4_VC_TIMESTAMP1            0x07b4
+#define R128_PM4_STAT                     0x07b8
+#       define R128_PM4_FIFOCNT_MASK      0x0fff
+#       define R128_PM4_BUSY              (1 << 16)
+#       define R128_PM4_GUI_ACTIVE        (1 << 31)
+#define R128_PM4_BUFFER_ADDR              0x07f0
+#define R128_PM4_MICRO_CNTL               0x07fc
+#       define R128_PM4_MICRO_FREERUN     (1 << 30)
+#define R128_PM4_FIFO_DATA_EVEN           0x1000
+#define R128_PM4_FIFO_DATA_ODD            0x1004
 
-#define R128_SCALE_3D_CNTL		  0x1a00
-#	define R128_SCALE_DITHER_ERR_DIFF	  (0  <<  1)
-#	define R128_SCALE_DITHER_TABLE		  (1  <<  1)
-#	define R128_TEX_CACHE_SIZE_FULL		  (0  <<  2)
-#	define R128_TEX_CACHE_SIZE_HALF		  (1  <<  2)
-#	define R128_DITHER_INIT_CURR		  (0  <<  3)
-#	define R128_DITHER_INIT_RESET		  (1  <<  3)
-#	define R128_ROUND_24BIT			  (1  <<  4)
-#	define R128_TEX_CACHE_DISABLE		  (1  <<  5)
-#	define R128_SCALE_3D_NOOP		  (0  <<  6)
-#	define R128_SCALE_3D_SCALE		  (1  <<  6)
-#	define R128_SCALE_3D_TEXMAP_SHADE	  (2  <<  6)
-#	define R128_SCALE_PIX_BLEND		  (0  <<  8)
-#	define R128_SCALE_PIX_REPLICATE		  (1  <<  8)
-#	define R128_TEX_CACHE_SPLIT		  (1  <<  9)
-#	define R128_APPLE_YUV_MODE		  (1  << 10)
-#	define R128_TEX_CACHE_PALLETE_MODE	  (1  << 11)
-#	define R128_ALPHA_COMB_ADD_CLAMP	  (0  << 12)
-#	define R128_ALPHA_COMB_ADD_NCLAMP	  (1  << 12)
-#	define R128_ALPHA_COMB_SUB_DST_SRC_CLAMP  (2  << 12)
-#	define R128_ALPHA_COMB_SUB_DST_SRC_NCLAMP (3  << 12)
-#	define R128_FOG_TABLE			  (1  << 14)
-#	define R128_SIGNED_DST_CLAMP		  (1  << 15)
-#	define R128_ALPHA_BLEND_SRC_ZERO	  (0  << 16)
-#	define R128_ALPHA_BLEND_SRC_ONE		  (1  << 16)
-#	define R128_ALPHA_BLEND_SRC_SRCCOLOR	  (2  << 16)
-#	define R128_ALPHA_BLEND_SRC_INVSRCCOLOR	  (3  << 16)
-#	define R128_ALPHA_BLEND_SRC_SRCALPHA	  (4  << 16)
-#	define R128_ALPHA_BLEND_SRC_INVSRCALPHA	  (5  << 16)
-#	define R128_ALPHA_BLEND_SRC_DSTALPHA	  (6  << 16)
-#	define R128_ALPHA_BLEND_SRC_INVDSTALPHA	  (7  << 16)
-#	define R128_ALPHA_BLEND_SRC_DSTCOLOR	  (8  << 16)
-#	define R128_ALPHA_BLEND_SRC_INVDSTCOLOR	  (9  << 16)
-#	define R128_ALPHA_BLEND_SRC_SAT		  (10 << 16)
-#	define R128_ALPHA_BLEND_SRC_BLEND	  (11 << 16)
-#	define R128_ALPHA_BLEND_SRC_INVBLEND	  (12 << 16)
-#	define R128_ALPHA_BLEND_DST_ZERO	  (0  << 20)
-#	define R128_ALPHA_BLEND_DST_ONE		  (1  << 20)
-#	define R128_ALPHA_BLEND_DST_SRCCOLOR	  (2  << 20)
-#	define R128_ALPHA_BLEND_DST_INVSRCCOLOR	  (3  << 20)
-#	define R128_ALPHA_BLEND_DST_SRCALPHA	  (4  << 20)
-#	define R128_ALPHA_BLEND_DST_INVSRCALPHA	  (5  << 20)
-#	define R128_ALPHA_BLEND_DST_DSTALPHA	  (6  << 20)
-#	define R128_ALPHA_BLEND_DST_INVDSTALPHA	  (7  << 20)
-#	define R128_ALPHA_BLEND_DST_DSTCOLOR	  (8  << 20)
-#	define R128_ALPHA_BLEND_DST_INVDSTCOLOR	  (9  << 20)
-#	define R128_ALPHA_TEST_NEVER		  (0  << 24)
-#	define R128_ALPHA_TEST_LESS		  (1  << 24)
-#	define R128_ALPHA_TEST_LESSEQUAL	  (2  << 24)
-#	define R128_ALPHA_TEST_EQUAL		  (3  << 24)
-#	define R128_ALPHA_TEST_GREATEREQUAL	  (4  << 24)
-#	define R128_ALPHA_TEST_GREATER		  (5  << 24)
-#	define R128_ALPHA_TEST_NEQUAL		  (6  << 24)
-#	define R128_ALPHA_TEST_ALWAYS		  (7  << 24)
-#	define R128_COMPOSITE_SHADOW_CMP_EQUAL	  (0  << 28)
-#	define R128_COMPOSITE_SHADOW_CMP_NEQUAL	  (1  << 28)
-#	define R128_COMPOSITE_SHADOW		  (1  << 29)
-#	define R128_TEX_MAP_ALPHA_IN_TEXTURE	  (1  << 30)
-#	define R128_TEX_CACHE_LINE_SIZE_8QW	  (0  << 31)
-#	define R128_TEX_CACHE_LINE_SIZE_4QW	  (1  << 31)
-#define R128_SCALE_3D_DATATYPE		  0x1a20
+#define R128_SCALE_3D_CNTL                0x1a00
+#       define R128_SCALE_DITHER_ERR_DIFF         (0  <<  1)
+#       define R128_SCALE_DITHER_TABLE            (1  <<  1)
+#       define R128_TEX_CACHE_SIZE_FULL           (0  <<  2)
+#       define R128_TEX_CACHE_SIZE_HALF           (1  <<  2)
+#       define R128_DITHER_INIT_CURR              (0  <<  3)
+#       define R128_DITHER_INIT_RESET             (1  <<  3)
+#       define R128_ROUND_24BIT                   (1  <<  4)
+#       define R128_TEX_CACHE_DISABLE             (1  <<  5)
+#       define R128_SCALE_3D_NOOP                 (0  <<  6)
+#       define R128_SCALE_3D_SCALE                (1  <<  6)
+#       define R128_SCALE_3D_TEXMAP_SHADE         (2  <<  6)
+#       define R128_SCALE_PIX_BLEND               (0  <<  8)
+#       define R128_SCALE_PIX_REPLICATE           (1  <<  8)
+#       define R128_TEX_CACHE_SPLIT               (1  <<  9)
+#       define R128_APPLE_YUV_MODE                (1  << 10)
+#       define R128_TEX_CACHE_PALLETE_MODE        (1  << 11)
+#       define R128_ALPHA_COMB_ADD_CLAMP          (0  << 12)
+#       define R128_ALPHA_COMB_ADD_NCLAMP         (1  << 12)
+#       define R128_ALPHA_COMB_SUB_DST_SRC_CLAMP  (2  << 12)
+#       define R128_ALPHA_COMB_SUB_DST_SRC_NCLAMP (3  << 12)
+#       define R128_FOG_TABLE                     (1  << 14)
+#       define R128_SIGNED_DST_CLAMP              (1  << 15)
+#       define R128_ALPHA_BLEND_SRC_ZERO          (0  << 16)
+#       define R128_ALPHA_BLEND_SRC_ONE           (1  << 16)
+#       define R128_ALPHA_BLEND_SRC_SRCCOLOR      (2  << 16)
+#       define R128_ALPHA_BLEND_SRC_INVSRCCOLOR   (3  << 16)
+#       define R128_ALPHA_BLEND_SRC_SRCALPHA      (4  << 16)
+#       define R128_ALPHA_BLEND_SRC_INVSRCALPHA   (5  << 16)
+#       define R128_ALPHA_BLEND_SRC_DSTALPHA      (6  << 16)
+#       define R128_ALPHA_BLEND_SRC_INVDSTALPHA   (7  << 16)
+#       define R128_ALPHA_BLEND_SRC_DSTCOLOR      (8  << 16)
+#       define R128_ALPHA_BLEND_SRC_INVDSTCOLOR   (9  << 16)
+#       define R128_ALPHA_BLEND_SRC_SAT           (10 << 16)
+#       define R128_ALPHA_BLEND_SRC_BLEND         (11 << 16)
+#       define R128_ALPHA_BLEND_SRC_INVBLEND      (12 << 16)
+#       define R128_ALPHA_BLEND_DST_ZERO          (0  << 20)
+#       define R128_ALPHA_BLEND_DST_ONE           (1  << 20)
+#       define R128_ALPHA_BLEND_DST_SRCCOLOR      (2  << 20)
+#       define R128_ALPHA_BLEND_DST_INVSRCCOLOR   (3  << 20)
+#       define R128_ALPHA_BLEND_DST_SRCALPHA      (4  << 20)
+#       define R128_ALPHA_BLEND_DST_INVSRCALPHA   (5  << 20)
+#       define R128_ALPHA_BLEND_DST_DSTALPHA      (6  << 20)
+#       define R128_ALPHA_BLEND_DST_INVDSTALPHA   (7  << 20)
+#       define R128_ALPHA_BLEND_DST_DSTCOLOR      (8  << 20)
+#       define R128_ALPHA_BLEND_DST_INVDSTCOLOR   (9  << 20)
+#       define R128_ALPHA_TEST_NEVER              (0  << 24)
+#       define R128_ALPHA_TEST_LESS               (1  << 24)
+#       define R128_ALPHA_TEST_LESSEQUAL          (2  << 24)
+#       define R128_ALPHA_TEST_EQUAL              (3  << 24)
+#       define R128_ALPHA_TEST_GREATEREQUAL       (4  << 24)
+#       define R128_ALPHA_TEST_GREATER            (5  << 24)
+#       define R128_ALPHA_TEST_NEQUAL             (6  << 24)
+#       define R128_ALPHA_TEST_ALWAYS             (7  << 24)
+#       define R128_COMPOSITE_SHADOW_CMP_EQUAL    (0  << 28)
+#       define R128_COMPOSITE_SHADOW_CMP_NEQUAL   (1  << 28)
+#       define R128_COMPOSITE_SHADOW              (1  << 29)
+#       define R128_TEX_MAP_ALPHA_IN_TEXTURE      (1  << 30)
+#       define R128_TEX_CACHE_LINE_SIZE_8QW       (0  << 31)
+#       define R128_TEX_CACHE_LINE_SIZE_4QW       (1  << 31)
+#define R128_SCALE_3D_DATATYPE            0x1a20
 
-#define R128_SETUP_CNTL			  0x1bc4
-#	define R128_DONT_START_TRIANGLE	  (1 <<	 0)
-#	define R128_Z_BIAS		  (0 <<	 1)
-#	define R128_DONT_START_ANY_ON	  (1 <<	 2)
-#	define R128_COLOR_SOLID_COLOR	  (0 <<	 3)
-#	define R128_COLOR_FLAT_VERT_1	  (1 <<	 3)
-#	define R128_COLOR_FLAT_VERT_2	  (2 <<	 3)
-#	define R128_COLOR_FLAT_VERT_3	  (3 <<	 3)
-#	define R128_COLOR_GOURAUD	  (4 <<	 3)
-#	define R128_PRIM_TYPE_TRI	  (0 <<	 7)
-#	define R128_PRIM_TYPE_LINE	  (1 <<	 7)
-#	define R128_PRIM_TYPE_POINT	  (2 <<	 7)
-#	define R128_PRIM_TYPE_POLY_EDGE	  (3 <<	 7)
-#	define R128_TEXTURE_ST_MULT_W	  (0 <<	 9)
-#	define R128_TEXTURE_ST_DIRECT	  (1 <<	 9)
-#	define R128_STARTING_VERTEX_1	  (1 << 14)
-#	define R128_STARTING_VERTEX_2	  (2 << 14)
-#	define R128_STARTING_VERTEX_3	  (3 << 14)
-#	define R128_ENDING_VERTEX_1	  (1 << 16)
-#	define R128_ENDING_VERTEX_2	  (2 << 16)
-#	define R128_ENDING_VERTEX_3	  (3 << 16)
-#	define R128_SU_POLY_LINE_LAST	  (0 << 18)
-#	define R128_SU_POLY_LINE_NOT_LAST (1 << 18)
-#	define R128_SUB_PIX_2BITS	  (0 << 19)
-#	define R128_SUB_PIX_4BITS	  (1 << 19)
-#	define R128_SET_UP_CONTINUE	  (1 << 31)
+#define R128_SETUP_CNTL                   0x1bc4
+#       define R128_DONT_START_TRIANGLE   (1 <<  0)
+#       define R128_Z_BIAS                (0 <<  1)
+#       define R128_DONT_START_ANY_ON     (1 <<  2)
+#       define R128_COLOR_SOLID_COLOR     (0 <<  3)
+#       define R128_COLOR_FLAT_VERT_1     (1 <<  3)
+#       define R128_COLOR_FLAT_VERT_2     (2 <<  3)
+#       define R128_COLOR_FLAT_VERT_3     (3 <<  3)
+#       define R128_COLOR_GOURAUD         (4 <<  3)
+#       define R128_PRIM_TYPE_TRI         (0 <<  7)
+#       define R128_PRIM_TYPE_LINE        (1 <<  7)
+#       define R128_PRIM_TYPE_POINT       (2 <<  7)
+#       define R128_PRIM_TYPE_POLY_EDGE   (3 <<  7)
+#       define R128_TEXTURE_ST_MULT_W     (0 <<  9)
+#       define R128_TEXTURE_ST_DIRECT     (1 <<  9)
+#       define R128_STARTING_VERTEX_1     (1 << 14)
+#       define R128_STARTING_VERTEX_2     (2 << 14)
+#       define R128_STARTING_VERTEX_3     (3 << 14)
+#       define R128_ENDING_VERTEX_1       (1 << 16)
+#       define R128_ENDING_VERTEX_2       (2 << 16)
+#       define R128_ENDING_VERTEX_3       (3 << 16)
+#       define R128_SU_POLY_LINE_LAST     (0 << 18)
+#       define R128_SU_POLY_LINE_NOT_LAST (1 << 18)
+#       define R128_SUB_PIX_2BITS         (0 << 19)
+#       define R128_SUB_PIX_4BITS         (1 << 19)
+#       define R128_SET_UP_CONTINUE       (1 << 31)
 
-#define R128_WINDOW_XY_OFFSET		  0x1bcc
-#	define R128_WINDOW_Y_SHIFT	  4
-#	define R128_WINDOW_X_SHIFT	  20
+#define R128_WINDOW_XY_OFFSET             0x1bcc
+#       define R128_WINDOW_Y_SHIFT        4
+#       define R128_WINDOW_X_SHIFT        20
 
-#define R128_Z_OFFSET_C			  0x1c90
-#define R128_Z_PITCH_C			  0x1c94
-#define R128_Z_STEN_CNTL_C		  0x1c98
-#	define R128_Z_PIX_WIDTH_16	      (0 <<  1)
-#	define R128_Z_PIX_WIDTH_24	      (1 <<  1)
-#	define R128_Z_PIX_WIDTH_32	      (2 <<  1)
-#	define R128_Z_PIX_WIDTH_MASK	      (3 <<  1)
-#	define R128_Z_TEST_NEVER	      (0 <<  4)
-#	define R128_Z_TEST_LESS		      (1 <<  4)
-#	define R128_Z_TEST_LESSEQUAL	      (2 <<  4)
-#	define R128_Z_TEST_EQUAL	      (3 <<  4)
-#	define R128_Z_TEST_GREATEREQUAL	      (4 <<  4)
-#	define R128_Z_TEST_GREATER	      (5 <<  4)
-#	define R128_Z_TEST_NEQUAL	      (6 <<  4)
-#	define R128_Z_TEST_ALWAYS	      (7 <<  4)
-#	define R128_Z_TEST_MASK		      (7 <<  4)
-#	define R128_STENCIL_TEST_NEVER	      (0 << 12)
-#	define R128_STENCIL_TEST_LESS	      (1 << 12)
-#	define R128_STENCIL_TEST_LESSEQUAL    (2 << 12)
-#	define R128_STENCIL_TEST_EQUAL	      (3 << 12)
-#	define R128_STENCIL_TEST_GREATEREQUAL (4 << 12)
-#	define R128_STENCIL_TEST_GREATER      (5 << 12)
-#	define R128_STENCIL_TEST_NEQUAL	      (6 << 12)
-#	define R128_STENCIL_TEST_ALWAYS	      (7 << 12)
-#	define R128_STENCIL_S_FAIL_KEEP	      (0 << 16)
-#	define R128_STENCIL_S_FAIL_ZERO	      (1 << 16)
-#	define R128_STENCIL_S_FAIL_REPLACE    (2 << 16)
-#	define R128_STENCIL_S_FAIL_INC	      (3 << 16)
-#	define R128_STENCIL_S_FAIL_DEC	      (4 << 16)
-#	define R128_STENCIL_S_FAIL_INV	      (5 << 16)
-#	define R128_STENCIL_ZPASS_KEEP	      (0 << 20)
-#	define R128_STENCIL_ZPASS_ZERO	      (1 << 20)
-#	define R128_STENCIL_ZPASS_REPLACE     (2 << 20)
-#	define R128_STENCIL_ZPASS_INC	      (3 << 20)
-#	define R128_STENCIL_ZPASS_DEC	      (4 << 20)
-#	define R128_STENCIL_ZPASS_INV	      (5 << 20)
-#	define R128_STENCIL_ZFAIL_KEEP	      (0 << 24)
-#	define R128_STENCIL_ZFAIL_ZERO	      (1 << 24)
-#	define R128_STENCIL_ZFAIL_REPLACE     (2 << 24)
-#	define R128_STENCIL_ZFAIL_INC	      (3 << 24)
-#	define R128_STENCIL_ZFAIL_DEC	      (4 << 24)
-#	define R128_STENCIL_ZFAIL_INV	      (5 << 24)
-#define R128_TEX_CNTL_C			  0x1c9c
-#	define R128_Z_ENABLE		       (1 <<  0)
-#	define R128_Z_WRITE_ENABLE	       (1 <<  1)
-#	define R128_STENCIL_ENABLE	       (1 <<  3)
-#	define R128_SHADE_ENABLE	       (0 <<  4)
-#	define R128_TEXMAP_ENABLE	       (1 <<  4)
-#	define R128_SEC_TEXMAP_ENABLE	       (1 <<  5)
-#	define R128_FOG_ENABLE		       (1 <<  7)
-#	define R128_DITHER_ENABLE	       (1 <<  8)
-#	define R128_ALPHA_ENABLE	       (1 <<  9)
-#	define R128_ALPHA_TEST_ENABLE	       (1 << 10)
-#	define R128_SPEC_LIGHT_ENABLE	       (1 << 11)
-#	define R128_TEX_CHROMA_KEY_ENABLE      (1 << 12)
-#	define R128_ALPHA_IN_TEX_COMPLETE_A    (0 << 13)
-#	define R128_ALPHA_IN_TEX_LSB_A	       (1 << 13)
-#	define R128_LIGHT_DIS		       (0 << 14)
-#	define R128_LIGHT_COPY		       (1 << 14)
-#	define R128_LIGHT_MODULATE	       (2 << 14)
-#	define R128_LIGHT_ADD		       (3 << 14)
-#	define R128_LIGHT_BLEND_CONSTANT       (4 << 14)
-#	define R128_LIGHT_BLEND_TEXTURE	       (5 << 14)
-#	define R128_LIGHT_BLEND_VERTEX	       (6 << 14)
-#	define R128_LIGHT_BLEND_CONST_COLOR    (7 << 14)
-#	define R128_ALPHA_LIGHT_DIS	       (0 << 18)
-#	define R128_ALPHA_LIGHT_COPY	       (1 << 18)
-#	define R128_ALPHA_LIGHT_MODULATE       (2 << 18)
-#	define R128_ALPHA_LIGHT_ADD	       (3 << 18)
-#	define R128_ANTI_ALIAS		       (1 << 21)
-#	define R128_TEX_CACHE_FLUSH	       (1 << 23)
-#	define R128_LOD_BIAS_SHIFT	       24
-#define R128_MISC_3D_STATE_CNTL_REG	  0x1ca0
-#	define R128_REF_ALPHA_MASK		    0xff
-#	define R128_MISC_SCALE_3D_NOOP		    (0	<<  8)
-#	define R128_MISC_SCALE_3D_SCALE		    (1	<<  8)
-#	define R128_MISC_SCALE_3D_TEXMAP_SHADE	    (2	<<  8)
-#	define R128_MISC_SCALE_PIX_BLEND	    (0	<< 10)
-#	define R128_MISC_SCALE_PIX_REPLICATE	    (1	<< 10)
-#	define R128_ALPHA_COMB_ADD_CLAMP	    (0	<< 12)
-#	define R128_ALPHA_COMB_ADD_NO_CLAMP	    (1	<< 12)
-#	define R128_ALPHA_COMB_SUB_SRC_DST_CLAMP    (2	<< 12)
-#	define R128_ALPHA_COMB_SUB_SRC_DST_NO_CLAMP (3	<< 12)
-#	define R128_FOG_VERTEX			    (0	<< 14)
-#	define R128_FOG_TABLE			    (1	<< 14)
-#	define R128_ALPHA_BLEND_SRC_ZERO	    (0	<< 16)
-#	define R128_ALPHA_BLEND_SRC_ONE		    (1	<< 16)
-#	define R128_ALPHA_BLEND_SRC_SRCCOLOR	    (2	<< 16)
-#	define R128_ALPHA_BLEND_SRC_INVSRCCOLOR	    (3	<< 16)
-#	define R128_ALPHA_BLEND_SRC_SRCALPHA	    (4	<< 16)
-#	define R128_ALPHA_BLEND_SRC_INVSRCALPHA	    (5	<< 16)
-#	define R128_ALPHA_BLEND_SRC_DESTALPHA	    (6	<< 16)
-#	define R128_ALPHA_BLEND_SRC_INVDESTALPHA    (7	<< 16)
-#	define R128_ALPHA_BLEND_SRC_DESTCOLOR	    (8	<< 16)
-#	define R128_ALPHA_BLEND_SRC_INVDESTCOLOR    (9	<< 16)
-#	define R128_ALPHA_BLEND_SRC_SRCALPHASAT	    (10 << 16)
-#	define R128_ALPHA_BLEND_SRC_BOTHSRCALPHA    (11 << 16)
-#	define R128_ALPHA_BLEND_SRC_BOTHINVSRCALPHA (12 << 16)
-#	define R128_ALPHA_BLEND_SRC_MASK	    (15 << 16)
-#	define R128_ALPHA_BLEND_DST_ZERO	    (0	<< 20)
-#	define R128_ALPHA_BLEND_DST_ONE		    (1	<< 20)
-#	define R128_ALPHA_BLEND_DST_SRCCOLOR	    (2	<< 20)
-#	define R128_ALPHA_BLEND_DST_INVSRCCOLOR	    (3	<< 20)
-#	define R128_ALPHA_BLEND_DST_SRCALPHA	    (4	<< 20)
-#	define R128_ALPHA_BLEND_DST_INVSRCALPHA	    (5	<< 20)
-#	define R128_ALPHA_BLEND_DST_DESTALPHA	    (6	<< 20)
-#	define R128_ALPHA_BLEND_DST_INVDESTALPHA    (7	<< 20)
-#	define R128_ALPHA_BLEND_DST_DESTCOLOR	    (8	<< 20)
-#	define R128_ALPHA_BLEND_DST_INVDESTCOLOR    (9	<< 20)
-#	define R128_ALPHA_BLEND_DST_SRCALPHASAT	    (10 << 20)
-#	define R128_ALPHA_BLEND_DST_MASK	    (15 << 20)
-#	define R128_ALPHA_TEST_NEVER		    (0	<< 24)
-#	define R128_ALPHA_TEST_LESS		    (1	<< 24)
-#	define R128_ALPHA_TEST_LESSEQUAL	    (2	<< 24)
-#	define R128_ALPHA_TEST_EQUAL		    (3	<< 24)
-#	define R128_ALPHA_TEST_GREATEREQUAL	    (4	<< 24)
-#	define R128_ALPHA_TEST_GREATER		    (5	<< 24)
-#	define R128_ALPHA_TEST_NEQUAL		    (6	<< 24)
-#	define R128_ALPHA_TEST_ALWAYS		    (7	<< 24)
-#	define R128_ALPHA_TEST_MASK		    (7	<< 24)
-#define R128_TEXTURE_CLR_CMP_CLR_C	  0x1ca4
-#define R128_TEXTURE_CLR_CMP_MSK_C	  0x1ca8
-#define R128_FOG_COLOR_C		  0x1cac
-#	define R128_FOG_BLUE_SHIFT	       0
-#	define R128_FOG_GREEN_SHIFT	       8
-#	define R128_FOG_RED_SHIFT	      16
-#define R128_PRIM_TEX_CNTL_C		  0x1cb0
-#	define R128_MIN_BLEND_NEAREST	       (0  <<  1)
-#	define R128_MIN_BLEND_LINEAR	       (1  <<  1)
-#	define R128_MIN_BLEND_MIPNEAREST       (2  <<  1)
-#	define R128_MIN_BLEND_MIPLINEAR	       (3  <<  1)
-#	define R128_MIN_BLEND_LINEARMIPNEAREST (4  <<  1)
-#	define R128_MIN_BLEND_LINEARMIPLINEAR  (5  <<  1)
-#	define R128_MIN_BLEND_MASK	       (7  <<  1)
-#	define R128_MAG_BLEND_NEAREST	       (0  <<  4)
-#	define R128_MAG_BLEND_LINEAR	       (1  <<  4)
-#	define R128_MAG_BLEND_MASK	       (7  <<  4)
-#	define R128_MIP_MAP_DISABLE	       (1  <<  7)
-#	define R128_TEX_CLAMP_S_WRAP	       (0  <<  8)
-#	define R128_TEX_CLAMP_S_MIRROR	       (1  <<  8)
-#	define R128_TEX_CLAMP_S_CLAMP	       (2  <<  8)
-#	define R128_TEX_CLAMP_S_BORDER_COLOR   (3  <<  8)
-#	define R128_TEX_CLAMP_S_MASK	       (3  <<  8)
-#	define R128_TEX_WRAP_S		       (1  << 10)
-#	define R128_TEX_CLAMP_T_WRAP	       (0  << 11)
-#	define R128_TEX_CLAMP_T_MIRROR	       (1  << 11)
-#	define R128_TEX_CLAMP_T_CLAMP	       (2  << 11)
-#	define R128_TEX_CLAMP_T_BORDER_COLOR   (3  << 11)
-#	define R128_TEX_CLAMP_T_MASK	       (3  << 11)
-#	define R128_TEX_WRAP_T		       (1  << 13)
-#	define R128_TEX_PERSPECTIVE_DISABLE    (1  << 14)
-#	define R128_DATATYPE_VQ		       (0  << 16)
-#	define R128_DATATYPE_CI4	       (1  << 16)
-#	define R128_DATATYPE_CI8	       (2  << 16)
-#	define R128_DATATYPE_ARGB1555	       (3  << 16)
-#	define R128_DATATYPE_RGB565	       (4  << 16)
-#	define R128_DATATYPE_RGB888	       (5  << 16)
-#	define R128_DATATYPE_ARGB8888	       (6  << 16)
-#	define R128_DATATYPE_RGB332	       (7  << 16)
-#	define R128_DATATYPE_Y8		       (8  << 16)
-#	define R128_DATATYPE_RGB8	       (9  << 16)
-#	define R128_DATATYPE_CI16	       (10 << 16)
-#	define R128_DATATYPE_YUV422	       (11 << 16)
-#	define R128_DATATYPE_YUV422_2	       (12 << 16)
-#	define R128_DATATYPE_AYUV444	       (14 << 16)
-#	define R128_DATATYPE_ARGB4444	       (15 << 16)
-#	define R128_PALLETE_EITHER	       (0  << 20)
-#	define R128_PALLETE_1		       (1  << 20)
-#	define R128_PALLETE_2		       (2  << 20)
-#	define R128_PSEUDOCOLOR_DT_RGB565      (0  << 24)
-#	define R128_PSEUDOCOLOR_DT_ARGB1555    (1  << 24)
-#	define R128_PSEUDOCOLOR_DT_ARGB4444    (2  << 24)
+#define R128_Z_OFFSET_C                   0x1c90
+#define R128_Z_PITCH_C                    0x1c94
+#define R128_Z_STEN_CNTL_C                0x1c98
+#       define R128_Z_PIX_WIDTH_16            (0 <<  1)
+#       define R128_Z_PIX_WIDTH_24            (1 <<  1)
+#       define R128_Z_PIX_WIDTH_32            (2 <<  1)
+#       define R128_Z_PIX_WIDTH_MASK          (3 <<  1)
+#       define R128_Z_TEST_NEVER              (0 <<  4)
+#       define R128_Z_TEST_LESS               (1 <<  4)
+#       define R128_Z_TEST_LESSEQUAL          (2 <<  4)
+#       define R128_Z_TEST_EQUAL              (3 <<  4)
+#       define R128_Z_TEST_GREATEREQUAL       (4 <<  4)
+#       define R128_Z_TEST_GREATER            (5 <<  4)
+#       define R128_Z_TEST_NEQUAL             (6 <<  4)
+#       define R128_Z_TEST_ALWAYS             (7 <<  4)
+#       define R128_Z_TEST_MASK               (7 <<  4)
+#       define R128_STENCIL_TEST_NEVER        (0 << 12)
+#       define R128_STENCIL_TEST_LESS         (1 << 12)
+#       define R128_STENCIL_TEST_LESSEQUAL    (2 << 12)
+#       define R128_STENCIL_TEST_EQUAL        (3 << 12)
+#       define R128_STENCIL_TEST_GREATEREQUAL (4 << 12)
+#       define R128_STENCIL_TEST_GREATER      (5 << 12)
+#       define R128_STENCIL_TEST_NEQUAL       (6 << 12)
+#       define R128_STENCIL_TEST_ALWAYS       (7 << 12)
+#       define R128_STENCIL_S_FAIL_KEEP       (0 << 16)
+#       define R128_STENCIL_S_FAIL_ZERO       (1 << 16)
+#       define R128_STENCIL_S_FAIL_REPLACE    (2 << 16)
+#       define R128_STENCIL_S_FAIL_INC        (3 << 16)
+#       define R128_STENCIL_S_FAIL_DEC        (4 << 16)
+#       define R128_STENCIL_S_FAIL_INV        (5 << 16)
+#       define R128_STENCIL_ZPASS_KEEP        (0 << 20)
+#       define R128_STENCIL_ZPASS_ZERO        (1 << 20)
+#       define R128_STENCIL_ZPASS_REPLACE     (2 << 20)
+#       define R128_STENCIL_ZPASS_INC         (3 << 20)
+#       define R128_STENCIL_ZPASS_DEC         (4 << 20)
+#       define R128_STENCIL_ZPASS_INV         (5 << 20)
+#       define R128_STENCIL_ZFAIL_KEEP        (0 << 24)
+#       define R128_STENCIL_ZFAIL_ZERO        (1 << 24)
+#       define R128_STENCIL_ZFAIL_REPLACE     (2 << 24)
+#       define R128_STENCIL_ZFAIL_INC         (3 << 24)
+#       define R128_STENCIL_ZFAIL_DEC         (4 << 24)
+#       define R128_STENCIL_ZFAIL_INV         (5 << 24)
+#define R128_TEX_CNTL_C                   0x1c9c
+#       define R128_Z_ENABLE                   (1 <<  0)
+#       define R128_Z_WRITE_ENABLE             (1 <<  1)
+#       define R128_STENCIL_ENABLE             (1 <<  3)
+#       define R128_SHADE_ENABLE               (0 <<  4)
+#       define R128_TEXMAP_ENABLE              (1 <<  4)
+#       define R128_SEC_TEXMAP_ENABLE          (1 <<  5)
+#       define R128_FOG_ENABLE                 (1 <<  7)
+#       define R128_DITHER_ENABLE              (1 <<  8)
+#       define R128_ALPHA_ENABLE               (1 <<  9)
+#       define R128_ALPHA_TEST_ENABLE          (1 << 10)
+#       define R128_SPEC_LIGHT_ENABLE          (1 << 11)
+#       define R128_TEX_CHROMA_KEY_ENABLE      (1 << 12)
+#       define R128_ALPHA_IN_TEX_COMPLETE_A    (0 << 13)
+#       define R128_ALPHA_IN_TEX_LSB_A         (1 << 13)
+#       define R128_LIGHT_DIS                  (0 << 14)
+#       define R128_LIGHT_COPY                 (1 << 14)
+#       define R128_LIGHT_MODULATE             (2 << 14)
+#       define R128_LIGHT_ADD                  (3 << 14)
+#       define R128_LIGHT_BLEND_CONSTANT       (4 << 14)
+#       define R128_LIGHT_BLEND_TEXTURE        (5 << 14)
+#       define R128_LIGHT_BLEND_VERTEX         (6 << 14)
+#       define R128_LIGHT_BLEND_CONST_COLOR    (7 << 14)
+#       define R128_ALPHA_LIGHT_DIS            (0 << 18)
+#       define R128_ALPHA_LIGHT_COPY           (1 << 18)
+#       define R128_ALPHA_LIGHT_MODULATE       (2 << 18)
+#       define R128_ALPHA_LIGHT_ADD            (3 << 18)
+#       define R128_ANTI_ALIAS                 (1 << 21)
+#       define R128_TEX_CACHE_FLUSH            (1 << 23)
+#       define R128_LOD_BIAS_SHIFT             24
+#define R128_MISC_3D_STATE_CNTL_REG       0x1ca0
+#       define R128_REF_ALPHA_MASK                  0xff
+#       define R128_MISC_SCALE_3D_NOOP              (0  <<  8)
+#       define R128_MISC_SCALE_3D_SCALE             (1  <<  8)
+#       define R128_MISC_SCALE_3D_TEXMAP_SHADE      (2  <<  8)
+#       define R128_MISC_SCALE_PIX_BLEND            (0  << 10)
+#       define R128_MISC_SCALE_PIX_REPLICATE        (1  << 10)
+#       define R128_ALPHA_COMB_ADD_CLAMP            (0  << 12)
+#       define R128_ALPHA_COMB_ADD_NO_CLAMP         (1  << 12)
+#       define R128_ALPHA_COMB_SUB_SRC_DST_CLAMP    (2  << 12)
+#       define R128_ALPHA_COMB_SUB_SRC_DST_NO_CLAMP (3  << 12)
+#       define R128_FOG_VERTEX                      (0  << 14)
+#       define R128_FOG_TABLE                       (1  << 14)
+#       define R128_ALPHA_BLEND_SRC_ZERO            (0  << 16)
+#       define R128_ALPHA_BLEND_SRC_ONE             (1  << 16)
+#       define R128_ALPHA_BLEND_SRC_SRCCOLOR        (2  << 16)
+#       define R128_ALPHA_BLEND_SRC_INVSRCCOLOR     (3  << 16)
+#       define R128_ALPHA_BLEND_SRC_SRCALPHA        (4  << 16)
+#       define R128_ALPHA_BLEND_SRC_INVSRCALPHA     (5  << 16)
+#       define R128_ALPHA_BLEND_SRC_DESTALPHA       (6  << 16)
+#       define R128_ALPHA_BLEND_SRC_INVDESTALPHA    (7  << 16)
+#       define R128_ALPHA_BLEND_SRC_DESTCOLOR       (8  << 16)
+#       define R128_ALPHA_BLEND_SRC_INVDESTCOLOR    (9  << 16)
+#       define R128_ALPHA_BLEND_SRC_SRCALPHASAT     (10 << 16)
+#       define R128_ALPHA_BLEND_SRC_BOTHSRCALPHA    (11 << 16)
+#       define R128_ALPHA_BLEND_SRC_BOTHINVSRCALPHA (12 << 16)
+#       define R128_ALPHA_BLEND_SRC_MASK            (15 << 16)
+#       define R128_ALPHA_BLEND_DST_ZERO            (0  << 20)
+#       define R128_ALPHA_BLEND_DST_ONE             (1  << 20)
+#       define R128_ALPHA_BLEND_DST_SRCCOLOR        (2  << 20)
+#       define R128_ALPHA_BLEND_DST_INVSRCCOLOR     (3  << 20)
+#       define R128_ALPHA_BLEND_DST_SRCALPHA        (4  << 20)
+#       define R128_ALPHA_BLEND_DST_INVSRCALPHA     (5  << 20)
+#       define R128_ALPHA_BLEND_DST_DESTALPHA       (6  << 20)
+#       define R128_ALPHA_BLEND_DST_INVDESTALPHA    (7  << 20)
+#       define R128_ALPHA_BLEND_DST_DESTCOLOR       (8  << 20)
+#       define R128_ALPHA_BLEND_DST_INVDESTCOLOR    (9  << 20)
+#       define R128_ALPHA_BLEND_DST_SRCALPHASAT     (10 << 20)
+#       define R128_ALPHA_BLEND_DST_MASK            (15 << 20)
+#       define R128_ALPHA_TEST_NEVER                (0  << 24)
+#       define R128_ALPHA_TEST_LESS                 (1  << 24)
+#       define R128_ALPHA_TEST_LESSEQUAL            (2  << 24)
+#       define R128_ALPHA_TEST_EQUAL                (3  << 24)
+#       define R128_ALPHA_TEST_GREATEREQUAL         (4  << 24)
+#       define R128_ALPHA_TEST_GREATER              (5  << 24)
+#       define R128_ALPHA_TEST_NEQUAL               (6  << 24)
+#       define R128_ALPHA_TEST_ALWAYS               (7  << 24)
+#       define R128_ALPHA_TEST_MASK                 (7  << 24)
+#define R128_TEXTURE_CLR_CMP_CLR_C        0x1ca4
+#define R128_TEXTURE_CLR_CMP_MSK_C        0x1ca8
+#define R128_FOG_COLOR_C                  0x1cac
+#       define R128_FOG_BLUE_SHIFT             0
+#       define R128_FOG_GREEN_SHIFT            8
+#       define R128_FOG_RED_SHIFT             16
+#define R128_PRIM_TEX_CNTL_C              0x1cb0
+#       define R128_MIN_BLEND_NEAREST          (0  <<  1)
+#       define R128_MIN_BLEND_LINEAR           (1  <<  1)
+#       define R128_MIN_BLEND_MIPNEAREST       (2  <<  1)
+#       define R128_MIN_BLEND_MIPLINEAR        (3  <<  1)
+#       define R128_MIN_BLEND_LINEARMIPNEAREST (4  <<  1)
+#       define R128_MIN_BLEND_LINEARMIPLINEAR  (5  <<  1)
+#       define R128_MIN_BLEND_MASK             (7  <<  1)
+#       define R128_MAG_BLEND_NEAREST          (0  <<  4)
+#       define R128_MAG_BLEND_LINEAR           (1  <<  4)
+#       define R128_MAG_BLEND_MASK             (7  <<  4)
+#       define R128_MIP_MAP_DISABLE            (1  <<  7)
+#       define R128_TEX_CLAMP_S_WRAP           (0  <<  8)
+#       define R128_TEX_CLAMP_S_MIRROR         (1  <<  8)
+#       define R128_TEX_CLAMP_S_CLAMP          (2  <<  8)
+#       define R128_TEX_CLAMP_S_BORDER_COLOR   (3  <<  8)
+#       define R128_TEX_CLAMP_S_MASK           (3  <<  8)
+#       define R128_TEX_WRAP_S                 (1  << 10)
+#       define R128_TEX_CLAMP_T_WRAP           (0  << 11)
+#       define R128_TEX_CLAMP_T_MIRROR         (1  << 11)
+#       define R128_TEX_CLAMP_T_CLAMP          (2  << 11)
+#       define R128_TEX_CLAMP_T_BORDER_COLOR   (3  << 11)
+#       define R128_TEX_CLAMP_T_MASK           (3  << 11)
+#       define R128_TEX_WRAP_T                 (1  << 13)
+#       define R128_TEX_PERSPECTIVE_DISABLE    (1  << 14)
+#       define R128_DATATYPE_VQ                (0  << 16)
+#       define R128_DATATYPE_CI4               (1  << 16)
+#       define R128_DATATYPE_CI8               (2  << 16)
+#       define R128_DATATYPE_ARGB1555          (3  << 16)
+#       define R128_DATATYPE_RGB565            (4  << 16)
+#       define R128_DATATYPE_RGB888            (5  << 16)
+#       define R128_DATATYPE_ARGB8888          (6  << 16)
+#       define R128_DATATYPE_RGB332            (7  << 16)
+#       define R128_DATATYPE_Y8                (8  << 16)
+#       define R128_DATATYPE_RGB8              (9  << 16)
+#       define R128_DATATYPE_CI16              (10 << 16)
+#       define R128_DATATYPE_YUV422            (11 << 16)
+#       define R128_DATATYPE_YUV422_2          (12 << 16)
+#       define R128_DATATYPE_AYUV444           (14 << 16)
+#       define R128_DATATYPE_ARGB4444          (15 << 16)
+#       define R128_PALLETE_EITHER             (0  << 20)
+#       define R128_PALLETE_1                  (1  << 20)
+#       define R128_PALLETE_2                  (2  << 20)
+#       define R128_PSEUDOCOLOR_DT_RGB565      (0  << 24)
+#       define R128_PSEUDOCOLOR_DT_ARGB1555    (1  << 24)
+#       define R128_PSEUDOCOLOR_DT_ARGB4444    (2  << 24)
 #define R128_PRIM_TEXTURE_COMBINE_CNTL_C  0x1cb4
-#	define R128_COMB_DIS		     (0	 <<  0)
-#	define R128_COMB_COPY		     (1	 <<  0)
-#	define R128_COMB_COPY_INP	     (2	 <<  0)
-#	define R128_COMB_MODULATE	     (3	 <<  0)
-#	define R128_COMB_MODULATE2X	     (4	 <<  0)
-#	define R128_COMB_MODULATE4X	     (5	 <<  0)
-#	define R128_COMB_ADD		     (6	 <<  0)
-#	define R128_COMB_ADD_SIGNED	     (7	 <<  0)
-#	define R128_COMB_BLEND_VERTEX	     (8	 <<  0)
-#	define R128_COMB_BLEND_TEXTURE	     (9	 <<  0)
-#	define R128_COMB_BLEND_CONST	     (10 <<  0)
-#	define R128_COMB_BLEND_PREMULT	     (11 <<  0)
-#	define R128_COMB_BLEND_PREV	     (12 <<  0)
-#	define R128_COMB_BLEND_PREMULT_INV   (13 <<  0)
-#	define R128_COMB_ADD_SIGNED2X	     (14 <<  0)
-#	define R128_COMB_BLEND_CONST_COLOR   (15 <<  0)
-#	define R128_COMB_MASK		     (15 <<  0)
-#	define R128_COLOR_FACTOR_TEX	     (4	 <<  4)
-#	define R128_COLOR_FACTOR_NTEX	     (5	 <<  4)
-#	define R128_COLOR_FACTOR_ALPHA	     (6	 <<  4)
-#	define R128_COLOR_FACTOR_NALPHA	     (7	 <<  4)
-#	define R128_COLOR_FACTOR_MASK	     (15 <<  4)
-#	define R128_INPUT_FACTOR_CONST_COLOR (2	 << 10)
-#	define R128_INPUT_FACTOR_CONST_ALPHA (3	 << 10)
-#	define R128_INPUT_FACTOR_INT_COLOR   (4	 << 10)
-#	define R128_INPUT_FACTOR_INT_ALPHA   (5	 << 10)
-#	define R128_INPUT_FACTOR_MASK	     (15 << 10)
-#	define R128_COMB_ALPHA_DIS	     (0	 << 14)
-#	define R128_COMB_ALPHA_COPY	     (1	 << 14)
-#	define R128_COMB_ALPHA_COPY_INP	     (2	 << 14)
-#	define R128_COMB_ALPHA_MODULATE	     (3	 << 14)
-#	define R128_COMB_ALPHA_MODULATE2X    (4	 << 14)
-#	define R128_COMB_ALPHA_MODULATE4X    (5	 << 14)
-#	define R128_COMB_ALPHA_ADD	     (6	 << 14)
-#	define R128_COMB_ALPHA_ADD_SIGNED    (7	 << 14)
-#	define R128_COMB_ALPHA_ADD_SIGNED2X  (14 << 14)
-#	define R128_COMB_ALPHA_MASK	     (15 << 14)
-#	define R128_ALPHA_FACTOR_TEX_ALPHA   (6	 << 18)
-#	define R128_ALPHA_FACTOR_NTEX_ALPHA  (7	 << 18)
-#	define R128_ALPHA_FACTOR_MASK	     (15 << 18)
-#	define R128_INP_FACTOR_A_CONST_ALPHA (1	 << 25)
-#	define R128_INP_FACTOR_A_INT_ALPHA   (2	 << 25)
-#	define R128_INP_FACTOR_A_MASK	     (7	 << 25)
-#define R128_TEX_SIZE_PITCH_C		  0x1cb8
-#	define R128_TEX_PITCH_SHIFT	      0
-#	define R128_TEX_SIZE_SHIFT	      4
-#	define R128_TEX_HEIGHT_SHIFT	      8
-#	define R128_TEX_MIN_SIZE_SHIFT	     12
-#	define R128_SEC_TEX_PITCH_SHIFT	     16
-#	define R128_SEC_TEX_SIZE_SHIFT	     20
-#	define R128_SEC_TEX_HEIGHT_SHIFT     24
-#	define R128_SEC_TEX_MIN_SIZE_SHIFT   28
-#	define R128_TEX_PITCH_MASK	     (0x0f <<  0)
-#	define R128_TEX_SIZE_MASK	     (0x0f <<  4)
-#	define R128_TEX_HEIGHT_MASK	     (0x0f <<  8)
-#	define R128_TEX_MIN_SIZE_MASK	     (0x0f << 12)
-#	define R128_SEC_TEX_PITCH_MASK	     (0x0f << 16)
-#	define R128_SEC_TEX_SIZE_MASK	     (0x0f << 20)
-#	define R128_SEC_TEX_HEIGHT_MASK	     (0x0f << 24)
-#	define R128_SEC_TEX_MIN_SIZE_MASK    (0x0f << 28)
-#	define R128_TEX_SIZE_PITCH_SHIFT      0
-#	define R128_SEC_TEX_SIZE_PITCH_SHIFT 16
-#	define R128_TEX_SIZE_PITCH_MASK	     (0xffff <<	 0)
-#	define R128_SEC_TEX_SIZE_PITCH_MASK  (0xffff << 16)
-#define R128_PRIM_TEX_0_OFFSET_C	  0x1cbc
-#define R128_PRIM_TEX_1_OFFSET_C	  0x1cc0
-#define R128_PRIM_TEX_2_OFFSET_C	  0x1cc4
-#define R128_PRIM_TEX_3_OFFSET_C	  0x1cc8
-#define R128_PRIM_TEX_4_OFFSET_C	  0x1ccc
-#define R128_PRIM_TEX_5_OFFSET_C	  0x1cd0
-#define R128_PRIM_TEX_6_OFFSET_C	  0x1cd4
-#define R128_PRIM_TEX_7_OFFSET_C	  0x1cd8
-#define R128_PRIM_TEX_8_OFFSET_C	  0x1cdc
-#define R128_PRIM_TEX_9_OFFSET_C	  0x1ce0
-#define R128_PRIM_TEX_10_OFFSET_C	  0x1ce4
-#	define R128_TEX_NO_TILE		  (0 << 30)
-#	define R128_TEX_TILED_BY_HOST	  (1 << 30)
-#	define R128_TEX_TILED_BY_STORAGE  (2 << 30)
-#	define R128_TEX_TILED_BY_STORAGE2 (3 << 30)
+#       define R128_COMB_DIS                 (0  <<  0)
+#       define R128_COMB_COPY                (1  <<  0)
+#       define R128_COMB_COPY_INP            (2  <<  0)
+#       define R128_COMB_MODULATE            (3  <<  0)
+#       define R128_COMB_MODULATE2X          (4  <<  0)
+#       define R128_COMB_MODULATE4X          (5  <<  0)
+#       define R128_COMB_ADD                 (6  <<  0)
+#       define R128_COMB_ADD_SIGNED          (7  <<  0)
+#       define R128_COMB_BLEND_VERTEX        (8  <<  0)
+#       define R128_COMB_BLEND_TEXTURE       (9  <<  0)
+#       define R128_COMB_BLEND_CONST         (10 <<  0)
+#       define R128_COMB_BLEND_PREMULT       (11 <<  0)
+#       define R128_COMB_BLEND_PREV          (12 <<  0)
+#       define R128_COMB_BLEND_PREMULT_INV   (13 <<  0)
+#       define R128_COMB_ADD_SIGNED2X        (14 <<  0)
+#       define R128_COMB_BLEND_CONST_COLOR   (15 <<  0)
+#       define R128_COMB_MASK                (15 <<  0)
+#       define R128_COLOR_FACTOR_TEX         (4  <<  4)
+#       define R128_COLOR_FACTOR_NTEX        (5  <<  4)
+#       define R128_COLOR_FACTOR_ALPHA       (6  <<  4)
+#       define R128_COLOR_FACTOR_NALPHA      (7  <<  4)
+#       define R128_COLOR_FACTOR_MASK        (15 <<  4)
+#       define R128_INPUT_FACTOR_CONST_COLOR (2  << 10)
+#       define R128_INPUT_FACTOR_CONST_ALPHA (3  << 10)
+#       define R128_INPUT_FACTOR_INT_COLOR   (4  << 10)
+#       define R128_INPUT_FACTOR_INT_ALPHA   (5  << 10)
+#       define R128_INPUT_FACTOR_MASK        (15 << 10)
+#       define R128_COMB_ALPHA_DIS           (0  << 14)
+#       define R128_COMB_ALPHA_COPY          (1  << 14)
+#       define R128_COMB_ALPHA_COPY_INP      (2  << 14)
+#       define R128_COMB_ALPHA_MODULATE      (3  << 14)
+#       define R128_COMB_ALPHA_MODULATE2X    (4  << 14)
+#       define R128_COMB_ALPHA_MODULATE4X    (5  << 14)
+#       define R128_COMB_ALPHA_ADD           (6  << 14)
+#       define R128_COMB_ALPHA_ADD_SIGNED    (7  << 14)
+#       define R128_COMB_ALPHA_ADD_SIGNED2X  (14 << 14)
+#       define R128_COMB_ALPHA_MASK          (15 << 14)
+#       define R128_ALPHA_FACTOR_TEX_ALPHA   (6  << 18)
+#       define R128_ALPHA_FACTOR_NTEX_ALPHA  (7  << 18)
+#       define R128_ALPHA_FACTOR_MASK        (15 << 18)
+#       define R128_INP_FACTOR_A_CONST_ALPHA (1  << 25)
+#       define R128_INP_FACTOR_A_INT_ALPHA   (2  << 25)
+#       define R128_INP_FACTOR_A_MASK        (7  << 25)
+#define R128_TEX_SIZE_PITCH_C             0x1cb8
+#       define R128_TEX_PITCH_SHIFT           0
+#       define R128_TEX_SIZE_SHIFT            4
+#       define R128_TEX_HEIGHT_SHIFT          8
+#       define R128_TEX_MIN_SIZE_SHIFT       12
+#       define R128_SEC_TEX_PITCH_SHIFT      16
+#       define R128_SEC_TEX_SIZE_SHIFT       20
+#       define R128_SEC_TEX_HEIGHT_SHIFT     24
+#       define R128_SEC_TEX_MIN_SIZE_SHIFT   28
+#       define R128_TEX_PITCH_MASK           (0x0f <<  0)
+#       define R128_TEX_SIZE_MASK            (0x0f <<  4)
+#       define R128_TEX_HEIGHT_MASK          (0x0f <<  8)
+#       define R128_TEX_MIN_SIZE_MASK        (0x0f << 12)
+#       define R128_SEC_TEX_PITCH_MASK       (0x0f << 16)
+#       define R128_SEC_TEX_SIZE_MASK        (0x0f << 20)
+#       define R128_SEC_TEX_HEIGHT_MASK      (0x0f << 24)
+#       define R128_SEC_TEX_MIN_SIZE_MASK    (0x0f << 28)
+#       define R128_TEX_SIZE_PITCH_SHIFT      0
+#       define R128_SEC_TEX_SIZE_PITCH_SHIFT 16
+#       define R128_TEX_SIZE_PITCH_MASK      (0xffff <<  0)
+#       define R128_SEC_TEX_SIZE_PITCH_MASK  (0xffff << 16)
+#define R128_PRIM_TEX_0_OFFSET_C          0x1cbc
+#define R128_PRIM_TEX_1_OFFSET_C          0x1cc0
+#define R128_PRIM_TEX_2_OFFSET_C          0x1cc4
+#define R128_PRIM_TEX_3_OFFSET_C          0x1cc8
+#define R128_PRIM_TEX_4_OFFSET_C          0x1ccc
+#define R128_PRIM_TEX_5_OFFSET_C          0x1cd0
+#define R128_PRIM_TEX_6_OFFSET_C          0x1cd4
+#define R128_PRIM_TEX_7_OFFSET_C          0x1cd8
+#define R128_PRIM_TEX_8_OFFSET_C          0x1cdc
+#define R128_PRIM_TEX_9_OFFSET_C          0x1ce0
+#define R128_PRIM_TEX_10_OFFSET_C         0x1ce4
+#       define R128_TEX_NO_TILE           (0 << 30)
+#       define R128_TEX_TILED_BY_HOST     (1 << 30)
+#       define R128_TEX_TILED_BY_STORAGE  (2 << 30)
+#       define R128_TEX_TILED_BY_STORAGE2 (3 << 30)
 
-#define R128_SEC_TEX_CNTL_C		  0x1d00
-#	define R128_SEC_SELECT_PRIM_ST	  (0  <<  0)
-#	define R128_SEC_SELECT_SEC_ST	  (1  <<  0)
-#define R128_SEC_TEX_COMBINE_CNTL_C	  0x1d04
-#	define R128_INPUT_FACTOR_PREV_COLOR (8	<< 10)
-#	define R128_INPUT_FACTOR_PREV_ALPHA (9	<< 10)
-#	define R128_INP_FACTOR_A_PREV_ALPHA (4	<< 25)
-#define R128_SEC_TEX_0_OFFSET_C		  0x1d08
-#define R128_SEC_TEX_1_OFFSET_C		  0x1d0c
-#define R128_SEC_TEX_2_OFFSET_C		  0x1d10
-#define R128_SEC_TEX_3_OFFSET_C		  0x1d14
-#define R128_SEC_TEX_4_OFFSET_C		  0x1d18
-#define R128_SEC_TEX_5_OFFSET_C		  0x1d1c
-#define R128_SEC_TEX_6_OFFSET_C		  0x1d20
-#define R128_SEC_TEX_7_OFFSET_C		  0x1d24
-#define R128_SEC_TEX_8_OFFSET_C		  0x1d28
-#define R128_SEC_TEX_9_OFFSET_C		  0x1d2c
-#define R128_SEC_TEX_10_OFFSET_C	  0x1d30
-#define R128_CONSTANT_COLOR_C		  0x1d34
-#	define R128_CONSTANT_BLUE_SHIFT	       0
-#	define R128_CONSTANT_GREEN_SHIFT       8
-#	define R128_CONSTANT_RED_SHIFT	      16
-#	define R128_CONSTANT_ALPHA_SHIFT      24
+#define R128_SEC_TEX_CNTL_C               0x1d00
+#       define R128_SEC_SELECT_PRIM_ST    (0  <<  0)
+#       define R128_SEC_SELECT_SEC_ST     (1  <<  0)
+#define R128_SEC_TEX_COMBINE_CNTL_C       0x1d04
+#       define R128_INPUT_FACTOR_PREV_COLOR (8  << 10)
+#       define R128_INPUT_FACTOR_PREV_ALPHA (9  << 10)
+#       define R128_INP_FACTOR_A_PREV_ALPHA (4  << 25)
+#define R128_SEC_TEX_0_OFFSET_C           0x1d08
+#define R128_SEC_TEX_1_OFFSET_C           0x1d0c
+#define R128_SEC_TEX_2_OFFSET_C           0x1d10
+#define R128_SEC_TEX_3_OFFSET_C           0x1d14
+#define R128_SEC_TEX_4_OFFSET_C           0x1d18
+#define R128_SEC_TEX_5_OFFSET_C           0x1d1c
+#define R128_SEC_TEX_6_OFFSET_C           0x1d20
+#define R128_SEC_TEX_7_OFFSET_C           0x1d24
+#define R128_SEC_TEX_8_OFFSET_C           0x1d28
+#define R128_SEC_TEX_9_OFFSET_C           0x1d2c
+#define R128_SEC_TEX_10_OFFSET_C          0x1d30
+#define R128_CONSTANT_COLOR_C             0x1d34
+#       define R128_CONSTANT_BLUE_SHIFT        0
+#       define R128_CONSTANT_GREEN_SHIFT       8
+#       define R128_CONSTANT_RED_SHIFT        16
+#       define R128_CONSTANT_ALPHA_SHIFT      24
 #define R128_PRIM_TEXTURE_BORDER_COLOR_C  0x1d38
-#	define R128_PRIM_TEX_BORDER_BLUE_SHIFT	 0
-#	define R128_PRIM_TEX_BORDER_GREEN_SHIFT	 8
-#	define R128_PRIM_TEX_BORDER_RED_SHIFT	16
-#	define R128_PRIM_TEX_BORDER_ALPHA_SHIFT 24
-#define R128_SEC_TEXTURE_BORDER_COLOR_C	  0x1d3c
-#	define R128_SEC_TEX_BORDER_BLUE_SHIFT	0
-#	define R128_SEC_TEX_BORDER_GREEN_SHIFT	8
-#	define R128_SEC_TEX_BORDER_RED_SHIFT   16
-#	define R128_SEC_TEX_BORDER_ALPHA_SHIFT 24
-#define R128_STEN_REF_MASK_C		  0x1d40
-#	define R128_STEN_REFERENCE_SHIFT       0
-#	define R128_STEN_MASK_SHIFT	      16
-#	define R128_STEN_WRITE_MASK_SHIFT     24
-#define R128_PLANE_3D_MASK_C		  0x1d44
-#define R128_TEX_CACHE_STAT_COUNT	  0x1974
+#       define R128_PRIM_TEX_BORDER_BLUE_SHIFT   0
+#       define R128_PRIM_TEX_BORDER_GREEN_SHIFT  8
+#       define R128_PRIM_TEX_BORDER_RED_SHIFT   16
+#       define R128_PRIM_TEX_BORDER_ALPHA_SHIFT 24
+#define R128_SEC_TEXTURE_BORDER_COLOR_C   0x1d3c
+#       define R128_SEC_TEX_BORDER_BLUE_SHIFT   0
+#       define R128_SEC_TEX_BORDER_GREEN_SHIFT  8
+#       define R128_SEC_TEX_BORDER_RED_SHIFT   16
+#       define R128_SEC_TEX_BORDER_ALPHA_SHIFT 24
+#define R128_STEN_REF_MASK_C              0x1d40
+#       define R128_STEN_REFERENCE_SHIFT       0
+#       define R128_STEN_MASK_SHIFT           16
+#       define R128_STEN_WRITE_MASK_SHIFT     24
+#define R128_PLANE_3D_MASK_C              0x1d44
+#define R128_TEX_CACHE_STAT_COUNT         0x1974
 
 
 				/* Constants */
-#define R128_AGP_TEX_OFFSET		  0x02000000
+#define R128_AGP_TEX_OFFSET               0x02000000
 
-#define R128_VB_AGE_REG			  R128_GUI_SCRATCH_REG0
-#define R128_SWAP_AGE_REG		  R128_GUI_SCRATCH_REG1
+#define R128_VB_AGE_REG                   R128_GUI_SCRATCH_REG0
+#define R128_SWAP_AGE_REG                 R128_GUI_SCRATCH_REG1
 
 				/* CCE packet types */
-#define R128_CCE_PACKET0			 0x00000000
-#define R128_CCE_PACKET0_ONE_REG_WR		 0x00008000
-#define R128_CCE_PACKET1			 0x40000000
-#define R128_CCE_PACKET2			 0x80000000
-#define R128_CCE_PACKET3_NOP			 0xC0001000
-#define R128_CCE_PACKET3_PAINT			 0xC0001100
-#define R128_CCE_PACKET3_BITBLT			 0xC0001200
-#define R128_CCE_PACKET3_SMALLTEXT		 0xC0001300
-#define R128_CCE_PACKET3_HOSTDATA_BLT		 0xC0001400
-#define R128_CCE_PACKET3_POLYLINE		 0xC0001500
-#define R128_CCE_PACKET3_SCALING		 0xC0001600
-#define R128_CCE_PACKET3_TRANS_SCALING		 0xC0001700
-#define R128_CCE_PACKET3_POLYSCANLINES		 0xC0001800
-#define R128_CCE_PACKET3_NEXT_CHAR		 0xC0001900
-#define R128_CCE_PACKET3_PAINT_MULTI		 0xC0001A00
-#define R128_CCE_PACKET3_BITBLT_MULTI		 0xC0001B00
-#define R128_CCE_PACKET3_PLY_NEXTSCAN		 0xC0001D00
-#define R128_CCE_PACKET3_SET_SCISSORS		 0xC0001E00
-#define R128_CCE_PACKET3_SET_MODE24BPP		 0xC0001F00
-#define R128_CCE_PACKET3_CNTL_PAINT		 0xC0009100
-#define R128_CCE_PACKET3_CNTL_BITBLT		 0xC0009200
-#define R128_CCE_PACKET3_CNTL_SMALLTEXT		 0xC0009300
-#define R128_CCE_PACKET3_CNTL_HOSTDATA_BLT	 0xC0009400
-#define R128_CCE_PACKET3_CNTL_POLYLINE		 0xC0009500
-#define R128_CCE_PACKET3_CNTL_SCALING		 0xC0009600
-#define R128_CCE_PACKET3_CNTL_TRANS_SCALING	 0xC0009700
-#define R128_CCE_PACKET3_CNTL_POLYSCANLINES	 0xC0009800
-#define R128_CCE_PACKET3_CNTL_NEXT_CHAR		 0xC0009900
-#define R128_CCE_PACKET3_CNTL_PAINT_MULTI	 0xC0009A00
-#define R128_CCE_PACKET3_CNTL_BITBLT_MULTI	 0xC0009B00
-#define R128_CCE_PACKET3_CNTL_TRANS_BITBLT	 0xC0009C00
-#define R128_CCE_PACKET3_3D_SAVE_CONTEXT	 0xC0002000
-#define R128_CCE_PACKET3_3D_PLAY_CONTEXT	 0xC0002100
-#define R128_CCE_PACKET3_3D_RNDR_GEN_INDX_PRIM	 0xC0002300
-#define R128_CCE_PACKET3_3D_RNDR_GEN_PRIM	 0xC0002500
-#define R128_CCE_PACKET3_LOAD_PALETTE		 0xC0002C00
-#define R128_CCE_PACKET3_PURGE			 0xC0002D00
-#define R128_CCE_PACKET3_NEXT_VERTEX_BUNDLE	 0xC0002E00
-#	define R128_CCE_PACKET_MASK		 0xC0000000
-#	define R128_CCE_PACKET_COUNT_MASK	 0x3fff0000
-#	define R128_CCE_PACKET_MAX_DWORDS	 (1 << 14)
-#	define R128_CCE_PACKET0_REG_MASK	 0x000007ff
-#	define R128_CCE_PACKET1_REG0_MASK	 0x000007ff
-#	define R128_CCE_PACKET1_REG1_MASK	 0x003ff800
+#define R128_CCE_PACKET0                         0x00000000
+#define R128_CCE_PACKET0_ONE_REG_WR              0x00008000
+#define R128_CCE_PACKET1                         0x40000000
+#define R128_CCE_PACKET2                         0x80000000
+#define R128_CCE_PACKET3_NOP                     0xC0001000
+#define R128_CCE_PACKET3_PAINT                   0xC0001100
+#define R128_CCE_PACKET3_BITBLT                  0xC0001200
+#define R128_CCE_PACKET3_SMALLTEXT               0xC0001300
+#define R128_CCE_PACKET3_HOSTDATA_BLT            0xC0001400
+#define R128_CCE_PACKET3_POLYLINE                0xC0001500
+#define R128_CCE_PACKET3_SCALING                 0xC0001600
+#define R128_CCE_PACKET3_TRANS_SCALING           0xC0001700
+#define R128_CCE_PACKET3_POLYSCANLINES           0xC0001800
+#define R128_CCE_PACKET3_NEXT_CHAR               0xC0001900
+#define R128_CCE_PACKET3_PAINT_MULTI             0xC0001A00
+#define R128_CCE_PACKET3_BITBLT_MULTI            0xC0001B00
+#define R128_CCE_PACKET3_PLY_NEXTSCAN            0xC0001D00
+#define R128_CCE_PACKET3_SET_SCISSORS            0xC0001E00
+#define R128_CCE_PACKET3_SET_MODE24BPP           0xC0001F00
+#define R128_CCE_PACKET3_CNTL_PAINT              0xC0009100
+#define R128_CCE_PACKET3_CNTL_BITBLT             0xC0009200
+#define R128_CCE_PACKET3_CNTL_SMALLTEXT          0xC0009300
+#define R128_CCE_PACKET3_CNTL_HOSTDATA_BLT       0xC0009400
+#define R128_CCE_PACKET3_CNTL_POLYLINE           0xC0009500
+#define R128_CCE_PACKET3_CNTL_SCALING            0xC0009600
+#define R128_CCE_PACKET3_CNTL_TRANS_SCALING      0xC0009700
+#define R128_CCE_PACKET3_CNTL_POLYSCANLINES      0xC0009800
+#define R128_CCE_PACKET3_CNTL_NEXT_CHAR          0xC0009900
+#define R128_CCE_PACKET3_CNTL_PAINT_MULTI        0xC0009A00
+#define R128_CCE_PACKET3_CNTL_BITBLT_MULTI       0xC0009B00
+#define R128_CCE_PACKET3_CNTL_TRANS_BITBLT       0xC0009C00
+#define R128_CCE_PACKET3_3D_SAVE_CONTEXT         0xC0002000
+#define R128_CCE_PACKET3_3D_PLAY_CONTEXT         0xC0002100
+#define R128_CCE_PACKET3_3D_RNDR_GEN_INDX_PRIM   0xC0002300
+#define R128_CCE_PACKET3_3D_RNDR_GEN_PRIM        0xC0002500
+#define R128_CCE_PACKET3_LOAD_PALETTE            0xC0002C00
+#define R128_CCE_PACKET3_PURGE                   0xC0002D00
+#define R128_CCE_PACKET3_NEXT_VERTEX_BUNDLE      0xC0002E00
+#       define R128_CCE_PACKET_MASK              0xC0000000
+#       define R128_CCE_PACKET_COUNT_MASK        0x3fff0000
+#       define R128_CCE_PACKET_MAX_DWORDS        (1 << 14)
+#       define R128_CCE_PACKET0_REG_MASK         0x000007ff
+#       define R128_CCE_PACKET1_REG0_MASK        0x000007ff
+#       define R128_CCE_PACKET1_REG1_MASK        0x003ff800
 
-#define R128_CCE_VC_FRMT_RHW			 0x00000001
-#define R128_CCE_VC_FRMT_DIFFUSE_BGR		 0x00000002
-#define R128_CCE_VC_FRMT_DIFFUSE_A		 0x00000004
-#define R128_CCE_VC_FRMT_DIFFUSE_ARGB		 0x00000008
-#define R128_CCE_VC_FRMT_SPEC_BGR		 0x00000010
-#define R128_CCE_VC_FRMT_SPEC_F			 0x00000020
-#define R128_CCE_VC_FRMT_SPEC_FRGB		 0x00000040
-#define R128_CCE_VC_FRMT_S_T			 0x00000080
-#define R128_CCE_VC_FRMT_S2_T2			 0x00000100
-#define R128_CCE_VC_FRMT_RHW2			 0x00000200
+#define R128_CCE_VC_FRMT_RHW                     0x00000001
+#define R128_CCE_VC_FRMT_DIFFUSE_BGR             0x00000002
+#define R128_CCE_VC_FRMT_DIFFUSE_A               0x00000004
+#define R128_CCE_VC_FRMT_DIFFUSE_ARGB            0x00000008
+#define R128_CCE_VC_FRMT_SPEC_BGR                0x00000010
+#define R128_CCE_VC_FRMT_SPEC_F                  0x00000020
+#define R128_CCE_VC_FRMT_SPEC_FRGB               0x00000040
+#define R128_CCE_VC_FRMT_S_T                     0x00000080
+#define R128_CCE_VC_FRMT_S2_T2                   0x00000100
+#define R128_CCE_VC_FRMT_RHW2                    0x00000200
 
-#define R128_CCE_VC_CNTL_PRIM_TYPE_NONE		 0x00000000
-#define R128_CCE_VC_CNTL_PRIM_TYPE_POINT	 0x00000001
-#define R128_CCE_VC_CNTL_PRIM_TYPE_LINE		 0x00000002
-#define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE	 0x00000003
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST	 0x00000004
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN	 0x00000005
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP	 0x00000006
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2	 0x00000007
-#define R128_CCE_VC_CNTL_PRIM_WALK_IND		 0x00000010
-#define R128_CCE_VC_CNTL_PRIM_WALK_LIST		 0x00000020
-#define R128_CCE_VC_CNTL_PRIM_WALK_RING		 0x00000030
-#define R128_CCE_VC_CNTL_NUM_SHIFT		 16
+#define R128_CCE_VC_CNTL_PRIM_TYPE_NONE          0x00000000
+#define R128_CCE_VC_CNTL_PRIM_TYPE_POINT         0x00000001
+#define R128_CCE_VC_CNTL_PRIM_TYPE_LINE          0x00000002
+#define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE     0x00000003
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST      0x00000004
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN       0x00000005
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP     0x00000006
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2     0x00000007
+#define R128_CCE_VC_CNTL_PRIM_WALK_IND           0x00000010
+#define R128_CCE_VC_CNTL_PRIM_WALK_LIST          0x00000020
+#define R128_CCE_VC_CNTL_PRIM_WALK_RING          0x00000030
+#define R128_CCE_VC_CNTL_NUM_SHIFT               16
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h
index d9d8d00e6..e7bc1f539 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h
@@ -1,33 +1,36 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h,v 1.1 2000/11/02 16:55:38 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h,v 1.2 2000/11/09 03:24:36 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                      Precision Insight, Inc., Cedar Park, Texas, and
+ *                      VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
+ * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Kevin E. Martin <kevin@precisioninsight.com>
+ *   Kevin E. Martin <martin@valinux.com>
  *
  */
 
@@ -36,20 +39,20 @@
 
 /* There are 2 heaps (local/AGP).  Each region within a heap is a
    minimum of 64k, and there are at most 64 of them per heap. */
-#define R128_LOCAL_TEX_HEAP	  0
-#define R128_AGP_TEX_HEAP	  1
-#define R128_NR_TEX_HEAPS	  2
-#define R128_NR_TEX_REGIONS	 64
+#define R128_LOCAL_TEX_HEAP       0
+#define R128_AGP_TEX_HEAP         1
+#define R128_NR_TEX_HEAPS         2
+#define R128_NR_TEX_REGIONS      64
 #define R128_LOG_TEX_GRANULARITY 16
 
 typedef struct {
-    unsigned char next, prev; /* indices to form a circular LRU	 */
+    unsigned char next, prev; /* indices to form a circular LRU  */
     unsigned char in_use;     /* owned by a client, or free? */
-    int		  age;	      /* tracked by clients to update local LRU's */
+    int           age;        /* tracked by clients to update local LRU's */
 } R128TexRegion;
 
 typedef struct {
-    /* Maintain an LRU of contiguous regions of texture space.	If you
+    /* Maintain an LRU of contiguous regions of texture space.  If you
      * think you own a region of texture memory, and it has an age
      * different to the one you set, then you are mistaken and it has
      * been stolen by another client.  If global texAge hasn't changed,
@@ -66,11 +69,11 @@ typedef struct {
 				/* Last elt is sentinal */
     R128TexRegion texList[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1];
 				/* last time texture was uploaded */
-    int		  texAge[R128_NR_TEX_HEAPS];
+    int           texAge[R128_NR_TEX_HEAPS];
 
-    int		  ctxOwner;	/* last context to upload state */
+    int           ctxOwner;     /* last context to upload state */
 
-    CARD32	  ringWrite;	/* current ring buffer write index */
+    CARD32        ringWrite;    /* current ring buffer write index */
 } R128SAREAPriv, *R128SAREAPrivPtr;
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c
index 8c8977e8f..d1446b767 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c,v 1.1 2000/11/02 16:55:39 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c,v 1.2 2000/11/09 03:24:36 martin Exp $ */
 /*
  * Copyright 2000 Stuart R. Anderson and Metro Link, Inc.
  *
@@ -69,14 +69,14 @@
 #define OUTREG(addr, val)   { xf86DrvMsgVerb(pScrn->scrnIndex,X_INFO,1,"OUTREG(%s,%x)\n",#addr,val) ;MMIO_OUT32(R128MMIO, addr, val);}
 */
 
-#define OFF_DELAY	250  /* milliseconds */
-#define FREE_DELAY	15000
+#define OFF_DELAY       250  /* milliseconds */
+#define FREE_DELAY      15000
 
-#define OFF_TIMER	0x01
-#define FREE_TIMER	0x02
+#define OFF_TIMER       0x01
+#define FREE_TIMER      0x02
 #define CLIENT_VIDEO_ON 0x04
 
-#define TIMER_MASK	(OFF_TIMER | FREE_TIMER)
+#define TIMER_MASK      (OFF_TIMER | FREE_TIMER)
 
 #ifndef XvExtension
 void R128InitVideo(ScreenPtr pScreen) {}
@@ -96,28 +96,28 @@ static int R128QueryImageAttributes(ScrnInfoPtr,
 
 #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
 
-#define IMAGE_MAX_WIDTH		2048
-#define IMAGE_MAX_HEIGHT	2048
-#define Y_BUF_SIZE		(IMAGE_MAX_WIDTH * IMAGE_MAX_HEIGHT)
+#define IMAGE_MAX_WIDTH         2048
+#define IMAGE_MAX_HEIGHT        2048
+#define Y_BUF_SIZE              (IMAGE_MAX_WIDTH * IMAGE_MAX_HEIGHT)
 
 static Atom xvColorKey;
 
 typedef struct {
-	int		videoStatus;
-	unsigned char	brightness;
-	unsigned char	contrast;
-
-	RegionRec	clip;
-	CARD32		colorKey;
-	CARD8		overlay_pixel_size;
-	CARD8		current_buffer;
-	int		overlay_pad;
-	CARD32		overlay_id;
-	CARD32		overlay_width;
-
-	CARD32		scale_cntl;
-	CARD32		video_format;
-	FBLinearPtr	linear;
+	int             videoStatus;
+	unsigned char   brightness;
+	unsigned char   contrast;
+
+	RegionRec       clip;
+	CARD32          colorKey;
+	CARD8           overlay_pixel_size;
+	CARD8           current_buffer;
+	int             overlay_pad;
+	CARD32          overlay_id;
+	CARD32          overlay_width;
+
+	CARD32          scale_cntl;
+	CARD32          video_format;
+	FBLinearPtr     linear;
 	} R128PortPrivRec, *R128PortPrivPtr;
 
 void R128InitVideo(ScreenPtr pScreen)
@@ -200,7 +200,7 @@ static XF86ImageRec Images[NUM_IMAGES] =
 static void
 R128ResetVideo(ScrnInfoPtr pScrn)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
     R128PortPrivPtr pPriv = info->adaptor->pPortPrivates[0].ptr;
 
@@ -306,7 +306,7 @@ R128SetupImageVideo(ScreenPtr pScreen)
     pPriv->scale_cntl|= R128_SCALER_SMART_SWITCH|R128_SCALER_PIX_EXPAND;
     pPriv->scale_cntl|= R128_SCALER_SMART_SWITCH;
 
-    xvColorKey	 = MAKE_ATOM("XV_COLORKEY");
+    xvColorKey   = MAKE_ATOM("XV_COLORKEY");
 
     R128ResetVideo(pScrn);
 
@@ -345,7 +345,7 @@ RegionsEqual(RegionPtr A, RegionPtr B)
 static void
 R128StopVideo(ScrnInfoPtr pScrn, pointer data, Bool Exit)
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
     R128PortPrivPtr pPriv = (R128PortPrivPtr) data;
 
@@ -376,7 +376,7 @@ R128SetPortAttribute(
   pointer data
 )
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
     R128PortPrivPtr pPriv = (R128PortPrivPtr) data;
 
@@ -438,7 +438,7 @@ R128DisplayVideo(
     int fboffset
 )
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
     R128PortPrivPtr pPriv = info->adaptor->pPortPrivates[0].ptr;
     int step_by, vert_inc, horz_inc;
@@ -605,7 +605,7 @@ R128PutImage(
   RegionPtr clipBoxes, pointer data
 )
 {
-    R128InfoPtr	  info	    = R128PTR(pScrn);
+    R128InfoPtr   info      = R128PTR(pScrn);
     unsigned char *R128MMIO = info->MMIO;
     R128PortPrivPtr pPriv = (R128PortPrivPtr)data;
     INT32 xa, xb, ya, yb;
@@ -666,7 +666,7 @@ R128PutImage(
 
     switch(id) {
     case FOURCC_YV12:
-	 size =	 width * height * 2; /* 16bpp */
+	 size =  width * height * 2; /* 16bpp */
 	 break;
     case FOURCC_UYVY:
     case FOURCC_YUY2:
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h
index e9b8b37e0..745795e8b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h
@@ -1,35 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h,v 1.1 2000/11/02 16:55:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h,v 1.3 2000/11/09 10:30:53 alanh Exp $ */
 /*
- *
- * Copyright 2000 ATI Technologies Inc., Markham, Ontario
- *	      and VA Linux Systems, Inc., Sunnyvale, California.
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
  *   Kevin E. Martin <martin@valinux.com>
  *   Rickard E. Faith <faith@valinux.com>
+ *   Alan Hourihane <ahourihane@valinux.com>
  *
  */
 
@@ -83,21 +85,21 @@
 #undef XF86DRI
 #endif
 
-#define RADEON_DEBUG	0	/* Turn off debugging output		    */
-#define RADEON_TIMEOUT	2000000 /* Fall out of wait loops after this count */
+#define RADEON_DEBUG    0       /* Turn off debugging output                */
+#define RADEON_TIMEOUT  2000000 /* Fall out of wait loops after this count */
 #define RADEON_MMIOSIZE 0x80000
 /* Atomic updates of PLL clock don't seem to always work and stick, thus
  * the bit never resets. Here - we use our own check by reading back the
  * register we've just wrote to make sure it's got the Right! value */
-#define RADEON_ATOMIC_UPDATE 0	/* Use PLL Atomic updates (seems broken) */
+#define RADEON_ATOMIC_UPDATE 0  /* Use PLL Atomic updates (seems broken) */
 
 #define RADEON_VBIOS_SIZE 0x00010000
 
 #if RADEON_DEBUG
-#define RADEONTRACE(x)						\
-    do {							\
+#define RADEONTRACE(x)                                          \
+    do {                                                        \
 	ErrorF("(**) %s(%d): ", RADEON_NAME, pScrn->scrnIndex); \
-	ErrorF x;						\
+	ErrorF x;                                               \
     } while (0);
 #else
 #define RADEONTRACE(x)
@@ -109,16 +111,16 @@
 #define RADEON_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))
 #define RADEONPTR(pScrn) ((RADEONInfoPtr)(pScrn)->driverPrivate)
 
-typedef struct {	/* All values in XCLKS	  */
-    int	 ML;		/* Memory Read Latency	  */
-    int	 MB;		/* Memory Burst Length	  */
-    int	 Trcd;		/* RAS to CAS delay	  */
-    int	 Trp;		/* RAS percentage	  */
-    int	 Twr;		/* Write Recovery	  */
-    int	 CL;		/* CAS Latency		  */
-    int	 Tr2w;		/* Read to Write Delay	  */
-    int	 Rloop;		/* Loop Latency		  */
-    int	 Rloop_fudge;	/* Add to ML to get Rloop */
+typedef struct {        /* All values in XCLKS    */
+    int  ML;            /* Memory Read Latency    */
+    int  MB;            /* Memory Burst Length    */
+    int  Trcd;          /* RAS to CAS delay       */
+    int  Trp;           /* RAS percentage         */
+    int  Twr;           /* Write Recovery         */
+    int  CL;            /* CAS Latency            */
+    int  Tr2w;          /* Read to Write Delay    */
+    int  Rloop;         /* Loop Latency           */
+    int  Rloop_fudge;   /* Add to ML to get Rloop */
     char *name;
 } RADEONRAMRec, *RADEONRAMPtr;
 
@@ -175,8 +177,8 @@ typedef struct {
 				/* Computed values for PLL */
     CARD32     dot_clock_freq;
     CARD32     pll_output_freq;
-    int	       feedback_div;
-    int	       post_div;
+    int        feedback_div;
+    int        post_div;
 
 				/* PLL registers */
     CARD32     ppll_ref_div;
@@ -193,214 +195,214 @@ typedef struct {
 } RADEONSaveRec, *RADEONSavePtr;
 
 typedef struct {
-    CARD16	  reference_freq;
-    CARD16	  reference_div;
-    CARD32	  min_pll_freq;
-    CARD32	  max_pll_freq;
-    CARD16	  xclk;
+    CARD16        reference_freq;
+    CARD16        reference_div;
+    CARD32        min_pll_freq;
+    CARD32        max_pll_freq;
+    CARD16        xclk;
 } RADEONPLLRec, *RADEONPLLPtr;
 
 typedef struct {
-    int		       bitsPerPixel;
-    int		       depth;
-    int		       displayWidth;
-    int		       pixel_code;
-    int		       pixel_bytes;
+    int                bitsPerPixel;
+    int                depth;
+    int                displayWidth;
+    int                pixel_code;
+    int                pixel_bytes;
     DisplayModePtr     mode;
 } RADEONFBLayout;
 
 typedef struct {
     EntityInfoPtr     pEnt;
-    pciVideoPtr	      PciInfo;
-    PCITAG	      PciTag;
-    int		      Chipset;
-    Bool	      Primary;
+    pciVideoPtr       PciInfo;
+    PCITAG            PciTag;
+    int               Chipset;
+    Bool              Primary;
 
-    Bool	      FBDev;
+    Bool              FBDev;
 
-    unsigned long     LinearAddr; /* Frame buffer physical address	     */
-    unsigned long     MMIOAddr;	  /* MMIO region physical address	     */
-    unsigned long     BIOSAddr;	  /* BIOS physical address		     */
-    Bool	      BIOSFromPCI; /* BIOS is read from PCI space	     */
+    unsigned long     LinearAddr; /* Frame buffer physical address           */
+    unsigned long     MMIOAddr;   /* MMIO region physical address            */
+    unsigned long     BIOSAddr;   /* BIOS physical address                   */
+    Bool              BIOSFromPCI; /* BIOS is read from PCI space            */
 
-    unsigned char     *MMIO;	  /* Map of MMIO region			     */
-    unsigned char     *FB;	  /* Map of frame buffer		     */
-    CARD8	      *VBIOS;	  /* Video BIOS pointer			     */
+    unsigned char     *MMIO;      /* Map of MMIO region                      */
+    unsigned char     *FB;        /* Map of frame buffer                     */
+    CARD8             *VBIOS;     /* Video BIOS pointer                      */
 
-    CARD32	      MemCntl;
-    CARD32	      BusCntl;
-    unsigned long     FbMapSize;  /* Size of frame buffer, in bytes	     */
-    int		      Flags;	  /* Saved copy of mode flags		     */
+    CARD32            MemCntl;
+    CARD32            BusCntl;
+    unsigned long     FbMapSize;  /* Size of frame buffer, in bytes          */
+    int               Flags;      /* Saved copy of mode flags                */
 
 #ifdef ENABLE_FLAT_PANEL
-    Bool	      HasPanelRegs; /* Current chip can connect to a FP	     */
-    Bool	      CRTOnly;	    /* Only use External CRT instead of FP   */
-    int		      FPBIOSstart;  /* Start of the flat panel info	     */
+    Bool              HasPanelRegs; /* Current chip can connect to a FP      */
+    Bool              CRTOnly;      /* Only use External CRT instead of FP   */
+    int               FPBIOSstart;  /* Start of the flat panel info          */
 
 				/* Computed values for FPs */
-    int		      PanelXRes;
-    int		      PanelYRes;
-    int		      PanelPwrDly;
+    int               PanelXRes;
+    int               PanelYRes;
+    int               PanelPwrDly;
 #endif
 
-    RADEONPLLRec	pll;
-    RADEONRAMPtr	ram;
+    RADEONPLLRec        pll;
+    RADEONRAMPtr        ram;
 
-    RADEONSaveRec	SavedReg;	  /* Original (text) mode		     */
-    RADEONSaveRec	ModeReg;	  /* Current mode			     */
-    Bool	      (*CloseScreen)(int, ScreenPtr);
+    RADEONSaveRec       SavedReg;         /* Original (text) mode                    */
+    RADEONSaveRec       ModeReg;          /* Current mode                            */
+    Bool              (*CloseScreen)(int, ScreenPtr);
 
-    Bool	      PaletteSavedOnVT; /* Palette saved on last VT switch   */
+    Bool              PaletteSavedOnVT; /* Palette saved on last VT switch   */
 
     XAAInfoRecPtr     accel;
-    Bool	      accelOn;
+    Bool              accelOn;
     xf86CursorInfoPtr cursor;
     unsigned long     cursor_start;
     unsigned long     cursor_end;
 
-    int		      fifo_slots; /* Free slots in the FIFO (64 max)	     */
-    int		      pix24bpp;	  /* Depth of pixmap for 24bpp framebuffer   */
-    Bool	      dac6bits;	  /* Use 6 bit DAC?			     */
+    int               fifo_slots; /* Free slots in the FIFO (64 max)         */
+    int               pix24bpp;   /* Depth of pixmap for 24bpp framebuffer   */
+    Bool              dac6bits;   /* Use 6 bit DAC?                          */
 
 				/* Computed values for Radeon */
-    int		      pitch;
-    int		      datatype;
-    CARD32	      dp_gui_master_cntl;
+    int               pitch;
+    int               datatype;
+    CARD32            dp_gui_master_cntl;
 
 				/* Saved values for ScreenToScreenCopy */
-    int		      xdir;
-    int		      ydir;
+    int               xdir;
+    int               ydir;
 
 				/* ScanlineScreenToScreenColorExpand support */
     unsigned char     *scratch_buffer[1];
     unsigned char     *scratch_save;
-    int		      scanline_x;
-    int		      scanline_y;
-    int		      scanline_h;
-    int		      scanline_h_w;
-    int		      scanline_words;
-    int		      scanline_direct;
-    int		      scanline_bpp; /* Only used for ImageWrite */
-
-    DGAModePtr	      DGAModes;
-    int		      numDGAModes;
-    Bool	      DGAactive;
-    int		      DGAViewportStatus;
-
-    RADEONFBLayout	CurrentLayout;
+    int               scanline_x;
+    int               scanline_y;
+    int               scanline_h;
+    int               scanline_h_w;
+    int               scanline_words;
+    int               scanline_direct;
+    int               scanline_bpp; /* Only used for ImageWrite */
+
+    DGAModePtr        DGAModes;
+    int               numDGAModes;
+    Bool              DGAactive;
+    int               DGAViewportStatus;
+
+    RADEONFBLayout      CurrentLayout;
 #ifdef XF86DRI
-    Bool	      directRenderingEnabled;
-    DRIInfoPtr	      pDRIInfo;
-    int		      drmFD;
-    int		      numVisualConfigs;
+    Bool              directRenderingEnabled;
+    DRIInfoPtr        pDRIInfo;
+    int               drmFD;
+    int               numVisualConfigs;
     __GLXvisualConfig *pVisualConfigs;
     RADEONConfigPrivPtr pVisualConfigsPriv;
 
-    drmHandle	      fbHandle;
+    drmHandle         fbHandle;
 
-    drmSize	      registerSize;
-    drmHandle	      registerHandle;
+    drmSize           registerSize;
+    drmHandle         registerHandle;
 
-    Bool	      IsPCI;		/* Current card is a PCI card */
+    Bool              IsPCI;            /* Current card is a PCI card */
 
-    drmSize	      agpSize;
-    drmHandle	      agpMemHandle;	/* Handle from drmAgpAlloc */
+    drmSize           agpSize;
+    drmHandle         agpMemHandle;     /* Handle from drmAgpAlloc */
     unsigned long     agpOffset;
-    unsigned char     *AGP;		/* Map */
-    int		      agpMode;
+    unsigned char     *AGP;             /* Map */
+    int               agpMode;
 
-    Bool	      CPInUse;		/* CP is currently active */
-    int		      CPMode;		/* CP mode that server/clients use */
-    int		      CPFifoSize;	/* Size of the CP command FIFO */
-    Bool	      CPSecure;		/* CP security enabled */
-    int		      CPusecTimeout;	/* CP timeout in usecs */
-    Bool	      CP2D;		/* CP is used for X server 2D prims */
+    Bool              CPInUse;          /* CP is currently active */
+    int               CPMode;           /* CP mode that server/clients use */
+    int               CPFifoSize;       /* Size of the CP command FIFO */
+    Bool              CPSecure;         /* CP security enabled */
+    int               CPusecTimeout;    /* CP timeout in usecs */
+    Bool              CP2D;             /* CP is used for X server 2D prims */
 
 				/* CP ring buffer data */
-    unsigned long     ringStart;	/* Offset into AGP space */
-    drmHandle	      ringHandle;	/* Handle from drmAddMap */
-    drmSize	      ringMapSize;	/* Size of map */
-    int		      ringSize;		/* Size of ring (in MB) */
-    unsigned char     *ring;		/* Map */
-    int		      ringSizeLog2QW;
-
-    unsigned long     ringReadOffset;	/* Offset into AGP space */
-    drmHandle	      ringReadPtrHandle; /* Handle from drmAddMap */
-    drmSize	      ringReadMapSize;	/* Size of map */
-    unsigned char     *ringReadPtr;	/* Map */
+    unsigned long     ringStart;        /* Offset into AGP space */
+    drmHandle         ringHandle;       /* Handle from drmAddMap */
+    drmSize           ringMapSize;      /* Size of map */
+    int               ringSize;         /* Size of ring (in MB) */
+    unsigned char     *ring;            /* Map */
+    int               ringSizeLog2QW;
+
+    unsigned long     ringReadOffset;   /* Offset into AGP space */
+    drmHandle         ringReadPtrHandle; /* Handle from drmAddMap */
+    drmSize           ringReadMapSize;  /* Size of map */
+    unsigned char     *ringReadPtr;     /* Map */
 
 				/* CP vertex buffer data */
-    unsigned long     vbStart;		/* Offset into AGP space */
-    drmHandle	      vbHandle;		/* Handle from drmAddMap */
-    drmSize	      vbMapSize;	/* Size of map */
-    int		      vbSize;		/* Size of vert bufs (in MB) */
-    unsigned char     *vb;		/* Map */
-    int		      vbBufSize;	/* Size of individual vert buf */
-    int		      vbNumBufs;	/* Number of vert bufs */
-    drmBufMapPtr      vbBufs;		/* Buffer map */
+    unsigned long     vbStart;          /* Offset into AGP space */
+    drmHandle         vbHandle;         /* Handle from drmAddMap */
+    drmSize           vbMapSize;        /* Size of map */
+    int               vbSize;           /* Size of vert bufs (in MB) */
+    unsigned char     *vb;              /* Map */
+    int               vbBufSize;        /* Size of individual vert buf */
+    int               vbNumBufs;        /* Number of vert bufs */
+    drmBufMapPtr      vbBufs;           /* Buffer map */
 
 				/* CP indirect buffer data */
-    unsigned long     indStart;		/* Offset into AGP space */
-    drmHandle	      indHandle;	/* Handle from drmAddMap */
-    drmSize	      indMapSize;	/* Size of map */
-    int		      indSize;		/* Size of indirect bufs (in MB) */
-    unsigned char     *ind;		/* Map */
+    unsigned long     indStart;         /* Offset into AGP space */
+    drmHandle         indHandle;        /* Handle from drmAddMap */
+    drmSize           indMapSize;       /* Size of map */
+    int               indSize;          /* Size of indirect bufs (in MB) */
+    unsigned char     *ind;             /* Map */
 
 				/* CP AGP Texture data */
-    unsigned long     agpTexStart;	/* Offset into AGP space */
-    drmHandle	      agpTexHandle;	/* Handle from drmAddMap */
-    drmSize	      agpTexMapSize;	/* Size of map */
-    int		      agpTexSize;	/* Size of AGP tex space (in MB) */
-    unsigned char     *agpTex;		/* Map */
-    int		      log2AGPTexGran;
+    unsigned long     agpTexStart;      /* Offset into AGP space */
+    drmHandle         agpTexHandle;     /* Handle from drmAddMap */
+    drmSize           agpTexMapSize;    /* Size of map */
+    int               agpTexSize;       /* Size of AGP tex space (in MB) */
+    unsigned char     *agpTex;          /* Map */
+    int               log2AGPTexGran;
 
 				/* DRI screen private data */
-    int		      fbX;
-    int		      fbY;
-    int		      backX;
-    int		      backY;
-    int		      depthX;
-    int		      depthY;
-    int		      textureX;
-    int		      textureY;
-    int		      textureSize;
-    int		      log2TexGran;
+    int               fbX;
+    int               fbY;
+    int               backX;
+    int               backY;
+    int               depthX;
+    int               depthY;
+    int               textureX;
+    int               textureY;
+    int               textureSize;
+    int               log2TexGran;
 #endif
     XF86VideoAdaptorPtr adaptor;
 } RADEONInfoRec, *RADEONInfoPtr;
 
-#define RADEONWaitForFifo(pScrn, entries)				     \
-do {									     \
-    if (info->fifo_slots < entries)					     \
-	RADEONWaitForFifoFunction(pScrn, entries);			     \
-    info->fifo_slots -= entries;					     \
+#define RADEONWaitForFifo(pScrn, entries)                                    \
+do {                                                                         \
+    if (info->fifo_slots < entries)                                          \
+	RADEONWaitForFifoFunction(pScrn, entries);                           \
+    info->fifo_slots -= entries;                                             \
 } while (0)
 
-extern void	   RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
-extern void	   RADEONWaitForIdle(ScrnInfoPtr pScrn);
-extern void	   RADEONEngineReset(ScrnInfoPtr pScrn);
-extern void	   RADEONEngineFlush(ScrnInfoPtr pScrn);
+extern void        RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
+extern void        RADEONWaitForIdle(ScrnInfoPtr pScrn);
+extern void        RADEONEngineReset(ScrnInfoPtr pScrn);
+extern void        RADEONEngineFlush(ScrnInfoPtr pScrn);
 
-extern unsigned	   RADEONINPLL(ScrnInfoPtr pScrn, int addr);
-extern void	   RADEONWaitForVerticalSync(ScrnInfoPtr pScrn);
+extern int         RADEONINPLL(ScrnInfoPtr pScrn, int addr);
+extern void        RADEONWaitForVerticalSync(ScrnInfoPtr pScrn);
 
-extern Bool	   RADEONAccelInit(ScreenPtr pScreen);
-extern void	   RADEONEngineInit(ScrnInfoPtr pScrn);
-extern Bool	   RADEONCursorInit(ScreenPtr pScreen);
-extern Bool	   RADEONDGAInit(ScreenPtr pScreen);
+extern Bool        RADEONAccelInit(ScreenPtr pScreen);
+extern void        RADEONEngineInit(ScrnInfoPtr pScrn);
+extern Bool        RADEONCursorInit(ScreenPtr pScreen);
+extern Bool        RADEONDGAInit(ScreenPtr pScreen);
 
-extern int	   RADEONMinBits(int val);
+extern int         RADEONMinBits(int val);
 
-extern void	   RADEONInitVideo(ScreenPtr);
+extern void        RADEONInitVideo(ScreenPtr);
 
 #ifdef XF86DRI
-extern Bool	   RADEONDRIScreenInit(ScreenPtr pScreen);
-extern void	   RADEONDRICloseScreen(ScreenPtr pScreen);
-extern Bool	   RADEONDRIFinishScreenInit(ScreenPtr pScreen);
-extern void	   RADEONCPStart(ScrnInfoPtr pScrn);
-extern void	   RADEONCPStop(ScrnInfoPtr pScrn);
-extern void	   RADEONCPResetRing(ScrnInfoPtr pScrn);
-extern void	   RADEONCPWaitForIdle(ScrnInfoPtr pScrn);
+extern Bool        RADEONDRIScreenInit(ScreenPtr pScreen);
+extern void        RADEONDRICloseScreen(ScreenPtr pScreen);
+extern Bool        RADEONDRIFinishScreenInit(ScreenPtr pScreen);
+extern void        RADEONCPStart(ScrnInfoPtr pScrn);
+extern void        RADEONCPStop(ScrnInfoPtr pScrn);
+extern void        RADEONCPResetRing(ScrnInfoPtr pScrn);
+extern void        RADEONCPWaitForIdle(ScrnInfoPtr pScrn);
 #endif
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
index 985137eb3..acc7cc235 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
@@ -1,28 +1,30 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c,v 1.2 2000/11/03 09:52:54 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c,v 1.3 2000/11/09 03:24:36 martin Exp $ */
 /*
- * Copyright 2000 ATI Technologies Inc., Markham, Ontario
- *	      and VA Linux Systems, Inc., Sunnyvale, California.
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
  */
 
 /*
@@ -34,7 +36,7 @@
  * Credits:
  *
  *   Thanks to Ani Joshi <ajoshi@shell.unixbox.com> for providing source
- *   code to his Radeon driver.	 Portions of this file are based on the
+ *   code to his Radeon driver.  Portions of this file are based on the
  *   initialization code for that driver.
  *
  * References:
@@ -50,25 +52,25 @@
  * Notes on unimplemented XAA optimizations:
  *
  *   SetClipping:   This has been removed as XAA expects 16bit registers
- *		    for full clipping.
+ *                  for full clipping.
  *   TwoPointLine:  The Radeon supports this. Not Bresenham.
  *   DashedLine with non-power-of-two pattern length: Apparently, there is
- *		    no way to set the length of the pattern -- it is always
- *		    assumed to be 8 or 32 (or 1024?).
+ *                  no way to set the length of the pattern -- it is always
+ *                  assumed to be 8 or 32 (or 1024?).
  *   ScreenToScreenColorExpandFill: See p. 4-17 of the Technical Reference
- *		    Manual where it states that monochrome expansion of frame
- *		    buffer data is not supported.
+ *                  Manual where it states that monochrome expansion of frame
+ *                  buffer data is not supported.
  *   CPUToScreenColorExpandFill, direct: The implementation here uses a hybrid
- *		    direct/indirect method.  If we had more data registers,
- *		    then we could do better.  If XAA supported a trigger write
- *		    address, the code would be simpler.
+ *                  direct/indirect method.  If we had more data registers,
+ *                  then we could do better.  If XAA supported a trigger write
+ *                  address, the code would be simpler.
  *   Color8x8PatternFill: Apparently, an 8x8 color brush cannot take an 8x8
- *		    pattern from frame buffer memory.
+ *                  pattern from frame buffer memory.
  *   ImageWrites:   Same as CPUToScreenColorExpandFill
  *
  */
 
-#define RADEON_IMAGEWRITE 0	/* Turned off by default - slower in accel */
+#define RADEON_IMAGEWRITE 0     /* Turned off by default - slower in accel */
 
 				/* X and server generic header files */
 #include "Xarch.h"
@@ -88,30 +90,30 @@ static struct {
     int rop;
     int pattern;
 } RADEON_ROP[] = {
-    { RADEON_ROP3_ZERO, RADEON_ROP3_ZERO }, /* GXclear	      */
-    { RADEON_ROP3_DSa,	RADEON_ROP3_DPa	 }, /* Gxand	      */
+    { RADEON_ROP3_ZERO, RADEON_ROP3_ZERO }, /* GXclear        */
+    { RADEON_ROP3_DSa,  RADEON_ROP3_DPa  }, /* Gxand          */
     { RADEON_ROP3_SDna, RADEON_ROP3_PDna }, /* GXandReverse   */
-    { RADEON_ROP3_S,	RADEON_ROP3_P	 }, /* GXcopy	      */
+    { RADEON_ROP3_S,    RADEON_ROP3_P    }, /* GXcopy         */
     { RADEON_ROP3_DSna, RADEON_ROP3_DPna }, /* GXandInverted  */
-    { RADEON_ROP3_D,	RADEON_ROP3_D	 }, /* GXnoop	      */
-    { RADEON_ROP3_DSx,	RADEON_ROP3_DPx	 }, /* GXxor	      */
-    { RADEON_ROP3_DSo,	RADEON_ROP3_DPo	 }, /* GXor	      */
-    { RADEON_ROP3_DSon, RADEON_ROP3_DPon }, /* GXnor	      */
-    { RADEON_ROP3_DSxn, RADEON_ROP3_PDxn }, /* GXequiv	      */
-    { RADEON_ROP3_Dn,	RADEON_ROP3_Dn	 }, /* GXinvert	      */
+    { RADEON_ROP3_D,    RADEON_ROP3_D    }, /* GXnoop         */
+    { RADEON_ROP3_DSx,  RADEON_ROP3_DPx  }, /* GXxor          */
+    { RADEON_ROP3_DSo,  RADEON_ROP3_DPo  }, /* GXor           */
+    { RADEON_ROP3_DSon, RADEON_ROP3_DPon }, /* GXnor          */
+    { RADEON_ROP3_DSxn, RADEON_ROP3_PDxn }, /* GXequiv        */
+    { RADEON_ROP3_Dn,   RADEON_ROP3_Dn   }, /* GXinvert       */
     { RADEON_ROP3_SDno, RADEON_ROP3_PDno }, /* GXorReverse    */
-    { RADEON_ROP3_Sn,	RADEON_ROP3_Pn	 }, /* GXcopyInverted */
+    { RADEON_ROP3_Sn,   RADEON_ROP3_Pn   }, /* GXcopyInverted */
     { RADEON_ROP3_DSno, RADEON_ROP3_DPno }, /* GXorInverted   */
-    { RADEON_ROP3_DSan, RADEON_ROP3_DPan }, /* GXnand	      */
-    { RADEON_ROP3_ONE,	RADEON_ROP3_ONE	 }  /* GXset	      */
+    { RADEON_ROP3_DSan, RADEON_ROP3_DPan }, /* GXnand         */
+    { RADEON_ROP3_ONE,  RADEON_ROP3_ONE  }  /* GXset          */
 };
 
 /* Flush all dirty data in the Pixel Cache to memory. */
 void RADEONEngineFlush(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     OUTREGP(RADEON_RB2D_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL,
 						~RADEON_RB2D_DC_FLUSH_ALL);
@@ -123,16 +125,16 @@ void RADEONEngineFlush(ScrnInfoPtr pScrn)
 /* Reset graphics card to known state. */
 void RADEONEngineReset(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    CARD32	  clock_cntl_index;
-    CARD32	  mclk_cntl;
-    CARD32	  rbbm_soft_reset;
+    CARD32        clock_cntl_index;
+    CARD32        mclk_cntl;
+    CARD32        rbbm_soft_reset;
 
     RADEONEngineFlush(pScrn);
 
     clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX);
-    mclk_cntl	     = INPLL(pScrn, RADEON_MCLK_CNTL);
+    mclk_cntl        = INPLL(pScrn, RADEON_MCLK_CNTL);
 
     OUTPLL(RADEON_MCLK_CNTL, (mclk_cntl | 0x003f0000));
 
@@ -159,7 +161,7 @@ void RADEONEngineReset(ScrnInfoPtr pScrn)
 				   RADEON_SOFT_RESET_HDP));
     INREG(RADEON_RBBM_SOFT_RESET);
 
-    OUTPLL(RADEON_MCLK_CNTL,	    mclk_cntl);
+    OUTPLL(RADEON_MCLK_CNTL,        mclk_cntl);
     OUTREG(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index);
     OUTREG(RADEON_RBBM_SOFT_RESET,  rbbm_soft_reset);
 
@@ -172,9 +174,9 @@ void RADEONEngineReset(ScrnInfoPtr pScrn)
    these slots are empty. */
 void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     for (;;) {
 	for (i = 0; i < RADEON_TIMEOUT; i++) {
@@ -187,7 +189,7 @@ void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
 		     INREG(RADEON_RBBM_STATUS)));
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		   "FIFO timed out, resetting engine...\n");
-	RADEONEngineReset(pScrn);
+	RADEONEngineInit(pScrn);
 #ifdef XF86DRI
 	if (info->CP2D) RADEONCPStart(pScrn);
 #endif
@@ -195,13 +197,13 @@ void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
 }
 
 /* Wait for the graphics engine to be completely idle: the FIFO has
-   drained, the Pixel Cache is flushed, and the engine is idle.	 This is a
+   drained, the Pixel Cache is flushed, and the engine is idle.  This is a
    standard "sync" function that will make the hardware "quiescent". */
 void RADEONWaitForIdle(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     RADEONTRACE(("WaitForIdle (entering): %d entries, stat=0x%08x\n",
 		     INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK,
@@ -221,7 +223,7 @@ void RADEONWaitForIdle(ScrnInfoPtr pScrn)
 		     INREG(RADEON_RBBM_STATUS)));
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		   "Idle timed out, resetting engine...\n");
-	RADEONEngineReset(pScrn);
+	RADEONEngineInit(pScrn);
 #ifdef XF86DRI
 	if (info->CP2D) RADEONCPStart(pScrn);
 #endif
@@ -232,7 +234,7 @@ void RADEONWaitForIdle(ScrnInfoPtr pScrn)
 static void RADEONSetupForSolidFill(ScrnInfoPtr pScrn,
 				    int color, int rop, unsigned int planemask)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     RADEONWaitForFifo(pScrn, 4);
@@ -242,7 +244,7 @@ static void RADEONSetupForSolidFill(ScrnInfoPtr pScrn,
 				       | RADEON_ROP[rop].pattern));
     OUTREG(RADEON_DP_BRUSH_FRGD_CLR,  color);
     OUTREG(RADEON_DP_WRITE_MASK,      planemask);
-    OUTREG(RADEON_DP_CNTL,	      (RADEON_DST_X_LEFT_TO_RIGHT
+    OUTREG(RADEON_DP_CNTL,            (RADEON_DST_X_LEFT_TO_RIGHT
 				       | RADEON_DST_Y_TOP_TO_BOTTOM));
 }
 
@@ -253,11 +255,11 @@ static void RADEONSetupForSolidFill(ScrnInfoPtr pScrn,
 static void  RADEONSubsequentSolidFillRect(ScrnInfoPtr pScrn,
 					   int x, int y, int w, int h)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     RADEONWaitForFifo(pScrn, 2);
-    OUTREG(RADEON_DST_Y_X,	    (y << 16) | x);
+    OUTREG(RADEON_DST_Y_X,          (y << 16) | x);
     OUTREG(RADEON_DST_WIDTH_HEIGHT, (w << 16) | h);
 }
 
@@ -265,7 +267,7 @@ static void  RADEONSubsequentSolidFillRect(ScrnInfoPtr pScrn,
 static void RADEONSetupForSolidLine(ScrnInfoPtr pScrn,
 				    int color, int rop, unsigned int planemask)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     RADEONWaitForFifo(pScrn, 3);
@@ -286,29 +288,29 @@ static void RADEONSetupForSolidLine(ScrnInfoPtr pScrn,
    Mark Vojkovich's linetest program, posted 2Jun99 to devel@xfree86.org.]
 */
 static void RADEONSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn,
-					      int xa, int ya, int xb, int yb,
+					      int x1, int y1, int x2, int y2,
 					      int flags)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int direction = 0;
+    int           direction   = 0;
 
-    if (xa < xb) direction |= RADEON_DST_X_DIR_LEFT_TO_RIGHT;
-    if (ya < yb) direction |= RADEON_DST_Y_DIR_TOP_TO_BOTTOM;
+    if (x1 < x2) direction |= RADEON_DST_X_DIR_LEFT_TO_RIGHT;
+    if (y1 < y2) direction |= RADEON_DST_Y_DIR_TOP_TO_BOTTOM;
 
     RADEONWaitForFifo(pScrn, 4);
-    OUTREG(RADEON_DST_Y_X,		    (ya << 16) | xa);
+    OUTREG(RADEON_DST_Y_X,                  (y1 << 16) | x1);
     if (!(flags & OMIT_LAST))
 	OUTREG(RADEON_DP_CNTL_XDIR_YDIR_YMAJOR, direction);
-    OUTREG(RADEON_DST_LINE_START,	    (ya << 16) | xa);
-    OUTREG(RADEON_DST_LINE_END,		    (yb << 16) | xb);
+    OUTREG(RADEON_DST_LINE_START,           (y1 << 16) | x1);
+    OUTREG(RADEON_DST_LINE_END,             (y2 << 16) | x2);
 }
 
 /* Subsequent XAA solid horizontal and vertical lines */
 static void RADEONSubsequentSolidHorVertLine(ScrnInfoPtr pScrn,
 					     int x, int y, int len, int dir )
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     RADEONWaitForFifo(pScrn, 1);
@@ -334,14 +336,14 @@ static void RADEONSetupForDashedLine(ScrnInfoPtr pScrn,
 				     int rop, unsigned int planemask,
 				     int length, unsigned char *pattern)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    CARD32	  pat	      = *(CARD32 *)pattern;
+    CARD32        pat         = *(CARD32 *)pattern;
 
     switch (length) {
-    case  2: pat |= pat <<  2;	/* fall through */
-    case  4: pat |= pat <<  4;	/* fall through */
-    case  8: pat |= pat <<  8;	/* fall through */
+    case  2: pat |= pat <<  2;  /* fall through */
+    case  4: pat |= pat <<  4;  /* fall through */
+    case  8: pat |= pat <<  8;  /* fall through */
     case 16: pat |= pat << 16;
     }
 
@@ -355,30 +357,30 @@ static void RADEONSetupForDashedLine(ScrnInfoPtr pScrn,
     OUTREG(RADEON_DP_WRITE_MASK,      planemask);
     OUTREG(RADEON_DP_BRUSH_FRGD_CLR,  fg);
     OUTREG(RADEON_DP_BRUSH_BKGD_CLR,  bg);
-    OUTREG(RADEON_BRUSH_DATA0,	      pat);
+    OUTREG(RADEON_BRUSH_DATA0,        pat);
 }
 
 /* Subsequent XAA dashed line. */
 static void RADEONSubsequentDashedTwoPointLine(ScrnInfoPtr pScrn,
-						int xa, int ya,
-						int xb, int yb,
+						int x1, int y1,
+						int x2, int y2,
 						int flags,
 						int phase)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int direction = 0;
+    int           direction   = 0;
 
-    if (xa < xb) direction |= RADEON_DST_X_DIR_LEFT_TO_RIGHT;
-    if (ya < yb) direction |= RADEON_DST_Y_DIR_TOP_TO_BOTTOM;
+    if (x1 < x2) direction |= RADEON_DST_X_DIR_LEFT_TO_RIGHT;
+    if (y1 < y2) direction |= RADEON_DST_Y_DIR_TOP_TO_BOTTOM;
 
     RADEONWaitForFifo(pScrn, 5);
     if (!(flags & OMIT_LAST))
 	OUTREG(RADEON_DP_CNTL_XDIR_YDIR_YMAJOR, direction);
-    OUTREG(RADEON_DST_Y_X,	    (ya << 16) | xa);
-    OUTREG(RADEON_BRUSH_Y_X,	    (phase << 16) | phase);
-    OUTREG(RADEON_DST_LINE_START,   (ya << 16) | xa);
-    OUTREG(RADEON_DST_LINE_END,	    (yb << 16) | xb);
+    OUTREG(RADEON_DST_Y_X,          (y1 << 16) | x1);
+    OUTREG(RADEON_BRUSH_Y_X,        (phase << 16) | phase);
+    OUTREG(RADEON_DST_LINE_START,   (y1 << 16) | x1);
+    OUTREG(RADEON_DST_LINE_END,     (y2 << 16) | x2);
 }
 
 /* Setup for XAA screen-to-screen copy.
@@ -390,7 +392,7 @@ static void RADEONSetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
 					     unsigned int planemask,
 					     int trans_color)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     info->xdir = xdir;
@@ -402,7 +404,7 @@ static void RADEONSetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
 				       | RADEON_ROP[rop].rop
 				       | RADEON_DP_SRC_SOURCE_MEMORY));
     OUTREG(RADEON_DP_WRITE_MASK,      planemask);
-    OUTREG(RADEON_DP_CNTL,	      ((xdir >= 0
+    OUTREG(RADEON_DP_CNTL,            ((xdir >= 0
 					? RADEON_DST_X_LEFT_TO_RIGHT
 					: 0)
 				       | (ydir >= 0
@@ -424,35 +426,35 @@ static void RADEONSetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
 
 /* Subsequent XAA screen-to-screen copy. */
 static void RADEONSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn,
-					       int xa, int ya,
-					       int xb, int yb,
+					       int x1, int y1,
+					       int x2, int y2,
 					       int w, int h)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
-    if (info->xdir < 0) xa += w - 1, xb += w - 1;
-    if (info->ydir < 0) ya += h - 1, yb += h - 1;
+    if (info->xdir < 0) x1 += w - 1, x2 += w - 1;
+    if (info->ydir < 0) y1 += h - 1, y2 += h - 1;
 
     RADEONWaitForFifo(pScrn, 3);
-    OUTREG(RADEON_SRC_Y_X,	    (ya << 16) | xa);
-    OUTREG(RADEON_DST_Y_X,	    (yb << 16) | xb);
+    OUTREG(RADEON_SRC_Y_X,          (y1 << 16) | x1);
+    OUTREG(RADEON_DST_Y_X,          (y2 << 16) | x2);
     OUTREG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w);
 }
 
 /* Setup for XAA mono 8x8 pattern color expansion.  Patterns with
-   transparency use `bg == -1'.	 This routine is only used if the XAA
+   transparency use `bg == -1'.  This routine is only used if the XAA
    pixmap cache is turned on.
 
    Tests: xtest XFree86/fllrctngl (no other test will test this routine with
-				   both transparency and non-transparency)
+                                   both transparency and non-transparency)
 */
 static void RADEONSetupForMono8x8PatternFill(ScrnInfoPtr pScrn,
 					     int patternx, int patterny,
 					     int fg, int bg, int rop,
 					     unsigned int planemask)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     RADEONWaitForFifo(pScrn, 6);
@@ -465,22 +467,22 @@ static void RADEONSetupForMono8x8PatternFill(ScrnInfoPtr pScrn,
     OUTREG(RADEON_DP_WRITE_MASK,      planemask);
     OUTREG(RADEON_DP_BRUSH_FRGD_CLR,  fg);
     OUTREG(RADEON_DP_BRUSH_BKGD_CLR,  bg);
-    OUTREG(RADEON_BRUSH_DATA0,	      patternx);
-    OUTREG(RADEON_BRUSH_DATA1,	      patterny);
+    OUTREG(RADEON_BRUSH_DATA0,        patternx);
+    OUTREG(RADEON_BRUSH_DATA1,        patterny);
 }
 
-/* Subsequent XAA 8x8 pattern color expansion.	Because they are used in
+/* Subsequent XAA 8x8 pattern color expansion.  Because they are used in
    the setup function, `patternx' and `patterny' are not used here. */
 static void RADEONSubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn,
 						   int patternx, int patterny,
 						   int x, int y, int w, int h)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     RADEONWaitForFifo(pScrn, 3);
-    OUTREG(RADEON_BRUSH_Y_X,	    (patterny << 8) | patternx);
-    OUTREG(RADEON_DST_Y_X,	    (y << 16) | x);
+    OUTREG(RADEON_BRUSH_Y_X,        (patterny << 8) | patternx);
+    OUTREG(RADEON_DST_Y_X,          (y << 16) | x);
     OUTREG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w);
 }
 
@@ -494,7 +496,7 @@ static void RADEONSetupForColor8x8PatternFill(ScrnInfoPtr pScrn,
 					      int rop, unsigned int planemask,
 					      int trans_color)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     ErrorF("Color8x8 %d %d %d\n", trans_color, patx, paty);
@@ -526,7 +528,7 @@ static void RADEONSubsequentColor8x8PatternFillRect(ScrnInfoPtr pScrn,
 						    int patx, int paty,
 						    int x, int y, int w, int h)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     ErrorF("Color8x8 %d,%d %d,%d %d %d\n", patx, paty, x, y, w, h);
@@ -540,7 +542,7 @@ static void RADEONSubsequentColor8x8PatternFillRect(ScrnInfoPtr pScrn,
 
 /* Setup for XAA indirect CPU-to-screen color expansion (indirect).
    Because of how the scratch buffer is initialized, this is really a
-   mainstore-to-screen color expansion.	 Transparency is supported when `bg
+   mainstore-to-screen color expansion.  Transparency is supported when `bg
    == -1'.
    Implementing the hybrid indirect/direct scheme improved performance in a
    few areas:
@@ -551,7 +553,7 @@ static void RADEONSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
 							     unsigned int
 							     planemask)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     RADEONWaitForFifo(pScrn, 4);
@@ -577,10 +579,10 @@ static void RADEONSubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr
 							       int w, int h,
 							       int skipleft)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
-    info->scanline_h	  = h;
+    info->scanline_h      = h;
     info->scanline_words  = (w + 31) >> 5;
 
     if ((info->scanline_words * h) <= 9) {
@@ -591,29 +593,29 @@ static void RADEONSubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr
 	info->scanline_direct = 1;
     } else {
 	/* Use indirect for anything else */
-	info->scratch_buffer[0]		   = info->scratch_save;
+	info->scratch_buffer[0]            = info->scratch_save;
 	info->scanline_direct = 0;
     }
 
     RADEONWaitForFifo(pScrn, 4 + (info->scanline_direct ?
 					(info->scanline_words * h) : 0) );
-    OUTREG(RADEON_SC_TOP_LEFT,	    (y << 16)	    | ((x+skipleft) & 0xffff));
+    OUTREG(RADEON_SC_TOP_LEFT,      (y << 16)       | ((x+skipleft) & 0xffff));
     /* MMmm, we don't need the -1 on both y+h or x+w, why ? */
     OUTREG(RADEON_SC_BOTTOM_RIGHT,  ((y+h) << 16)   | ((x+w) & 0xffff));
-    OUTREG(RADEON_DST_Y_X,	    (y << 16)	    | (x & 0xffff));
+    OUTREG(RADEON_DST_Y_X,          (y << 16)       | (x & 0xffff));
     /* Have to pad the width here and use clipping engine */
-    OUTREG(RADEON_DST_HEIGHT_WIDTH, (h << 16)	    | ((w + 31) & ~31));
+    OUTREG(RADEON_DST_HEIGHT_WIDTH, (h << 16)       | ((w + 31) & ~31));
 }
 
 /* Subsequent XAA indirect CPU-to-screen color expandion.  This is called
    once for each scanline. */
 static void RADEONSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
 {
-    RADEONInfoPtr   info	= RADEONPTR(pScrn);
+    RADEONInfoPtr   info        = RADEONPTR(pScrn);
     unsigned char   *RADEONMMIO = info->MMIO;
-    CARD32	    *p		= (CARD32 *)info->scratch_buffer[bufno];
-    int		    i;
-    int		    left	= info->scanline_words;
+    CARD32          *p          = (CARD32 *)info->scratch_buffer[bufno];
+    int             i;
+    int             left        = info->scanline_words;
     volatile CARD32 *d;
 
     if (info->scanline_direct) return;
@@ -652,7 +654,7 @@ static void RADEONSetupForScanlineImageWrite(ScrnInfoPtr pScrn,
 					     int bpp,
 					     int depth)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     info->scanline_bpp = bpp;
@@ -687,14 +689,14 @@ static void RADEONSubsequentScanlineImageWriteRect(ScrnInfoPtr pScrn,
 						   int w, int h,
 						   int skipleft)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
     int shift = 0; /* 32bpp */
 
     if (pScrn->bitsPerPixel == 8) shift = 3;
     else if (pScrn->bitsPerPixel == 16) shift = 1;
 
-    info->scanline_h	  = h;
+    info->scanline_h      = h;
     info->scanline_words  = (w * info->scanline_bpp + 31) >> 5;
 
     if ((info->scanline_words * h) <= 9) {
@@ -705,29 +707,29 @@ static void RADEONSubsequentScanlineImageWriteRect(ScrnInfoPtr pScrn,
 	info->scanline_direct = 1;
     } else {
 	/* Use indirect for anything else */
-	info->scratch_buffer[0]		   = info->scratch_save;
+	info->scratch_buffer[0]            = info->scratch_save;
 	info->scanline_direct = 0;
     }
 
     RADEONWaitForFifo(pScrn, 4 + (info->scanline_direct ?
 					(info->scanline_words * h) : 0) );
-    OUTREG(RADEON_SC_TOP_LEFT,	    (y << 16)	    | ((x+skipleft) & 0xffff));
+    OUTREG(RADEON_SC_TOP_LEFT,      (y << 16)       | ((x+skipleft) & 0xffff));
     /* MMmm, we don't need the -1 on both y+h or x+w, why ? */
     OUTREG(RADEON_SC_BOTTOM_RIGHT,  ((y+h) << 16)   | ((x+w) & 0xffff));
-    OUTREG(RADEON_DST_Y_X,	    (y << 16)	    | (x & 0xffff));
+    OUTREG(RADEON_DST_Y_X,          (y << 16)       | (x & 0xffff));
     /* Have to pad the width here and use clipping engine */
-    OUTREG(RADEON_DST_HEIGHT_WIDTH, (h << 16)	    | ((w + shift) & ~shift));
+    OUTREG(RADEON_DST_HEIGHT_WIDTH, (h << 16)       | ((w + shift) & ~shift));
 }
 
-/* Subsequent XAA indirect image write.	 This is called once for each
+/* Subsequent XAA indirect image write.  This is called once for each
    scanline. */
 static void RADEONSubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
 {
-    RADEONInfoPtr   info	= RADEONPTR(pScrn);
+    RADEONInfoPtr   info        = RADEONPTR(pScrn);
     unsigned char   *RADEONMMIO = info->MMIO;
-    CARD32	    *p		= (CARD32 *)info->scratch_buffer[bufno];
-    int		    i;
-    int		    left	= info->scanline_words;
+    CARD32          *p          = (CARD32 *)info->scratch_buffer[bufno];
+    int             i;
+    int             left        = info->scanline_words;
     volatile CARD32 *d;
 
     if (info->scanline_direct) return;
@@ -761,7 +763,7 @@ static void RADEONSubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
 /* Initialize the acceleration hardware. */
 void RADEONEngineInit(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
     int pitch64;
 
@@ -820,7 +822,7 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
 
     RADEONWaitForFifo(pScrn, 7);
     OUTREG(RADEON_DST_LINE_START,    0);
-    OUTREG(RADEON_DST_LINE_END,	     0);
+    OUTREG(RADEON_DST_LINE_END,      0);
     OUTREG(RADEON_DP_BRUSH_FRGD_CLR, 0xffffffff);
     OUTREG(RADEON_DP_BRUSH_BKGD_CLR, 0x00000000);
     OUTREG(RADEON_DP_SRC_FRGD_CLR,   0xffffffff);
@@ -835,13 +837,13 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
    draw 2D commands */
 static void RADEONCPAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
 {
-    a->Flags				= 0;
+    a->Flags                            = 0;
 
 				/* Sync */
 #if 1
-    a->Sync				= RADEONWaitForIdle;
+    a->Sync                             = RADEONWaitForIdle;
 #else
-    a->Sync				= RADEONCCEWaitForIdle;
+    a->Sync                             = RADEONCCEWaitForIdle;
 #endif
 
 }
@@ -851,29 +853,29 @@ static void RADEONMMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
 {
     RADEONInfoPtr info = RADEONPTR(pScrn);
 
-    a->Flags				= (PIXMAP_CACHE
+    a->Flags                            = (PIXMAP_CACHE
 					   | OFFSCREEN_PIXMAPS
 					   | LINEAR_FRAMEBUFFER);
 
 				/* Sync */
-    a->Sync				= RADEONWaitForIdle;
+    a->Sync                             = RADEONWaitForIdle;
 
 				/* Solid Filled Rectangle */
-    a->PolyFillRectSolidFlags		= 0;
-    a->SetupForSolidFill		= RADEONSetupForSolidFill;
-    a->SubsequentSolidFillRect		= RADEONSubsequentSolidFillRect;
+    a->PolyFillRectSolidFlags           = 0;
+    a->SetupForSolidFill                = RADEONSetupForSolidFill;
+    a->SubsequentSolidFillRect          = RADEONSubsequentSolidFillRect;
 
 				/* Screen-to-screen Copy */
-    a->ScreenToScreenCopyFlags		= 0;
-    a->SetupForScreenToScreenCopy	= RADEONSetupForScreenToScreenCopy;
-    a->SubsequentScreenToScreenCopy	= RADEONSubsequentScreenToScreenCopy;
+    a->ScreenToScreenCopyFlags          = 0;
+    a->SetupForScreenToScreenCopy       = RADEONSetupForScreenToScreenCopy;
+    a->SubsequentScreenToScreenCopy     = RADEONSubsequentScreenToScreenCopy;
 
 				/* Mono 8x8 Pattern Fill (Color Expand) */
     a->SetupForMono8x8PatternFill
 	= RADEONSetupForMono8x8PatternFill;
     a->SubsequentMono8x8PatternFillRect
 	= RADEONSubsequentMono8x8PatternFillRect;
-    a->Mono8x8PatternFillFlags		= (HARDWARE_PATTERN_PROGRAMMED_BITS
+    a->Mono8x8PatternFillFlags          = (HARDWARE_PATTERN_PROGRAMMED_BITS
 					   | HARDWARE_PATTERN_PROGRAMMED_ORIGIN
 					   | HARDWARE_PATTERN_SCREEN_ORIGIN
 					   | BIT_ORDER_IN_BYTE_LSBFIRST);
@@ -895,36 +897,36 @@ static void RADEONMMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
 #endif
     a->NumScanlineColorExpandBuffers   = 1;
     a->ScanlineColorExpandBuffers      = info->scratch_buffer;
-    info->scratch_save		       = xalloc(((pScrn->virtualX+31)/32*4)
+    info->scratch_save                 = xalloc(((pScrn->virtualX+31)/32*4)
 					    + (pScrn->virtualX
 					    * info->CurrentLayout.pixel_bytes));
-    info->scratch_buffer[0]	       = info->scratch_save;
+    info->scratch_buffer[0]            = info->scratch_save;
     a->SetupForScanlineCPUToScreenColorExpandFill
 	= RADEONSetupForScanlineCPUToScreenColorExpandFill;
     a->SubsequentScanlineCPUToScreenColorExpandFill
 	= RADEONSubsequentScanlineCPUToScreenColorExpandFill;
     a->SubsequentColorExpandScanline   = RADEONSubsequentColorExpandScanline;
 
-    a->SetupForSolidLine	       = RADEONSetupForSolidLine;
+    a->SetupForSolidLine               = RADEONSetupForSolidLine;
     a->SubsequentSolidTwoPointLine     = RADEONSubsequentSolidTwoPointLine;
     a->SubsequentSolidHorVertLine      = RADEONSubsequentSolidHorVertLine;
 
-    a->SetupForDashedLine	       = RADEONSetupForDashedLine;
+    a->SetupForDashedLine              = RADEONSetupForDashedLine;
     a->SubsequentDashedTwoPointLine    = RADEONSubsequentDashedTwoPointLine;
-    a->DashPatternMaxLength	       = 32;
-    a->DashedLineFlags		       = (LINE_PATTERN_LSBFIRST_LSBJUSTIFIED
+    a->DashPatternMaxLength            = 32;
+    a->DashedLineFlags                 = (LINE_PATTERN_LSBFIRST_LSBJUSTIFIED
 					  | LINE_PATTERN_POWER_OF_2_ONLY);
 
 #if RADEON_IMAGEWRITE
 				/* ImageWrite */
     a->NumScanlineImageWriteBuffers    = 1;
     a->ScanlineImageWriteBuffers       = info->scratch_buffer;
-    info->scratch_buffer[0]	       = info->scratch_save;
+    info->scratch_buffer[0]            = info->scratch_save;
     a->SetupForScanlineImageWrite      = RADEONSetupForScanlineImageWrite;
     a->SubsequentScanlineImageWriteRect
 	= RADEONSubsequentScanlineImageWriteRect;
     a->SubsequentImageWriteScanline    = RADEONSubsequentImageWriteScanline;
-    a->ScanlineImageWriteFlags		 = CPU_TRANSFER_PAD_DWORD
+    a->ScanlineImageWriteFlags           = CPU_TRANSFER_PAD_DWORD
 		/* Performance tests show that we shouldn't use GXcopy for
 		 * uploads as a memcpy is faster */
 					 | NO_GXCOPY
@@ -942,7 +944,7 @@ static void RADEONMMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
 	= RADEONSetupForColor8x8PatternFill;
     a->SubsequentColor8x8PatternFillRect
 	= RADEONSubsequentColor8x8PatternFillRect;
-    a->Color8x8PatternFillFlags		 =
+    a->Color8x8PatternFillFlags          =
 					    HARDWARE_PATTERN_PROGRAMMED_ORIGIN
 					   | HARDWARE_PATTERN_SCREEN_ORIGIN
 					   | BIT_ORDER_IN_BYTE_LSBFIRST;
@@ -953,8 +955,8 @@ static void RADEONMMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
    graphics hardware for acceleration. */
 Bool RADEONAccelInit(ScreenPtr pScreen)
 {
-    ScrnInfoPtr	  pScrn = xf86Screens[pScreen->myNum];
-    RADEONInfoPtr info	= RADEONPTR(pScrn);
+    ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
+    RADEONInfoPtr info  = RADEONPTR(pScrn);
     XAAInfoRecPtr a;
 
     if (!(a = info->accel = XAACreateInfoRec())) return FALSE;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c
index 54f8b43d1..f24327408 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c
@@ -1,28 +1,30 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c,v 1.1 2000/11/02 16:55:41 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c,v 1.2 2000/11/09 03:24:36 martin Exp $ */
 /*
- * Copyright 2000 ATI Technologies Inc., Markham, Ontario
- *	      and VA Linux Systems, Inc., Sunnyvale, California.
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
  */
 
 /*
@@ -54,24 +56,24 @@
 #include "radeon_reg.h"
 
 #if X_BYTE_ORDER == X_BIG_ENDIAN
-#define P_SWAP32( a , b )		  \
-       ((char *)a)[0] = ((char *)b)[3];	  \
-       ((char *)a)[1] = ((char *)b)[2];	  \
-       ((char *)a)[2] = ((char *)b)[1];	  \
+#define P_SWAP32( a , b )                 \
+       ((char *)a)[0] = ((char *)b)[3];   \
+       ((char *)a)[1] = ((char *)b)[2];   \
+       ((char *)a)[2] = ((char *)b)[1];   \
        ((char *)a)[3] = ((char *)b)[0]
 
-#define P_SWAP16( a , b )		  \
-	((char *)a)[0] = ((char *)b)[1];  \
-	((char *)a)[1] = ((char *)b)[0];  \
-	((char *)a)[2] = ((char *)b)[3];  \
-	((char *)a)[3] = ((char *)b)[2]
+#define P_SWAP16( a , b )                 \
+       ((char *)a)[0] = ((char *)b)[1];   \
+       ((char *)a)[1] = ((char *)b)[0];   \
+       ((char *)a)[2] = ((char *)b)[3];   \
+       ((char *)a)[3] = ((char *)b)[2]
 #endif
 
 
 /* Set cursor foreground and background colors. */
 static void RADEONSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     OUTREG(RADEON_CUR_CLR0, bg);
@@ -82,17 +84,17 @@ static void RADEONSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
    (xorigin,yorigin). */
 static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 {
-    RADEONInfoPtr	  info	      = RADEONPTR(pScrn);
-    unsigned char	  *RADEONMMIO = info->MMIO;
-    xf86CursorInfoPtr	  cursor      = info->cursor;
-    int			  xorigin     = 0;
-    int			  yorigin     = 0;
-    int			  total_y     = pScrn->frameY1 - pScrn->frameY0;
-
-    if (x < 0)			      xorigin = -x;
-    if (y < 0)			      yorigin = -y;
-    if (y > total_y)		      y	      = total_y;
-    if (info->Flags & V_DBLSCAN)      y	      *= 2;
+    RADEONInfoPtr         info        = RADEONPTR(pScrn);
+    unsigned char         *RADEONMMIO = info->MMIO;
+    xf86CursorInfoPtr     cursor      = info->cursor;
+    int                   xorigin     = 0;
+    int                   yorigin     = 0;
+    int                   total_y     = pScrn->frameY1 - pScrn->frameY0;
+
+    if (x < 0)                        xorigin = -x;
+    if (y < 0)                        yorigin = -y;
+    if (y > total_y)                  y       = total_y;
+    if (info->Flags & V_DBLSCAN)      y       *= 2;
     if (xorigin >= cursor->MaxWidth)  xorigin = cursor->MaxWidth - 1;
     if (yorigin >= cursor->MaxHeight) yorigin = cursor->MaxHeight - 1;
 
@@ -102,19 +104,19 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
     OUTREG(RADEON_CUR_HORZ_VERT_POSN, (RADEON_CUR_LOCK
 				       | ((xorigin ? 0 : x) << 16)
 				       | (yorigin ? 0 : y)));
-    OUTREG(RADEON_CUR_OFFSET,	      info->cursor_start + yorigin * 16);
+    OUTREG(RADEON_CUR_OFFSET,         info->cursor_start + yorigin * 16);
 }
 
 /* Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
    will be called after this, so we can ignore xorigin and yorigin. */
 static void RADEONLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *image)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    CARD32	  *s	      = (CARD32 *)image;
-    CARD32	  *d	      = (CARD32 *)(info->FB + info->cursor_start);
-    int		  y;
-    CARD32	  save;
+    CARD32        *s          = (CARD32 *)image;
+    CARD32        *d          = (CARD32 *)(info->FB + info->cursor_start);
+    int           y;
+    CARD32        save;
 
     save = INREG(RADEON_CRTC_GEN_CNTL);
     OUTREG(RADEON_CRTC_GEN_CNTL, save & ~RADEON_CRTC_CUR_EN);
@@ -178,7 +180,7 @@ static void RADEONLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *image)
 /* Hide hardware cursor. */
 static void RADEONHideCursor(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_CUR_EN);
@@ -187,7 +189,7 @@ static void RADEONHideCursor(ScrnInfoPtr pScrn)
 /* Show hardware cursor. */
 static void RADEONShowCursor(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_CUR_EN, ~RADEON_CRTC_CUR_EN);
@@ -197,7 +199,7 @@ static void RADEONShowCursor(ScrnInfoPtr pScrn)
 static Bool RADEONUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
 {
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    RADEONInfoPtr info	= RADEONPTR(pScrn);
+    RADEONInfoPtr info  = RADEONPTR(pScrn);
 
     return info->cursor_start ? TRUE : FALSE;
 }
@@ -205,20 +207,20 @@ static Bool RADEONUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
 /* Initialize hardware cursor support. */
 Bool RADEONCursorInit(ScreenPtr pScreen)
 {
-    ScrnInfoPtr		  pScrn	  = xf86Screens[pScreen->myNum];
-    RADEONInfoPtr	    info    = RADEONPTR(pScrn);
-    xf86CursorInfoPtr	  cursor;
-    FBAreaPtr		  fbarea;
-    int			  width;
-    int			  height;
-    int			  size;
+    ScrnInfoPtr           pScrn   = xf86Screens[pScreen->myNum];
+    RADEONInfoPtr           info    = RADEONPTR(pScrn);
+    xf86CursorInfoPtr     cursor;
+    FBAreaPtr             fbarea;
+    int                   width;
+    int                   height;
+    int                   size;
 
 
     if (!(cursor = info->cursor = xf86CreateCursorInfoRec())) return FALSE;
 
-    cursor->MaxWidth	      = 64;
-    cursor->MaxHeight	      = 64;
-    cursor->Flags	      = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP
+    cursor->MaxWidth          = 64;
+    cursor->MaxHeight         = 64;
+    cursor->Flags             = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP
 
 #if X_BYTE_ORDER == X_LITTLE_ENDIAN
 				 | HARDWARE_CURSOR_BIT_ORDER_MSBFIRST
@@ -231,14 +233,14 @@ Bool RADEONCursorInit(ScreenPtr pScreen)
     cursor->SetCursorColors   = RADEONSetCursorColors;
     cursor->SetCursorPosition = RADEONSetCursorPosition;
     cursor->LoadCursorImage   = RADEONLoadCursorImage;
-    cursor->HideCursor	      = RADEONHideCursor;
-    cursor->ShowCursor	      = RADEONShowCursor;
-    cursor->UseHWCursor	      = RADEONUseHWCursor;
-
-    size		      = (cursor->MaxWidth/4) * cursor->MaxHeight;
-    width		      = pScrn->displayWidth;
-    height		      = (size*2 + 1023) / pScrn->displayWidth;
-    fbarea		      = xf86AllocateOffscreenArea(pScreen,
+    cursor->HideCursor        = RADEONHideCursor;
+    cursor->ShowCursor        = RADEONShowCursor;
+    cursor->UseHWCursor       = RADEONUseHWCursor;
+
+    size                      = (cursor->MaxWidth/4) * cursor->MaxHeight;
+    width                     = pScrn->displayWidth;
+    height                    = (size*2 + 1023) / pScrn->displayWidth;
+    fbarea                    = xf86AllocateOffscreenArea(pScreen,
 							  width,
 							  height,
 							  16,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dga.c
index d466d0b67..e41984df3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dga.c
@@ -1,28 +1,30 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dga.c,v 1.2 2000/11/03 09:52:55 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dga.c,v 1.3 2000/11/09 03:24:36 martin Exp $ */
 /*
- * Copyright 2000 ATI Technologies Inc., Markham, Ontario
- *	      and VA Linux Systems, Inc., Sunnyvale, California.
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
  */
 
 /*
@@ -92,11 +94,11 @@ static DGAModePtr RADEONSetupDGAMode(ScrnInfoPtr pScrn,
 				     unsigned long blue,
 				     short visualClass)
 {
-    RADEONInfoPtr  info		   = RADEONPTR(pScrn);
-    DGAModePtr	   newmodes	   = NULL, currentMode;
+    RADEONInfoPtr  info            = RADEONPTR(pScrn);
+    DGAModePtr     newmodes        = NULL, currentMode;
     DisplayModePtr pMode, firstMode;
-    int		   otherPitch, Bpp = bitsPerPixel >> 3;
-    Bool	   oneMore;
+    int            otherPitch, Bpp = bitsPerPixel >> 3;
+    Bool           oneMore;
 
     pMode = firstMode = pScrn->modes;
 
@@ -122,31 +124,31 @@ SECOND_PASS:
 	currentMode = modes + *num;
 	(*num)++;
 
-	currentMode->mode	    = pMode;
+	currentMode->mode           = pMode;
 	/* FIXME: is concurrent access really possible? */
-	currentMode->flags	    = DGA_CONCURRENT_ACCESS;
+	currentMode->flags          = DGA_CONCURRENT_ACCESS;
 	if (pixmap)
-	    currentMode->flags	   |= DGA_PIXMAP_AVAILABLE;
+	    currentMode->flags     |= DGA_PIXMAP_AVAILABLE;
 	if (info->accel)
-	    currentMode->flags	   |= DGA_FILL_RECT | DGA_BLIT_RECT;
+	    currentMode->flags     |= DGA_FILL_RECT | DGA_BLIT_RECT;
 	if (pMode->Flags & V_DBLSCAN)
-	    currentMode->flags	   |= DGA_DOUBLESCAN;
+	    currentMode->flags     |= DGA_DOUBLESCAN;
 	if (pMode->Flags & V_INTERLACE)
-	    currentMode->flags	   |= DGA_INTERLACED;
-	currentMode->byteOrder	    = pScrn->imageByteOrder;
-	currentMode->depth	    = depth;
+	    currentMode->flags     |= DGA_INTERLACED;
+	currentMode->byteOrder      = pScrn->imageByteOrder;
+	currentMode->depth          = depth;
 	currentMode->bitsPerPixel   = bitsPerPixel;
-	currentMode->red_mask	    = red;
-	currentMode->green_mask	    = green;
-	currentMode->blue_mask	    = blue;
+	currentMode->red_mask       = red;
+	currentMode->green_mask     = green;
+	currentMode->blue_mask      = blue;
 	currentMode->visualClass    = visualClass;
 	currentMode->viewportWidth  = pMode->HDisplay;
 	currentMode->viewportHeight = pMode->VDisplay;
 	currentMode->xViewportStep  = 8;
 	currentMode->yViewportStep  = 1;
 	currentMode->viewportFlags  = DGA_FLIP_RETRACE;
-	currentMode->offset	    = 0;
-	currentMode->address	    = (unsigned char*)info->LinearAddr;
+	currentMode->offset         = 0;
+	currentMode->address        = (unsigned char*)info->LinearAddr;
 
 	if (oneMore) { /* first one is narrow width */
 	    currentMode->bytesPerScanline = (((pMode->HDisplay * Bpp) + 3)
@@ -164,14 +166,14 @@ SECOND_PASS:
 	    goto SECOND_PASS;
 	} else {
 	    currentMode->bytesPerScanline = ((otherPitch * Bpp) + 3) & ~3L;
-	    currentMode->imageWidth	  = otherPitch;
-	    currentMode->imageHeight	  = pMode->VDisplay;
-	    currentMode->pixmapWidth	  = currentMode->imageWidth;
-	    currentMode->pixmapHeight	  = currentMode->imageHeight;
-	    currentMode->maxViewportX	  = (currentMode->imageWidth -
+	    currentMode->imageWidth       = otherPitch;
+	    currentMode->imageHeight      = pMode->VDisplay;
+	    currentMode->pixmapWidth      = currentMode->imageWidth;
+	    currentMode->pixmapHeight     = currentMode->imageHeight;
+	    currentMode->maxViewportX     = (currentMode->imageWidth -
 					     currentMode->viewportWidth);
 	    /* this might need to get clamped to some maximum */
-	    currentMode->maxViewportY	  = (currentMode->imageHeight -
+	    currentMode->maxViewportY     = (currentMode->imageHeight -
 					     currentMode->viewportHeight);
 	}
 
@@ -185,10 +187,10 @@ SECOND_PASS:
 
 Bool RADEONDGAInit(ScreenPtr pScreen)
 {
-    ScrnInfoPtr	  pScrn = xf86Screens[pScreen->myNum];
-    RADEONInfoPtr info	= RADEONPTR(pScrn);
-    DGAModePtr	  modes = NULL;
-    int		  num	= 0;
+    ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
+    RADEONInfoPtr info  = RADEONPTR(pScrn);
+    DGAModePtr    modes = NULL;
+    int           num   = 0;
 
     /* 8 */
     modes = RADEONSetupDGAMode(pScrn, modes, &num, 8, 8,
@@ -245,8 +247,8 @@ Bool RADEONDGAInit(ScreenPtr pScreen)
 static Bool RADEON_SetMode(ScrnInfoPtr pScrn, DGAModePtr pMode)
 {
     static RADEONFBLayout SavedLayouts[MAXSCREENS];
-    int			  indx = pScrn->pScreen->myNum;
-    RADEONInfoPtr	  info = RADEONPTR(pScrn);
+    int                   indx = pScrn->pScreen->myNum;
+    RADEONInfoPtr         info = RADEONPTR(pScrn);
 
     if (!pMode) { /* restore the original mode */
 	/* put the ScreenParameters back */
@@ -260,18 +262,18 @@ static Bool RADEON_SetMode(ScrnInfoPtr pScrn, DGAModePtr pMode)
 	RADEONAdjustFrame(indx, 0, 0, 0);
 	info->DGAactive = FALSE;
     } else {
-	if (!info->DGAactive) {	 /* save the old parameters */
+	if (!info->DGAactive) {  /* save the old parameters */
 	    memcpy(&SavedLayouts[indx], &info->CurrentLayout,
 		   sizeof(RADEONFBLayout));
 	    info->DGAactive = TRUE;
 	}
 
 	info->CurrentLayout.bitsPerPixel = pMode->bitsPerPixel;
-	info->CurrentLayout.depth	 = pMode->depth;
+	info->CurrentLayout.depth        = pMode->depth;
 	info->CurrentLayout.displayWidth = (pMode->bytesPerScanline /
 					    (pMode->bitsPerPixel >> 3));
-	info->CurrentLayout.pixel_bytes	 = pMode->bitsPerPixel / 8;
-	info->CurrentLayout.pixel_code	 = (pMode->bitsPerPixel != 16
+	info->CurrentLayout.pixel_bytes  = pMode->bitsPerPixel / 8;
+	info->CurrentLayout.pixel_code   = (pMode->bitsPerPixel != 16
 					    ? pMode->bitsPerPixel
 					    : pMode->depth);
 	/* RADEONModeInit() will set the mode field */
@@ -345,7 +347,7 @@ static Bool RADEON_OpenFramebuffer(ScrnInfoPtr pScrn,
 {
     RADEONInfoPtr info = RADEONPTR(pScrn);
 
-    *name   = NULL;		/* no special device */
+    *name   = NULL;             /* no special device */
     *mem    = (unsigned char*)info->LinearAddr;
     *size   = info->FbMapSize;
     *offset = 0;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
index 0fa24a9b7..d30bac412 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
@@ -1,39 +1,42 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v 1.2 2000/11/03 09:52:55 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v 1.6 2000/11/09 10:30:53 alanh Exp $ */
 /*
- * Copyright 2000 ATI Technologies Inc., Markhom, Ontario
- *	      and VA Linux Systems, Inc., Sunnyvale, California.
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
  *   Kevin E. Martin <martin@valinux.com>
  *   Rickard E. Faith <faith@valinux.com>
+ *   Alan Hourihane <ahourihane@valinux.com>
  *
  * Credits:
  *
  *   Thanks to Ani Joshi <ajoshi@shell.unixbox.com> for providing source
- *   code to his Radeon driver.	 Portions of this file are based on the
+ *   code to his Radeon driver.  Portions of this file are based on the
  *   initialization code for that driver.
  *
  * References:
@@ -70,7 +73,7 @@
 #include "mipointer.h"
 #include "micmap.h"
 
-#define USE_FB			/* not until overlays */
+#define USE_FB                  /* not until overlays */
 #ifdef USE_FB
 #include "fb.h"
 #else
@@ -137,36 +140,36 @@ typedef enum {
 } RADEONOpts;
 
 OptionInfoRec RADEONOptions[] = {
-    { OPTION_NOACCEL,	   "NoAccel",	       OPTV_BOOLEAN, {0}, FALSE },
-    { OPTION_SW_CURSOR,	   "SWcursor",	       OPTV_BOOLEAN, {0}, FALSE },
-    { OPTION_DAC_6BIT,	   "Dac6Bit",	       OPTV_BOOLEAN, {0}, FALSE },
-    { OPTION_DAC_8BIT,	   "Dac8Bit",	       OPTV_BOOLEAN, {0}, TRUE	},
+    { OPTION_NOACCEL,      "NoAccel",          OPTV_BOOLEAN, {0}, FALSE },
+    { OPTION_SW_CURSOR,    "SWcursor",         OPTV_BOOLEAN, {0}, FALSE },
+    { OPTION_DAC_6BIT,     "Dac6Bit",          OPTV_BOOLEAN, {0}, FALSE },
+    { OPTION_DAC_8BIT,     "Dac8Bit",          OPTV_BOOLEAN, {0}, TRUE  },
 #ifdef XF86DRI
-    { OPTION_IS_PCI,	   "ForcePCIMode",     OPTV_BOOLEAN, {0}, FALSE },
-    { OPTION_CP_PIO,	   "CPPIOMode",	       OPTV_BOOLEAN, {0}, FALSE },
+    { OPTION_IS_PCI,       "ForcePCIMode",     OPTV_BOOLEAN, {0}, FALSE },
+    { OPTION_CP_PIO,       "CPPIOMode",        OPTV_BOOLEAN, {0}, FALSE },
     { OPTION_NO_SECURITY,  "CPNoSecurity",     OPTV_BOOLEAN, {0}, FALSE },
     { OPTION_USEC_TIMEOUT, "CPusecTimeout",    OPTV_INTEGER, {0}, FALSE },
-    { OPTION_AGP_MODE,	   "AGPMode",	       OPTV_INTEGER, {0}, FALSE },
-    { OPTION_AGP_SIZE,	   "AGPSize",	       OPTV_INTEGER, {0}, FALSE },
-    { OPTION_RING_SIZE,	   "RingSize",	       OPTV_INTEGER, {0}, FALSE },
-    { OPTION_VERT_SIZE,	   "VBListSize",       OPTV_INTEGER, {0}, FALSE },
-    { OPTION_VBUF_SIZE,	   "VBSize",	       OPTV_INTEGER, {0}, FALSE },
-    { OPTION_USE_CP_2D,	   "UseCPfor2D",       OPTV_BOOLEAN, {0}, FALSE },
+    { OPTION_AGP_MODE,     "AGPMode",          OPTV_INTEGER, {0}, FALSE },
+    { OPTION_AGP_SIZE,     "AGPSize",          OPTV_INTEGER, {0}, FALSE },
+    { OPTION_RING_SIZE,    "RingSize",         OPTV_INTEGER, {0}, FALSE },
+    { OPTION_VERT_SIZE,    "VBListSize",       OPTV_INTEGER, {0}, FALSE },
+    { OPTION_VBUF_SIZE,    "VBSize",           OPTV_INTEGER, {0}, FALSE },
+    { OPTION_USE_CP_2D,    "UseCPfor2D",       OPTV_BOOLEAN, {0}, FALSE },
 #endif
 #ifdef ENABLE_FLAT_PANEL
     /* Note: Radeon flat panel support has been disabled for now */
 #if 0
     /* FIXME: Disable CRTOnly until it is tested */
-    { OPTION_CRT,	   "CRTOnly",	       OPTV_BOOLEAN, {0}, FALSE },
+    { OPTION_CRT,          "CRTOnly",          OPTV_BOOLEAN, {0}, FALSE },
 #endif
     { OPTION_PANEL_WIDTH,  "PanelWidth",       OPTV_INTEGER, {0}, FALSE },
     { OPTION_PANEL_HEIGHT, "PanelHeight",      OPTV_INTEGER, {0}, FALSE },
 #endif
-    { OPTION_FBDEV,	   "UseFBDev",	       OPTV_BOOLEAN, {0}, FALSE },
-    { -1,		   NULL,	       OPTV_NONE,    {0}, FALSE }
+    { OPTION_FBDEV,        "UseFBDev",         OPTV_BOOLEAN, {0}, FALSE },
+    { -1,                  NULL,               OPTV_NONE,    {0}, FALSE }
 };
 
-RADEONRAMRec RADEONRAM[] = {	/* Memory Specifications
+RADEONRAMRec RADEONRAM[] = {    /* Memory Specifications
 				   From Radeon Manual */
     { 4, 4, 1, 2, 1, 2, 1, 16, 12, "64-bit SDR SDRAM" },
     { 4, 4, 3, 3, 2, 3, 1, 16, 12, "64-bit DDR SDRAM" },
@@ -316,11 +319,11 @@ static void RADEONFreeRec(ScrnInfoPtr pScrn)
     pScrn->driverPrivate = NULL;
 }
 
-/* Memory map the MMIO region.	Used during pre-init and by RADEONMapMem,
+/* Memory map the MMIO region.  Used during pre-init and by RADEONMapMem,
    below. */
 static Bool RADEONMapMMIO(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info		= RADEONPTR(pScrn);
+    RADEONInfoPtr info          = RADEONPTR(pScrn);
 
     if (info->FBDev) {
 	info->MMIO = fbdevHWMapMMIO(pScrn);
@@ -340,7 +343,7 @@ static Bool RADEONMapMMIO(ScrnInfoPtr pScrn)
    below. */
 static Bool RADEONUnmapMMIO(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info		= RADEONPTR(pScrn);
+    RADEONInfoPtr info          = RADEONPTR(pScrn);
 
     if (info->FBDev)
 	fbdevHWUnmapMMIO(pScrn);
@@ -351,10 +354,10 @@ static Bool RADEONUnmapMMIO(ScrnInfoPtr pScrn)
     return TRUE;
 }
 
-/* Memory map the frame buffer.	 Used by RADEONMapMem, below. */
+/* Memory map the frame buffer.  Used by RADEONMapMem, below. */
 static Bool RADEONMapFB(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info		= RADEONPTR(pScrn);
+    RADEONInfoPtr info          = RADEONPTR(pScrn);
 
     if (info->FBDev) {
 	info->FB = fbdevHWMapVidmem(pScrn);
@@ -373,7 +376,7 @@ static Bool RADEONMapFB(ScrnInfoPtr pScrn)
 /* Unmap the frame buffer.  Used by RADEONUnmapMem, below. */
 static Bool RADEONUnmapFB(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info		= RADEONPTR(pScrn);
+    RADEONInfoPtr info          = RADEONPTR(pScrn);
 
     if (info->FBDev)
 	fbdevHWUnmapVidmem(pScrn);
@@ -402,9 +405,9 @@ static Bool RADEONUnmapMem(ScrnInfoPtr pScrn)
 }
 
 /* Read PLL information */
-unsigned  RADEONINPLL(ScrnInfoPtr pScrn, int addr)
+int RADEONINPLL(ScrnInfoPtr pScrn, int addr)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
 #if !RADEON_ATOMIC_UPDATE
@@ -421,7 +424,7 @@ unsigned  RADEONINPLL(ScrnInfoPtr pScrn, int addr)
 /* Read PAL information (only used for debugging). */
 static int RADEONINPAL(int idx)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     OUTREG(RADEON_PALETTE_INDEX, idx << 16);
@@ -432,9 +435,9 @@ static int RADEONINPAL(int idx)
 /* Wait for vertical sync. */
 void RADEONWaitForVerticalSync(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     OUTREG(RADEON_GEN_INT_STATUS, RADEON_VSYNC_INT_AK);
     for (i = 0; i < RADEON_TIMEOUT; i++) {
@@ -445,7 +448,7 @@ void RADEONWaitForVerticalSync(ScrnInfoPtr pScrn)
 /* Blank screen. */
 static void RADEONBlank(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     OUTREGP(RADEON_CRTC_EXT_CNTL,
@@ -460,7 +463,7 @@ static void RADEONBlank(ScrnInfoPtr pScrn)
 /* Unblank screen. */
 static void RADEONUnblank(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     OUTREGP(RADEON_CRTC_EXT_CNTL, 0,
@@ -488,15 +491,15 @@ static int RADEONDiv(int n, int d)
 /* Read the Video BIOS block and the FP registers (if applicable). */
 static Bool RADEONGetBIOSParameters(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	   = RADEONPTR(pScrn);
+    RADEONInfoPtr info     = RADEONPTR(pScrn);
 #ifdef ENABLE_FLAT_PANEL
-    int		  i;
-    int		  FPHeader = 0;
+    int           i;
+    int           FPHeader = 0;
 #endif
 
-#define RADEONReadBIOS(offset, buffer, length)				\
-     (info->BIOSFromPCI ?						\
-      xf86ReadPciBIOS(offset, info->PciTag, 0, buffer, length) :	\
+#define RADEONReadBIOS(offset, buffer, length)                          \
+     (info->BIOSFromPCI ?                                               \
+      xf86ReadPciBIOS(offset, info->PciTag, 0, buffer, length) :        \
       xf86ReadBIOS(info->BIOSAddr, offset, buffer, length))
 
 #define RADEON_BIOS8(v)  (info->VBIOS[v])
@@ -539,7 +542,7 @@ static Bool RADEONGetBIOSParameters(ScrnInfoPtr pScrn)
 	   tables, but until we find out where that offset is stored, we
 	   must search for the ATI signature string: "M3      ". */
 	for (i = 4; i < RADEON_VBIOS_SIZE-8; i++) {
-	    if (RADEON_BIOS8(i)	  == 'M' &&
+	    if (RADEON_BIOS8(i)   == 'M' &&
 		RADEON_BIOS8(i+1) == '3' &&
 		RADEON_BIOS8(i+2) == ' ' &&
 		RADEON_BIOS8(i+3) == ' ' &&
@@ -579,15 +582,15 @@ static Bool RADEONGetBIOSParameters(ScrnInfoPtr pScrn)
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Panel Type: ");
 	i = RADEON_BIOS16(info->FPBIOSstart+29);
 	if (i & 1) ErrorF("Color, ");
-	else	   ErrorF("Monochrome, ");
+	else       ErrorF("Monochrome, ");
 	if (i & 2) ErrorF("Dual(split), ");
-	else	   ErrorF("Single, ");
+	else       ErrorF("Single, ");
 	switch ((i >> 2) & 0x3f) {
-	case 0:	 ErrorF("STN");	       break;
-	case 1:	 ErrorF("TFT");	       break;
-	case 2:	 ErrorF("Active STN"); break;
-	case 3:	 ErrorF("EL");	       break;
-	case 4:	 ErrorF("Plasma");     break;
+	case 0:  ErrorF("STN");        break;
+	case 1:  ErrorF("TFT");        break;
+	case 2:  ErrorF("Active STN"); break;
+	case 3:  ErrorF("EL");         break;
+	case 4:  ErrorF("Plasma");     break;
 	default: ErrorF("UNKNOWN");    break;
 	}
 	ErrorF("\n");
@@ -606,14 +609,14 @@ static Bool RADEONGetBIOSParameters(ScrnInfoPtr pScrn)
     return TRUE;
 }
 
-/* Read PLL parameters from BIOS block.	 Default to typical values if there
+/* Read PLL parameters from BIOS block.  Default to typical values if there
    is no BIOS. */
 static Bool RADEONGetPLLParameters(ScrnInfoPtr pScrn)
 {
     RADEONInfoPtr   info = RADEONPTR(pScrn);
-    RADEONPLLPtr    pll	 = &info->pll;
-    CARD16	    bios_header;
-    CARD16	    pll_info_block;
+    RADEONPLLPtr    pll  = &info->pll;
+    CARD16          bios_header;
+    CARD16          pll_info_block;
 
     if (!info->VBIOS) {
 	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
@@ -626,7 +629,7 @@ static Bool RADEONGetPLLParameters(ScrnInfoPtr pScrn)
 	pll->reference_div  = 65;
 	pll->min_pll_freq   = 12500;
 	pll->max_pll_freq   = 35000;
-	pll->xclk	    = 10300;
+	pll->xclk           = 10300;
     } else {
 	bios_header    = RADEON_BIOS16(0x48);
 	pll_info_block = RADEON_BIOS16(bios_header + 0x30);
@@ -637,7 +640,7 @@ static Bool RADEONGetPLLParameters(ScrnInfoPtr pScrn)
 	pll->reference_div  = RADEON_BIOS16(pll_info_block + 0x10);
 	pll->min_pll_freq   = RADEON_BIOS32(pll_info_block + 0x12);
 	pll->max_pll_freq   = RADEON_BIOS32(pll_info_block + 0x16);
-	pll->xclk	    = RADEON_BIOS16(pll_info_block + 0x08);
+	pll->xclk           = RADEON_BIOS16(pll_info_block + 0x08);
     }
 
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -654,7 +657,7 @@ static Bool RADEONGetPLLParameters(ScrnInfoPtr pScrn)
 /* This is called by RADEONPreInit to set up the default visual. */
 static Bool RADEONPreInitVisual(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info		= RADEONPTR(pScrn);
+    RADEONInfoPtr info          = RADEONPTR(pScrn);
 
     if (!xf86SetDepthBpp(pScrn, 8, 8, 8, Support32bppFb))
 	return FALSE;
@@ -677,7 +680,7 @@ static Bool RADEONPreInitVisual(ScrnInfoPtr pScrn)
     info->fifo_slots  = 0;
     info->pix24bpp    = xf86GetBppFromDepth(pScrn, pScrn->depth);
     info->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel;
-    info->CurrentLayout.depth	     = pScrn->depth;
+    info->CurrentLayout.depth        = pScrn->depth;
     info->CurrentLayout.pixel_bytes  = pScrn->bitsPerPixel / 8;
     info->CurrentLayout.pixel_code   = (pScrn->bitsPerPixel != 16
 				       ? pScrn->bitsPerPixel
@@ -712,7 +715,7 @@ static Bool RADEONPreInitVisual(ScrnInfoPtr pScrn)
 /* This is called by RADEONPreInit to handle all color weight issues. */
 static Bool RADEONPreInitWeight(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info		= RADEONPTR(pScrn);
+    RADEONInfoPtr info          = RADEONPTR(pScrn);
 
 				/* Save flag for 6 bit DAC to use for
 				   setting CRTC registers.  Otherwise use
@@ -745,19 +748,19 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 {
     RADEONInfoPtr   info   = RADEONPTR(pScrn);
     EntityInfoPtr   pEnt   = info->pEnt;
-    GDevPtr	    dev	   = pEnt->device;
-    int		    offset = 0; /* RAM Type */
-    MessageType	    from;
+    GDevPtr         dev    = pEnt->device;
+    int             offset = 0; /* RAM Type */
+    MessageType     from;
     unsigned char   *RADEONMMIO;
 
 				/* Chipset */
     from = X_PROBED;
     if (dev->chipset && *dev->chipset) {
 	info->Chipset  = xf86StringToToken(RADEONChipsets, dev->chipset);
-	from	       = X_CONFIG;
+	from           = X_CONFIG;
     } else if (dev->chipID >= 0) {
 	info->Chipset  = dev->chipID;
-	from	       = X_CONFIG;
+	from           = X_CONFIG;
     } else {
 	info->Chipset = info->PciInfo->chipType;
     }
@@ -782,7 +785,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 
 				/* Framebuffer */
 
-    from	     = X_PROBED;
+    from             = X_PROBED;
     info->LinearAddr = info->PciInfo->memBase[0] & 0xfc000000;
     if (dev->MemBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -790,7 +793,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 		   dev->MemBase,
 		   info->LinearAddr);
 	info->LinearAddr = dev->MemBase;
-	from		 = X_CONFIG;
+	from             = X_CONFIG;
     } else if (!info->LinearAddr) {
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		   "No valid linear framebuffer address\n");
@@ -800,7 +803,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 	       "Linear framebuffer at 0x%08lx\n", info->LinearAddr);
 
 				/* MMIO registers */
-    from	     = X_PROBED;
+    from             = X_PROBED;
     info->MMIOAddr   = info->PciInfo->memBase[2] & 0xffffff00;
     if (dev->IOBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -808,7 +811,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 		   dev->IOBase,
 		   info->MMIOAddr);
 	info->MMIOAddr = dev->IOBase;
-	from	       = X_CONFIG;
+	from           = X_CONFIG;
     } else if (!info->MMIOAddr) {
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid MMIO address\n");
 	return FALSE;
@@ -817,7 +820,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 	       "MMIO registers at 0x%08lx\n", info->MMIOAddr);
 
 				/* BIOS */
-    from	      = X_PROBED;
+    from              = X_PROBED;
     info->BIOSAddr    = info->PciInfo->biosBase & 0xfffe0000;
     if (dev->BiosBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -825,7 +828,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 		   dev->BiosBase,
 		   info->BIOSAddr);
 	info->BIOSAddr = dev->BiosBase;
-	from	       = X_CONFIG;
+	from           = X_CONFIG;
     }
     if (info->BIOSAddr) {
 	xf86DrvMsg(pScrn->scrnIndex, from,
@@ -838,34 +841,34 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
     /* FIXME: Make this an option */
     switch (info->Chipset) {
 #if 0
-    case PCI_CHIP_RADEON_XX: info->HasPanelRegs = TRUE;	 break;
+    case PCI_CHIP_RADEON_XX: info->HasPanelRegs = TRUE;  break;
 #endif
     case PCI_CHIP_RADEON_QD:
     case PCI_CHIP_RADEON_QE:
     case PCI_CHIP_RADEON_QF:
     case PCI_CHIP_RADEON_QG:
-    default:		     info->HasPanelRegs = FALSE; break;
+    default:                 info->HasPanelRegs = FALSE; break;
     }
 #endif
 
 				/* Read registers used to determine options */
-    from		     = X_PROBED;
+    from                     = X_PROBED;
     RADEONMapMMIO(pScrn);
-    RADEONMMIO		     = info->MMIO;
+    RADEONMMIO               = info->MMIO;
     if (info->FBDev)
-	pScrn->videoRam	     = fbdevHWGetVidmem(pScrn) / 1024;
+	pScrn->videoRam      = fbdevHWGetVidmem(pScrn) / 1024;
     else
-	pScrn->videoRam	     = INREG(RADEON_CONFIG_MEMSIZE) / 1024;
-    info->MemCntl	     = INREG(RADEON_SDRAM_MODE_REG);
-    info->BusCntl	     = INREG(RADEON_BUS_CNTL);
-    RADEONMMIO		     = NULL;
+	pScrn->videoRam      = INREG(RADEON_CONFIG_MEMSIZE) / 1024;
+    info->MemCntl            = INREG(RADEON_SDRAM_MODE_REG);
+    info->BusCntl            = INREG(RADEON_BUS_CNTL);
+    RADEONMMIO               = NULL;
     RADEONUnmapMMIO(pScrn);
 
 				/* RAM */
     switch (info->MemCntl >> 30) {
-    case 0:	       offset = 0; break; /*  64-bit SDR SDRAM */
-    case 1:	       offset = 1; break; /*  64-bit DDR SDRAM */
-    default:	       offset = 0;
+    case 0:            offset = 0; break; /*  64-bit SDR SDRAM */
+    case 1:            offset = 1; break; /*  64-bit DDR SDRAM */
+    default:           offset = 0;
     }
     info->ram = &RADEONRAM[offset];
 
@@ -874,8 +877,8 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 		   "Video RAM override, using %d kB instead of %d kB\n",
 		   dev->videoRam,
 		   pScrn->videoRam);
-	from		 = X_CONFIG;
-	pScrn->videoRam	 = dev->videoRam;
+	from             = X_CONFIG;
+	pScrn->videoRam  = dev->videoRam;
     }
     pScrn->videoRam  &= ~1023;
     info->FbMapSize  = pScrn->videoRam * 1024;
@@ -935,7 +938,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 	case PCI_CHIP_RADEON_QE:
 	case PCI_CHIP_RADEON_QF:
 	case PCI_CHIP_RADEON_QG:
-	default:		 info->IsPCI = FALSE; break;
+	default:                 info->IsPCI = FALSE; break;
 	}
     }
 #endif
@@ -975,17 +978,17 @@ static Bool RADEONPreInitModes(ScrnInfoPtr pScrn)
 {
     RADEONInfoPtr info = RADEONPTR(pScrn);
     ClockRangePtr clockRanges;
-    int		  modesFound;
-    char	  *mod = NULL;
-    const char	  *Sym = NULL;
+    int           modesFound;
+    char          *mod = NULL;
+    const char    *Sym = NULL;
 
 				/* Get mode information */
-    pScrn->progClock		       = TRUE;
-    clockRanges			       = xnfcalloc(sizeof(*clockRanges), 1);
-    clockRanges->next		       = NULL;
-    clockRanges->minClock	       = info->pll.min_pll_freq;
-    clockRanges->maxClock	       = info->pll.max_pll_freq * 10;
-    clockRanges->clockIndex	       = -1;
+    pScrn->progClock                   = TRUE;
+    clockRanges                        = xnfcalloc(sizeof(*clockRanges), 1);
+    clockRanges->next                  = NULL;
+    clockRanges->minClock              = info->pll.min_pll_freq;
+    clockRanges->maxClock              = info->pll.max_pll_freq * 10;
+    clockRanges->clockIndex            = -1;
 #ifdef ENABLE_FLAT_PANEL
     /* Note: Radeon flat panel support has been disabled for now */
     if (info->HasPanelRegs) {
@@ -1004,12 +1007,12 @@ static Bool RADEONPreInitModes(ScrnInfoPtr pScrn)
 				   pScrn->monitor->Modes,
 				   pScrn->display->modes,
 				   clockRanges,
-				   NULL,	/* linePitches */
-				   8 * 64,	/* minPitch */
-				   8 * 1024,	/* maxPitch */
+				   NULL,        /* linePitches */
+				   8 * 64,      /* minPitch */
+				   8 * 1024,    /* maxPitch */
 				   64 * pScrn->bitsPerPixel, /* pitchInc */
-				   128,		/* minHeight */
-				   2048,	/* maxHeight */
+				   128,         /* minHeight */
+				   2048,        /* maxHeight */
 				   pScrn->virtualX,
 				   pScrn->virtualY,
 				   info->FbMapSize,
@@ -1115,20 +1118,20 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
 
     if (xf86ReturnOptValBool(RADEONOptions, OPTION_NO_SECURITY, FALSE)) {
 	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-		   "WARNING!!!	CP Security checks disabled!!! **********\n");
+		   "WARNING!!!  CP Security checks disabled!!! **********\n");
 	info->CPSecure = FALSE;
     } else {
 	info->CPSecure = TRUE;
     }
 
-    info->agpMode	= RADEON_DEFAULT_AGP_MODE;
-    info->agpSize	= RADEON_DEFAULT_AGP_SIZE;
-    info->ringSize	= RADEON_DEFAULT_RING_SIZE;
-    info->vbSize	= RADEON_DEFAULT_VB_SIZE;
-    info->indSize	= RADEON_DEFAULT_IND_SIZE;
-    info->agpTexSize	= RADEON_DEFAULT_AGP_TEX_SIZE;
+    info->agpMode       = RADEON_DEFAULT_AGP_MODE;
+    info->agpSize       = RADEON_DEFAULT_AGP_SIZE;
+    info->ringSize      = RADEON_DEFAULT_RING_SIZE;
+    info->vbSize        = RADEON_DEFAULT_VB_SIZE;
+    info->indSize       = RADEON_DEFAULT_IND_SIZE;
+    info->agpTexSize    = RADEON_DEFAULT_AGP_TEX_SIZE;
 
-    info->vbBufSize	= RADEON_DEFAULT_VB_BUF_SIZE;
+    info->vbBufSize     = RADEON_DEFAULT_VB_BUF_SIZE;
 
     info->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT;
 
@@ -1260,9 +1263,9 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
 
     if (!RADEONGetRec(pScrn)) return FALSE;
 
-    info	       = RADEONPTR(pScrn);
+    info               = RADEONPTR(pScrn);
 
-    info->pEnt	       = xf86GetEntityInfo(pScrn->entityList[0]);
+    info->pEnt         = xf86GetEntityInfo(pScrn->entityList[0]);
     if (info->pEnt->location.type != BUS_PCI) goto fail;
 
     if (flags & PROBE_DETECT) {
@@ -1293,14 +1296,14 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
     pScrn->racMemFlags = RAC_FB | RAC_COLORMAP;
     pScrn->monitor     = pScrn->confScreen->monitor;
 
-    if (!RADEONPreInitVisual(pScrn))	goto fail;
+    if (!RADEONPreInitVisual(pScrn))    goto fail;
 
 				/* We can't do this until we have a
 				   pScrn->display. */
     xf86CollectOptions(pScrn, NULL);
     xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, RADEONOptions);
 
-    if (!RADEONPreInitWeight(pScrn))	goto fail;
+    if (!RADEONPreInitWeight(pScrn))    goto fail;
 
     if (xf86ReturnOptValBool(RADEONOptions, OPTION_FBDEV, FALSE)) {
 	info->FBDev = TRUE;
@@ -1315,32 +1318,32 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
 	if (!fbdevHWInit(pScrn, info->PciInfo, NULL)) return FALSE;
 	pScrn->SwitchMode    = fbdevHWSwitchMode;
 	pScrn->AdjustFrame   = fbdevHWAdjustFrame;
-	pScrn->EnterVT	     = RADEONEnterVTFBDev;
-	pScrn->LeaveVT	     = RADEONLeaveVTFBDev;
+	pScrn->EnterVT       = RADEONEnterVTFBDev;
+	pScrn->LeaveVT       = RADEONLeaveVTFBDev;
 	pScrn->ValidMode     = fbdevHWValidMode;
     }
 
     if (!info->FBDev)
-	if (!RADEONPreInitInt10(pScrn))	 goto fail;
+	if (!RADEONPreInitInt10(pScrn))  goto fail;
 
-    if (!RADEONPreInitConfig(pScrn))	 goto fail;
+    if (!RADEONPreInitConfig(pScrn))     goto fail;
 
     if (!RADEONGetBIOSParameters(pScrn)) goto fail;
 
-    if (!RADEONGetPLLParameters(pScrn))	 goto fail;
+    if (!RADEONGetPLLParameters(pScrn))  goto fail;
 
-    if (!RADEONPreInitDDC(pScrn))	 goto fail;
+    if (!RADEONPreInitDDC(pScrn))        goto fail;
 
-    if (!RADEONPreInitGamma(pScrn))	 goto fail;
+    if (!RADEONPreInitGamma(pScrn))      goto fail;
 
-    if (!RADEONPreInitModes(pScrn))	 goto fail;
+    if (!RADEONPreInitModes(pScrn))      goto fail;
 
-    if (!RADEONPreInitCursor(pScrn))	 goto fail;
+    if (!RADEONPreInitCursor(pScrn))     goto fail;
 
-    if (!RADEONPreInitAccel(pScrn))	 goto fail;
+    if (!RADEONPreInitAccel(pScrn))      goto fail;
 
 #ifdef XF86DRI
-    if (!RADEONPreInitDRI(pScrn))	 goto fail;
+    if (!RADEONPreInitDRI(pScrn))        goto fail;
 #endif
 
 				/* Free the video bios (if applicable) */
@@ -1369,10 +1372,10 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
 static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
 			      int *indices, LOCO *colors, VisualPtr pVisual)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int		  i;
-    int		  idx;
+    int           i;
+    int           idx;
     unsigned char r, g, b;
 
 #ifdef ENABLE_FLAT_PANEL
@@ -1382,18 +1385,18 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
 #endif
 
     if (info->CurrentLayout.depth == 15) {
-	/* 15bpp mode.	This sends 32 values. */
+	/* 15bpp mode.  This sends 32 values. */
 	for (i = 0; i < numColors; i++) {
 	    idx = indices[i];
-	    r	= colors[idx].red;
-	    g	= colors[idx].green;
-	    b	= colors[idx].blue;
+	    r   = colors[idx].red;
+	    g   = colors[idx].green;
+	    b   = colors[idx].blue;
 	    RADEONWaitForFifo(pScrn, 32); /* delay */
 	    OUTPAL(idx * 8, r, g, b);
 	}
     }
     else if (info->CurrentLayout.depth == 16) {
-	/* 16bpp mode.	This sends 64 values. */
+	/* 16bpp mode.  This sends 64 values. */
 				/* There are twice as many green values as
 				   there are values for red and blue.  So,
 				   we take each red and blue pair, and
@@ -1401,9 +1404,9 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
 				   values. */
 	for (i = 0; i < numColors; i++) {
 	    idx = indices[i];
-	    r	= colors[idx / 2].red;
-	    g	= colors[idx].green;
-	    b	= colors[idx / 2].blue;
+	    r   = colors[idx / 2].red;
+	    g   = colors[idx].green;
+	    b   = colors[idx / 2].blue;
 	    RADEONWaitForFifo(pScrn, 32); /* delay */
 	    OUTPAL(idx * 4, r, g, b);
 
@@ -1423,9 +1426,9 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
 	/* 8bpp mode.  This sends 256 values. */
 	for (i = 0; i < numColors; i++) {
 	    idx = indices[i];
-	    r	= colors[idx].red;
-	    b	= colors[idx].blue;
-	    g	= colors[idx].green;
+	    r   = colors[idx].red;
+	    b   = colors[idx].blue;
+	    g   = colors[idx].green;
 	    RADEONWaitForFifo(pScrn, 32); /* delay */
 	    OUTPAL(idx, r, g, b);
 	}
@@ -1435,10 +1438,10 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
 /* Called at the start of each server generation. */
 Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 {
-    ScrnInfoPtr	  pScrn = xf86Screens[pScreen->myNum];
-    RADEONInfoPtr info	= RADEONPTR(pScrn);
-    BoxRec	  MemBox;
-    int		  y2;
+    ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
+    RADEONInfoPtr info  = RADEONPTR(pScrn);
+    BoxRec        MemBox;
+    int           y2;
 
     RADEONTRACE(("RADEONScreenInit %x %d\n",
 		 pScrn->memPhysBase, pScrn->fbOffset));
@@ -1451,8 +1454,8 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     if (!RADEONMapMem(pScrn)) return FALSE;
     pScrn->fbOffset    = 0;
 #ifdef XF86DRI
-    info->fbX	       = 0;
-    info->fbY	       = 0;
+    info->fbX          = 0;
+    info->fbY          = 0;
 #endif
 
     info->PaletteSavedOnVT = FALSE;
@@ -1487,7 +1490,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	   times the virtual size of the screen below. */
 	int width_bytes = (pScrn->displayWidth *
 			   info->CurrentLayout.pixel_bytes);
-	int maxy	= info->FbMapSize / width_bytes;
+	int maxy        = info->FbMapSize / width_bytes;
 
 	if (!xf86ReturnOptValBool(RADEONOptions, OPTION_NOACCEL, FALSE) &&
 	    (maxy > pScrn->virtualY * 3)
@@ -1548,14 +1551,13 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     if (pScrn->bitsPerPixel > 8) {
 	VisualPtr visual;
 
-	for (visual = pScreen->visuals + pScreen->numVisuals;
-	     visual >= pScreen->visuals;
-	     visual--) {
+	visual = pScreen->visuals + pScreen->numVisuals;
+	while (--visual >= pScreen->visuals) {
 	    if ((visual->class | DynamicClass) == DirectColor) {
 		visual->offsetRed   = pScrn->offset.red;
 		visual->offsetGreen = pScrn->offset.green;
 		visual->offsetBlue  = pScrn->offset.blue;
-		visual->redMask	    = pScrn->mask.red;
+		visual->redMask     = pScrn->mask.red;
 		visual->greenMask   = pScrn->mask.green;
 		visual->blueMask    = pScrn->mask.blue;
 	    }
@@ -1568,7 +1570,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     MemBox.x1 = 0;
     MemBox.y1 = 0;
     MemBox.x2 = pScrn->displayWidth;
-    y2	      = (info->FbMapSize
+    y2        = (info->FbMapSize
 		 / (pScrn->displayWidth * info->CurrentLayout.pixel_bytes));
     if (y2 >= 32768) y2 = 32767; /* because MemBox.y2 is signed short */
     MemBox.y2 = y2;
@@ -1584,7 +1586,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 		   MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2);
 	return FALSE;
     } else {
-	int	  width, height;
+	int       width, height;
 	FBAreaPtr fbarea;
 
 	xf86DrvMsg(scrnIndex, X_INFO,
@@ -1612,10 +1614,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 				   as for local textures. */
     if (info->directRenderingEnabled) {
 	FBAreaPtr fbarea;
-	int	  width_bytes = (pScrn->displayWidth *
+	int       width_bytes = (pScrn->displayWidth *
 				 info->CurrentLayout.pixel_bytes);
-	int	  maxy	      = info->FbMapSize / width_bytes;
-	int	  l;
+	int       maxy        = info->FbMapSize / width_bytes;
+	int       l;
 
 	switch (info->CPMode) {
 	case RADEON_DEFAULT_CP_PIO_MODE:
@@ -1695,7 +1697,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	    xf86DrvMsg(scrnIndex, X_INFO,
 		       "Reserved %d kb for textures: (%d,%d)-(%d,%d)\n",
 		       info->textureSize/1024,
-		       info->textureX,	    info->textureY,
+		       info->textureX,      info->textureY,
 		       pScrn->displayWidth, maxy);
 	} else if ((fbarea = xf86AllocateOffscreenArea(pScreen,
 						       pScrn->virtualX,
@@ -1802,10 +1804,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     RADEONInitVideo(pScreen);
 
 				/* Provide SaveScreen */
-    pScreen->SaveScreen	 = RADEONSaveScreen;
+    pScreen->SaveScreen  = RADEONSaveScreen;
 
 				/* Wrap CloseScreen */
-    info->CloseScreen	 = pScreen->CloseScreen;
+    info->CloseScreen    = pScreen->CloseScreen;
     pScreen->CloseScreen = RADEONCloseScreen;
 
 				/* Note unused options */
@@ -1834,32 +1836,32 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 static void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn,
 					 RADEONSavePtr restore)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
-    OUTREG(RADEON_OVR_CLR,		restore->ovr_clr);
-    OUTREG(RADEON_OVR_WID_LEFT_RIGHT,	restore->ovr_wid_left_right);
-    OUTREG(RADEON_OVR_WID_TOP_BOTTOM,	restore->ovr_wid_top_bottom);
-    OUTREG(RADEON_OV0_SCALE_CNTL,	restore->ov0_scale_cntl);
-    OUTREG(RADEON_MPP_TB_CONFIG,	restore->mpp_tb_config );
-    OUTREG(RADEON_MPP_GP_CONFIG,	restore->mpp_gp_config );
-    OUTREG(RADEON_SUBPIC_CNTL,		restore->subpic_cntl);
-    OUTREG(RADEON_VIPH_CONTROL,		restore->viph_control);
-    OUTREG(RADEON_I2C_CNTL_1,		restore->i2c_cntl_1);
-    OUTREG(RADEON_GEN_INT_CNTL,		restore->gen_int_cntl);
-    OUTREG(RADEON_CAP0_TRIG_CNTL,	restore->cap0_trig_cntl);
-    OUTREG(RADEON_CAP1_TRIG_CNTL,	restore->cap1_trig_cntl);
-    OUTREG(RADEON_BUS_CNTL,		restore->bus_cntl);
+    OUTREG(RADEON_OVR_CLR,              restore->ovr_clr);
+    OUTREG(RADEON_OVR_WID_LEFT_RIGHT,   restore->ovr_wid_left_right);
+    OUTREG(RADEON_OVR_WID_TOP_BOTTOM,   restore->ovr_wid_top_bottom);
+    OUTREG(RADEON_OV0_SCALE_CNTL,       restore->ov0_scale_cntl);
+    OUTREG(RADEON_MPP_TB_CONFIG,        restore->mpp_tb_config );
+    OUTREG(RADEON_MPP_GP_CONFIG,        restore->mpp_gp_config );
+    OUTREG(RADEON_SUBPIC_CNTL,          restore->subpic_cntl);
+    OUTREG(RADEON_VIPH_CONTROL,         restore->viph_control);
+    OUTREG(RADEON_I2C_CNTL_1,           restore->i2c_cntl_1);
+    OUTREG(RADEON_GEN_INT_CNTL,         restore->gen_int_cntl);
+    OUTREG(RADEON_CAP0_TRIG_CNTL,       restore->cap0_trig_cntl);
+    OUTREG(RADEON_CAP1_TRIG_CNTL,       restore->cap1_trig_cntl);
+    OUTREG(RADEON_BUS_CNTL,             restore->bus_cntl);
 }
 
 /* Write CRTC registers. */
 static void RADEONRestoreCrtcRegisters(ScrnInfoPtr pScrn,
 				       RADEONSavePtr restore)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
-    OUTREG(RADEON_CRTC_GEN_CNTL,	restore->crtc_gen_cntl);
+    OUTREG(RADEON_CRTC_GEN_CNTL,        restore->crtc_gen_cntl);
 
     OUTREGP(RADEON_CRTC_EXT_CNTL, restore->crtc_ext_cntl,
 	    RADEON_CRTC_VSYNC_DIS |
@@ -1870,13 +1872,13 @@ static void RADEONRestoreCrtcRegisters(ScrnInfoPtr pScrn,
 	    RADEON_DAC_RANGE_CNTL |
 	    RADEON_DAC_BLANKING);
 
-    OUTREG(RADEON_CRTC_H_TOTAL_DISP,	restore->crtc_h_total_disp);
+    OUTREG(RADEON_CRTC_H_TOTAL_DISP,    restore->crtc_h_total_disp);
     OUTREG(RADEON_CRTC_H_SYNC_STRT_WID, restore->crtc_h_sync_strt_wid);
-    OUTREG(RADEON_CRTC_V_TOTAL_DISP,	restore->crtc_v_total_disp);
+    OUTREG(RADEON_CRTC_V_TOTAL_DISP,    restore->crtc_v_total_disp);
     OUTREG(RADEON_CRTC_V_SYNC_STRT_WID, restore->crtc_v_sync_strt_wid);
-    OUTREG(RADEON_CRTC_OFFSET,		restore->crtc_offset);
-    OUTREG(RADEON_CRTC_OFFSET_CNTL,	restore->crtc_offset_cntl);
-    OUTREG(RADEON_CRTC_PITCH,		restore->crtc_pitch);
+    OUTREG(RADEON_CRTC_OFFSET,          restore->crtc_offset);
+    OUTREG(RADEON_CRTC_OFFSET_CNTL,     restore->crtc_offset_cntl);
+    OUTREG(RADEON_CRTC_PITCH,           restore->crtc_pitch);
 }
 
 #ifdef ENABLE_FLAT_PANEL
@@ -1884,20 +1886,20 @@ static void RADEONRestoreCrtcRegisters(ScrnInfoPtr pScrn,
 /* Write flat panel registers */
 static void RADEONRestoreFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    CARD32	  tmp;
+    CARD32        tmp;
 
-    OUTREG(RADEON_CRTC2_GEN_CNTL,	restore->crtc2_gen_cntl);
+    OUTREG(RADEON_CRTC2_GEN_CNTL,       restore->crtc2_gen_cntl);
     OUTREG(RADEON_FP_CRTC_H_TOTAL_DISP, restore->fp_crtc_h_total_disp);
     OUTREG(RADEON_FP_CRTC_V_TOTAL_DISP, restore->fp_crtc_v_total_disp);
-    OUTREG(RADEON_FP_GEN_CNTL,		restore->fp_gen_cntl);
-    OUTREG(RADEON_FP_H_SYNC_STRT_WID,	restore->fp_h_sync_strt_wid);
-    OUTREG(RADEON_FP_HORZ_STRETCH,	restore->fp_horz_stretch);
-    OUTREG(RADEON_FP_PANEL_CNTL,	restore->fp_panel_cntl);
-    OUTREG(RADEON_FP_V_SYNC_STRT_WID,	restore->fp_v_sync_strt_wid);
-    OUTREG(RADEON_FP_VERT_STRETCH,	restore->fp_vert_stretch);
-    OUTREG(RADEON_TMDS_CRC,		restore->tmds_crc);
+    OUTREG(RADEON_FP_GEN_CNTL,          restore->fp_gen_cntl);
+    OUTREG(RADEON_FP_H_SYNC_STRT_WID,   restore->fp_h_sync_strt_wid);
+    OUTREG(RADEON_FP_HORZ_STRETCH,      restore->fp_horz_stretch);
+    OUTREG(RADEON_FP_PANEL_CNTL,        restore->fp_panel_cntl);
+    OUTREG(RADEON_FP_V_SYNC_STRT_WID,   restore->fp_v_sync_strt_wid);
+    OUTREG(RADEON_FP_VERT_STRETCH,      restore->fp_vert_stretch);
+    OUTREG(RADEON_TMDS_CRC,             restore->tmds_crc);
 
     tmp = INREG(RADEON_LVDS_GEN_CNTL);
     if ((tmp & (RADEON_LVDS_ON | RADEON_LVDS_BLON)) ==
@@ -1927,7 +1929,7 @@ static void RADEONPLLWaitForReadUpdateComplete(ScrnInfoPtr pScrn)
 
 static void RADEONPLLWriteUpdate(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     OUTPLLP(pScrn, RADEON_PPLL_REF_DIV, RADEON_PPLL_ATOMIC_UPDATE_W, 0xffff);
@@ -1937,7 +1939,7 @@ static void RADEONPLLWriteUpdate(ScrnInfoPtr pScrn)
 /* Write PLL registers. */
 static void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
 #if !RADEON_ATOMIC_UPDATE
@@ -2023,7 +2025,7 @@ static void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 /* Write DDA registers. */
 static void RADEONRestoreDDARegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     OUTREG(RADEON_DDA_CONFIG, restore->dda_config);
@@ -2033,9 +2035,9 @@ static void RADEONRestoreDDARegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 /* Write palette data. */
 static void RADEONRestorePalette(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int		  i;
+    int           i;
 
     if (!restore->palette_valid) return;
 
@@ -2052,7 +2054,7 @@ static void RADEONRestorePalette(ScrnInfoPtr pScrn, RADEONSavePtr restore)
     }
 }
 
-/* Write out state to define a new video mode.	*/
+/* Write out state to define a new video mode.  */
 static void RADEONRestoreMode(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 {
 #ifdef ENABLE_FLAT_PANEL
@@ -2078,40 +2080,40 @@ static void RADEONRestoreMode(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 /* Read common registers. */
 static void RADEONSaveCommonRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
-    save->ovr_clr	     = INREG(RADEON_OVR_CLR);
+    save->ovr_clr            = INREG(RADEON_OVR_CLR);
     save->ovr_wid_left_right = INREG(RADEON_OVR_WID_LEFT_RIGHT);
     save->ovr_wid_top_bottom = INREG(RADEON_OVR_WID_TOP_BOTTOM);
     save->ov0_scale_cntl     = INREG(RADEON_OV0_SCALE_CNTL);
-    save->mpp_tb_config	     = INREG(RADEON_MPP_TB_CONFIG);
-    save->mpp_gp_config	     = INREG(RADEON_MPP_GP_CONFIG);
-    save->subpic_cntl	     = INREG(RADEON_SUBPIC_CNTL);
-    save->viph_control	     = INREG(RADEON_VIPH_CONTROL);
-    save->i2c_cntl_1	     = INREG(RADEON_I2C_CNTL_1);
-    save->gen_int_cntl	     = INREG(RADEON_GEN_INT_CNTL);
+    save->mpp_tb_config      = INREG(RADEON_MPP_TB_CONFIG);
+    save->mpp_gp_config      = INREG(RADEON_MPP_GP_CONFIG);
+    save->subpic_cntl        = INREG(RADEON_SUBPIC_CNTL);
+    save->viph_control       = INREG(RADEON_VIPH_CONTROL);
+    save->i2c_cntl_1         = INREG(RADEON_I2C_CNTL_1);
+    save->gen_int_cntl       = INREG(RADEON_GEN_INT_CNTL);
     save->cap0_trig_cntl     = INREG(RADEON_CAP0_TRIG_CNTL);
     save->cap1_trig_cntl     = INREG(RADEON_CAP1_TRIG_CNTL);
-    save->bus_cntl	     = INREG(RADEON_BUS_CNTL);
+    save->bus_cntl           = INREG(RADEON_BUS_CNTL);
 }
 
 /* Read CRTC registers. */
 static void RADEONSaveCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
-    save->crtc_gen_cntl	       = INREG(RADEON_CRTC_GEN_CNTL);
-    save->crtc_ext_cntl	       = INREG(RADEON_CRTC_EXT_CNTL);
-    save->dac_cntl	       = INREG(RADEON_DAC_CNTL);
+    save->crtc_gen_cntl        = INREG(RADEON_CRTC_GEN_CNTL);
+    save->crtc_ext_cntl        = INREG(RADEON_CRTC_EXT_CNTL);
+    save->dac_cntl             = INREG(RADEON_DAC_CNTL);
     save->crtc_h_total_disp    = INREG(RADEON_CRTC_H_TOTAL_DISP);
     save->crtc_h_sync_strt_wid = INREG(RADEON_CRTC_H_SYNC_STRT_WID);
     save->crtc_v_total_disp    = INREG(RADEON_CRTC_V_TOTAL_DISP);
     save->crtc_v_sync_strt_wid = INREG(RADEON_CRTC_V_SYNC_STRT_WID);
-    save->crtc_offset	       = INREG(RADEON_CRTC_OFFSET);
+    save->crtc_offset          = INREG(RADEON_CRTC_OFFSET);
     save->crtc_offset_cntl     = INREG(RADEON_CRTC_OFFSET_CNTL);
-    save->crtc_pitch	       = INREG(RADEON_CRTC_PITCH);
+    save->crtc_pitch           = INREG(RADEON_CRTC_PITCH);
 }
 
 #ifdef ENABLE_FLAT_PANEL
@@ -2119,29 +2121,29 @@ static void RADEONSaveCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
 /* Read flat panel registers */
 static void RADEONSaveFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
     save->crtc2_gen_cntl       = INREG(RADEON_CRTC2_GEN_CNTL);
     save->fp_crtc_h_total_disp = INREG(RADEON_FP_CRTC_H_TOTAL_DISP);
     save->fp_crtc_v_total_disp = INREG(RADEON_FP_CRTC_V_TOTAL_DISP);
-    save->fp_gen_cntl	       = INREG(RADEON_FP_GEN_CNTL);
+    save->fp_gen_cntl          = INREG(RADEON_FP_GEN_CNTL);
     save->fp_h_sync_strt_wid   = INREG(RADEON_FP_H_SYNC_STRT_WID);
     save->fp_horz_stretch      = INREG(RADEON_FP_HORZ_STRETCH);
-    save->fp_panel_cntl	       = INREG(RADEON_FP_PANEL_CNTL);
+    save->fp_panel_cntl        = INREG(RADEON_FP_PANEL_CNTL);
     save->fp_v_sync_strt_wid   = INREG(RADEON_FP_V_SYNC_STRT_WID);
     save->fp_vert_stretch      = INREG(RADEON_FP_VERT_STRETCH);
-    save->lvds_gen_cntl	       = INREG(RADEON_LVDS_GEN_CNTL);
-    save->tmds_crc	       = INREG(RADEON_TMDS_CRC);
+    save->lvds_gen_cntl        = INREG(RADEON_LVDS_GEN_CNTL);
+    save->tmds_crc             = INREG(RADEON_TMDS_CRC);
 }
 #endif
 
 /* Read PLL registers. */
 static void RADEONSavePLLRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
 {
-    save->ppll_ref_div	       = INPLL(pScrn, RADEON_PPLL_REF_DIV);
-    save->ppll_div_3	       = INPLL(pScrn, RADEON_PPLL_DIV_3);
-    save->htotal_cntl	       = INPLL(pScrn, RADEON_HTOTAL_CNTL);
+    save->ppll_ref_div         = INPLL(pScrn, RADEON_PPLL_REF_DIV);
+    save->ppll_div_3           = INPLL(pScrn, RADEON_PPLL_DIV_3);
+    save->htotal_cntl          = INPLL(pScrn, RADEON_HTOTAL_CNTL);
 
     RADEONTRACE(("Read: 0x%08x 0x%08x 0x%08x\n",
 	       save->ppll_ref_div,
@@ -2156,19 +2158,19 @@ static void RADEONSavePLLRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
 /* Read DDA registers. */
 static void RADEONSaveDDARegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
-    save->dda_config	       = INREG(RADEON_DDA_CONFIG);
-    save->dda_on_off	       = INREG(RADEON_DDA_ON_OFF);
+    save->dda_config           = INREG(RADEON_DDA_CONFIG);
+    save->dda_on_off           = INREG(RADEON_DDA_ON_OFF);
 }
 
 /* Read palette data. */
 static void RADEONSavePalette(ScrnInfoPtr pScrn, RADEONSavePtr save)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int		  i;
+    int           i;
 
 #ifdef ENABLE_FLAT_PANEL
     /* Note: Radeon flat panel support has been disabled for now */
@@ -2203,10 +2205,10 @@ static void RADEONSaveMode(ScrnInfoPtr pScrn, RADEONSavePtr save)
 /* Save everything needed to restore the original VC state. */
 static void RADEONSave(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    RADEONSavePtr save	      = &info->SavedReg;
-    vgaHWPtr	  hwp	      = VGAHWPTR(pScrn);
+    RADEONSavePtr save        = &info->SavedReg;
+    vgaHWPtr      hwp         = VGAHWPTR(pScrn);
 
     RADEONTRACE(("RADEONSave\n"));
     if (info->FBDev) {
@@ -2219,20 +2221,20 @@ static void RADEONSave(ScrnInfoPtr pScrn)
 
     RADEONSaveMode(pScrn, save);
 
-    save->dp_datatype	   = INREG(RADEON_DP_DATATYPE);
+    save->dp_datatype      = INREG(RADEON_DP_DATATYPE);
     save->rbbm_soft_reset  = INREG(RADEON_RBBM_SOFT_RESET);
     save->clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX);
     save->amcgpio_en_reg   = INREG(RADEON_AMCGPIO_EN_REG);
-    save->amcgpio_mask	   = INREG(RADEON_AMCGPIO_MASK);
+    save->amcgpio_mask     = INREG(RADEON_AMCGPIO_MASK);
 }
 
 /* Restore the original (text) mode. */
 static void RADEONRestore(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
     RADEONSavePtr restore     = &info->SavedReg;
-    vgaHWPtr	  hwp	      = VGAHWPTR(pScrn);
+    vgaHWPtr      hwp         = VGAHWPTR(pScrn);
 
     RADEONTRACE(("RADEONRestore\n"));
     if (info->FBDev) {
@@ -2242,11 +2244,11 @@ static void RADEONRestore(ScrnInfoPtr pScrn)
 
     RADEONBlank(pScrn);
 
-    OUTREG(RADEON_AMCGPIO_MASK,	    restore->amcgpio_mask);
+    OUTREG(RADEON_AMCGPIO_MASK,     restore->amcgpio_mask);
     OUTREG(RADEON_AMCGPIO_EN_REG,   restore->amcgpio_en_reg);
     OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
     OUTREG(RADEON_RBBM_SOFT_RESET,  restore->rbbm_soft_reset);
-    OUTREG(RADEON_DP_DATATYPE,	    restore->dp_datatype);
+    OUTREG(RADEON_DP_DATATYPE,      restore->dp_datatype);
 
     RADEONRestoreMode(pScrn, restore);
     vgaHWUnlock(hwp);
@@ -2262,19 +2264,19 @@ static void RADEONRestore(ScrnInfoPtr pScrn)
 /* Define common registers for requested video mode. */
 static void RADEONInitCommonRegisters(RADEONSavePtr save, RADEONInfoPtr info)
 {
-    save->ovr_clr	     = 0;
+    save->ovr_clr            = 0;
     save->ovr_wid_left_right = 0;
     save->ovr_wid_top_bottom = 0;
     save->ov0_scale_cntl     = 0;
-    save->mpp_tb_config	     = 0;
-    save->mpp_gp_config	     = 0;
-    save->subpic_cntl	     = 0;
-    save->viph_control	     = 0;
-    save->i2c_cntl_1	     = 0;
+    save->mpp_tb_config      = 0;
+    save->mpp_gp_config      = 0;
+    save->subpic_cntl        = 0;
+    save->viph_control       = 0;
+    save->i2c_cntl_1         = 0;
     save->rbbm_soft_reset    = 0;
     save->cap0_trig_cntl     = 0;
     save->cap1_trig_cntl     = 0;
-    save->bus_cntl	     = info->BusCntl;
+    save->bus_cntl           = info->BusCntl;
     /*
      * If bursts are enabled, turn on discards
      * Radeon doesn't have write bursts
@@ -2287,26 +2289,26 @@ static void RADEONInitCommonRegisters(RADEONSavePtr save, RADEONInfoPtr info)
 static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 				  DisplayModePtr mode, RADEONInfoPtr info)
 {
-    int	   format;
-    int	   hsync_start;
-    int	   hsync_wid;
-    int	   hsync_fudge;
-    int	   vsync_wid;
-    int	   bytpp;
-    int	   hsync_fudge_default[] = { 0x00, 0x12, 0x09, 0x09, 0x06, 0x05 };
+    int    format;
+    int    hsync_start;
+    int    hsync_wid;
+    int    hsync_fudge;
+    int    vsync_wid;
+    int    bytpp;
+    int    hsync_fudge_default[] = { 0x00, 0x12, 0x09, 0x09, 0x06, 0x05 };
 #ifdef ENABLE_FLAT_PANEL
     /* Note: Radeon flat panel support has been disabled for now */
-    int	   hsync_fudge_fp[]	 = { 0x12, 0x11, 0x09, 0x09, 0x05, 0x05 };
-    int	   hsync_fudge_fp_crt[]	 = { 0x12, 0x10, 0x08, 0x08, 0x04, 0x04 };
+    int    hsync_fudge_fp[]      = { 0x12, 0x11, 0x09, 0x09, 0x05, 0x05 };
+    int    hsync_fudge_fp_crt[]  = { 0x12, 0x10, 0x08, 0x08, 0x04, 0x04 };
 #endif
 
     switch (info->CurrentLayout.pixel_code) {
     case 4:  format = 1; bytpp = 0; break;
     case 8:  format = 2; bytpp = 1; break;
-    case 15: format = 3; bytpp = 2; break;	/*  555 */
-    case 16: format = 4; bytpp = 2; break;	/*  565 */
-    case 24: format = 5; bytpp = 3; break;	/*  RGB */
-    case 32: format = 6; bytpp = 4; break;	/* xRGB */
+    case 15: format = 3; bytpp = 2; break;      /*  555 */
+    case 16: format = 4; bytpp = 2; break;      /*  565 */
+    case 24: format = 5; bytpp = 3; break;      /*  RGB */
+    case 32: format = 6; bytpp = 4; break;      /* xRGB */
     default:
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		   "Unsupported pixel depth (%d)\n", info->CurrentLayout.bitsPerPixel);
@@ -2318,8 +2320,8 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
     /* Note: Radeon flat panel support has been disabled for now */
     if (info->HasPanelRegs)
 	if (info->CRTOnly) hsync_fudge = hsync_fudge_fp_crt[format-1];
-	else		   hsync_fudge = hsync_fudge_fp[format-1];
-    else		   hsync_fudge = hsync_fudge_default[format-1];
+	else               hsync_fudge = hsync_fudge_fp[format-1];
+    else                   hsync_fudge = hsync_fudge_default[format-1];
 #else
     hsync_fudge = hsync_fudge_default[format-1];
 #endif
@@ -2335,7 +2337,7 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 			     : 0));
 
     save->crtc_ext_cntl = RADEON_VGA_ATI_LINEAR | RADEON_XCRT_CNT_EN;
-    save->dac_cntl	= (RADEON_DAC_MASK_ALL
+    save->dac_cntl      = (RADEON_DAC_MASK_ALL
 			   | RADEON_DAC_VGA_ADR_EN
 			   | (info->dac6bits ? 0 : RADEON_DAC_8BIT_EN));
 
@@ -2343,7 +2345,7 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 			      | (((mode->CrtcHDisplay / 8) - 1) << 16));
 
     hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8;
-    if (!hsync_wid)	  hsync_wid = 1;
+    if (!hsync_wid)       hsync_wid = 1;
     if (hsync_wid > 0x3f) hsync_wid = 0x3f;
 
     hsync_start = mode->CrtcHSyncStart - 8 + hsync_fudge;
@@ -2368,7 +2370,7 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 #endif
 
     vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart;
-    if (!vsync_wid)	  vsync_wid = 1;
+    if (!vsync_wid)       vsync_wid = 1;
     if (vsync_wid > 0x1f) vsync_wid = 0x1f;
 
     save->crtc_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff)
@@ -2376,7 +2378,7 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 				 | ((mode->Flags & V_NVSYNC)
 				    ? RADEON_CRTC_V_SYNC_POL
 				    : 0));
-    save->crtc_offset	   = 0;
+    save->crtc_offset      = 0;
     save->crtc_offset_cntl = 0;
 
     save->crtc_pitch  = ((pScrn->displayWidth * pScrn->bitsPerPixel) +
@@ -2397,8 +2399,8 @@ static void RADEONInitFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr orig,
 				  RADEONSavePtr save, DisplayModePtr mode,
 				  RADEONInfoPtr info)
 {
-    int	  xres = mode->CrtcHDisplay;
-    int	  yres = mode->CrtcVDisplay;
+    int   xres = mode->CrtcHDisplay;
+    int   yres = mode->CrtcVDisplay;
     float Hratio, Vratio;
 
     if (info->CRTOnly) {
@@ -2434,7 +2436,7 @@ static void RADEONInitFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr orig,
     save->fp_horz_stretch &= ~RADEON_HORZ_AUTO_RATIO_FIX_EN;
     if (Hratio == 1.0) save->fp_horz_stretch &= ~(RADEON_HORZ_STRETCH_BLEND |
 						  RADEON_HORZ_STRETCH_ENABLE);
-    else	       save->fp_horz_stretch |=	 (RADEON_HORZ_STRETCH_BLEND |
+    else               save->fp_horz_stretch |=  (RADEON_HORZ_STRETCH_BLEND |
 						  RADEON_HORZ_STRETCH_ENABLE);
 
     save->fp_vert_stretch =
@@ -2446,7 +2448,7 @@ static void RADEONInitFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr orig,
     save->fp_vert_stretch &= ~RADEON_VERT_AUTO_RATIO_EN;
     if (Vratio == 1.0) save->fp_vert_stretch &= ~(RADEON_VERT_STRETCH_ENABLE |
 						  RADEON_VERT_STRETCH_BLEND);
-    else	       save->fp_vert_stretch |=	 (RADEON_VERT_STRETCH_ENABLE |
+    else               save->fp_vert_stretch |=  (RADEON_VERT_STRETCH_ENABLE |
 						  RADEON_VERT_STRETCH_BLEND);
 
     save->fp_gen_cntl = (orig->fp_gen_cntl & ~(RADEON_FP_SEL_CRTC2 |
@@ -2459,26 +2461,26 @@ static void RADEONInitFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr orig,
 			      RADEON_FP_TDMS_EN);
     }
 
-    save->fp_panel_cntl	       = orig->fp_panel_cntl;
-    save->lvds_gen_cntl	       = orig->lvds_gen_cntl;
+    save->fp_panel_cntl        = orig->fp_panel_cntl;
+    save->lvds_gen_cntl        = orig->lvds_gen_cntl;
 
-    save->tmds_crc	       = orig->tmds_crc;
+    save->tmds_crc             = orig->tmds_crc;
 
     /* Disable CRT output by disabling CRT output and setting the CRT
        DAC to use CRTC2, which we set to 0's.  In the future, we will
        want to use the dual CRTC capabilities of the RADEON to allow both
        the flat panel and external CRT to either simultaneously display
        the same image or display two different images. */
-    save->crtc_ext_cntl	 &= ~RADEON_CRTC_CRT_ON;
-    save->dac_cntl	 |= RADEON_DAC_CRT_SEL_CRTC2;
+    save->crtc_ext_cntl  &= ~RADEON_CRTC_CRT_ON;
+    save->dac_cntl       |= RADEON_DAC_CRT_SEL_CRTC2;
     save->crtc2_gen_cntl  = 0;
 
     /* WARNING: Be careful about turning on the flat panel */
 #if 1
-    save->lvds_gen_cntl	 |= (RADEON_LVDS_ON | RADEON_LVDS_BLON);
+    save->lvds_gen_cntl  |= (RADEON_LVDS_ON | RADEON_LVDS_BLON);
 #else
-    save->fp_panel_cntl	 |= (RADEON_FP_DIGON | RADEON_FP_BLON);
-    save->fp_gen_cntl	 |= (RADEON_FP_FPON);
+    save->fp_panel_cntl  |= (RADEON_FP_DIGON | RADEON_FP_BLON);
+    save->fp_gen_cntl    |= (RADEON_FP_FPON);
 #endif
 
     save->fp_crtc_h_total_disp = save->crtc_h_total_disp;
@@ -2502,14 +2504,14 @@ static void RADEONInitPLLRegisters(RADEONSavePtr save, RADEONPLLPtr pll,
 				   Reference Manual (Technical Reference
 				   Manual P/N RRG-G04100-C Rev. 0.04), page
 				   3-17 (PLL_DIV_[3:0]).  */
-	{  1, 0 },		/* VCLK_SRC		    */
-	{  2, 1 },		/* VCLK_SRC/2		    */
-	{  4, 2 },		/* VCLK_SRC/4		    */
-	{  8, 3 },		/* VCLK_SRC/8		    */
-	{  3, 4 },		/* VCLK_SRC/3		    */
-	{ 16, 5 },		/* VCLK_SRC/16		    */
-	{  6, 6 },		/* VCLK_SRC/6		    */
-	{ 12, 7 },		/* VCLK_SRC/12		    */
+	{  1, 0 },              /* VCLK_SRC                 */
+	{  2, 1 },              /* VCLK_SRC/2               */
+	{  4, 2 },              /* VCLK_SRC/4               */
+	{  8, 3 },              /* VCLK_SRC/8               */
+	{  3, 4 },              /* VCLK_SRC/3               */
+	{ 16, 5 },              /* VCLK_SRC/16              */
+	{  6, 6 },              /* VCLK_SRC/6               */
+	{ 12, 7 },              /* VCLK_SRC/12              */
 	{  0, 0 }
     };
 
@@ -2523,10 +2525,10 @@ static void RADEONInitPLLRegisters(RADEONSavePtr save, RADEONPLLPtr pll,
     }
 
     save->dot_clock_freq = freq;
-    save->feedback_div	 = RADEONDiv(pll->reference_div
+    save->feedback_div   = RADEONDiv(pll->reference_div
 				     * save->pll_output_freq,
 				     pll->reference_freq);
-    save->post_div	 = post_div->divider;
+    save->post_div       = post_div->divider;
 
     RADEONTRACE(("dc=%d, of=%d, fd=%d, pd=%d\n",
 	       save->dot_clock_freq,
@@ -2534,24 +2536,24 @@ static void RADEONInitPLLRegisters(RADEONSavePtr save, RADEONPLLPtr pll,
 	       save->feedback_div,
 	       save->post_div));
 
-    save->ppll_ref_div	 = pll->reference_div;
-    save->ppll_div_3	 = (save->feedback_div | (post_div->bitvalue << 16));
-    save->htotal_cntl	 = 0;
+    save->ppll_ref_div   = pll->reference_div;
+    save->ppll_div_3     = (save->feedback_div | (post_div->bitvalue << 16));
+    save->htotal_cntl    = 0;
 }
 
 /* Define DDA registers for requested video mode. */
 static Bool RADEONInitDDARegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 				   RADEONPLLPtr pll, RADEONInfoPtr info)
 {
-    int		DisplayFifoWidth = 128;
-    int		DisplayFifoDepth = 32;
-    int		XclkFreq;
-    int		VclkFreq;
-    int		XclksPerTransfer;
-    int		XclksPerTransferPrecise;
-    int		UseablePrecision;
-    int		Roff;
-    int		Ron;
+    int         DisplayFifoWidth = 128;
+    int         DisplayFifoDepth = 32;
+    int         XclkFreq;
+    int         VclkFreq;
+    int         XclksPerTransfer;
+    int         XclksPerTransferPrecise;
+    int         UseablePrecision;
+    int         Roff;
+    int         Ron;
 
     XclkFreq = pll->xclk;
 
@@ -2571,7 +2573,7 @@ static Bool RADEONInitDDARegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 
     Roff  = XclksPerTransferPrecise * (DisplayFifoDepth - 4);
 
-    Ron	  = (4 * info->ram->MB
+    Ron   = (4 * info->ram->MB
 	     + 3 * MAX(info->ram->Trcd - 2, 0)
 	     + 2 * info->ram->Trp
 	     + info->ram->Twr
@@ -2616,8 +2618,8 @@ static void RADEONInitPalette(RADEONSavePtr save)
 static Bool RADEONInit(ScrnInfoPtr pScrn, DisplayModePtr mode,
 		       RADEONSavePtr save)
 {
-    RADEONInfoPtr info	    = RADEONPTR(pScrn);
-    double	  dot_clock = mode->Clock/1000.0;
+    RADEONInfoPtr info      = RADEONPTR(pScrn);
+    double        dot_clock = mode->Clock/1000.0;
 
 #if RADEON_DEBUG
     ErrorF("%-12.12s %7.2f  %4d %4d %4d %4d  %4d %4d %4d %4d (%d,%d)",
@@ -2637,10 +2639,10 @@ static Bool RADEONInit(ScrnInfoPtr pScrn, DisplayModePtr mode,
 	   pScrn->bitsPerPixel);
     if (mode->Flags & V_DBLSCAN)   ErrorF(" D");
     if (mode->Flags & V_INTERLACE) ErrorF(" I");
-    if (mode->Flags & V_PHSYNC)	   ErrorF(" +H");
-    if (mode->Flags & V_NHSYNC)	   ErrorF(" -H");
-    if (mode->Flags & V_PVSYNC)	   ErrorF(" +V");
-    if (mode->Flags & V_NVSYNC)	   ErrorF(" -V");
+    if (mode->Flags & V_PHSYNC)    ErrorF(" +H");
+    if (mode->Flags & V_NHSYNC)    ErrorF(" -H");
+    if (mode->Flags & V_PVSYNC)    ErrorF(" +V");
+    if (mode->Flags & V_NVSYNC)    ErrorF(" -V");
     ErrorF("\n");
     ErrorF("%-12.12s %7.2f  %4d %4d %4d %4d  %4d %4d %4d %4d (%d,%d)",
 	   mode->name,
@@ -2659,10 +2661,10 @@ static Bool RADEONInit(ScrnInfoPtr pScrn, DisplayModePtr mode,
 	   pScrn->bitsPerPixel);
     if (mode->Flags & V_DBLSCAN)   ErrorF(" D");
     if (mode->Flags & V_INTERLACE) ErrorF(" I");
-    if (mode->Flags & V_PHSYNC)	   ErrorF(" +H");
-    if (mode->Flags & V_NHSYNC)	   ErrorF(" -H");
-    if (mode->Flags & V_PVSYNC)	   ErrorF(" +V");
-    if (mode->Flags & V_NVSYNC)	   ErrorF(" -V");
+    if (mode->Flags & V_PHSYNC)    ErrorF(" +H");
+    if (mode->Flags & V_NHSYNC)    ErrorF(" -H");
+    if (mode->Flags & V_PVSYNC)    ErrorF(" +V");
+    if (mode->Flags & V_NVSYNC)    ErrorF(" -V");
     ErrorF("\n");
 #endif
 
@@ -2687,7 +2689,7 @@ static Bool RADEONInit(ScrnInfoPtr pScrn, DisplayModePtr mode,
 /* Initialize a new mode. */
 static Bool RADEONModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {
-    RADEONInfoPtr info	    = RADEONPTR(pScrn);
+    RADEONInfoPtr info      = RADEONPTR(pScrn);
 
     if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE;
 				/* FIXME?  DRILock/DRIUnlock here? */
@@ -2703,7 +2705,7 @@ static Bool RADEONModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 
 static Bool RADEONSaveScreen(ScreenPtr pScreen, int mode)
 {
-    ScrnInfoPtr	  pScrn = xf86Screens[pScreen->myNum];
+    ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
     Bool unblank;
 
     unblank = xf86IsUnblank(mode);
@@ -2730,8 +2732,8 @@ int RADEONValidMode(int scrnIndex, DisplayModePtr mode,
 {
 #ifdef ENABLE_FLAT_PANEL
     /* Note: Radeon flat panel support has been disabled for now */
-    ScrnInfoPtr	  pScrn = xf86Screens[scrnIndex];
-    RADEONInfoPtr info	= RADEONPTR(pScrn);
+    ScrnInfoPtr   pScrn = xf86Screens[scrnIndex];
+    RADEONInfoPtr info  = RADEONPTR(pScrn);
 
     if (info->HasPanelRegs) {
 	if (mode->Flags & V_INTERLACE) return MODE_NO_INTERLACE;
@@ -2747,26 +2749,26 @@ int RADEONValidMode(int scrnIndex, DisplayModePtr mode,
 		mode->CrtcVDisplay == RADEON_BIOS16(j+2)) {
 		/* Assume we are using expanded mode */
 		if (RADEON_BIOS16(j+5)) j  = RADEON_BIOS16(j+5);
-		else			j += 9;
+		else                    j += 9;
 
 		mode->Clock = (CARD32)RADEON_BIOS16(j) * 10;
 
-		mode->HDisplay	 = mode->CrtcHDisplay	=
+		mode->HDisplay   = mode->CrtcHDisplay   =
 		    ((RADEON_BIOS16(j+10) & 0x01ff)+1)*8;
 		mode->HSyncStart = mode->CrtcHSyncStart =
 		    ((RADEON_BIOS16(j+12) & 0x01ff)+1)*8;
-		mode->HSyncEnd	 = mode->CrtcHSyncEnd	=
+		mode->HSyncEnd   = mode->CrtcHSyncEnd   =
 		    mode->CrtcHSyncStart + (RADEON_BIOS8(j+14) & 0x1f);
-		mode->HTotal	 = mode->CrtcHTotal	=
+		mode->HTotal     = mode->CrtcHTotal     =
 		    ((RADEON_BIOS16(j+8)  & 0x01ff)+1)*8;
 
-		mode->VDisplay	 = mode->CrtcVDisplay	=
+		mode->VDisplay   = mode->CrtcVDisplay   =
 		    (RADEON_BIOS16(j+17) & 0x07ff)+1;
 		mode->VSyncStart = mode->CrtcVSyncStart =
 		    (RADEON_BIOS16(j+19) & 0x07ff)+1;
-		mode->VSyncEnd	 = mode->CrtcVSyncEnd	=
+		mode->VSyncEnd   = mode->CrtcVSyncEnd   =
 		    mode->CrtcVSyncStart + ((RADEON_BIOS16(j+19) >> 11)&0x1f);
-		mode->VTotal	 = mode->CrtcVTotal	=
+		mode->VTotal     = mode->CrtcVTotal     =
 		    (RADEON_BIOS16(j+15) & 0x07ff)+1;
 
 		return MODE_OK;
@@ -2783,10 +2785,10 @@ int RADEONValidMode(int scrnIndex, DisplayModePtr mode,
    is (x,y) in virtual space. */
 void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
 {
-    ScrnInfoPtr	  pScrn	      = xf86Screens[scrnIndex];
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    ScrnInfoPtr   pScrn       = xf86Screens[scrnIndex];
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int		  Base;
+    int           Base;
 
     Base = y * info->CurrentLayout.displayWidth + x;
 
@@ -2797,7 +2799,7 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
     case 32: Base *= 4; break;
     }
 
-    Base &= ~7;			/* 3 lower bits are always 0 */
+    Base &= ~7;                 /* 3 lower bits are always 0 */
 
     OUTREG(RADEON_CRTC_OFFSET, Base);
 }
@@ -2806,8 +2808,8 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
    mode. */
 Bool RADEONEnterVT(int scrnIndex, int flags)
 {
-    ScrnInfoPtr	  pScrn = xf86Screens[scrnIndex];
-    RADEONInfoPtr info	= RADEONPTR(pScrn);
+    ScrnInfoPtr   pScrn = xf86Screens[scrnIndex];
+    RADEONInfoPtr info  = RADEONPTR(pScrn);
 
     RADEONTRACE(("RADEONEnterVT\n"));
 #ifdef XF86DRI
@@ -2831,8 +2833,8 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
 void RADEONLeaveVT(int scrnIndex, int flags)
 {
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-    RADEONInfoPtr info	= RADEONPTR(pScrn);
-    RADEONSavePtr save	= &info->ModeReg;
+    RADEONInfoPtr info  = RADEONPTR(pScrn);
+    RADEONSavePtr save  = &info->ModeReg;
 
     RADEONTRACE(("RADEONLeaveVT\n"));
 #ifdef XF86DRI
@@ -2867,13 +2869,13 @@ static void RADEONLeaveVTFBDev(int scrnIndex, int flags)
     fbdevHWLeaveVT(scrnIndex,flags);
 }
 
-/* Called at the end of each server generation.	 Restore the original text
+/* Called at the end of each server generation.  Restore the original text
    mode, unmap video memory, and unwrap and call the saved CloseScreen
    function.  */
 static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
 {
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-    RADEONInfoPtr info	= RADEONPTR(pScrn);
+    RADEONInfoPtr info  = RADEONPTR(pScrn);
 
     RADEONTRACE(("RADEONCloseScreen\n"));
 
@@ -2890,17 +2892,17 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
 	RADEONUnmapMem(pScrn);
     }
 
-    if (info->accel)		 XAADestroyInfoRec(info->accel);
-    info->accel			 = NULL;
+    if (info->accel)             XAADestroyInfoRec(info->accel);
+    info->accel                  = NULL;
 
-    if (info->scratch_save)	 xfree(info->scratch_save);
-    info->scratch_save		 = NULL;
+    if (info->scratch_save)      xfree(info->scratch_save);
+    info->scratch_save           = NULL;
 
-    if (info->cursor)		 xf86DestroyCursorInfoRec(info->cursor);
-    info->cursor		 = NULL;
+    if (info->cursor)            xf86DestroyCursorInfoRec(info->cursor);
+    info->cursor                 = NULL;
 
-    if (info->DGAModes)		 xfree(info->DGAModes);
-    info->DGAModes		 = NULL;
+    if (info->DGAModes)          xfree(info->DGAModes);
+    info->DGAModes               = NULL;
 
     pScrn->vtSema = FALSE;
 
@@ -2923,9 +2925,9 @@ void RADEONFreeScreen(int scrnIndex, int flags)
 static void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn,
 					  int PowerManagementMode, int flags)
 {
-    RADEONInfoPtr info	      = RADEONPTR(pScrn);
+    RADEONInfoPtr info        = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int		  mask	      = (RADEON_CRTC_DISPLAY_DIS
+    int           mask        = (RADEON_CRTC_DISPLAY_DIS
 				 | RADEON_CRTC_HSYNC_DIS
 				 | RADEON_CRTC_VSYNC_DIS);
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c
index e4200f689..9260cc39b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c
@@ -1,34 +1,36 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c,v 1.1 2000/11/02 16:55:44 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c,v 1.2 2000/11/09 03:24:37 martin Exp $ */
 /*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario
- *		    and Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
- *   Rickard E. Faith <faith@precisioninsight.com>
- *   Kevin E. Martin <kevin@precisioninsight.com>
+ *   Kevin E. Martin <martin@valinux.com>
+ *   Rickard E. Faith <faith@valinux.com>
  *
  * Modified by Marc Aurele La France <tsi@xfree86.org> for ATI driver merge.
  */
@@ -50,7 +52,7 @@ SymTabRec RADEONChipsets[] = {
     { PCI_CHIP_RADEON_QE, "ATI Radeon QE (AGP)" },
     { PCI_CHIP_RADEON_QF, "ATI Radeon QF (AGP)" },
     { PCI_CHIP_RADEON_QG, "ATI Radeon QG (AGP)" },
-    { -1,		  NULL }
+    { -1,                 NULL }
 };
 
 PciChipsets RADEONPciChipsets[] = {
@@ -58,7 +60,7 @@ PciChipsets RADEONPciChipsets[] = {
     { PCI_CHIP_RADEON_QE, PCI_CHIP_RADEON_QE, RES_SHARED_VGA },
     { PCI_CHIP_RADEON_QF, PCI_CHIP_RADEON_QF, RES_SHARED_VGA },
     { PCI_CHIP_RADEON_QG, PCI_CHIP_RADEON_QG, RES_SHARED_VGA },
-    { -1,		  -1,		      RES_UNDEFINED }
+    { -1,                 -1,                 RES_UNDEFINED }
 };
 
 /* Return the options for supported chipset 'n'; NULL otherwise */
@@ -91,13 +93,13 @@ RADEONIdentify(int flags)
 Bool
 RADEONProbe(DriverPtr drv, int flags)
 {
-    int		  numUsed;
-    int		  numDevSections, nATIGDev, nRadeonGDev;
-    int		  *usedChips;
-    GDevPtr	  *devSections, *ATIGDevs, *RadeonGDevs;
+    int           numUsed;
+    int           numDevSections, nATIGDev, nRadeonGDev;
+    int           *usedChips;
+    GDevPtr       *devSections, *ATIGDevs, *RadeonGDevs;
     EntityInfoPtr pEnt;
-    Bool	  foundScreen = FALSE;
-    int		  i;
+    Bool          foundScreen = FALSE;
+    int           i;
 
     if (!xf86GetPciVideoInfo()) return FALSE;
 
@@ -144,7 +146,7 @@ RADEONProbe(DriverPtr drv, int flags)
 	pEnt = xf86GetEntityInfo(usedChips[i]);
 
 	if (pEnt->active) {
-	    ScrnInfoPtr pScrn	 = xf86AllocateScreen(drv, 0);
+	    ScrnInfoPtr pScrn    = xf86AllocateScreen(drv, 0);
 
 #ifdef XFree86LOADER
 	    if (!xf86LoadSubModule(pScrn, "radeon")) {
@@ -158,19 +160,19 @@ RADEONProbe(DriverPtr drv, int flags)
 #endif
 
 	    pScrn->driverVersion = RADEON_VERSION_CURRENT;
-	    pScrn->driverName	 = RADEON_DRIVER_NAME;
-	    pScrn->name		 = RADEON_NAME;
-	    pScrn->Probe	 = RADEONProbe;
-	    pScrn->PreInit	 = RADEONPreInit;
-	    pScrn->ScreenInit	 = RADEONScreenInit;
-	    pScrn->SwitchMode	 = RADEONSwitchMode;
-	    pScrn->AdjustFrame	 = RADEONAdjustFrame;
-	    pScrn->EnterVT	 = RADEONEnterVT;
-	    pScrn->LeaveVT	 = RADEONLeaveVT;
-	    pScrn->FreeScreen	 = RADEONFreeScreen;
-	    pScrn->ValidMode	 = RADEONValidMode;
-
-	    foundScreen		 = TRUE;
+	    pScrn->driverName    = RADEON_DRIVER_NAME;
+	    pScrn->name          = RADEON_NAME;
+	    pScrn->Probe         = RADEONProbe;
+	    pScrn->PreInit       = RADEONPreInit;
+	    pScrn->ScreenInit    = RADEONScreenInit;
+	    pScrn->SwitchMode    = RADEONSwitchMode;
+	    pScrn->AdjustFrame   = RADEONAdjustFrame;
+	    pScrn->EnterVT       = RADEONEnterVT;
+	    pScrn->LeaveVT       = RADEONLeaveVT;
+	    pScrn->FreeScreen    = RADEONFreeScreen;
+	    pScrn->ValidMode     = RADEONValidMode;
+
+	    foundScreen          = TRUE;
 
 	    xf86ConfigActivePciEntity(pScrn, usedChips[i], RADEONPciChipsets,
 				      0, 0, 0, 0, 0);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.h
index 9cb8bf007..5a66d002c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.h
@@ -1,28 +1,30 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.h,v 1.1 2000/11/02 16:55:45 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.h,v 1.2 2000/11/09 03:24:37 martin Exp $ */
 /*
- * Copyright 2000 ATI Technologies Inc., Markham, Ontario
- *	      and VA Linux Systems, Inc., Sunnyvale, California.
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
  */
 
 /*
@@ -42,30 +44,30 @@
 /* radeon_probe.c */
 extern OptionInfoPtr RADEONAvailableOptions
 		     FunctionPrototype((int, int));
-extern void	     RADEONIdentify
+extern void          RADEONIdentify
 		     FunctionPrototype((int));
-extern Bool	     RADEONProbe
+extern Bool          RADEONProbe
 		     FunctionPrototype((DriverPtr, int));
 
 extern SymTabRec     RADEONChipsets[];
 extern PciChipsets   RADEONPciChipsets[];
 
 /* radeon_driver.c */
-extern Bool	     RADEONPreInit
+extern Bool          RADEONPreInit
 		     FunctionPrototype((ScrnInfoPtr, int));
-extern Bool	     RADEONScreenInit
+extern Bool          RADEONScreenInit
 		     FunctionPrototype((int, ScreenPtr, int, char **));
-extern Bool	     RADEONSwitchMode
+extern Bool          RADEONSwitchMode
 		     FunctionPrototype((int, DisplayModePtr, int));
-extern void	     RADEONAdjustFrame
+extern void          RADEONAdjustFrame
 		     FunctionPrototype((int, int, int, int));
-extern Bool	     RADEONEnterVT
+extern Bool          RADEONEnterVT
 		     FunctionPrototype((int, int));
-extern void	     RADEONLeaveVT
+extern void          RADEONLeaveVT
 		     FunctionPrototype((int, int));
-extern void	     RADEONFreeScreen
+extern void          RADEONFreeScreen
 		     FunctionPrototype((int, int));
-extern int	     RADEONValidMode
+extern int           RADEONValidMode
 		     FunctionPrototype((int, DisplayModePtr, Bool, int));
 
 extern OptionInfoRec RADEONOptions[];
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h
index e3afbe77d..4af590a3e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h
@@ -1,34 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h,v 1.1 2000/11/02 16:55:46 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h,v 1.3 2000/11/09 10:30:53 alanh Exp $ */
 /*
- * Copyright 2000 ATI Technologies Inc., Markham, Ontario
- *	      and VA Linux Systems, Inc., Sunnyvale, California.
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, 
+ *                VA Linux Systems Inc., Fremont, California.
  *
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation on
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation on the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
  */
 
 /*
  * Authors:
  *   Kevin E. Martin <martin@valinux.com>
  *   Rickard E. Faith <faith@valinux.com>
+ *   Alan Hourihane <ahourihane@valinux.com>
  *
  * References:
  *
@@ -45,1432 +48,1432 @@
 
 /* !!!! FIXME !!!!  NOTE: THIS FILE HAS BEEN CONVERTED FROM r128_reg.h
  * AND CONTAINS REGISTERS AND REGISTER DEFINITIONS THAT ARE NOT CORRECT
- * ON THE RADEON.  A FULL AUDIT OF THIS CODE IS NEEDED!	 */
+ * ON THE RADEON.  A FULL AUDIT OF THIS CODE IS NEEDED!  */
 
 #ifndef _RADEON_REG_H_
 #define _RADEON_REG_H_
 #include <compiler.h>
 
 				/* Memory mapped register access macros */
-#define INREG8(addr)	    MMIO_IN8(RADEONMMIO, addr)
-#define INREG16(addr)	    MMIO_IN16(RADEONMMIO, addr)
-#define INREG(addr)	    MMIO_IN32(RADEONMMIO, addr)
+#define INREG8(addr)        MMIO_IN8(RADEONMMIO, addr)
+#define INREG16(addr)       MMIO_IN16(RADEONMMIO, addr)
+#define INREG(addr)         MMIO_IN32(RADEONMMIO, addr)
 #define OUTREG8(addr, val)  MMIO_OUT8(RADEONMMIO, addr, val)
 #define OUTREG16(addr, val) MMIO_OUT16(RADEONMMIO, addr, val)
 #define OUTREG(addr, val)   MMIO_OUT32(RADEONMMIO, addr, val)
 
-#define ADDRREG(addr)	    ((volatile CARD32 *)(RADEONMMIO + (addr)))
+#define ADDRREG(addr)       ((volatile CARD32 *)(RADEONMMIO + (addr)))
 
 
-#define OUTREGP(addr, val, mask)					  \
-    do {								  \
-	CARD32 tmp = INREG(addr);					  \
-	tmp &= (mask);							  \
-	tmp |= (val);							  \
-	OUTREG(addr, tmp);						  \
+#define OUTREGP(addr, val, mask)                                          \
+    do {                                                                  \
+	CARD32 tmp = INREG(addr);                                         \
+	tmp &= (mask);                                                    \
+	tmp |= (val);                                                     \
+	OUTREG(addr, tmp);                                                \
     } while (0)
 
 #define INPLL(pScrn, addr) RADEONINPLL(pScrn, addr)
 
 #if !RADEON_ATOMIC_UPDATE
-#define OUTPLL(addr, val)						  \
-    do {								  \
-	while ( (INREG(RADEON_CLOCK_CNTL_INDEX) & 0x9f) !=		  \
-					(addr | RADEON_PLL_WR_EN)) {	  \
-	    OUTREG8(RADEON_CLOCK_CNTL_INDEX, (((addr) & 0x1f) |		  \
-						RADEON_PLL_WR_EN));	  \
-	}								  \
-	OUTREG(RADEON_CLOCK_CNTL_DATA, val);				  \
+#define OUTPLL(addr, val)                                                 \
+    do {                                                                  \
+	while ( (INREG(RADEON_CLOCK_CNTL_INDEX) & 0x9f) !=                \
+					(addr | RADEON_PLL_WR_EN)) {      \
+	    OUTREG8(RADEON_CLOCK_CNTL_INDEX, (((addr) & 0x1f) |           \
+						RADEON_PLL_WR_EN));       \
+	}                                                                 \
+	OUTREG(RADEON_CLOCK_CNTL_DATA, val);                              \
     } while (0)
 #else
-#define OUTPLL(addr, val)						  \
-    do {								  \
-	OUTREG8(RADEON_CLOCK_CNTL_INDEX, (((addr) & 0x1f) |		  \
-						RADEON_PLL_WR_EN));	  \
-	OUTREG(RADEON_CLOCK_CNTL_DATA, val);				  \
+#define OUTPLL(addr, val)                                                 \
+    do {                                                                  \
+	OUTREG8(RADEON_CLOCK_CNTL_INDEX, (((addr) & 0x1f) |               \
+						RADEON_PLL_WR_EN));       \
+	OUTREG(RADEON_CLOCK_CNTL_DATA, val);                              \
     } while (0)
 #endif
 
-#define OUTPLLP(pScrn, addr, val, mask)					  \
-    do {								  \
-	CARD32 tmp = INPLL(pScrn, addr);				  \
-	tmp &= (mask);							  \
-	tmp |= (val);							  \
-	OUTPLL(addr, tmp);						  \
+#define OUTPLLP(pScrn, addr, val, mask)                                   \
+    do {                                                                  \
+	CARD32 tmp = INPLL(pScrn, addr);                                  \
+	tmp &= (mask);                                                    \
+	tmp |= (val);                                                     \
+	OUTPLL(addr, tmp);                                                \
     } while (0)
 
-#define OUTPAL_START(idx)						  \
-    do {								  \
-	OUTREG8(RADEON_PALETTE_INDEX, (idx));				  \
+#define OUTPAL_START(idx)                                                 \
+    do {                                                                  \
+	OUTREG8(RADEON_PALETTE_INDEX, (idx));                             \
     } while (0)
 
-#define OUTPAL_NEXT(r, g, b)						  \
-    do {								  \
-	OUTREG(RADEON_PALETTE_DATA, ((r) << 16) | ((g) << 8) | (b));	  \
+#define OUTPAL_NEXT(r, g, b)                                              \
+    do {                                                                  \
+	OUTREG(RADEON_PALETTE_DATA, ((r) << 16) | ((g) << 8) | (b));      \
     } while (0)
 
-#define OUTPAL_NEXT_CARD32(v)						  \
-    do {								  \
-	OUTREG(RADEON_PALETTE_DATA, (v & 0x00ffffff));			  \
+#define OUTPAL_NEXT_CARD32(v)                                             \
+    do {                                                                  \
+	OUTREG(RADEON_PALETTE_DATA, (v & 0x00ffffff));                    \
     } while (0)
 
-#define OUTPAL(idx, r, g, b)						  \
-    do {								  \
-	OUTPAL_START((idx));						  \
-	OUTPAL_NEXT((r), (g), (b));					  \
+#define OUTPAL(idx, r, g, b)                                              \
+    do {                                                                  \
+	OUTPAL_START((idx));                                              \
+	OUTPAL_NEXT((r), (g), (b));                                       \
     } while (0)
 
-#define INPAL_START(idx)						  \
-    do {								  \
-	OUTREG(RADEON_PALETTE_INDEX, (idx) << 16);			  \
+#define INPAL_START(idx)                                                  \
+    do {                                                                  \
+	OUTREG(RADEON_PALETTE_INDEX, (idx) << 16);                        \
     } while (0)
 
 #define INPAL_NEXT() INREG(RADEON_PALETTE_DATA)
 
-#define PAL_SELECT(idx)							  \
-    do {								  \
-	if (idx) {							  \
-	    OUTREG(RADEON_DAC_CNTL, INREG(RADEON_DAC_CNTL) |		  \
-		   RADEON_DAC_PALETTE_ACC_CTL);				  \
-	} else {							  \
-	    OUTREG(RADEON_DAC_CNTL, INREG(RADEON_DAC_CNTL) &		  \
-		   ~RADEON_DAC_PALETTE_ACC_CTL);			  \
-	}								  \
+#define PAL_SELECT(idx)                                                   \
+    do {                                                                  \
+	if (idx) {                                                        \
+	    OUTREG(RADEON_DAC_CNTL, INREG(RADEON_DAC_CNTL) |              \
+		   RADEON_DAC_PALETTE_ACC_CTL);                           \
+	} else {                                                          \
+	    OUTREG(RADEON_DAC_CNTL, INREG(RADEON_DAC_CNTL) &              \
+		   ~RADEON_DAC_PALETTE_ACC_CTL);                          \
+	}                                                                 \
     } while (0)
 
-#define RADEON_ADAPTER_ID		    0x0f2c /* PCI */
-#define RADEON_AGP_BASE			    0x0170
-#define RADEON_AGP_CNTL			    0x0174
-#	define RADEON_AGP_APER_SIZE_256MB   (0x00 << 0)
-#	define RADEON_AGP_APER_SIZE_128MB   (0x20 << 0)
-#	define RADEON_AGP_APER_SIZE_64MB    (0x30 << 0)
-#	define RADEON_AGP_APER_SIZE_32MB    (0x38 << 0)
-#	define RADEON_AGP_APER_SIZE_16MB    (0x3c << 0)
-#	define RADEON_AGP_APER_SIZE_8MB	    (0x3e << 0)
-#	define RADEON_AGP_APER_SIZE_4MB	    (0x3f << 0)
-#	define RADEON_AGP_APER_SIZE_MASK    (0x3f << 0)
-#define RADEON_AGP_COMMAND		    0x0f60 /* PCI */
-#define RADEON_AGP_PLL_CNTL		    0x000b /* PLL */
-#define RADEON_AGP_STATUS		    0x0f5c /* PCI */
-#	define RADEON_AGP_1X_MODE	    0x01
-#	define RADEON_AGP_2X_MODE	    0x02
-#	define RADEON_AGP_4X_MODE	    0x04
-#	define RADEON_AGP_MODE_MASK	    0x07
-#define RADEON_AMCGPIO_A_REG		    0x01a0
-#define RADEON_AMCGPIO_EN_REG		    0x01a8
-#define RADEON_AMCGPIO_MASK		    0x0194
-#define RADEON_AMCGPIO_Y_REG		    0x01a4
-#define RADEON_ATTRDR			    0x03c1 /* VGA */
-#define RADEON_ATTRDW			    0x03c0 /* VGA */
-#define RADEON_ATTRX			    0x03c0 /* VGA */
-#	define RADEON_AUX1_SC_EN	    (1 << 0)
-#	define RADEON_AUX1_SC_MODE_OR	    (0 << 1)
-#	define RADEON_AUX1_SC_MODE_NAND	    (1 << 1)
-#	define RADEON_AUX2_SC_EN	    (1 << 2)
-#	define RADEON_AUX2_SC_MODE_OR	    (0 << 3)
-#	define RADEON_AUX2_SC_MODE_NAND	    (1 << 3)
-#	define RADEON_AUX3_SC_EN	    (1 << 4)
-#	define RADEON_AUX3_SC_MODE_OR	    (0 << 5)
-#	define RADEON_AUX3_SC_MODE_NAND	    (1 << 5)
-#define RADEON_AUX_SC_CNTL		    0x1660
-#define RADEON_AUX1_SC_BOTTOM		    0x1670
-#define RADEON_AUX1_SC_LEFT		    0x1664
-#define RADEON_AUX1_SC_RIGHT		    0x1668
-#define RADEON_AUX1_SC_TOP		    0x166c
-#define RADEON_AUX2_SC_BOTTOM		    0x1680
-#define RADEON_AUX2_SC_LEFT		    0x1674
-#define RADEON_AUX2_SC_RIGHT		    0x1678
-#define RADEON_AUX2_SC_TOP		    0x167c
-#define RADEON_AUX3_SC_BOTTOM		    0x1690
-#define RADEON_AUX3_SC_LEFT		    0x1684
-#define RADEON_AUX3_SC_RIGHT		    0x1688
-#define RADEON_AUX3_SC_TOP		    0x168c
-#define RADEON_AUX_WINDOW_HORZ_CNTL	    0x02d8
-#define RADEON_AUX_WINDOW_VERT_CNTL	    0x02dc
+#define RADEON_ADAPTER_ID                   0x0f2c /* PCI */
+#define RADEON_AGP_BASE                     0x0170
+#define RADEON_AGP_CNTL                     0x0174
+#       define RADEON_AGP_APER_SIZE_256MB   (0x00 << 0)
+#       define RADEON_AGP_APER_SIZE_128MB   (0x20 << 0)
+#       define RADEON_AGP_APER_SIZE_64MB    (0x30 << 0)
+#       define RADEON_AGP_APER_SIZE_32MB    (0x38 << 0)
+#       define RADEON_AGP_APER_SIZE_16MB    (0x3c << 0)
+#       define RADEON_AGP_APER_SIZE_8MB     (0x3e << 0)
+#       define RADEON_AGP_APER_SIZE_4MB     (0x3f << 0)
+#       define RADEON_AGP_APER_SIZE_MASK    (0x3f << 0)
+#define RADEON_AGP_COMMAND                  0x0f60 /* PCI */
+#define RADEON_AGP_PLL_CNTL                 0x000b /* PLL */
+#define RADEON_AGP_STATUS                   0x0f5c /* PCI */
+#       define RADEON_AGP_1X_MODE           0x01
+#       define RADEON_AGP_2X_MODE           0x02
+#       define RADEON_AGP_4X_MODE           0x04
+#       define RADEON_AGP_MODE_MASK         0x07
+#define RADEON_AMCGPIO_A_REG                0x01a0
+#define RADEON_AMCGPIO_EN_REG               0x01a8
+#define RADEON_AMCGPIO_MASK                 0x0194
+#define RADEON_AMCGPIO_Y_REG                0x01a4
+#define RADEON_ATTRDR                       0x03c1 /* VGA */
+#define RADEON_ATTRDW                       0x03c0 /* VGA */
+#define RADEON_ATTRX                        0x03c0 /* VGA */
+#       define RADEON_AUX1_SC_EN            (1 << 0)
+#       define RADEON_AUX1_SC_MODE_OR       (0 << 1)
+#       define RADEON_AUX1_SC_MODE_NAND     (1 << 1)
+#       define RADEON_AUX2_SC_EN            (1 << 2)
+#       define RADEON_AUX2_SC_MODE_OR       (0 << 3)
+#       define RADEON_AUX2_SC_MODE_NAND     (1 << 3)
+#       define RADEON_AUX3_SC_EN            (1 << 4)
+#       define RADEON_AUX3_SC_MODE_OR       (0 << 5)
+#       define RADEON_AUX3_SC_MODE_NAND     (1 << 5)
+#define RADEON_AUX_SC_CNTL                  0x1660
+#define RADEON_AUX1_SC_BOTTOM               0x1670
+#define RADEON_AUX1_SC_LEFT                 0x1664
+#define RADEON_AUX1_SC_RIGHT                0x1668
+#define RADEON_AUX1_SC_TOP                  0x166c
+#define RADEON_AUX2_SC_BOTTOM               0x1680
+#define RADEON_AUX2_SC_LEFT                 0x1674
+#define RADEON_AUX2_SC_RIGHT                0x1678
+#define RADEON_AUX2_SC_TOP                  0x167c
+#define RADEON_AUX3_SC_BOTTOM               0x1690
+#define RADEON_AUX3_SC_LEFT                 0x1684
+#define RADEON_AUX3_SC_RIGHT                0x1688
+#define RADEON_AUX3_SC_TOP                  0x168c
+#define RADEON_AUX_WINDOW_HORZ_CNTL         0x02d8
+#define RADEON_AUX_WINDOW_VERT_CNTL         0x02dc
 
-#define RADEON_BASE_CODE		    0x0f0b
-#define RADEON_BIOS_0_SCRATCH		    0x0010
-#define RADEON_BIOS_1_SCRATCH		    0x0014
-#define RADEON_BIOS_2_SCRATCH		    0x0018
-#define RADEON_BIOS_3_SCRATCH		    0x001c
-#define RADEON_BIOS_ROM			    0x0f30 /* PCI */
-#define RADEON_BIST			    0x0f0f /* PCI */
-#define RADEON_BRUSH_DATA0		    0x1480
-#define RADEON_BRUSH_DATA1		    0x1484
-#define RADEON_BRUSH_DATA10		    0x14a8
-#define RADEON_BRUSH_DATA11		    0x14ac
-#define RADEON_BRUSH_DATA12		    0x14b0
-#define RADEON_BRUSH_DATA13		    0x14b4
-#define RADEON_BRUSH_DATA14		    0x14b8
-#define RADEON_BRUSH_DATA15		    0x14bc
-#define RADEON_BRUSH_DATA16		    0x14c0
-#define RADEON_BRUSH_DATA17		    0x14c4
-#define RADEON_BRUSH_DATA18		    0x14c8
-#define RADEON_BRUSH_DATA19		    0x14cc
-#define RADEON_BRUSH_DATA2		    0x1488
-#define RADEON_BRUSH_DATA20		    0x14d0
-#define RADEON_BRUSH_DATA21		    0x14d4
-#define RADEON_BRUSH_DATA22		    0x14d8
-#define RADEON_BRUSH_DATA23		    0x14dc
-#define RADEON_BRUSH_DATA24		    0x14e0
-#define RADEON_BRUSH_DATA25		    0x14e4
-#define RADEON_BRUSH_DATA26		    0x14e8
-#define RADEON_BRUSH_DATA27		    0x14ec
-#define RADEON_BRUSH_DATA28		    0x14f0
-#define RADEON_BRUSH_DATA29		    0x14f4
-#define RADEON_BRUSH_DATA3		    0x148c
-#define RADEON_BRUSH_DATA30		    0x14f8
-#define RADEON_BRUSH_DATA31		    0x14fc
-#define RADEON_BRUSH_DATA32		    0x1500
-#define RADEON_BRUSH_DATA33		    0x1504
-#define RADEON_BRUSH_DATA34		    0x1508
-#define RADEON_BRUSH_DATA35		    0x150c
-#define RADEON_BRUSH_DATA36		    0x1510
-#define RADEON_BRUSH_DATA37		    0x1514
-#define RADEON_BRUSH_DATA38		    0x1518
-#define RADEON_BRUSH_DATA39		    0x151c
-#define RADEON_BRUSH_DATA4		    0x1490
-#define RADEON_BRUSH_DATA40		    0x1520
-#define RADEON_BRUSH_DATA41		    0x1524
-#define RADEON_BRUSH_DATA42		    0x1528
-#define RADEON_BRUSH_DATA43		    0x152c
-#define RADEON_BRUSH_DATA44		    0x1530
-#define RADEON_BRUSH_DATA45		    0x1534
-#define RADEON_BRUSH_DATA46		    0x1538
-#define RADEON_BRUSH_DATA47		    0x153c
-#define RADEON_BRUSH_DATA48		    0x1540
-#define RADEON_BRUSH_DATA49		    0x1544
-#define RADEON_BRUSH_DATA5		    0x1494
-#define RADEON_BRUSH_DATA50		    0x1548
-#define RADEON_BRUSH_DATA51		    0x154c
-#define RADEON_BRUSH_DATA52		    0x1550
-#define RADEON_BRUSH_DATA53		    0x1554
-#define RADEON_BRUSH_DATA54		    0x1558
-#define RADEON_BRUSH_DATA55		    0x155c
-#define RADEON_BRUSH_DATA56		    0x1560
-#define RADEON_BRUSH_DATA57		    0x1564
-#define RADEON_BRUSH_DATA58		    0x1568
-#define RADEON_BRUSH_DATA59		    0x156c
-#define RADEON_BRUSH_DATA6		    0x1498
-#define RADEON_BRUSH_DATA60		    0x1570
-#define RADEON_BRUSH_DATA61		    0x1574
-#define RADEON_BRUSH_DATA62		    0x1578
-#define RADEON_BRUSH_DATA63		    0x157c
-#define RADEON_BRUSH_DATA7		    0x149c
-#define RADEON_BRUSH_DATA8		    0x14a0
-#define RADEON_BRUSH_DATA9		    0x14a4
-#define RADEON_BRUSH_SCALE		    0x1470
-#define RADEON_BRUSH_Y_X		    0x1474
-#define RADEON_BUS_CNTL			    0x0030
-#	define RADEON_BUS_MASTER_DIS	     (1 << 6)
-#	define RADEON_BUS_RD_DISCARD_EN	     (1 << 24)
-#	define RADEON_BUS_RD_ABORT_EN	     (1 << 25)
-#	define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28)
-#	define RADEON_BUS_WRT_BURST	     (1 << 29)
-#	define RADEON_BUS_READ_BURST	     (1 << 30)
-#define RADEON_BUS_CNTL1		    0x0034
-#	define RADEON_BUS_WAIT_ON_LOCK_EN    (1 << 4)
+#define RADEON_BASE_CODE                    0x0f0b
+#define RADEON_BIOS_0_SCRATCH               0x0010
+#define RADEON_BIOS_1_SCRATCH               0x0014
+#define RADEON_BIOS_2_SCRATCH               0x0018
+#define RADEON_BIOS_3_SCRATCH               0x001c
+#define RADEON_BIOS_ROM                     0x0f30 /* PCI */
+#define RADEON_BIST                         0x0f0f /* PCI */
+#define RADEON_BRUSH_DATA0                  0x1480
+#define RADEON_BRUSH_DATA1                  0x1484
+#define RADEON_BRUSH_DATA10                 0x14a8
+#define RADEON_BRUSH_DATA11                 0x14ac
+#define RADEON_BRUSH_DATA12                 0x14b0
+#define RADEON_BRUSH_DATA13                 0x14b4
+#define RADEON_BRUSH_DATA14                 0x14b8
+#define RADEON_BRUSH_DATA15                 0x14bc
+#define RADEON_BRUSH_DATA16                 0x14c0
+#define RADEON_BRUSH_DATA17                 0x14c4
+#define RADEON_BRUSH_DATA18                 0x14c8
+#define RADEON_BRUSH_DATA19                 0x14cc
+#define RADEON_BRUSH_DATA2                  0x1488
+#define RADEON_BRUSH_DATA20                 0x14d0
+#define RADEON_BRUSH_DATA21                 0x14d4
+#define RADEON_BRUSH_DATA22                 0x14d8
+#define RADEON_BRUSH_DATA23                 0x14dc
+#define RADEON_BRUSH_DATA24                 0x14e0
+#define RADEON_BRUSH_DATA25                 0x14e4
+#define RADEON_BRUSH_DATA26                 0x14e8
+#define RADEON_BRUSH_DATA27                 0x14ec
+#define RADEON_BRUSH_DATA28                 0x14f0
+#define RADEON_BRUSH_DATA29                 0x14f4
+#define RADEON_BRUSH_DATA3                  0x148c
+#define RADEON_BRUSH_DATA30                 0x14f8
+#define RADEON_BRUSH_DATA31                 0x14fc
+#define RADEON_BRUSH_DATA32                 0x1500
+#define RADEON_BRUSH_DATA33                 0x1504
+#define RADEON_BRUSH_DATA34                 0x1508
+#define RADEON_BRUSH_DATA35                 0x150c
+#define RADEON_BRUSH_DATA36                 0x1510
+#define RADEON_BRUSH_DATA37                 0x1514
+#define RADEON_BRUSH_DATA38                 0x1518
+#define RADEON_BRUSH_DATA39                 0x151c
+#define RADEON_BRUSH_DATA4                  0x1490
+#define RADEON_BRUSH_DATA40                 0x1520
+#define RADEON_BRUSH_DATA41                 0x1524
+#define RADEON_BRUSH_DATA42                 0x1528
+#define RADEON_BRUSH_DATA43                 0x152c
+#define RADEON_BRUSH_DATA44                 0x1530
+#define RADEON_BRUSH_DATA45                 0x1534
+#define RADEON_BRUSH_DATA46                 0x1538
+#define RADEON_BRUSH_DATA47                 0x153c
+#define RADEON_BRUSH_DATA48                 0x1540
+#define RADEON_BRUSH_DATA49                 0x1544
+#define RADEON_BRUSH_DATA5                  0x1494
+#define RADEON_BRUSH_DATA50                 0x1548
+#define RADEON_BRUSH_DATA51                 0x154c
+#define RADEON_BRUSH_DATA52                 0x1550
+#define RADEON_BRUSH_DATA53                 0x1554
+#define RADEON_BRUSH_DATA54                 0x1558
+#define RADEON_BRUSH_DATA55                 0x155c
+#define RADEON_BRUSH_DATA56                 0x1560
+#define RADEON_BRUSH_DATA57                 0x1564
+#define RADEON_BRUSH_DATA58                 0x1568
+#define RADEON_BRUSH_DATA59                 0x156c
+#define RADEON_BRUSH_DATA6                  0x1498
+#define RADEON_BRUSH_DATA60                 0x1570
+#define RADEON_BRUSH_DATA61                 0x1574
+#define RADEON_BRUSH_DATA62                 0x1578
+#define RADEON_BRUSH_DATA63                 0x157c
+#define RADEON_BRUSH_DATA7                  0x149c
+#define RADEON_BRUSH_DATA8                  0x14a0
+#define RADEON_BRUSH_DATA9                  0x14a4
+#define RADEON_BRUSH_SCALE                  0x1470
+#define RADEON_BRUSH_Y_X                    0x1474
+#define RADEON_BUS_CNTL                     0x0030
+#       define RADEON_BUS_MASTER_DIS         (1 << 6)
+#       define RADEON_BUS_RD_DISCARD_EN      (1 << 24)
+#       define RADEON_BUS_RD_ABORT_EN        (1 << 25)
+#       define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28)
+#       define RADEON_BUS_WRT_BURST          (1 << 29)
+#       define RADEON_BUS_READ_BURST         (1 << 30)
+#define RADEON_BUS_CNTL1                    0x0034
+#       define RADEON_BUS_WAIT_ON_LOCK_EN    (1 << 4)
 
-#define RADEON_CACHE_CNTL		    0x1724
-#define RADEON_CACHE_LINE		    0x0f0c /* PCI */
-#define RADEON_CAP0_TRIG_CNTL		    0x0950 /* ? */
-#define RADEON_CAP1_TRIG_CNTL		    0x09c0 /* ? */
-#define RADEON_CAPABILITIES_ID		    0x0f50 /* PCI */
-#define RADEON_CAPABILITIES_PTR		    0x0f34 /* PCI */
-#define RADEON_CLK_PIN_CNTL		    0x0001 /* PLL */
-#define RADEON_CLOCK_CNTL_DATA		    0x000c
-#define RADEON_CLOCK_CNTL_INDEX		    0x0008
-#	define RADEON_PLL_WR_EN		    (1 << 7)
-#	define RADEON_PLL_DIV_SEL	    (3 << 8)
-#define RADEON_CLR_CMP_CLR_3D		    0x1a24
-#define RADEON_CLR_CMP_CLR_DST		    0x15c8
-#define RADEON_CLR_CMP_CLR_SRC		    0x15c4
-#define RADEON_CLR_CMP_CNTL		    0x15c0
-#	define RADEON_SRC_CMP_EQ_COLOR	    (4 <<  0)
-#	define RADEON_SRC_CMP_NEQ_COLOR	    (5 <<  0)
-#	define RADEON_CLR_CMP_SRC_SOURCE    (1 << 24)
-#define RADEON_CLR_CMP_MASK		    0x15cc
-#	define RADEON_CLR_CMP_MSK	    0xffffffff
-#define RADEON_CLR_CMP_MASK_3D		    0x1A28
-#define RADEON_COMMAND			    0x0f04 /* PCI */
-#define RADEON_COMPOSITE_SHADOW_ID	    0x1a0c
-#define RADEON_CONFIG_APER_0_BASE	    0x0100
-#define RADEON_CONFIG_APER_1_BASE	    0x0104
-#define RADEON_CONFIG_APER_SIZE		    0x0108
-#define RADEON_CONFIG_BONDS		    0x00e8
-#define RADEON_CONFIG_CNTL		    0x00e0
-#define RADEON_CONFIG_MEMSIZE		    0x00f8
-#define RADEON_CONFIG_MEMSIZE_EMBEDDED	    0x0114
-#define RADEON_CONFIG_REG_1_BASE	    0x010c
-#define RADEON_CONFIG_REG_APER_SIZE	    0x0110
-#define RADEON_CONFIG_XSTRAP		    0x00e4
-#define RADEON_CONSTANT_COLOR_C		    0x1d34
-#	define RADEON_CONSTANT_COLOR_MASK   0x00ffffff
-#	define RADEON_CONSTANT_COLOR_ONE    0x00ffffff
-#	define RADEON_CONSTANT_COLOR_ZERO   0x00000000
-#define RADEON_CRC_CMDFIFO_ADDR		    0x0740
-#define RADEON_CRC_CMDFIFO_DOUT		    0x0744
-#define RADEON_CRTC_CRNT_FRAME		    0x0214
-#define RADEON_CRTC_DEBUG		    0x021c
-#define RADEON_CRTC_EXT_CNTL		    0x0054
-#	define RADEON_CRTC_VGA_XOVERSCAN    (1 <<  0)
-#	define RADEON_VGA_ATI_LINEAR	    (1 <<  3)
-#	define RADEON_XCRT_CNT_EN	    (1 <<  6)
-#	define RADEON_CRTC_HSYNC_DIS	    (1 <<  8)
-#	define RADEON_CRTC_VSYNC_DIS	    (1 <<  9)
-#	define RADEON_CRTC_DISPLAY_DIS	    (1 << 10)
-#	define RADEON_CRTC_CRT_ON	    (1 << 15)
-#define RADEON_CRTC_EXT_CNTL_DPMS_BYTE	    0x0055
-#	define RADEON_CRTC_HSYNC_DIS_BYTE   (1 <<  0)
-#	define RADEON_CRTC_VSYNC_DIS_BYTE   (1 <<  1)
-#	define RADEON_CRTC_DISPLAY_DIS_BYTE (1 <<  2)
-#define RADEON_CRTC_GEN_CNTL		    0x0050
-#	define RADEON_CRTC_DBL_SCAN_EN	    (1 <<  0)
-#	define RADEON_CRTC_INTERLACE_EN	    (1 <<  1)
-#	define RADEON_CRTC_CSYNC_EN	    (1 <<  4)
-#	define RADEON_CRTC_CUR_EN	    (1 << 16)
-#	define RADEON_CRTC_CUR_MODE_MASK    (7 << 17)
-#	define RADEON_CRTC_ICON_EN	    (1 << 20)
-#	define RADEON_CRTC_EXT_DISP_EN	    (1 << 24)
-#	define RADEON_CRTC_EN		    (1 << 25)
-#	define RADEON_CRTC_DISP_REQ_EN_B    (1 << 26)
-#define RADEON_CRTC_GUI_TRIG_VLINE	    0x0218
-#define RADEON_CRTC_H_SYNC_STRT_WID	    0x0204
-#	define RADEON_CRTC_H_SYNC_STRT_PIX	  (0x07	 <<  0)
-#	define RADEON_CRTC_H_SYNC_STRT_CHAR	  (0x1ff <<  3)
-#	define RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT 3
-#	define RADEON_CRTC_H_SYNC_WID		  (0x3f	 << 16)
-#	define RADEON_CRTC_H_SYNC_WID_SHIFT	  16
-#	define RADEON_CRTC_H_SYNC_POL		  (1	 << 23)
-#define RADEON_CRTC_H_TOTAL_DISP	    0x0200
-#	define RADEON_CRTC_H_TOTAL	    (0x01ff << 0)
-#	define RADEON_CRTC_H_TOTAL_SHIFT    0
-#	define RADEON_CRTC_H_DISP	    (0x00ff << 16)
-#	define RADEON_CRTC_H_DISP_SHIFT	    16
-#define RADEON_CRTC_OFFSET		    0x0224
-#define RADEON_CRTC_OFFSET_CNTL		    0x0228
-#define RADEON_CRTC_PITCH		    0x022c
-#define RADEON_CRTC_STATUS		    0x005c
-#	define RADEON_CRTC_VBLANK_SAVE	    (1 <<  1)
-#define RADEON_CRTC_V_SYNC_STRT_WID	    0x020c
-#	define RADEON_CRTC_V_SYNC_STRT	     (0x7ff <<	0)
-#	define RADEON_CRTC_V_SYNC_STRT_SHIFT 0
-#	define RADEON_CRTC_V_SYNC_WID	     (0x1f  << 16)
-#	define RADEON_CRTC_V_SYNC_WID_SHIFT  16
-#	define RADEON_CRTC_V_SYNC_POL	     (1	    << 23)
-#define RADEON_CRTC_V_TOTAL_DISP	    0x0208
-#	define RADEON_CRTC_V_TOTAL	    (0x07ff << 0)
-#	define RADEON_CRTC_V_TOTAL_SHIFT    0
-#	define RADEON_CRTC_V_DISP	    (0x07ff << 16)
-#	define RADEON_CRTC_V_DISP_SHIFT	    16
-#define RADEON_CRTC_VLINE_CRNT_VLINE	    0x0210
-#	define RADEON_CRTC_CRNT_VLINE_MASK  (0x7ff << 16)
-#define RADEON_CRTC2_CRNT_FRAME		    0x0314
-#define RADEON_CRTC2_DEBUG		    0x031c
-#define RADEON_CRTC2_GEN_CNTL		    0x03f8
-#define RADEON_CRTC2_GUI_TRIG_VLINE	    0x0318
-#define RADEON_CRTC2_H_SYNC_STRT_WID	    0x0304
-#define RADEON_CRTC2_H_TOTAL_DISP	    0x0300
-#define RADEON_CRTC2_OFFSET		    0x0324
-#define RADEON_CRTC2_OFFSET_CNTL	    0x0328
-#define RADEON_CRTC2_PITCH		    0x032c
-#define RADEON_CRTC2_STATUS		    0x03fc
-#define RADEON_CRTC2_V_SYNC_STRT_WID	    0x030c
-#define RADEON_CRTC2_V_TOTAL_DISP	    0x0308
-#define RADEON_CRTC2_VLINE_CRNT_VLINE	    0x0310
-#define RADEON_CRTC8_DATA		    0x03d5 /* VGA, 0x3b5 */
-#define RADEON_CRTC8_IDX		    0x03d4 /* VGA, 0x3b4 */
-#define RADEON_CUR_CLR0			    0x026c
-#define RADEON_CUR_CLR1			    0x0270
-#define RADEON_CUR_HORZ_VERT_OFF	    0x0268
-#define RADEON_CUR_HORZ_VERT_POSN	    0x0264
-#define RADEON_CUR_OFFSET		    0x0260
-#	define RADEON_CUR_LOCK		    (1 << 31)
+#define RADEON_CACHE_CNTL                   0x1724
+#define RADEON_CACHE_LINE                   0x0f0c /* PCI */
+#define RADEON_CAP0_TRIG_CNTL               0x0950 /* ? */
+#define RADEON_CAP1_TRIG_CNTL               0x09c0 /* ? */
+#define RADEON_CAPABILITIES_ID              0x0f50 /* PCI */
+#define RADEON_CAPABILITIES_PTR             0x0f34 /* PCI */
+#define RADEON_CLK_PIN_CNTL                 0x0001 /* PLL */
+#define RADEON_CLOCK_CNTL_DATA              0x000c
+#define RADEON_CLOCK_CNTL_INDEX             0x0008
+#       define RADEON_PLL_WR_EN             (1 << 7)
+#       define RADEON_PLL_DIV_SEL           (3 << 8)
+#define RADEON_CLR_CMP_CLR_3D               0x1a24
+#define RADEON_CLR_CMP_CLR_DST              0x15c8
+#define RADEON_CLR_CMP_CLR_SRC              0x15c4
+#define RADEON_CLR_CMP_CNTL                 0x15c0
+#       define RADEON_SRC_CMP_EQ_COLOR      (4 <<  0)
+#       define RADEON_SRC_CMP_NEQ_COLOR     (5 <<  0)
+#       define RADEON_CLR_CMP_SRC_SOURCE    (1 << 24)
+#define RADEON_CLR_CMP_MASK                 0x15cc
+#       define RADEON_CLR_CMP_MSK           0xffffffff
+#define RADEON_CLR_CMP_MASK_3D              0x1A28
+#define RADEON_COMMAND                      0x0f04 /* PCI */
+#define RADEON_COMPOSITE_SHADOW_ID          0x1a0c
+#define RADEON_CONFIG_APER_0_BASE           0x0100
+#define RADEON_CONFIG_APER_1_BASE           0x0104
+#define RADEON_CONFIG_APER_SIZE             0x0108
+#define RADEON_CONFIG_BONDS                 0x00e8
+#define RADEON_CONFIG_CNTL                  0x00e0
+#define RADEON_CONFIG_MEMSIZE               0x00f8
+#define RADEON_CONFIG_MEMSIZE_EMBEDDED      0x0114
+#define RADEON_CONFIG_REG_1_BASE            0x010c
+#define RADEON_CONFIG_REG_APER_SIZE         0x0110
+#define RADEON_CONFIG_XSTRAP                0x00e4
+#define RADEON_CONSTANT_COLOR_C             0x1d34
+#       define RADEON_CONSTANT_COLOR_MASK   0x00ffffff
+#       define RADEON_CONSTANT_COLOR_ONE    0x00ffffff
+#       define RADEON_CONSTANT_COLOR_ZERO   0x00000000
+#define RADEON_CRC_CMDFIFO_ADDR             0x0740
+#define RADEON_CRC_CMDFIFO_DOUT             0x0744
+#define RADEON_CRTC_CRNT_FRAME              0x0214
+#define RADEON_CRTC_DEBUG                   0x021c
+#define RADEON_CRTC_EXT_CNTL                0x0054
+#       define RADEON_CRTC_VGA_XOVERSCAN    (1 <<  0)
+#       define RADEON_VGA_ATI_LINEAR        (1 <<  3)
+#       define RADEON_XCRT_CNT_EN           (1 <<  6)
+#       define RADEON_CRTC_HSYNC_DIS        (1 <<  8)
+#       define RADEON_CRTC_VSYNC_DIS        (1 <<  9)
+#       define RADEON_CRTC_DISPLAY_DIS      (1 << 10)
+#       define RADEON_CRTC_CRT_ON           (1 << 15)
+#define RADEON_CRTC_EXT_CNTL_DPMS_BYTE      0x0055
+#       define RADEON_CRTC_HSYNC_DIS_BYTE   (1 <<  0)
+#       define RADEON_CRTC_VSYNC_DIS_BYTE   (1 <<  1)
+#       define RADEON_CRTC_DISPLAY_DIS_BYTE (1 <<  2)
+#define RADEON_CRTC_GEN_CNTL                0x0050
+#       define RADEON_CRTC_DBL_SCAN_EN      (1 <<  0)
+#       define RADEON_CRTC_INTERLACE_EN     (1 <<  1)
+#       define RADEON_CRTC_CSYNC_EN         (1 <<  4)
+#       define RADEON_CRTC_CUR_EN           (1 << 16)
+#       define RADEON_CRTC_CUR_MODE_MASK    (7 << 17)
+#       define RADEON_CRTC_ICON_EN          (1 << 20)
+#       define RADEON_CRTC_EXT_DISP_EN      (1 << 24)
+#       define RADEON_CRTC_EN               (1 << 25)
+#       define RADEON_CRTC_DISP_REQ_EN_B    (1 << 26)
+#define RADEON_CRTC_GUI_TRIG_VLINE          0x0218
+#define RADEON_CRTC_H_SYNC_STRT_WID         0x0204
+#       define RADEON_CRTC_H_SYNC_STRT_PIX        (0x07  <<  0)
+#       define RADEON_CRTC_H_SYNC_STRT_CHAR       (0x1ff <<  3)
+#       define RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT 3
+#       define RADEON_CRTC_H_SYNC_WID             (0x3f  << 16)
+#       define RADEON_CRTC_H_SYNC_WID_SHIFT       16
+#       define RADEON_CRTC_H_SYNC_POL             (1     << 23)
+#define RADEON_CRTC_H_TOTAL_DISP            0x0200
+#       define RADEON_CRTC_H_TOTAL          (0x01ff << 0)
+#       define RADEON_CRTC_H_TOTAL_SHIFT    0
+#       define RADEON_CRTC_H_DISP           (0x00ff << 16)
+#       define RADEON_CRTC_H_DISP_SHIFT     16
+#define RADEON_CRTC_OFFSET                  0x0224
+#define RADEON_CRTC_OFFSET_CNTL             0x0228
+#define RADEON_CRTC_PITCH                   0x022c
+#define RADEON_CRTC_STATUS                  0x005c
+#       define RADEON_CRTC_VBLANK_SAVE      (1 <<  1)
+#define RADEON_CRTC_V_SYNC_STRT_WID         0x020c
+#       define RADEON_CRTC_V_SYNC_STRT       (0x7ff <<  0)
+#       define RADEON_CRTC_V_SYNC_STRT_SHIFT 0
+#       define RADEON_CRTC_V_SYNC_WID        (0x1f  << 16)
+#       define RADEON_CRTC_V_SYNC_WID_SHIFT  16
+#       define RADEON_CRTC_V_SYNC_POL        (1     << 23)
+#define RADEON_CRTC_V_TOTAL_DISP            0x0208
+#       define RADEON_CRTC_V_TOTAL          (0x07ff << 0)
+#       define RADEON_CRTC_V_TOTAL_SHIFT    0
+#       define RADEON_CRTC_V_DISP           (0x07ff << 16)
+#       define RADEON_CRTC_V_DISP_SHIFT     16
+#define RADEON_CRTC_VLINE_CRNT_VLINE        0x0210
+#       define RADEON_CRTC_CRNT_VLINE_MASK  (0x7ff << 16)
+#define RADEON_CRTC2_CRNT_FRAME             0x0314
+#define RADEON_CRTC2_DEBUG                  0x031c
+#define RADEON_CRTC2_GEN_CNTL               0x03f8
+#define RADEON_CRTC2_GUI_TRIG_VLINE         0x0318
+#define RADEON_CRTC2_H_SYNC_STRT_WID        0x0304
+#define RADEON_CRTC2_H_TOTAL_DISP           0x0300
+#define RADEON_CRTC2_OFFSET                 0x0324
+#define RADEON_CRTC2_OFFSET_CNTL            0x0328
+#define RADEON_CRTC2_PITCH                  0x032c
+#define RADEON_CRTC2_STATUS                 0x03fc
+#define RADEON_CRTC2_V_SYNC_STRT_WID        0x030c
+#define RADEON_CRTC2_V_TOTAL_DISP           0x0308
+#define RADEON_CRTC2_VLINE_CRNT_VLINE       0x0310
+#define RADEON_CRTC8_DATA                   0x03d5 /* VGA, 0x3b5 */
+#define RADEON_CRTC8_IDX                    0x03d4 /* VGA, 0x3b4 */
+#define RADEON_CUR_CLR0                     0x026c
+#define RADEON_CUR_CLR1                     0x0270
+#define RADEON_CUR_HORZ_VERT_OFF            0x0268
+#define RADEON_CUR_HORZ_VERT_POSN           0x0264
+#define RADEON_CUR_OFFSET                   0x0260
+#       define RADEON_CUR_LOCK              (1 << 31)
 
-#define RADEON_DAC_CNTL			    0x0058
-#	define RADEON_DAC_RANGE_CNTL	    (3 <<  0)
-#	define RADEON_DAC_BLANKING	    (1 <<  2)
-#	define RADEON_DAC_CRT_SEL_CRTC2	    (1 <<  4)
-#	define RADEON_DAC_PALETTE_ACC_CTL   (1 <<  5)
-#	define RADEON_DAC_8BIT_EN	    (1 <<  8)
-#	define RADEON_DAC_VGA_ADR_EN	    (1 << 13)
-#	define RADEON_DAC_MASK_ALL	    (0xff << 24)
-#define RADEON_DAC_CRC_SIG		    0x02cc
-#define RADEON_DAC_DATA			    0x03c9 /* VGA */
-#define RADEON_DAC_MASK			    0x03c6 /* VGA */
-#define RADEON_DAC_R_INDEX		    0x03c7 /* VGA */
-#define RADEON_DAC_W_INDEX		    0x03c8 /* VGA */
-#define RADEON_DDA_CONFIG		    0x02e0
-#define RADEON_DDA_ON_OFF		    0x02e4
-#define RADEON_DEFAULT_OFFSET		    0x16e0
-#define RADEON_DEFAULT_PITCH		    0x16e4
-#define RADEON_DEFAULT_SC_BOTTOM_RIGHT	    0x16e8
-#	define RADEON_DEFAULT_SC_RIGHT_MAX  (0x1fff <<	0)
-#	define RADEON_DEFAULT_SC_BOTTOM_MAX (0x1fff << 16)
+#define RADEON_DAC_CNTL                     0x0058
+#       define RADEON_DAC_RANGE_CNTL        (3 <<  0)
+#       define RADEON_DAC_BLANKING          (1 <<  2)
+#       define RADEON_DAC_CRT_SEL_CRTC2     (1 <<  4)
+#       define RADEON_DAC_PALETTE_ACC_CTL   (1 <<  5)
+#       define RADEON_DAC_8BIT_EN           (1 <<  8)
+#       define RADEON_DAC_VGA_ADR_EN        (1 << 13)
+#       define RADEON_DAC_MASK_ALL          (0xff << 24)
+#define RADEON_DAC_CRC_SIG                  0x02cc
+#define RADEON_DAC_DATA                     0x03c9 /* VGA */
+#define RADEON_DAC_MASK                     0x03c6 /* VGA */
+#define RADEON_DAC_R_INDEX                  0x03c7 /* VGA */
+#define RADEON_DAC_W_INDEX                  0x03c8 /* VGA */
+#define RADEON_DDA_CONFIG                   0x02e0
+#define RADEON_DDA_ON_OFF                   0x02e4
+#define RADEON_DEFAULT_OFFSET               0x16e0
+#define RADEON_DEFAULT_PITCH                0x16e4
+#define RADEON_DEFAULT_SC_BOTTOM_RIGHT      0x16e8
+#       define RADEON_DEFAULT_SC_RIGHT_MAX  (0x1fff <<  0)
+#       define RADEON_DEFAULT_SC_BOTTOM_MAX (0x1fff << 16)
 #define RADEON_DESTINATION_3D_CLR_CMP_VAL   0x1820
 #define RADEON_DESTINATION_3D_CLR_CMP_MSK   0x1824
-#define RADEON_DEVICE_ID		    0x0f02 /* PCI */
-#define RADEON_DISP_MISC_CNTL		    0x0d00
-#	define RADEON_SOFT_RESET_GRPH_PP    (1 << 0)
-#define RADEON_DP_BRUSH_BKGD_CLR	    0x1478
-#define RADEON_DP_BRUSH_FRGD_CLR	    0x147c
-#define RADEON_DP_CNTL			    0x16c0
-#	define RADEON_DST_X_LEFT_TO_RIGHT   (1 <<  0)
-#	define RADEON_DST_Y_TOP_TO_BOTTOM   (1 <<  1)
-#define RADEON_DP_CNTL_XDIR_YDIR_YMAJOR	    0x16d0
-#	define RADEON_DST_Y_MAJOR	      (1 <<  2)
-#	define RADEON_DST_Y_DIR_TOP_TO_BOTTOM (1 << 15)
-#	define RADEON_DST_X_DIR_LEFT_TO_RIGHT (1 << 31)
-#define RADEON_DP_DATATYPE		    0x16c4
-#	define RADEON_HOST_BIG_ENDIAN_EN    (1 << 29)
-#define RADEON_DP_GUI_MASTER_CNTL	    0x146c
-#	define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1    <<  0)
-#	define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1    <<  1)
-#	define RADEON_GMC_SRC_CLIPPING		(1    <<  2)
-#	define RADEON_GMC_DST_CLIPPING		(1    <<  3)
-#	define RADEON_GMC_BRUSH_DATATYPE_MASK	(0x0f <<  4)
-#	define RADEON_GMC_BRUSH_8X8_MONO_FG_BG	(0    <<  4)
-#	define RADEON_GMC_BRUSH_8X8_MONO_FG_LA	(1    <<  4)
-#	define RADEON_GMC_BRUSH_1X8_MONO_FG_BG	(4    <<  4)
-#	define RADEON_GMC_BRUSH_1X8_MONO_FG_LA	(5    <<  4)
-#	define RADEON_GMC_BRUSH_32x1_MONO_FG_BG (6    <<  4)
-#	define RADEON_GMC_BRUSH_32x1_MONO_FG_LA (7    <<  4)
-#	define RADEON_GMC_BRUSH_8x8_COLOR	(10   <<  4)
-#	define RADEON_GMC_BRUSH_1X8_COLOR	(12   <<  4)
-#	define RADEON_GMC_BRUSH_SOLID_COLOR	(13   <<  4)
-#	define RADEON_GMC_BRUSH_NONE		(15   <<  4)
-#	define RADEON_GMC_DST_8BPP_CI		(2    <<  8)
-#	define RADEON_GMC_DST_15BPP		(3    <<  8)
-#	define RADEON_GMC_DST_16BPP		(4    <<  8)
-#	define RADEON_GMC_DST_24BPP		(5    <<  8)
-#	define RADEON_GMC_DST_32BPP		(6    <<  8)
-#	define RADEON_GMC_DST_8BPP_RGB		(7    <<  8)
-#	define RADEON_GMC_DST_Y8		(8    <<  8)
-#	define RADEON_GMC_DST_RGB8		(9    <<  8)
-#	define RADEON_GMC_DST_VYUY		(11   <<  8)
-#	define RADEON_GMC_DST_YVYU		(12   <<  8)
-#	define RADEON_GMC_DST_AYUV444		(14   <<  8)
-#	define RADEON_GMC_DST_ARGB4444		(15   <<  8)
-#	define RADEON_GMC_DST_DATATYPE_MASK	(0x0f <<  8)
-#	define RADEON_GMC_DST_DATATYPE_SHIFT	8
-#	define RADEON_GMC_SRC_DATATYPE_MASK	  (3	<< 12)
-#	define RADEON_GMC_SRC_DATATYPE_MONO_FG_BG (0	<< 12)
-#	define RADEON_GMC_SRC_DATATYPE_MONO_FG_LA (1	<< 12)
-#	define RADEON_GMC_SRC_DATATYPE_COLOR	  (3	<< 12)
-#	define RADEON_GMC_BYTE_PIX_ORDER	(1    << 14)
-#	define RADEON_GMC_BYTE_MSB_TO_LSB	(0    << 14)
-#	define RADEON_GMC_BYTE_LSB_TO_MSB	(1    << 14)
-#	define RADEON_GMC_CONVERSION_TEMP	(1    << 15)
-#	define RADEON_GMC_CONVERSION_TEMP_6500	(0    << 15)
-#	define RADEON_GMC_CONVERSION_TEMP_9300	(1    << 15)
-#	define RADEON_GMC_ROP3_MASK		(0xff << 16)
-#	define RADEON_DP_SRC_SOURCE_MASK	(7    << 24)
-#	define RADEON_DP_SRC_SOURCE_MEMORY	(2    << 24)
-#	define RADEON_DP_SRC_SOURCE_HOST_DATA	(3    << 24)
-#	define RADEON_GMC_3D_FCN_EN		(1    << 27)
-#	define RADEON_GMC_CLR_CMP_CNTL_DIS	(1    << 28)
-#	define RADEON_GMC_AUX_CLIP_DIS		(1    << 29)
-#	define RADEON_GMC_WR_MSK_DIS		(1    << 30)
-#	define RADEON_GMC_LD_BRUSH_Y_X		(1    << 31)
-#	define RADEON_ROP3_ZERO		    0x00000000
-#	define RADEON_ROP3_DSa		    0x00880000
-#	define RADEON_ROP3_SDna		    0x00440000
-#	define RADEON_ROP3_S		    0x00cc0000
-#	define RADEON_ROP3_DSna		    0x00220000
-#	define RADEON_ROP3_D		    0x00aa0000
-#	define RADEON_ROP3_DSx		    0x00660000
-#	define RADEON_ROP3_DSo		    0x00ee0000
-#	define RADEON_ROP3_DSon		    0x00110000
-#	define RADEON_ROP3_DSxn		    0x00990000
-#	define RADEON_ROP3_Dn		    0x00550000
-#	define RADEON_ROP3_SDno		    0x00dd0000
-#	define RADEON_ROP3_Sn		    0x00330000
-#	define RADEON_ROP3_DSno		    0x00bb0000
-#	define RADEON_ROP3_DSan		    0x00770000
-#	define RADEON_ROP3_ONE		    0x00ff0000
-#	define RADEON_ROP3_DPa		    0x00a00000
-#	define RADEON_ROP3_PDna		    0x00500000
-#	define RADEON_ROP3_P		    0x00f00000
-#	define RADEON_ROP3_DPna		    0x000a0000
-#	define RADEON_ROP3_D		    0x00aa0000
-#	define RADEON_ROP3_DPx		    0x005a0000
-#	define RADEON_ROP3_DPo		    0x00fa0000
-#	define RADEON_ROP3_DPon		    0x00050000
-#	define RADEON_ROP3_PDxn		    0x00a50000
-#	define RADEON_ROP3_PDno		    0x00f50000
-#	define RADEON_ROP3_Pn		    0x000f0000
-#	define RADEON_ROP3_DPno		    0x00af0000
-#	define RADEON_ROP3_DPan		    0x005f0000
+#define RADEON_DEVICE_ID                    0x0f02 /* PCI */
+#define RADEON_DISP_MISC_CNTL               0x0d00
+#       define RADEON_SOFT_RESET_GRPH_PP    (1 << 0)
+#define RADEON_DP_BRUSH_BKGD_CLR            0x1478
+#define RADEON_DP_BRUSH_FRGD_CLR            0x147c
+#define RADEON_DP_CNTL                      0x16c0
+#       define RADEON_DST_X_LEFT_TO_RIGHT   (1 <<  0)
+#       define RADEON_DST_Y_TOP_TO_BOTTOM   (1 <<  1)
+#define RADEON_DP_CNTL_XDIR_YDIR_YMAJOR     0x16d0
+#       define RADEON_DST_Y_MAJOR             (1 <<  2)
+#       define RADEON_DST_Y_DIR_TOP_TO_BOTTOM (1 << 15)
+#       define RADEON_DST_X_DIR_LEFT_TO_RIGHT (1 << 31)
+#define RADEON_DP_DATATYPE                  0x16c4
+#       define RADEON_HOST_BIG_ENDIAN_EN    (1 << 29)
+#define RADEON_DP_GUI_MASTER_CNTL           0x146c
+#       define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1    <<  0)
+#       define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1    <<  1)
+#       define RADEON_GMC_SRC_CLIPPING          (1    <<  2)
+#       define RADEON_GMC_DST_CLIPPING          (1    <<  3)
+#       define RADEON_GMC_BRUSH_DATATYPE_MASK   (0x0f <<  4)
+#       define RADEON_GMC_BRUSH_8X8_MONO_FG_BG  (0    <<  4)
+#       define RADEON_GMC_BRUSH_8X8_MONO_FG_LA  (1    <<  4)
+#       define RADEON_GMC_BRUSH_1X8_MONO_FG_BG  (4    <<  4)
+#       define RADEON_GMC_BRUSH_1X8_MONO_FG_LA  (5    <<  4)
+#       define RADEON_GMC_BRUSH_32x1_MONO_FG_BG (6    <<  4)
+#       define RADEON_GMC_BRUSH_32x1_MONO_FG_LA (7    <<  4)
+#       define RADEON_GMC_BRUSH_8x8_COLOR       (10   <<  4)
+#       define RADEON_GMC_BRUSH_1X8_COLOR       (12   <<  4)
+#       define RADEON_GMC_BRUSH_SOLID_COLOR     (13   <<  4)
+#       define RADEON_GMC_BRUSH_NONE            (15   <<  4)
+#       define RADEON_GMC_DST_8BPP_CI           (2    <<  8)
+#       define RADEON_GMC_DST_15BPP             (3    <<  8)
+#       define RADEON_GMC_DST_16BPP             (4    <<  8)
+#       define RADEON_GMC_DST_24BPP             (5    <<  8)
+#       define RADEON_GMC_DST_32BPP             (6    <<  8)
+#       define RADEON_GMC_DST_8BPP_RGB          (7    <<  8)
+#       define RADEON_GMC_DST_Y8                (8    <<  8)
+#       define RADEON_GMC_DST_RGB8              (9    <<  8)
+#       define RADEON_GMC_DST_VYUY              (11   <<  8)
+#       define RADEON_GMC_DST_YVYU              (12   <<  8)
+#       define RADEON_GMC_DST_AYUV444           (14   <<  8)
+#       define RADEON_GMC_DST_ARGB4444          (15   <<  8)
+#       define RADEON_GMC_DST_DATATYPE_MASK     (0x0f <<  8)
+#       define RADEON_GMC_DST_DATATYPE_SHIFT    8
+#       define RADEON_GMC_SRC_DATATYPE_MASK       (3    << 12)
+#       define RADEON_GMC_SRC_DATATYPE_MONO_FG_BG (0    << 12)
+#       define RADEON_GMC_SRC_DATATYPE_MONO_FG_LA (1    << 12)
+#       define RADEON_GMC_SRC_DATATYPE_COLOR      (3    << 12)
+#       define RADEON_GMC_BYTE_PIX_ORDER        (1    << 14)
+#       define RADEON_GMC_BYTE_MSB_TO_LSB       (0    << 14)
+#       define RADEON_GMC_BYTE_LSB_TO_MSB       (1    << 14)
+#       define RADEON_GMC_CONVERSION_TEMP       (1    << 15)
+#       define RADEON_GMC_CONVERSION_TEMP_6500  (0    << 15)
+#       define RADEON_GMC_CONVERSION_TEMP_9300  (1    << 15)
+#       define RADEON_GMC_ROP3_MASK             (0xff << 16)
+#       define RADEON_DP_SRC_SOURCE_MASK        (7    << 24)
+#       define RADEON_DP_SRC_SOURCE_MEMORY      (2    << 24)
+#       define RADEON_DP_SRC_SOURCE_HOST_DATA   (3    << 24)
+#       define RADEON_GMC_3D_FCN_EN             (1    << 27)
+#       define RADEON_GMC_CLR_CMP_CNTL_DIS      (1    << 28)
+#       define RADEON_GMC_AUX_CLIP_DIS          (1    << 29)
+#       define RADEON_GMC_WR_MSK_DIS            (1    << 30)
+#       define RADEON_GMC_LD_BRUSH_Y_X          (1    << 31)
+#       define RADEON_ROP3_ZERO             0x00000000
+#       define RADEON_ROP3_DSa              0x00880000
+#       define RADEON_ROP3_SDna             0x00440000
+#       define RADEON_ROP3_S                0x00cc0000
+#       define RADEON_ROP3_DSna             0x00220000
+#       define RADEON_ROP3_D                0x00aa0000
+#       define RADEON_ROP3_DSx              0x00660000
+#       define RADEON_ROP3_DSo              0x00ee0000
+#       define RADEON_ROP3_DSon             0x00110000
+#       define RADEON_ROP3_DSxn             0x00990000
+#       define RADEON_ROP3_Dn               0x00550000
+#       define RADEON_ROP3_SDno             0x00dd0000
+#       define RADEON_ROP3_Sn               0x00330000
+#       define RADEON_ROP3_DSno             0x00bb0000
+#       define RADEON_ROP3_DSan             0x00770000
+#       define RADEON_ROP3_ONE              0x00ff0000
+#       define RADEON_ROP3_DPa              0x00a00000
+#       define RADEON_ROP3_PDna             0x00500000
+#       define RADEON_ROP3_P                0x00f00000
+#       define RADEON_ROP3_DPna             0x000a0000
+#       define RADEON_ROP3_D                0x00aa0000
+#       define RADEON_ROP3_DPx              0x005a0000
+#       define RADEON_ROP3_DPo              0x00fa0000
+#       define RADEON_ROP3_DPon             0x00050000
+#       define RADEON_ROP3_PDxn             0x00a50000
+#       define RADEON_ROP3_PDno             0x00f50000
+#       define RADEON_ROP3_Pn               0x000f0000
+#       define RADEON_ROP3_DPno             0x00af0000
+#       define RADEON_ROP3_DPan             0x005f0000
 
 
-#define RADEON_DP_GUI_MASTER_CNTL_C	    0x1c84
-#define RADEON_DP_MIX			    0x16c8
-#define RADEON_DP_SRC_BKGD_CLR		    0x15dc
-#define RADEON_DP_SRC_FRGD_CLR		    0x15d8
-#define RADEON_DP_WRITE_MASK		    0x16cc
-#define RADEON_DST_BRES_DEC		    0x1630
-#define RADEON_DST_BRES_ERR		    0x1628
-#define RADEON_DST_BRES_INC		    0x162c
-#define RADEON_DST_BRES_LNTH		    0x1634
-#define RADEON_DST_BRES_LNTH_SUB	    0x1638
-#define RADEON_DST_HEIGHT		    0x1410
-#define RADEON_DST_HEIGHT_WIDTH		    0x143c
-#define RADEON_DST_HEIGHT_WIDTH_8	    0x158c
-#define RADEON_DST_HEIGHT_WIDTH_BW	    0x15b4
-#define RADEON_DST_HEIGHT_Y		    0x15a0
-#define RADEON_DST_LINE_START		    0x1600
-#define RADEON_DST_LINE_END		    0x1604
-#define RADEON_DST_OFFSET		    0x1404
-#define RADEON_DST_PITCH		    0x1408
-#define RADEON_DST_PITCH_OFFSET		    0x142c
-#define RADEON_DST_PITCH_OFFSET_C	    0x1c80
-#	define RADEON_PITCH_SHIFT		21
-#define RADEON_DST_WIDTH		    0x140c
-#define RADEON_DST_WIDTH_HEIGHT		    0x1598
-#define RADEON_DST_WIDTH_X		    0x1588
-#define RADEON_DST_WIDTH_X_INCY		    0x159c
-#define RADEON_DST_X			    0x141c
-#define RADEON_DST_X_SUB		    0x15a4
-#define RADEON_DST_X_Y			    0x1594
-#define RADEON_DST_Y			    0x1420
-#define RADEON_DST_Y_SUB		    0x15a8
-#define RADEON_DST_Y_X			    0x1438
+#define RADEON_DP_GUI_MASTER_CNTL_C         0x1c84
+#define RADEON_DP_MIX                       0x16c8
+#define RADEON_DP_SRC_BKGD_CLR              0x15dc
+#define RADEON_DP_SRC_FRGD_CLR              0x15d8
+#define RADEON_DP_WRITE_MASK                0x16cc
+#define RADEON_DST_BRES_DEC                 0x1630
+#define RADEON_DST_BRES_ERR                 0x1628
+#define RADEON_DST_BRES_INC                 0x162c
+#define RADEON_DST_BRES_LNTH                0x1634
+#define RADEON_DST_BRES_LNTH_SUB            0x1638
+#define RADEON_DST_HEIGHT                   0x1410
+#define RADEON_DST_HEIGHT_WIDTH             0x143c
+#define RADEON_DST_HEIGHT_WIDTH_8           0x158c
+#define RADEON_DST_HEIGHT_WIDTH_BW          0x15b4
+#define RADEON_DST_HEIGHT_Y                 0x15a0
+#define RADEON_DST_LINE_START               0x1600
+#define RADEON_DST_LINE_END                 0x1604
+#define RADEON_DST_OFFSET                   0x1404
+#define RADEON_DST_PITCH                    0x1408
+#define RADEON_DST_PITCH_OFFSET             0x142c
+#define RADEON_DST_PITCH_OFFSET_C           0x1c80
+#       define RADEON_PITCH_SHIFT               21
+#define RADEON_DST_WIDTH                    0x140c
+#define RADEON_DST_WIDTH_HEIGHT             0x1598
+#define RADEON_DST_WIDTH_X                  0x1588
+#define RADEON_DST_WIDTH_X_INCY             0x159c
+#define RADEON_DST_X                        0x141c
+#define RADEON_DST_X_SUB                    0x15a4
+#define RADEON_DST_X_Y                      0x1594
+#define RADEON_DST_Y                        0x1420
+#define RADEON_DST_Y_SUB                    0x15a8
+#define RADEON_DST_Y_X                      0x1438
 
-#define RADEON_FCP_CNTL			    0x0012 /* PLL */
-#define RADEON_FLUSH_1			    0x1704
-#define RADEON_FLUSH_2			    0x1708
-#define RADEON_FLUSH_3			    0x170c
-#define RADEON_FLUSH_4			    0x1710
-#define RADEON_FLUSH_5			    0x1714
-#define RADEON_FLUSH_6			    0x1718
-#define RADEON_FLUSH_7			    0x171c
-#define RADEON_FOG_3D_TABLE_START	    0x1810
-#define RADEON_FOG_3D_TABLE_END		    0x1814
-#define RADEON_FOG_3D_TABLE_DENSITY	    0x181c
-#define RADEON_FOG_TABLE_INDEX		    0x1a14
-#define RADEON_FOG_TABLE_DATA		    0x1a18
-#define RADEON_FP_CRTC_H_TOTAL_DISP	    0x0250
-#define RADEON_FP_CRTC_V_TOTAL_DISP	    0x0254
-#define RADEON_FP_GEN_CNTL		    0x0284
-#	define RADEON_FP_FPON		       (1 << 0)
-#	define RADEON_FP_TDMS_EN	       (1 <<  2)
-#	define RADEON_FP_DETECT_SENSE	       (1 <<  8)
-#	define RADEON_FP_SEL_CRTC2	       (1 << 13)
-#	define RADEON_FP_CRTC_DONT_SHADOW_VPAR (1 << 16)
-#	define RADEON_FP_CRTC_USE_SHADOW_VEND  (1 << 18)
-#	define RADEON_FP_CRTC_HORZ_DIV2_EN     (1 << 20)
-#	define RADEON_FP_CRTC_HOR_CRT_DIV2_DIS (1 << 21)
-#	define RADEON_FP_USE_SHADOW_EN	       (1 << 24)
-#define RADEON_FP_H_SYNC_STRT_WID	    0x02c4
-#define RADEON_FP_HORZ_STRETCH		    0x028c
-#	define RADEON_HORZ_STRETCH_RATIO_MASK  0xffff
-#	define RADEON_HORZ_STRETCH_RATIO_SHIFT 0
-#	define RADEON_HORZ_STRETCH_RATIO_MAX   4096
-#	define RADEON_HORZ_PANEL_SIZE	       (0xff   << 16)
-#	define RADEON_HORZ_PANEL_SHIFT	       16
-#	define RADEON_HORZ_STRETCH_PIXREP      (0      << 25)
-#	define RADEON_HORZ_STRETCH_BLEND       (1      << 25)
-#	define RADEON_HORZ_STRETCH_ENABLE      (1      << 26)
-#	define RADEON_HORZ_FP_LOOP_STRETCH     (0x7    << 27)
-#	define RADEON_HORZ_STRETCH_RESERVED    (1      << 30)
-#	define RADEON_HORZ_AUTO_RATIO_FIX_EN   (1      << 31)
+#define RADEON_FCP_CNTL                     0x0012 /* PLL */
+#define RADEON_FLUSH_1                      0x1704
+#define RADEON_FLUSH_2                      0x1708
+#define RADEON_FLUSH_3                      0x170c
+#define RADEON_FLUSH_4                      0x1710
+#define RADEON_FLUSH_5                      0x1714
+#define RADEON_FLUSH_6                      0x1718
+#define RADEON_FLUSH_7                      0x171c
+#define RADEON_FOG_3D_TABLE_START           0x1810
+#define RADEON_FOG_3D_TABLE_END             0x1814
+#define RADEON_FOG_3D_TABLE_DENSITY         0x181c
+#define RADEON_FOG_TABLE_INDEX              0x1a14
+#define RADEON_FOG_TABLE_DATA               0x1a18
+#define RADEON_FP_CRTC_H_TOTAL_DISP         0x0250
+#define RADEON_FP_CRTC_V_TOTAL_DISP         0x0254
+#define RADEON_FP_GEN_CNTL                  0x0284
+#       define RADEON_FP_FPON                  (1 << 0)
+#       define RADEON_FP_TDMS_EN               (1 <<  2)
+#       define RADEON_FP_DETECT_SENSE          (1 <<  8)
+#       define RADEON_FP_SEL_CRTC2             (1 << 13)
+#       define RADEON_FP_CRTC_DONT_SHADOW_VPAR (1 << 16)
+#       define RADEON_FP_CRTC_USE_SHADOW_VEND  (1 << 18)
+#       define RADEON_FP_CRTC_HORZ_DIV2_EN     (1 << 20)
+#       define RADEON_FP_CRTC_HOR_CRT_DIV2_DIS (1 << 21)
+#       define RADEON_FP_USE_SHADOW_EN         (1 << 24)
+#define RADEON_FP_H_SYNC_STRT_WID           0x02c4
+#define RADEON_FP_HORZ_STRETCH              0x028c
+#       define RADEON_HORZ_STRETCH_RATIO_MASK  0xffff
+#       define RADEON_HORZ_STRETCH_RATIO_SHIFT 0
+#       define RADEON_HORZ_STRETCH_RATIO_MAX   4096
+#       define RADEON_HORZ_PANEL_SIZE          (0xff   << 16)
+#       define RADEON_HORZ_PANEL_SHIFT         16
+#       define RADEON_HORZ_STRETCH_PIXREP      (0      << 25)
+#       define RADEON_HORZ_STRETCH_BLEND       (1      << 25)
+#       define RADEON_HORZ_STRETCH_ENABLE      (1      << 26)
+#       define RADEON_HORZ_FP_LOOP_STRETCH     (0x7    << 27)
+#       define RADEON_HORZ_STRETCH_RESERVED    (1      << 30)
+#       define RADEON_HORZ_AUTO_RATIO_FIX_EN   (1      << 31)
 
-#define RADEON_FP_PANEL_CNTL		    0x0288
-#	define RADEON_FP_DIGON		    (1 << 0)
-#	define RADEON_FP_BLON		    (1 << 1)
-#define RADEON_FP_V_SYNC_STRT_WID	    0x02c8
-#define RADEON_FP_VERT_STRETCH		    0x0290
-#	define RADEON_VERT_PANEL_SIZE	       (0x7ff <<  0)
-#	define RADEON_VERT_PANEL_SHIFT	       0
-#	define RADEON_VERT_STRETCH_RATIO_MASK  0x3ff
-#	define RADEON_VERT_STRETCH_RATIO_SHIFT 11
-#	define RADEON_VERT_STRETCH_RATIO_MAX   1024
-#	define RADEON_VERT_STRETCH_ENABLE      (1     << 24)
-#	define RADEON_VERT_STRETCH_LINEREP     (0     << 25)
-#	define RADEON_VERT_STRETCH_BLEND       (1     << 25)
-#	define RADEON_VERT_AUTO_RATIO_EN       (1     << 26)
-#	define RADEON_VERT_STRETCH_RESERVED    0xf8e00000
+#define RADEON_FP_PANEL_CNTL                0x0288
+#       define RADEON_FP_DIGON              (1 << 0)
+#       define RADEON_FP_BLON               (1 << 1)
+#define RADEON_FP_V_SYNC_STRT_WID           0x02c8
+#define RADEON_FP_VERT_STRETCH              0x0290
+#       define RADEON_VERT_PANEL_SIZE          (0x7ff <<  0)
+#       define RADEON_VERT_PANEL_SHIFT         0
+#       define RADEON_VERT_STRETCH_RATIO_MASK  0x3ff
+#       define RADEON_VERT_STRETCH_RATIO_SHIFT 11
+#       define RADEON_VERT_STRETCH_RATIO_MAX   1024
+#       define RADEON_VERT_STRETCH_ENABLE      (1     << 24)
+#       define RADEON_VERT_STRETCH_LINEREP     (0     << 25)
+#       define RADEON_VERT_STRETCH_BLEND       (1     << 25)
+#       define RADEON_VERT_AUTO_RATIO_EN       (1     << 26)
+#       define RADEON_VERT_STRETCH_RESERVED    0xf8e00000
 
-#define RADEON_GEN_INT_CNTL		    0x0040
-#define RADEON_GEN_INT_STATUS		    0x0044
-#	define RADEON_VSYNC_INT_AK	    (1 <<  2)
-#	define RADEON_VSYNC_INT		    (1 <<  2)
-#define RADEON_RBBM_SOFT_RESET		    0x00f0
-#	define RADEON_SOFT_RESET_CP	      (1 <<  0)
-#	define RADEON_SOFT_RESET_HI	      (1 <<  1)
-#	define RADEON_SOFT_RESET_SE	      (1 <<  2)
-#	define RADEON_SOFT_RESET_RE	      (1 <<  3)
-#	define RADEON_SOFT_RESET_PP	      (1 <<  4)
-#	define RADEON_SOFT_RESET_E2	      (1 <<  5)
-#	define RADEON_SOFT_RESET_RB	      (1 <<  6)
-#	define RADEON_SOFT_RESET_HDP	      (1 <<  7)
-#define RADEON_GENENB			    0x03c3 /* VGA */
-#define RADEON_GENFC_RD			    0x03ca /* VGA */
-#define RADEON_GENFC_WT			    0x03da /* VGA, 0x03ba */
-#define RADEON_GENMO_RD			    0x03cc /* VGA */
-#define RADEON_GENMO_WT			    0x03c2 /* VGA */
-#define RADEON_GENS0			    0x03c2 /* VGA */
-#define RADEON_GENS1			    0x03da /* VGA, 0x03ba */
-#define RADEON_GPIO_MONID		    0x0068
-#	define RADEON_GPIO_MONID_A_0	    (1 <<  0)
-#	define RADEON_GPIO_MONID_A_1	    (1 <<  1)
-#	define RADEON_GPIO_MONID_A_2	    (1 <<  2)
-#	define RADEON_GPIO_MONID_A_3	    (1 <<  3)
-#	define RADEON_GPIO_MONID_Y_0	    (1 <<  8)
-#	define RADEON_GPIO_MONID_Y_1	    (1 <<  9)
-#	define RADEON_GPIO_MONID_Y_2	    (1 << 10)
-#	define RADEON_GPIO_MONID_Y_3	    (1 << 11)
-#	define RADEON_GPIO_MONID_EN_0	    (1 << 16)
-#	define RADEON_GPIO_MONID_EN_1	    (1 << 17)
-#	define RADEON_GPIO_MONID_EN_2	    (1 << 18)
-#	define RADEON_GPIO_MONID_EN_3	    (1 << 19)
-#	define RADEON_GPIO_MONID_MASK_0	    (1 << 24)
-#	define RADEON_GPIO_MONID_MASK_1	    (1 << 25)
-#	define RADEON_GPIO_MONID_MASK_2	    (1 << 26)
-#	define RADEON_GPIO_MONID_MASK_3	    (1 << 27)
-#define RADEON_GPIO_MONIDB		    0x006c
-#define RADEON_GRPH8_DATA		    0x03cf /* VGA */
-#define RADEON_GRPH8_IDX		    0x03ce /* VGA */
-#define RADEON_GUI_DEBUG0		    0x16a0
-#define RADEON_GUI_DEBUG1		    0x16a4
-#define RADEON_GUI_DEBUG2		    0x16a8
-#define RADEON_GUI_DEBUG3		    0x16ac
-#define RADEON_GUI_DEBUG4		    0x16b0
-#define RADEON_GUI_DEBUG5		    0x16b4
-#define RADEON_GUI_DEBUG6		    0x16b8
-#define RADEON_GUI_SCRATCH_REG0		    0x15e0
-#define RADEON_GUI_SCRATCH_REG1		    0x15e4
-#define RADEON_GUI_SCRATCH_REG2		    0x15e8
-#define RADEON_GUI_SCRATCH_REG3		    0x15ec
-#define RADEON_GUI_SCRATCH_REG4		    0x15f0
-#define RADEON_GUI_SCRATCH_REG5		    0x15f4
-#define RADEON_HEADER			    0x0f0e /* PCI */
-#define RADEON_HOST_DATA0		    0x17c0
-#define RADEON_HOST_DATA1		    0x17c4
-#define RADEON_HOST_DATA2		    0x17c8
-#define RADEON_HOST_DATA3		    0x17cc
-#define RADEON_HOST_DATA4		    0x17d0
-#define RADEON_HOST_DATA5		    0x17d4
-#define RADEON_HOST_DATA6		    0x17d8
-#define RADEON_HOST_DATA7		    0x17dc
-#define RADEON_HOST_DATA_LAST		    0x17e0
-#define RADEON_HOST_PATH_CNTL		    0x0130
-#define RADEON_HTOTAL_CNTL		    0x0009 /* PLL */
-#define RADEON_HW_DEBUG			    0x0128
-#define RADEON_HW_DEBUG2		    0x011c
+#define RADEON_GEN_INT_CNTL                 0x0040
+#define RADEON_GEN_INT_STATUS               0x0044
+#       define RADEON_VSYNC_INT_AK          (1 <<  2)
+#       define RADEON_VSYNC_INT             (1 <<  2)
+#define RADEON_RBBM_SOFT_RESET              0x00f0
+#       define RADEON_SOFT_RESET_CP           (1 <<  0)
+#       define RADEON_SOFT_RESET_HI           (1 <<  1)
+#       define RADEON_SOFT_RESET_SE           (1 <<  2)
+#       define RADEON_SOFT_RESET_RE           (1 <<  3)
+#       define RADEON_SOFT_RESET_PP           (1 <<  4)
+#       define RADEON_SOFT_RESET_E2           (1 <<  5)
+#       define RADEON_SOFT_RESET_RB           (1 <<  6)
+#       define RADEON_SOFT_RESET_HDP          (1 <<  7)
+#define RADEON_GENENB                       0x03c3 /* VGA */
+#define RADEON_GENFC_RD                     0x03ca /* VGA */
+#define RADEON_GENFC_WT                     0x03da /* VGA, 0x03ba */
+#define RADEON_GENMO_RD                     0x03cc /* VGA */
+#define RADEON_GENMO_WT                     0x03c2 /* VGA */
+#define RADEON_GENS0                        0x03c2 /* VGA */
+#define RADEON_GENS1                        0x03da /* VGA, 0x03ba */
+#define RADEON_GPIO_MONID                   0x0068
+#       define RADEON_GPIO_MONID_A_0        (1 <<  0)
+#       define RADEON_GPIO_MONID_A_1        (1 <<  1)
+#       define RADEON_GPIO_MONID_A_2        (1 <<  2)
+#       define RADEON_GPIO_MONID_A_3        (1 <<  3)
+#       define RADEON_GPIO_MONID_Y_0        (1 <<  8)
+#       define RADEON_GPIO_MONID_Y_1        (1 <<  9)
+#       define RADEON_GPIO_MONID_Y_2        (1 << 10)
+#       define RADEON_GPIO_MONID_Y_3        (1 << 11)
+#       define RADEON_GPIO_MONID_EN_0       (1 << 16)
+#       define RADEON_GPIO_MONID_EN_1       (1 << 17)
+#       define RADEON_GPIO_MONID_EN_2       (1 << 18)
+#       define RADEON_GPIO_MONID_EN_3       (1 << 19)
+#       define RADEON_GPIO_MONID_MASK_0     (1 << 24)
+#       define RADEON_GPIO_MONID_MASK_1     (1 << 25)
+#       define RADEON_GPIO_MONID_MASK_2     (1 << 26)
+#       define RADEON_GPIO_MONID_MASK_3     (1 << 27)
+#define RADEON_GPIO_MONIDB                  0x006c
+#define RADEON_GRPH8_DATA                   0x03cf /* VGA */
+#define RADEON_GRPH8_IDX                    0x03ce /* VGA */
+#define RADEON_GUI_DEBUG0                   0x16a0
+#define RADEON_GUI_DEBUG1                   0x16a4
+#define RADEON_GUI_DEBUG2                   0x16a8
+#define RADEON_GUI_DEBUG3                   0x16ac
+#define RADEON_GUI_DEBUG4                   0x16b0
+#define RADEON_GUI_DEBUG5                   0x16b4
+#define RADEON_GUI_DEBUG6                   0x16b8
+#define RADEON_GUI_SCRATCH_REG0             0x15e0
+#define RADEON_GUI_SCRATCH_REG1             0x15e4
+#define RADEON_GUI_SCRATCH_REG2             0x15e8
+#define RADEON_GUI_SCRATCH_REG3             0x15ec
+#define RADEON_GUI_SCRATCH_REG4             0x15f0
+#define RADEON_GUI_SCRATCH_REG5             0x15f4
+#define RADEON_HEADER                       0x0f0e /* PCI */
+#define RADEON_HOST_DATA0                   0x17c0
+#define RADEON_HOST_DATA1                   0x17c4
+#define RADEON_HOST_DATA2                   0x17c8
+#define RADEON_HOST_DATA3                   0x17cc
+#define RADEON_HOST_DATA4                   0x17d0
+#define RADEON_HOST_DATA5                   0x17d4
+#define RADEON_HOST_DATA6                   0x17d8
+#define RADEON_HOST_DATA7                   0x17dc
+#define RADEON_HOST_DATA_LAST               0x17e0
+#define RADEON_HOST_PATH_CNTL               0x0130
+#define RADEON_HTOTAL_CNTL                  0x0009 /* PLL */
+#define RADEON_HW_DEBUG                     0x0128
+#define RADEON_HW_DEBUG2                    0x011c
 
-#define RADEON_I2C_CNTL_1		    0x0094 /* ? */
-#define RADEON_INTERRUPT_LINE		    0x0f3c /* PCI */
-#define RADEON_INTERRUPT_PIN		    0x0f3d /* PCI */
-#define RADEON_IO_BASE			    0x0f14 /* PCI */
+#define RADEON_I2C_CNTL_1                   0x0094 /* ? */
+#define RADEON_INTERRUPT_LINE               0x0f3c /* PCI */
+#define RADEON_INTERRUPT_PIN                0x0f3d /* PCI */
+#define RADEON_IO_BASE                      0x0f14 /* PCI */
 
-#define RADEON_LATENCY			    0x0f0d /* PCI */
-#define RADEON_LEAD_BRES_DEC		    0x1608
-#define RADEON_LEAD_BRES_LNTH		    0x161c
-#define RADEON_LEAD_BRES_LNTH_SUB	    0x1624
-#define RADEON_LVDS_GEN_CNTL		    0x02d0
-#	define RADEON_LVDS_ON		    (1	 <<  0)
-#	define RADEON_LVDS_BLON		    (1	 << 19)
-#	define RADEON_LVDS_SEL_CRTC2	    (1	 << 23)
-#	define RADEON_HSYNC_DELAY_SHIFT	    28
-#	define RADEON_HSYNC_DELAY_MASK	    (0xf << 28)
+#define RADEON_LATENCY                      0x0f0d /* PCI */
+#define RADEON_LEAD_BRES_DEC                0x1608
+#define RADEON_LEAD_BRES_LNTH               0x161c
+#define RADEON_LEAD_BRES_LNTH_SUB           0x1624
+#define RADEON_LVDS_GEN_CNTL                0x02d0
+#       define RADEON_LVDS_ON               (1   <<  0)
+#       define RADEON_LVDS_BLON             (1   << 19)
+#       define RADEON_LVDS_SEL_CRTC2        (1   << 23)
+#       define RADEON_HSYNC_DELAY_SHIFT     28
+#       define RADEON_HSYNC_DELAY_MASK      (0xf << 28)
 
-#define RADEON_MAX_LATENCY		    0x0f3f /* PCI */
-#define RADEON_MC_AGP_LOCATION		    0x014c
-#define RADEON_MC_FB_LOCATION		    0x0148
-#define RADEON_MCLK_CNTL		    0x0012 /* PLL */
-#	define RADEON_FORCE_GCP		    (1 << 16)
-#	define RADEON_FORCE_PIPE3D_CP	    (1 << 17)
-#	define RADEON_FORCE_RCP		    (1 << 18)
-#define RADEON_MDGPIO_A_REG		    0x01ac
-#define RADEON_MDGPIO_EN_REG		    0x01b0
-#define RADEON_MDGPIO_MASK		    0x0198
-#define RADEON_MDGPIO_Y_REG		    0x01b4
-#define RADEON_MEM_ADDR_CONFIG		    0x0148
-#define RADEON_MEM_BASE			    0x0f10 /* PCI */
-#define RADEON_MEM_CNTL			    0x0140
-#define RADEON_MEM_INIT_LAT_TIMER	    0x0154
-#define RADEON_MEM_INTF_CNTL		    0x014c
-#define RADEON_MEM_SDRAM_MODE_REG	    0x0158
-#define RADEON_MEM_STR_CNTL		    0x0150
-#define RADEON_MEM_VGA_RP_SEL		    0x003c
-#define RADEON_MEM_VGA_WP_SEL		    0x0038
-#define RADEON_MIN_GRANT		    0x0f3e /* PCI */
-#define RADEON_MM_DATA			    0x0004
-#define RADEON_MM_INDEX			    0x0000
-#define RADEON_MPLL_CNTL		    0x000e /* PLL */
-#define RADEON_MPP_TB_CONFIG		    0x01c0 /* ? */
-#define RADEON_MPP_GP_CONFIG		    0x01c8 /* ? */
+#define RADEON_MAX_LATENCY                  0x0f3f /* PCI */
+#define RADEON_MC_AGP_LOCATION              0x014c
+#define RADEON_MC_FB_LOCATION               0x0148
+#define RADEON_MCLK_CNTL                    0x0012 /* PLL */
+#       define RADEON_FORCE_GCP             (1 << 16)
+#       define RADEON_FORCE_PIPE3D_CP       (1 << 17)
+#       define RADEON_FORCE_RCP             (1 << 18)
+#define RADEON_MDGPIO_A_REG                 0x01ac
+#define RADEON_MDGPIO_EN_REG                0x01b0
+#define RADEON_MDGPIO_MASK                  0x0198
+#define RADEON_MDGPIO_Y_REG                 0x01b4
+#define RADEON_MEM_ADDR_CONFIG              0x0148
+#define RADEON_MEM_BASE                     0x0f10 /* PCI */
+#define RADEON_MEM_CNTL                     0x0140
+#define RADEON_MEM_INIT_LAT_TIMER           0x0154
+#define RADEON_MEM_INTF_CNTL                0x014c
+#define RADEON_MEM_SDRAM_MODE_REG           0x0158
+#define RADEON_MEM_STR_CNTL                 0x0150
+#define RADEON_MEM_VGA_RP_SEL               0x003c
+#define RADEON_MEM_VGA_WP_SEL               0x0038
+#define RADEON_MIN_GRANT                    0x0f3e /* PCI */
+#define RADEON_MM_DATA                      0x0004
+#define RADEON_MM_INDEX                     0x0000
+#define RADEON_MPLL_CNTL                    0x000e /* PLL */
+#define RADEON_MPP_TB_CONFIG                0x01c0 /* ? */
+#define RADEON_MPP_GP_CONFIG                0x01c8 /* ? */
 
-#define RADEON_N_VIF_COUNT		    0x0248
+#define RADEON_N_VIF_COUNT                  0x0248
 
-#define RADEON_OV0_SCALE_CNTL		    0x0420 /* ? */
-#define RADEON_OVR_CLR			    0x0230
-#define RADEON_OVR_WID_LEFT_RIGHT	    0x0234
-#define RADEON_OVR_WID_TOP_BOTTOM	    0x0238
+#define RADEON_OV0_SCALE_CNTL               0x0420 /* ? */
+#define RADEON_OVR_CLR                      0x0230
+#define RADEON_OVR_WID_LEFT_RIGHT           0x0234
+#define RADEON_OVR_WID_TOP_BOTTOM           0x0238
 
 /* first overlay unit (there is only one) */
 
-#define RADEON_OV0_Y_X_START		  0x0400
-#define RADEON_OV0_Y_X_END		  0x0404
-#define RADEON_OV0_EXCLUSIVE_HORZ		  0x0408
-#	define	RADEON_EXCL_HORZ_START_MASK	0x000000ff
-#	define	RADEON_EXCL_HORZ_END_MASK		0x0000ff00
-#	define	RADEON_EXCL_HORZ_BACK_PORCH_MASK	0x00ff0000
-#	define	RADEON_EXCL_HORZ_EXCLUSIVE_EN	0x80000000
-#define RADEON_OV0_EXCLUSIVE_VERT		  0x040C
-#	define	RADEON_EXCL_VERT_START_MASK	0x000003ff
-#	define	RADEON_EXCL_VERT_END_MASK		0x03ff0000
-#define RADEON_OV0_REG_LOAD_CNTL		  0x0410
-#	define	RADEON_REG_LD_CTL_LOCK			0x00000001L
-#	define	RADEON_REG_LD_CTL_VBLANK_DURING_LOCK	0x00000002L
-#	define	RADEON_REG_LD_CTL_STALL_GUI_UNTIL_FLIP	0x00000004L
-#	define	RADEON_REG_LD_CTL_LOCK_READBACK		0x00000008L
-#define RADEON_OV0_SCALE_CNTL		    0x0420
-#	define	RADEON_SCALER_PIX_EXPAND		0x00000001L
-#	define	RADEON_SCALER_Y2R_TEMP		0x00000002L
-#	define	RADEON_SCALER_HORZ_PICK_NEAREST 0x00000003L
-#	define	RADEON_SCALER_VERT_PICK_NEAREST 0x00000004L
-#	define	RADEON_SCALER_SIGNED_UV		0x00000010L
-#	define	RADEON_SCALER_GAMMA_SEL_MASK	0x00000060L
-#	define	RADEON_SCALER_GAMMA_SEL_BRIGHT	0x00000000L
-#	define	RADEON_SCALER_GAMMA_SEL_G22	0x00000020L
-#	define	RADEON_SCALER_GAMMA_SEL_G18	0x00000040L
-#	define	RADEON_SCALER_GAMMA_SEL_G14	0x00000060L
-#	define	RADEON_SCALER_COMCORE_SHIFT_UP_ONE	0x00000080L
-#	define	RADEON_SCALER_SURFAC_FORMAT	0x00000f00L
-#	define	RADEON_SCALER_SOURCE_15BPP	0x00000300L
-#	define	RADEON_SCALER_SOURCE_16BPP	0x00000400L
-#	define	RADEON_SCALER_SOURCE_32BPP	0x00000600L
-#	define	RADEON_SCALER_SOURCE_YUV9		0x00000900L
-#	define	RADEON_SCALER_SOURCE_YUV12	0x00000A00L
-#	define	RADEON_SCALER_SOURCE_VYUY422	0x00000B00L
-#	define	RADEON_SCALER_SOURCE_YVYU422	0x00000C00L
-#	define	RADEON_SCALER_SMART_SWITCH	0x00008000L
-#	define	RADEON_SCALER_BURST_PER_PLANE	0x00ff0000L
-#	define	RADEON_SCALER_DOUBLE_BUFFER	0x01000000L
-#	define	RADEON_SCALER_DIS_LIMIT		0x08000000L
-#	define	RADEON_SCALER_PRG_LOAD_START	0x10000000L
-#	define	RADEON_SCALER_INT_EMU		0x20000000L
-#	define	RADEON_SCALER_ENABLE		0x40000000L
-#	define	RADEON_SCALER_SOFT_RESET		0x80000000L
-#define RADEON_OV0_V_INC			  0x0424
-#define RADEON_OV0_P1_V_ACCUM_INIT	  0x0428
-#	define	RADEON_OV0_P1_MAX_LN_IN_PER_LN_OUT	0x00000003L
-#	define	RADEON_OV0_P1_V_ACCUM_INIT_MASK		0x01ff8000L
-#define RADEON_OV0_P23_V_ACCUM_INIT	  0x042C
-#define RADEON_OV0_P1_BLANK_LINES_AT_TOP	  0x0430
-#	define	RADEON_P1_BLNK_LN_AT_TOP_M1_MASK	0x00000fffL
-#	define	RADEON_P1_ACTIVE_LINES_M1		0x0fff0000L
-#define RADEON_OV0_P23_BLANK_LINES_AT_TOP	  0x0434
-#	define	RADEON_P23_BLNK_LN_AT_TOP_M1_MASK	0x000007ffL
-#	define	RADEON_P23_ACTIVE_LINES_M1	0x07ff0000L
-#define RADEON_OV0_VID_BUF0_BASE_ADRS	  0x0440
-#	define	RADEON_VIF_BUF0_PITCH_SEL		0x00000001L
-#	define	RADEON_VIF_BUF0_TILE_ADRS		0x00000002L
-#	define	RADEON_VIF_BUF0_BASE_ADRS_MASK	0x03fffff0L
-#	define	RADEON_VIF_BUF0_1ST_LINE_LSBS_MASK 0x48000000L
-#define RADEON_OV0_VID_BUF1_BASE_ADRS	  0x0444
-#	define	RADEON_VIF_BUF1_PITCH_SEL		0x00000001L
-#	define	RADEON_VIF_BUF1_TILE_ADRS		0x00000002L
-#	define	RADEON_VIF_BUF1_BASE_ADRS_MASK	0x03fffff0L
-#	define	RADEON_VIF_BUF1_1ST_LINE_LSBS_MASK 0x48000000L
-#define RADEON_OV0_VID_BUF2_BASE_ADRS	  0x0448
-#	define	RADEON_VIF_BUF2_PITCH_SEL		0x00000001L
-#	define	RADEON_VIF_BUF2_TILE_ADRS		0x00000002L
-#	define	RADEON_VIF_BUF2_BASE_ADRS_MASK	0x03fffff0L
-#	define	RADEON_VIF_BUF2_1ST_LINE_LSBS_MASK 0x48000000L
-#define RADEON_OV0_VID_BUF3_BASE_ADRS	  0x044C
-#define RADEON_OV0_VID_BUF4_BASE_ADRS	  0x0450
-#define RADEON_OV0_VID_BUF5_BASE_ADRS	  0x0454
-#define RADEON_OV0_VID_BUF_PITCH0_VALUE	  0x0460
-#define RADEON_OV0_VID_BUF_PITCH1_VALUE	  0x0464
-#define RADEON_OV0_AUTO_FLIP_CNTL		  0x0470
-#define RADEON_OV0_DEINTERLACE_PATTERN	  0x0474
-#define RADEON_OV0_H_INC			  0x0480
-#define RADEON_OV0_STEP_BY		  0x0484
-#define RADEON_OV0_P1_H_ACCUM_INIT	  0x0488
-#define RADEON_OV0_P23_H_ACCUM_INIT	  0x048C
-#define RADEON_OV0_P1_X_START_END		  0x0494
-#define RADEON_OV0_P2_X_START_END		  0x0498
-#define RADEON_OV0_P3_X_START_END		  0x049C
-#define RADEON_OV0_FILTER_CNTL		  0x04A0
-#define RADEON_OV0_FOUR_TAP_COEF_0	  0x04B0
-#define RADEON_OV0_FOUR_TAP_COEF_1	  0x04B4
-#define RADEON_OV0_FOUR_TAP_COEF_2	  0x04B8
-#define RADEON_OV0_FOUR_TAP_COEF_3	  0x04BC
-#define RADEON_OV0_FOUR_TAP_COEF_4	  0x04C0
-#define RADEON_OV0_COLOUR_CNTL		  0x04E0
-#define RADEON_OV0_VIDEO_KEY_CLR		  0x04E4
-#define RADEON_OV0_VIDEO_KEY_MSK		  0x04E8
-#define RADEON_OV0_GRAPHICS_KEY_CLR	  0x04EC
-#define RADEON_OV0_GRAPHICS_KEY_MSK	  0x04F0
-#define RADEON_OV0_KEY_CNTL		  0x04F4
-#	define	RADEON_VIDEO_KEY_FN_MASK		0x00000007L
-#	define	RADEON_VIDEO_KEY_FN_FALSE		0x00000000L
-#	define	RADEON_VIDEO_KEY_FN_TRUE		0x00000001L
-#	define	RADEON_VIDEO_KEY_FN_EQ		0x00000004L
-#	define	RADEON_VIDEO_KEY_FN_NE		0x00000005L
-#	define	RADEON_GRAPHIC_KEY_FN_MASK	0x00000070L
-#	define	RADEON_GRAPHIC_KEY_FN_FALSE	0x00000000L
-#	define	RADEON_GRAPHIC_KEY_FN_TRUE	0x00000010L
-#	define	RADEON_GRAPHIC_KEY_FN_EQ		0x00000040L
-#	define	RADEON_GRAPHIC_KEY_FN_NE		0x00000050L
-#	define	RADEON_CMP_MIX_MASK		0x00000100L
-#	define	RADEON_CMP_MIX_OR			0x00000000L
-#	define	RADEON_CMP_MIX_AND		0x00000100L
-#define RADEON_OV0_TEST			  0x04F8
+#define RADEON_OV0_Y_X_START                0x0400
+#define RADEON_OV0_Y_X_END                  0x0404
+#define RADEON_OV0_EXCLUSIVE_HORZ           0x0408
+#       define  RADEON_EXCL_HORZ_START_MASK        0x000000ff
+#       define  RADEON_EXCL_HORZ_END_MASK          0x0000ff00
+#       define  RADEON_EXCL_HORZ_BACK_PORCH_MASK   0x00ff0000
+#       define  RADEON_EXCL_HORZ_EXCLUSIVE_EN      0x80000000
+#define RADEON_OV0_EXCLUSIVE_VERT           0x040C
+#       define  RADEON_EXCL_VERT_START_MASK        0x000003ff
+#       define  RADEON_EXCL_VERT_END_MASK          0x03ff0000
+#define RADEON_OV0_REG_LOAD_CNTL            0x0410
+#       define  RADEON_REG_LD_CTL_LOCK                 0x00000001L
+#       define  RADEON_REG_LD_CTL_VBLANK_DURING_LOCK   0x00000002L
+#       define  RADEON_REG_LD_CTL_STALL_GUI_UNTIL_FLIP 0x00000004L
+#       define  RADEON_REG_LD_CTL_LOCK_READBACK        0x00000008L
+#define RADEON_OV0_SCALE_CNTL               0x0420
+#       define  RADEON_SCALER_PIX_EXPAND           0x00000001L
+#       define  RADEON_SCALER_Y2R_TEMP             0x00000002L
+#       define  RADEON_SCALER_HORZ_PICK_NEAREST    0x00000003L
+#       define  RADEON_SCALER_VERT_PICK_NEAREST    0x00000004L
+#       define  RADEON_SCALER_SIGNED_UV            0x00000010L
+#       define  RADEON_SCALER_GAMMA_SEL_MASK       0x00000060L
+#       define  RADEON_SCALER_GAMMA_SEL_BRIGHT     0x00000000L
+#       define  RADEON_SCALER_GAMMA_SEL_G22        0x00000020L
+#       define  RADEON_SCALER_GAMMA_SEL_G18        0x00000040L
+#       define  RADEON_SCALER_GAMMA_SEL_G14        0x00000060L
+#       define  RADEON_SCALER_COMCORE_SHIFT_UP_ONE 0x00000080L
+#       define  RADEON_SCALER_SURFAC_FORMAT        0x00000f00L
+#       define  RADEON_SCALER_SOURCE_15BPP         0x00000300L
+#       define  RADEON_SCALER_SOURCE_16BPP         0x00000400L
+#       define  RADEON_SCALER_SOURCE_32BPP         0x00000600L
+#       define  RADEON_SCALER_SOURCE_YUV9          0x00000900L
+#       define  RADEON_SCALER_SOURCE_YUV12         0x00000A00L
+#       define  RADEON_SCALER_SOURCE_VYUY422       0x00000B00L
+#       define  RADEON_SCALER_SOURCE_YVYU422       0x00000C00L
+#       define  RADEON_SCALER_SMART_SWITCH         0x00008000L
+#       define  RADEON_SCALER_BURST_PER_PLANE      0x00ff0000L
+#       define  RADEON_SCALER_DOUBLE_BUFFER        0x01000000L
+#       define  RADEON_SCALER_DIS_LIMIT            0x08000000L
+#       define  RADEON_SCALER_PRG_LOAD_START       0x10000000L
+#       define  RADEON_SCALER_INT_EMU              0x20000000L
+#       define  RADEON_SCALER_ENABLE               0x40000000L
+#       define  RADEON_SCALER_SOFT_RESET           0x80000000L
+#define RADEON_OV0_V_INC                    0x0424
+#define RADEON_OV0_P1_V_ACCUM_INIT          0x0428
+#       define  RADEON_OV0_P1_MAX_LN_IN_PER_LN_OUT 0x00000003L
+#       define  RADEON_OV0_P1_V_ACCUM_INIT_MASK    0x01ff8000L
+#define RADEON_OV0_P23_V_ACCUM_INIT         0x042C
+#define RADEON_OV0_P1_BLANK_LINES_AT_TOP    0x0430
+#       define  RADEON_P1_BLNK_LN_AT_TOP_M1_MASK   0x00000fffL
+#       define  RADEON_P1_ACTIVE_LINES_M1          0x0fff0000L
+#define RADEON_OV0_P23_BLANK_LINES_AT_TOP   0x0434
+#       define  RADEON_P23_BLNK_LN_AT_TOP_M1_MASK  0x000007ffL
+#       define  RADEON_P23_ACTIVE_LINES_M1         0x07ff0000L
+#define RADEON_OV0_VID_BUF0_BASE_ADRS       0x0440
+#       define  RADEON_VIF_BUF0_PITCH_SEL          0x00000001L
+#       define  RADEON_VIF_BUF0_TILE_ADRS          0x00000002L
+#       define  RADEON_VIF_BUF0_BASE_ADRS_MASK     0x03fffff0L
+#       define  RADEON_VIF_BUF0_1ST_LINE_LSBS_MASK 0x48000000L
+#define RADEON_OV0_VID_BUF1_BASE_ADRS       0x0444
+#       define  RADEON_VIF_BUF1_PITCH_SEL          0x00000001L
+#       define  RADEON_VIF_BUF1_TILE_ADRS          0x00000002L
+#       define  RADEON_VIF_BUF1_BASE_ADRS_MASK     0x03fffff0L
+#       define  RADEON_VIF_BUF1_1ST_LINE_LSBS_MASK 0x48000000L
+#define RADEON_OV0_VID_BUF2_BASE_ADRS       0x0448
+#       define  RADEON_VIF_BUF2_PITCH_SEL          0x00000001L
+#       define  RADEON_VIF_BUF2_TILE_ADRS          0x00000002L
+#       define  RADEON_VIF_BUF2_BASE_ADRS_MASK     0x03fffff0L
+#       define  RADEON_VIF_BUF2_1ST_LINE_LSBS_MASK 0x48000000L
+#define RADEON_OV0_VID_BUF3_BASE_ADRS       0x044C
+#define RADEON_OV0_VID_BUF4_BASE_ADRS       0x0450
+#define RADEON_OV0_VID_BUF5_BASE_ADRS       0x0454
+#define RADEON_OV0_VID_BUF_PITCH0_VALUE     0x0460
+#define RADEON_OV0_VID_BUF_PITCH1_VALUE     0x0464
+#define RADEON_OV0_AUTO_FLIP_CNTL           0x0470
+#define RADEON_OV0_DEINTERLACE_PATTERN      0x0474
+#define RADEON_OV0_H_INC                    0x0480
+#define RADEON_OV0_STEP_BY                  0x0484
+#define RADEON_OV0_P1_H_ACCUM_INIT          0x0488
+#define RADEON_OV0_P23_H_ACCUM_INIT         0x048C
+#define RADEON_OV0_P1_X_START_END           0x0494
+#define RADEON_OV0_P2_X_START_END           0x0498
+#define RADEON_OV0_P3_X_START_END           0x049C
+#define RADEON_OV0_FILTER_CNTL              0x04A0
+#define RADEON_OV0_FOUR_TAP_COEF_0          0x04B0
+#define RADEON_OV0_FOUR_TAP_COEF_1          0x04B4
+#define RADEON_OV0_FOUR_TAP_COEF_2          0x04B8
+#define RADEON_OV0_FOUR_TAP_COEF_3          0x04BC
+#define RADEON_OV0_FOUR_TAP_COEF_4          0x04C0
+#define RADEON_OV0_COLOUR_CNTL              0x04E0
+#define RADEON_OV0_VIDEO_KEY_CLR            0x04E4
+#define RADEON_OV0_VIDEO_KEY_MSK            0x04E8
+#define RADEON_OV0_GRAPHICS_KEY_CLR         0x04EC
+#define RADEON_OV0_GRAPHICS_KEY_MSK         0x04F0
+#define RADEON_OV0_KEY_CNTL                 0x04F4
+#       define  RADEON_VIDEO_KEY_FN_MASK           0x00000007L
+#       define  RADEON_VIDEO_KEY_FN_FALSE          0x00000000L
+#       define  RADEON_VIDEO_KEY_FN_TRUE           0x00000001L
+#       define  RADEON_VIDEO_KEY_FN_EQ             0x00000004L
+#       define  RADEON_VIDEO_KEY_FN_NE             0x00000005L
+#       define  RADEON_GRAPHIC_KEY_FN_MASK         0x00000070L
+#       define  RADEON_GRAPHIC_KEY_FN_FALSE        0x00000000L
+#       define  RADEON_GRAPHIC_KEY_FN_TRUE         0x00000010L
+#       define  RADEON_GRAPHIC_KEY_FN_EQ           0x00000040L
+#       define  RADEON_GRAPHIC_KEY_FN_NE           0x00000050L
+#       define  RADEON_CMP_MIX_MASK                0x00000100L
+#       define  RADEON_CMP_MIX_OR                  0x00000000L
+#       define  RADEON_CMP_MIX_AND                 0x00000100L
+#define RADEON_OV0_TEST                     0x04F8
 
-#define RADEON_PALETTE_DATA		    0x00b4
-#define RADEON_PALETTE_30_DATA		    0x00b8
-#define RADEON_PALETTE_INDEX		    0x00b0
-#define RADEON_PCI_GART_PAGE		    0x017c
-#define RADEON_PLANE_3D_MASK_C		    0x1d44
-#define RADEON_PLL_TEST_CNTL		    0x0013 /* PLL */
-#define RADEON_PMI_CAP_ID		    0x0f5c /* PCI */
-#define RADEON_PMI_DATA			    0x0f63 /* PCI */
-#define RADEON_PMI_NXT_CAP_PTR		    0x0f5d /* PCI */
-#define RADEON_PMI_PMC_REG		    0x0f5e /* PCI */
-#define RADEON_PMI_PMCSR_REG		    0x0f60 /* PCI */
-#define RADEON_PMI_REGISTER		    0x0f5c /* PCI */
-#define RADEON_PPLL_CNTL		    0x0002 /* PLL */
-#	define RADEON_PPLL_RESET		(1 <<  0)
-#	define RADEON_PPLL_SLEEP		(1 <<  1)
-#	define RADEON_PPLL_ATOMIC_UPDATE_EN	(1 << 16)
-#	define RADEON_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17)
-#	define RADEON_PPLL_ATOMIC_UPDATE_VSYNC	(1 << 18)
-#define RADEON_PPLL_DIV_0		    0x0004 /* PLL */
-#define RADEON_PPLL_DIV_1		    0x0005 /* PLL */
-#define RADEON_PPLL_DIV_2		    0x0006 /* PLL */
-#define RADEON_PPLL_DIV_3		    0x0007 /* PLL */
-#	define RADEON_PPLL_FB3_DIV_MASK	    0x07ff
-#	define RADEON_PPLL_POST3_DIV_MASK   0x00070000
-#define RADEON_PPLL_REF_DIV		    0x0003 /* PLL */
-#	define RADEON_PPLL_REF_DIV_MASK	    0x03ff
-#	define RADEON_PPLL_ATOMIC_UPDATE_R  (1 << 15) /* same as _W */
-#	define RADEON_PPLL_ATOMIC_UPDATE_W  (1 << 15) /* same as _R */
-#define RADEON_PWR_MNGMT_CNTL_STATUS	    0x0f60 /* PCI */
-#define RADEON_RBBM_SOFT_RESET		    0x00f0
-#define RADEON_RBBM_STATUS		    0x0e40
-#	define RADEON_RBBM_FIFOCNT_MASK	    0x007f
-#	define RADEON_RBBM_ACTIVE	    (1 << 31)
-#define RADEON_RB2D_DSTCACHE_CTLSTAT	    0x342c
-#	define RADEON_RB2D_DC_FLUSH_ALL	    0xf
-#	define RADEON_RB2D_DC_BUSY	    (1 << 31)
-#define RADEON_RB2D_DSTCACHE_MODE	    0x3428
-#define RADEON_REG_BASE			    0x0f18 /* PCI */
-#define RADEON_REGPROG_INF		    0x0f09 /* PCI */
-#define RADEON_REVISION_ID		    0x0f08 /* PCI */
+#define RADEON_PALETTE_DATA                 0x00b4
+#define RADEON_PALETTE_30_DATA              0x00b8
+#define RADEON_PALETTE_INDEX                0x00b0
+#define RADEON_PCI_GART_PAGE                0x017c
+#define RADEON_PLANE_3D_MASK_C              0x1d44
+#define RADEON_PLL_TEST_CNTL                0x0013 /* PLL */
+#define RADEON_PMI_CAP_ID                   0x0f5c /* PCI */
+#define RADEON_PMI_DATA                     0x0f63 /* PCI */
+#define RADEON_PMI_NXT_CAP_PTR              0x0f5d /* PCI */
+#define RADEON_PMI_PMC_REG                  0x0f5e /* PCI */
+#define RADEON_PMI_PMCSR_REG                0x0f60 /* PCI */
+#define RADEON_PMI_REGISTER                 0x0f5c /* PCI */
+#define RADEON_PPLL_CNTL                    0x0002 /* PLL */
+#       define RADEON_PPLL_RESET                (1 <<  0)
+#       define RADEON_PPLL_SLEEP                (1 <<  1)
+#       define RADEON_PPLL_ATOMIC_UPDATE_EN     (1 << 16)
+#       define RADEON_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17)
+#       define RADEON_PPLL_ATOMIC_UPDATE_VSYNC  (1 << 18)
+#define RADEON_PPLL_DIV_0                   0x0004 /* PLL */
+#define RADEON_PPLL_DIV_1                   0x0005 /* PLL */
+#define RADEON_PPLL_DIV_2                   0x0006 /* PLL */
+#define RADEON_PPLL_DIV_3                   0x0007 /* PLL */
+#       define RADEON_PPLL_FB3_DIV_MASK     0x07ff
+#       define RADEON_PPLL_POST3_DIV_MASK   0x00070000
+#define RADEON_PPLL_REF_DIV                 0x0003 /* PLL */
+#       define RADEON_PPLL_REF_DIV_MASK     0x03ff
+#       define RADEON_PPLL_ATOMIC_UPDATE_R  (1 << 15) /* same as _W */
+#       define RADEON_PPLL_ATOMIC_UPDATE_W  (1 << 15) /* same as _R */
+#define RADEON_PWR_MNGMT_CNTL_STATUS        0x0f60 /* PCI */
+#define RADEON_RBBM_SOFT_RESET              0x00f0
+#define RADEON_RBBM_STATUS                  0x0e40
+#       define RADEON_RBBM_FIFOCNT_MASK     0x007f
+#       define RADEON_RBBM_ACTIVE           (1 << 31)
+#define RADEON_RB2D_DSTCACHE_CTLSTAT        0x342c
+#       define RADEON_RB2D_DC_FLUSH_ALL     0xf
+#       define RADEON_RB2D_DC_BUSY          (1 << 31)
+#define RADEON_RB2D_DSTCACHE_MODE           0x3428
+#define RADEON_REG_BASE                     0x0f18 /* PCI */
+#define RADEON_REGPROG_INF                  0x0f09 /* PCI */
+#define RADEON_REVISION_ID                  0x0f08 /* PCI */
 
-#define RADEON_SC_BOTTOM		    0x164c
-#define RADEON_SC_BOTTOM_RIGHT		    0x16f0
-#define RADEON_SC_BOTTOM_RIGHT_C	    0x1c8c
-#define RADEON_SC_LEFT			    0x1640
-#define RADEON_SC_RIGHT			    0x1644
-#define RADEON_SC_TOP			    0x1648
-#define RADEON_SC_TOP_LEFT		    0x16ec
-#define RADEON_SC_TOP_LEFT_C		    0x1c88
-#define RADEON_SDRAM_MODE_REG		    0x0158
-#define RADEON_SEQ8_DATA		    0x03c5 /* VGA */
-#define RADEON_SEQ8_IDX			    0x03c4 /* VGA */
-#define RADEON_SNAPSHOT_F_COUNT		    0x0244
-#define RADEON_SNAPSHOT_VH_COUNTS	    0x0240
-#define RADEON_SNAPSHOT_VIF_COUNT	    0x024c
-#define RADEON_SRC_OFFSET		    0x15ac
-#define RADEON_SRC_PITCH		    0x15b0
-#define RADEON_SRC_PITCH_OFFSET		    0x1428
-#define RADEON_SRC_SC_BOTTOM		    0x165c
-#define RADEON_SRC_SC_BOTTOM_RIGHT	    0x16f4
-#define RADEON_SRC_SC_RIGHT		    0x1654
-#define RADEON_SRC_X			    0x1414
-#define RADEON_SRC_X_Y			    0x1590
-#define RADEON_SRC_Y			    0x1418
-#define RADEON_SRC_Y_X			    0x1434
-#define RADEON_STATUS			    0x0f06 /* PCI */
-#define RADEON_SUBPIC_CNTL		    0x0540 /* ? */
-#define RADEON_SUB_CLASS		    0x0f0a /* PCI */
-#define RADEON_SURFACE_DELAY		    0x0b00
-#define RADEON_SURFACE0_INFO		    0x0b0c
-#define RADEON_SURFACE0_LOWER_BOUND	    0x0b04
-#define RADEON_SURFACE0_UPPER_BOUND	    0x0b08
-#define RADEON_SURFACE1_INFO		    0x0b1c
-#define RADEON_SURFACE1_LOWER_BOUND	    0x0b14
-#define RADEON_SURFACE1_UPPER_BOUND	    0x0b18
-#define RADEON_SURFACE2_INFO		    0x0b2c
-#define RADEON_SURFACE2_LOWER_BOUND	    0x0b24
-#define RADEON_SURFACE2_UPPER_BOUND	    0x0b28
-#define RADEON_SURFACE3_INFO		    0x0b3c
-#define RADEON_SURFACE3_LOWER_BOUND	    0x0b34
-#define RADEON_SURFACE3_UPPER_BOUND	    0x0b38
-#define RADEON_SW_SEMAPHORE		    0x013c
+#define RADEON_SC_BOTTOM                    0x164c
+#define RADEON_SC_BOTTOM_RIGHT              0x16f0
+#define RADEON_SC_BOTTOM_RIGHT_C            0x1c8c
+#define RADEON_SC_LEFT                      0x1640
+#define RADEON_SC_RIGHT                     0x1644
+#define RADEON_SC_TOP                       0x1648
+#define RADEON_SC_TOP_LEFT                  0x16ec
+#define RADEON_SC_TOP_LEFT_C                0x1c88
+#define RADEON_SDRAM_MODE_REG               0x0158
+#define RADEON_SEQ8_DATA                    0x03c5 /* VGA */
+#define RADEON_SEQ8_IDX                     0x03c4 /* VGA */
+#define RADEON_SNAPSHOT_F_COUNT             0x0244
+#define RADEON_SNAPSHOT_VH_COUNTS           0x0240
+#define RADEON_SNAPSHOT_VIF_COUNT           0x024c
+#define RADEON_SRC_OFFSET                   0x15ac
+#define RADEON_SRC_PITCH                    0x15b0
+#define RADEON_SRC_PITCH_OFFSET             0x1428
+#define RADEON_SRC_SC_BOTTOM                0x165c
+#define RADEON_SRC_SC_BOTTOM_RIGHT          0x16f4
+#define RADEON_SRC_SC_RIGHT                 0x1654
+#define RADEON_SRC_X                        0x1414
+#define RADEON_SRC_X_Y                      0x1590
+#define RADEON_SRC_Y                        0x1418
+#define RADEON_SRC_Y_X                      0x1434
+#define RADEON_STATUS                       0x0f06 /* PCI */
+#define RADEON_SUBPIC_CNTL                  0x0540 /* ? */
+#define RADEON_SUB_CLASS                    0x0f0a /* PCI */
+#define RADEON_SURFACE_DELAY                0x0b00
+#define RADEON_SURFACE0_INFO                0x0b0c
+#define RADEON_SURFACE0_LOWER_BOUND         0x0b04
+#define RADEON_SURFACE0_UPPER_BOUND         0x0b08
+#define RADEON_SURFACE1_INFO                0x0b1c
+#define RADEON_SURFACE1_LOWER_BOUND         0x0b14
+#define RADEON_SURFACE1_UPPER_BOUND         0x0b18
+#define RADEON_SURFACE2_INFO                0x0b2c
+#define RADEON_SURFACE2_LOWER_BOUND         0x0b24
+#define RADEON_SURFACE2_UPPER_BOUND         0x0b28
+#define RADEON_SURFACE3_INFO                0x0b3c
+#define RADEON_SURFACE3_LOWER_BOUND         0x0b34
+#define RADEON_SURFACE3_UPPER_BOUND         0x0b38
+#define RADEON_SW_SEMAPHORE                 0x013c
 
-#define RADEON_TEST_DEBUG_CNTL		    0x0120
-#define RADEON_TEST_DEBUG_MUX		    0x0124
-#define RADEON_TEST_DEBUG_OUT		    0x012c
-#define RADEON_TMDS_CRC			    0x02a0
-#define RADEON_TRAIL_BRES_DEC		    0x1614
-#define RADEON_TRAIL_BRES_ERR		    0x160c
-#define RADEON_TRAIL_BRES_INC		    0x1610
-#define RADEON_TRAIL_X			    0x1618
-#define RADEON_TRAIL_X_SUB		    0x1620
+#define RADEON_TEST_DEBUG_CNTL              0x0120
+#define RADEON_TEST_DEBUG_MUX               0x0124
+#define RADEON_TEST_DEBUG_OUT               0x012c
+#define RADEON_TMDS_CRC                     0x02a0
+#define RADEON_TRAIL_BRES_DEC               0x1614
+#define RADEON_TRAIL_BRES_ERR               0x160c
+#define RADEON_TRAIL_BRES_INC               0x1610
+#define RADEON_TRAIL_X                      0x1618
+#define RADEON_TRAIL_X_SUB                  0x1620
 
-#define RADEON_VCLK_ECP_CNTL		    0x0008 /* PLL */
-#define RADEON_VENDOR_ID		    0x0f00 /* PCI */
-#define RADEON_VGA_DDA_CONFIG		    0x02e8
-#define RADEON_VGA_DDA_ON_OFF		    0x02ec
-#define RADEON_VID_BUFFER_CONTROL	    0x0900
-#define RADEON_VIDEOMUX_CNTL		    0x0190
-#define RADEON_VIPH_CONTROL		    0x0c40 /* ? */
+#define RADEON_VCLK_ECP_CNTL                0x0008 /* PLL */
+#define RADEON_VENDOR_ID                    0x0f00 /* PCI */
+#define RADEON_VGA_DDA_CONFIG               0x02e8
+#define RADEON_VGA_DDA_ON_OFF               0x02ec
+#define RADEON_VID_BUFFER_CONTROL           0x0900
+#define RADEON_VIDEOMUX_CNTL                0x0190
+#define RADEON_VIPH_CONTROL                 0x0c40 /* ? */
 
-#define RADEON_WAIT_UNTIL		    0x1720
+#define RADEON_WAIT_UNTIL                   0x1720
 
-#define RADEON_X_MPLL_REF_FB_DIV	    0x000a /* PLL */
-#define RADEON_XCLK_CNTL		    0x000d /* PLL */
-#define RADEON_XDLL_CNTL		    0x000c /* PLL */
-#define RADEON_XPLL_CNTL		    0x000b /* PLL */
+#define RADEON_X_MPLL_REF_FB_DIV            0x000a /* PLL */
+#define RADEON_XCLK_CNTL                    0x000d /* PLL */
+#define RADEON_XDLL_CNTL                    0x000c /* PLL */
+#define RADEON_XPLL_CNTL                    0x000b /* PLL */
 
 				/* Registers for CCE and Microcode Engine */
-#define RADEON_CP_ME_RAM_ADDR		    0x07d4
-#define RADEON_CP_ME_RAM_RADDR		    0x07d8
-#define RADEON_CP_ME_RAM_DATAH		    0x07dc
-#define RADEON_CP_ME_RAM_DATAL		    0x07e0
+#define RADEON_CP_ME_RAM_ADDR               0x07d4
+#define RADEON_CP_ME_RAM_RADDR              0x07d8
+#define RADEON_CP_ME_RAM_DATAH              0x07dc
+#define RADEON_CP_ME_RAM_DATAL              0x07e0
 
-#define RADEON_CP_RB_BASE		    0x0700
-#define RADEON_CP_RB_CNTL		    0x0704
-#define RADEON_CP_RB_RPTR_ADDR		    0x070c
-#define RADEON_CP_RB_RPTR		    0x0710
-#define RADEON_CP_RB_WPTR		    0x0714
-#	define RADEON_PM4_BUFFER_DL_DONE    (1 << 31)
+#define RADEON_CP_RB_BASE                   0x0700
+#define RADEON_CP_RB_CNTL                   0x0704
+#define RADEON_CP_RB_RPTR_ADDR              0x070c
+#define RADEON_CP_RB_RPTR                   0x0710
+#define RADEON_CP_RB_WPTR                   0x0714
+#       define RADEON_PM4_BUFFER_DL_DONE    (1 << 31)
 
-#define RADEON_CP_IB_BASE		    0x0738
-#define RADEON_CP_IB_BUFSZ		    0x073c
+#define RADEON_CP_IB_BASE                   0x0738
+#define RADEON_CP_IB_BUFSZ                  0x073c
 
-#define RADEON_CP_CSQ_CNTL		    0x0740
-#	define RADEON_CSQ_PRIDIS_INDDIS	    (0	<< 28)
-#	define RADEON_CSQ_PRIPIO_INDDIS	    (1	<< 28)
-#	define RADEON_CSQ_PRIBM_INDDIS	    (2	<< 28)
-#	define RADEON_CSQ_PRIPIO_INDBM	    (3	<< 28)
-#	define RADEON_CSQ_PRIBM_INDBM	    (4	<< 28)
-#	define RADEON_CSQ_PRIPIO_INDPIO	    (15 << 28)
-#define RADEON_CP_RB_WPTR_DELAY		    0x0718
-#	define RADEON_PRE_WRITE_TIMER_SHIFT	 0
-#	define RADEON_PRE_WRITE_LIMIT_SHIFT	23
+#define RADEON_CP_CSQ_CNTL                  0x0740
+#       define RADEON_CSQ_PRIDIS_INDDIS     (0  << 28)
+#       define RADEON_CSQ_PRIPIO_INDDIS     (1  << 28)
+#       define RADEON_CSQ_PRIBM_INDDIS      (2  << 28)
+#       define RADEON_CSQ_PRIPIO_INDBM      (3  << 28)
+#       define RADEON_CSQ_PRIBM_INDBM       (4  << 28)
+#       define RADEON_CSQ_PRIPIO_INDPIO     (15 << 28)
+#define RADEON_CP_RB_WPTR_DELAY             0x0718
+#       define RADEON_PRE_WRITE_TIMER_SHIFT      0
+#       define RADEON_PRE_WRITE_LIMIT_SHIFT     23
 
-#define RADEON_AIC_CNTL			    0x01d0
-#	define RADEON_PCIGART_TRANSLATE_EN  (1 << 0)
+#define RADEON_AIC_CNTL                     0x01d0
+#       define RADEON_PCIGART_TRANSLATE_EN  (1 << 0)
 
-#define RADEON_PM4_VC_FPU_SETUP		    0x071c
-#	define RADEON_FRONT_DIR_CW	    (0 <<  0)
-#	define RADEON_FRONT_DIR_CCW	    (1 <<  0)
-#	define RADEON_FRONT_DIR_MASK	    (1 <<  0)
-#	define RADEON_BACKFACE_CULL	    (0 <<  1)
-#	define RADEON_BACKFACE_POINTS	    (1 <<  1)
-#	define RADEON_BACKFACE_LINES	    (2 <<  1)
-#	define RADEON_BACKFACE_SOLID	    (3 <<  1)
-#	define RADEON_BACKFACE_MASK	    (3 <<  1)
-#	define RADEON_FRONTFACE_CULL	    (0 <<  3)
-#	define RADEON_FRONTFACE_POINTS	    (1 <<  3)
-#	define RADEON_FRONTFACE_LINES	    (2 <<  3)
-#	define RADEON_FRONTFACE_SOLID	    (3 <<  3)
-#	define RADEON_FRONTFACE_MASK	    (3 <<  3)
-#	define RADEON_FPU_COLOR_SOLID	    (0 <<  5)
-#	define RADEON_FPU_COLOR_FLAT	    (1 <<  5)
-#	define RADEON_FPU_COLOR_GOURAUD	    (2 <<  5)
-#	define RADEON_FPU_COLOR_GOURAUD2    (3 <<  5)
-#	define RADEON_FPU_COLOR_MASK	    (3 <<  5)
-#	define RADEON_FPU_SUB_PIX_2BITS	    (0 <<  7)
-#	define RADEON_FPU_SUB_PIX_4BITS	    (1 <<  7)
-#	define RADEON_FPU_MODE_2D	    (0 <<  8)
-#	define RADEON_FPU_MODE_3D	    (1 <<  8)
-#	define RADEON_TRAP_BITS_DISABLE	    (1 <<  9)
-#	define RADEON_EDGE_ANTIALIAS	    (1 << 10)
-#	define RADEON_SUPERSAMPLE	    (1 << 11)
-#	define RADEON_XFACTOR_2		    (0 << 12)
-#	define RADEON_XFACTOR_4		    (1 << 12)
-#	define RADEON_YFACTOR_2		    (0 << 13)
-#	define RADEON_YFACTOR_4		    (1 << 13)
-#	define RADEON_FLAT_SHADE_VERTEX_D3D (0 << 14)
-#	define RADEON_FLAT_SHADE_VERTEX_OGL (1 << 14)
-#	define RADEON_FPU_ROUND_TRUNCATE    (0 << 15)
-#	define RADEON_FPU_ROUND_NEAREST	    (1 << 15)
-#	define RADEON_WM_SEL_8DW	    (0 << 16)
-#	define RADEON_WM_SEL_16DW	    (1 << 16)
-#	define RADEON_WM_SEL_32DW	    (2 << 16)
-#define RADEON_PM4_VC_DEBUG_CONFIG	    0x07a4
-#define RADEON_PM4_VC_STAT		    0x07a8
-#define RADEON_PM4_VC_TIMESTAMP0	    0x07b0
-#define RADEON_PM4_VC_TIMESTAMP1	    0x07b4
-#define RADEON_PM4_STAT			    0x07b8
-#	define RADEON_PM4_FIFOCNT_MASK	    0x0fff
-#	define RADEON_PM4_BUSY		    (1 << 16)
-#	define RADEON_PM4_GUI_ACTIVE	    (1 << 31)
-#define RADEON_PM4_BUFFER_ADDR		    0x07f0
-#define RADEON_CP_ME_CNTL		    0x07d0
-#	define RADEON_CP_ME_FREERUN	    (1 << 30)
-#define RADEON_PM4_FIFO_DATA_EVEN	    0x1000
-#define RADEON_PM4_FIFO_DATA_ODD	    0x1004
+#define RADEON_PM4_VC_FPU_SETUP             0x071c
+#       define RADEON_FRONT_DIR_CW          (0 <<  0)
+#       define RADEON_FRONT_DIR_CCW         (1 <<  0)
+#       define RADEON_FRONT_DIR_MASK        (1 <<  0)
+#       define RADEON_BACKFACE_CULL         (0 <<  1)
+#       define RADEON_BACKFACE_POINTS       (1 <<  1)
+#       define RADEON_BACKFACE_LINES        (2 <<  1)
+#       define RADEON_BACKFACE_SOLID        (3 <<  1)
+#       define RADEON_BACKFACE_MASK         (3 <<  1)
+#       define RADEON_FRONTFACE_CULL        (0 <<  3)
+#       define RADEON_FRONTFACE_POINTS      (1 <<  3)
+#       define RADEON_FRONTFACE_LINES       (2 <<  3)
+#       define RADEON_FRONTFACE_SOLID       (3 <<  3)
+#       define RADEON_FRONTFACE_MASK        (3 <<  3)
+#       define RADEON_FPU_COLOR_SOLID       (0 <<  5)
+#       define RADEON_FPU_COLOR_FLAT        (1 <<  5)
+#       define RADEON_FPU_COLOR_GOURAUD     (2 <<  5)
+#       define RADEON_FPU_COLOR_GOURAUD2    (3 <<  5)
+#       define RADEON_FPU_COLOR_MASK        (3 <<  5)
+#       define RADEON_FPU_SUB_PIX_2BITS     (0 <<  7)
+#       define RADEON_FPU_SUB_PIX_4BITS     (1 <<  7)
+#       define RADEON_FPU_MODE_2D           (0 <<  8)
+#       define RADEON_FPU_MODE_3D           (1 <<  8)
+#       define RADEON_TRAP_BITS_DISABLE     (1 <<  9)
+#       define RADEON_EDGE_ANTIALIAS        (1 << 10)
+#       define RADEON_SUPERSAMPLE           (1 << 11)
+#       define RADEON_XFACTOR_2             (0 << 12)
+#       define RADEON_XFACTOR_4             (1 << 12)
+#       define RADEON_YFACTOR_2             (0 << 13)
+#       define RADEON_YFACTOR_4             (1 << 13)
+#       define RADEON_FLAT_SHADE_VERTEX_D3D (0 << 14)
+#       define RADEON_FLAT_SHADE_VERTEX_OGL (1 << 14)
+#       define RADEON_FPU_ROUND_TRUNCATE    (0 << 15)
+#       define RADEON_FPU_ROUND_NEAREST     (1 << 15)
+#       define RADEON_WM_SEL_8DW            (0 << 16)
+#       define RADEON_WM_SEL_16DW           (1 << 16)
+#       define RADEON_WM_SEL_32DW           (2 << 16)
+#define RADEON_PM4_VC_DEBUG_CONFIG          0x07a4
+#define RADEON_PM4_VC_STAT                  0x07a8
+#define RADEON_PM4_VC_TIMESTAMP0            0x07b0
+#define RADEON_PM4_VC_TIMESTAMP1            0x07b4
+#define RADEON_PM4_STAT                     0x07b8
+#       define RADEON_PM4_FIFOCNT_MASK      0x0fff
+#       define RADEON_PM4_BUSY              (1 << 16)
+#       define RADEON_PM4_GUI_ACTIVE        (1 << 31)
+#define RADEON_PM4_BUFFER_ADDR              0x07f0
+#define RADEON_CP_ME_CNTL                   0x07d0
+#       define RADEON_CP_ME_FREERUN         (1 << 30)
+#define RADEON_PM4_FIFO_DATA_EVEN           0x1000
+#define RADEON_PM4_FIFO_DATA_ODD            0x1004
 
-#define RADEON_SCALE_3D_CNTL		    0x1a00
-#	define RADEON_SCALE_DITHER_ERR_DIFF	    (0	<<  1)
-#	define RADEON_SCALE_DITHER_TABLE	    (1	<<  1)
-#	define RADEON_TEX_CACHE_SIZE_FULL	    (0	<<  2)
-#	define RADEON_TEX_CACHE_SIZE_HALF	    (1	<<  2)
-#	define RADEON_DITHER_INIT_CURR		    (0	<<  3)
-#	define RADEON_DITHER_INIT_RESET		    (1	<<  3)
-#	define RADEON_ROUND_24BIT		    (1	<<  4)
-#	define RADEON_TEX_CACHE_DISABLE		    (1	<<  5)
-#	define RADEON_SCALE_3D_NOOP		    (0	<<  6)
-#	define RADEON_SCALE_3D_SCALE		    (1	<<  6)
-#	define RADEON_SCALE_3D_TEXMAP_SHADE	    (2	<<  6)
-#	define RADEON_SCALE_PIX_BLEND		    (0	<<  8)
-#	define RADEON_SCALE_PIX_REPLICATE	    (1	<<  8)
-#	define RADEON_TEX_CACHE_SPLIT		    (1	<<  9)
-#	define RADEON_APPLE_YUV_MODE		    (1	<< 10)
-#	define RADEON_TEX_CACHE_PALLETE_MODE	    (1	<< 11)
-#	define RADEON_ALPHA_COMB_ADD_CLAMP	    (0	<< 12)
-#	define RADEON_ALPHA_COMB_ADD_NCLAMP	    (1	<< 12)
-#	define RADEON_ALPHA_COMB_SUB_DST_SRC_CLAMP  (2	<< 12)
-#	define RADEON_ALPHA_COMB_SUB_DST_SRC_NCLAMP (3	<< 12)
-#	define RADEON_FOG_TABLE			    (1	<< 14)
-#	define RADEON_SIGNED_DST_CLAMP		    (1	<< 15)
-#	define RADEON_ALPHA_BLEND_SRC_ZERO	    (0	<< 16)
-#	define RADEON_ALPHA_BLEND_SRC_ONE	    (1	<< 16)
-#	define RADEON_ALPHA_BLEND_SRC_SRCCOLOR	    (2	<< 16)
-#	define RADEON_ALPHA_BLEND_SRC_INVSRCCOLOR   (3	<< 16)
-#	define RADEON_ALPHA_BLEND_SRC_SRCALPHA	    (4	<< 16)
-#	define RADEON_ALPHA_BLEND_SRC_INVSRCALPHA   (5	<< 16)
-#	define RADEON_ALPHA_BLEND_SRC_DSTALPHA	    (6	<< 16)
-#	define RADEON_ALPHA_BLEND_SRC_INVDSTALPHA   (7	<< 16)
-#	define RADEON_ALPHA_BLEND_SRC_DSTCOLOR	    (8	<< 16)
-#	define RADEON_ALPHA_BLEND_SRC_INVDSTCOLOR   (9	<< 16)
-#	define RADEON_ALPHA_BLEND_SRC_SAT	    (10 << 16)
-#	define RADEON_ALPHA_BLEND_SRC_BLEND	    (11 << 16)
-#	define RADEON_ALPHA_BLEND_SRC_INVBLEND	    (12 << 16)
-#	define RADEON_ALPHA_BLEND_DST_ZERO	    (0	<< 20)
-#	define RADEON_ALPHA_BLEND_DST_ONE	    (1	<< 20)
-#	define RADEON_ALPHA_BLEND_DST_SRCCOLOR	    (2	<< 20)
-#	define RADEON_ALPHA_BLEND_DST_INVSRCCOLOR   (3	<< 20)
-#	define RADEON_ALPHA_BLEND_DST_SRCALPHA	    (4	<< 20)
-#	define RADEON_ALPHA_BLEND_DST_INVSRCALPHA   (5	<< 20)
-#	define RADEON_ALPHA_BLEND_DST_DSTALPHA	    (6	<< 20)
-#	define RADEON_ALPHA_BLEND_DST_INVDSTALPHA   (7	<< 20)
-#	define RADEON_ALPHA_BLEND_DST_DSTCOLOR	    (8	<< 20)
-#	define RADEON_ALPHA_BLEND_DST_INVDSTCOLOR   (9	<< 20)
-#	define RADEON_ALPHA_TEST_NEVER		    (0	<< 24)
-#	define RADEON_ALPHA_TEST_LESS		    (1	<< 24)
-#	define RADEON_ALPHA_TEST_LESSEQUAL	    (2	<< 24)
-#	define RADEON_ALPHA_TEST_EQUAL		    (3	<< 24)
-#	define RADEON_ALPHA_TEST_GREATEREQUAL	    (4	<< 24)
-#	define RADEON_ALPHA_TEST_GREATER	    (5	<< 24)
-#	define RADEON_ALPHA_TEST_NEQUAL		    (6	<< 24)
-#	define RADEON_ALPHA_TEST_ALWAYS		    (7	<< 24)
-#	define RADEON_COMPOSITE_SHADOW_CMP_EQUAL    (0	<< 28)
-#	define RADEON_COMPOSITE_SHADOW_CMP_NEQUAL   (1	<< 28)
-#	define RADEON_COMPOSITE_SHADOW		    (1	<< 29)
-#	define RADEON_TEX_MAP_ALPHA_IN_TEXTURE	    (1	<< 30)
-#	define RADEON_TEX_CACHE_LINE_SIZE_8QW	    (0	<< 31)
-#	define RADEON_TEX_CACHE_LINE_SIZE_4QW	    (1	<< 31)
-#define RADEON_SCALE_3D_DATATYPE	    0x1a20
+#define RADEON_SCALE_3D_CNTL                0x1a00
+#       define RADEON_SCALE_DITHER_ERR_DIFF         (0  <<  1)
+#       define RADEON_SCALE_DITHER_TABLE            (1  <<  1)
+#       define RADEON_TEX_CACHE_SIZE_FULL           (0  <<  2)
+#       define RADEON_TEX_CACHE_SIZE_HALF           (1  <<  2)
+#       define RADEON_DITHER_INIT_CURR              (0  <<  3)
+#       define RADEON_DITHER_INIT_RESET             (1  <<  3)
+#       define RADEON_ROUND_24BIT                   (1  <<  4)
+#       define RADEON_TEX_CACHE_DISABLE             (1  <<  5)
+#       define RADEON_SCALE_3D_NOOP                 (0  <<  6)
+#       define RADEON_SCALE_3D_SCALE                (1  <<  6)
+#       define RADEON_SCALE_3D_TEXMAP_SHADE         (2  <<  6)
+#       define RADEON_SCALE_PIX_BLEND               (0  <<  8)
+#       define RADEON_SCALE_PIX_REPLICATE           (1  <<  8)
+#       define RADEON_TEX_CACHE_SPLIT               (1  <<  9)
+#       define RADEON_APPLE_YUV_MODE                (1  << 10)
+#       define RADEON_TEX_CACHE_PALLETE_MODE        (1  << 11)
+#       define RADEON_ALPHA_COMB_ADD_CLAMP          (0  << 12)
+#       define RADEON_ALPHA_COMB_ADD_NCLAMP         (1  << 12)
+#       define RADEON_ALPHA_COMB_SUB_DST_SRC_CLAMP  (2  << 12)
+#       define RADEON_ALPHA_COMB_SUB_DST_SRC_NCLAMP (3  << 12)
+#       define RADEON_FOG_TABLE                     (1  << 14)
+#       define RADEON_SIGNED_DST_CLAMP              (1  << 15)
+#       define RADEON_ALPHA_BLEND_SRC_ZERO          (0  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_ONE           (1  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_SRCCOLOR      (2  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_INVSRCCOLOR   (3  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_SRCALPHA      (4  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_INVSRCALPHA   (5  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_DSTALPHA      (6  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_INVDSTALPHA   (7  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_DSTCOLOR      (8  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_INVDSTCOLOR   (9  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_SAT           (10 << 16)
+#       define RADEON_ALPHA_BLEND_SRC_BLEND         (11 << 16)
+#       define RADEON_ALPHA_BLEND_SRC_INVBLEND      (12 << 16)
+#       define RADEON_ALPHA_BLEND_DST_ZERO          (0  << 20)
+#       define RADEON_ALPHA_BLEND_DST_ONE           (1  << 20)
+#       define RADEON_ALPHA_BLEND_DST_SRCCOLOR      (2  << 20)
+#       define RADEON_ALPHA_BLEND_DST_INVSRCCOLOR   (3  << 20)
+#       define RADEON_ALPHA_BLEND_DST_SRCALPHA      (4  << 20)
+#       define RADEON_ALPHA_BLEND_DST_INVSRCALPHA   (5  << 20)
+#       define RADEON_ALPHA_BLEND_DST_DSTALPHA      (6  << 20)
+#       define RADEON_ALPHA_BLEND_DST_INVDSTALPHA   (7  << 20)
+#       define RADEON_ALPHA_BLEND_DST_DSTCOLOR      (8  << 20)
+#       define RADEON_ALPHA_BLEND_DST_INVDSTCOLOR   (9  << 20)
+#       define RADEON_ALPHA_TEST_NEVER              (0  << 24)
+#       define RADEON_ALPHA_TEST_LESS               (1  << 24)
+#       define RADEON_ALPHA_TEST_LESSEQUAL          (2  << 24)
+#       define RADEON_ALPHA_TEST_EQUAL              (3  << 24)
+#       define RADEON_ALPHA_TEST_GREATEREQUAL       (4  << 24)
+#       define RADEON_ALPHA_TEST_GREATER            (5  << 24)
+#       define RADEON_ALPHA_TEST_NEQUAL             (6  << 24)
+#       define RADEON_ALPHA_TEST_ALWAYS             (7  << 24)
+#       define RADEON_COMPOSITE_SHADOW_CMP_EQUAL    (0  << 28)
+#       define RADEON_COMPOSITE_SHADOW_CMP_NEQUAL   (1  << 28)
+#       define RADEON_COMPOSITE_SHADOW              (1  << 29)
+#       define RADEON_TEX_MAP_ALPHA_IN_TEXTURE      (1  << 30)
+#       define RADEON_TEX_CACHE_LINE_SIZE_8QW       (0  << 31)
+#       define RADEON_TEX_CACHE_LINE_SIZE_4QW       (1  << 31)
+#define RADEON_SCALE_3D_DATATYPE            0x1a20
 
-#define RADEON_SETUP_CNTL		    0x1bc4
-#	define RADEON_DONT_START_TRIANGLE   (1 <<  0)
-#	define RADEON_Z_BIAS		    (0 <<  1)
-#	define RADEON_DONT_START_ANY_ON	    (1 <<  2)
-#	define RADEON_COLOR_SOLID_COLOR	    (0 <<  3)
-#	define RADEON_COLOR_FLAT_VERT_1	    (1 <<  3)
-#	define RADEON_COLOR_FLAT_VERT_2	    (2 <<  3)
-#	define RADEON_COLOR_FLAT_VERT_3	    (3 <<  3)
-#	define RADEON_COLOR_GOURAUD	    (4 <<  3)
-#	define RADEON_PRIM_TYPE_TRI	    (0 <<  7)
-#	define RADEON_PRIM_TYPE_LINE	    (1 <<  7)
-#	define RADEON_PRIM_TYPE_POINT	    (2 <<  7)
-#	define RADEON_PRIM_TYPE_POLY_EDGE   (3 <<  7)
-#	define RADEON_TEXTURE_ST_MULT_W	    (0 <<  9)
-#	define RADEON_TEXTURE_ST_DIRECT	    (1 <<  9)
-#	define RADEON_STARTING_VERTEX_1	    (1 << 14)
-#	define RADEON_STARTING_VERTEX_2	    (2 << 14)
-#	define RADEON_STARTING_VERTEX_3	    (3 << 14)
-#	define RADEON_ENDING_VERTEX_1	    (1 << 16)
-#	define RADEON_ENDING_VERTEX_2	    (2 << 16)
-#	define RADEON_ENDING_VERTEX_3	    (3 << 16)
-#	define RADEON_SU_POLY_LINE_LAST	    (0 << 18)
-#	define RADEON_SU_POLY_LINE_NOT_LAST (1 << 18)
-#	define RADEON_SUB_PIX_2BITS	    (0 << 19)
-#	define RADEON_SUB_PIX_4BITS	    (1 << 19)
-#	define RADEON_SET_UP_CONTINUE	    (1 << 31)
+#define RADEON_SETUP_CNTL                   0x1bc4
+#       define RADEON_DONT_START_TRIANGLE   (1 <<  0)
+#       define RADEON_Z_BIAS                (0 <<  1)
+#       define RADEON_DONT_START_ANY_ON     (1 <<  2)
+#       define RADEON_COLOR_SOLID_COLOR     (0 <<  3)
+#       define RADEON_COLOR_FLAT_VERT_1     (1 <<  3)
+#       define RADEON_COLOR_FLAT_VERT_2     (2 <<  3)
+#       define RADEON_COLOR_FLAT_VERT_3     (3 <<  3)
+#       define RADEON_COLOR_GOURAUD         (4 <<  3)
+#       define RADEON_PRIM_TYPE_TRI         (0 <<  7)
+#       define RADEON_PRIM_TYPE_LINE        (1 <<  7)
+#       define RADEON_PRIM_TYPE_POINT       (2 <<  7)
+#       define RADEON_PRIM_TYPE_POLY_EDGE   (3 <<  7)
+#       define RADEON_TEXTURE_ST_MULT_W     (0 <<  9)
+#       define RADEON_TEXTURE_ST_DIRECT     (1 <<  9)
+#       define RADEON_STARTING_VERTEX_1     (1 << 14)
+#       define RADEON_STARTING_VERTEX_2     (2 << 14)
+#       define RADEON_STARTING_VERTEX_3     (3 << 14)
+#       define RADEON_ENDING_VERTEX_1       (1 << 16)
+#       define RADEON_ENDING_VERTEX_2       (2 << 16)
+#       define RADEON_ENDING_VERTEX_3       (3 << 16)
+#       define RADEON_SU_POLY_LINE_LAST     (0 << 18)
+#       define RADEON_SU_POLY_LINE_NOT_LAST (1 << 18)
+#       define RADEON_SUB_PIX_2BITS         (0 << 19)
+#       define RADEON_SUB_PIX_4BITS         (1 << 19)
+#       define RADEON_SET_UP_CONTINUE       (1 << 31)
 
-#define RADEON_WINDOW_XY_OFFSET		    0x1bcc
-#	define RADEON_WINDOW_Y_SHIFT	    4
-#	define RADEON_WINDOW_X_SHIFT	    20
+#define RADEON_WINDOW_XY_OFFSET             0x1bcc
+#       define RADEON_WINDOW_Y_SHIFT        4
+#       define RADEON_WINDOW_X_SHIFT        20
 
-#define RADEON_Z_OFFSET_C		    0x1c90
-#define RADEON_Z_PITCH_C		    0x1c94
-#define RADEON_Z_STEN_CNTL_C		    0x1c98
-#	define RADEON_Z_PIX_WIDTH_16		(0 <<  1)
-#	define RADEON_Z_PIX_WIDTH_24		(1 <<  1)
-#	define RADEON_Z_PIX_WIDTH_32		(2 <<  1)
-#	define RADEON_Z_PIX_WIDTH_MASK		(3 <<  1)
-#	define RADEON_Z_TEST_NEVER		(0 <<  4)
-#	define RADEON_Z_TEST_LESS		(1 <<  4)
-#	define RADEON_Z_TEST_LESSEQUAL		(2 <<  4)
-#	define RADEON_Z_TEST_EQUAL		(3 <<  4)
-#	define RADEON_Z_TEST_GREATEREQUAL	(4 <<  4)
-#	define RADEON_Z_TEST_GREATER		(5 <<  4)
-#	define RADEON_Z_TEST_NEQUAL		(6 <<  4)
-#	define RADEON_Z_TEST_ALWAYS		(7 <<  4)
-#	define RADEON_Z_TEST_MASK		(7 <<  4)
-#	define RADEON_STENCIL_TEST_NEVER	(0 << 12)
-#	define RADEON_STENCIL_TEST_LESS		(1 << 12)
-#	define RADEON_STENCIL_TEST_LESSEQUAL	(2 << 12)
-#	define RADEON_STENCIL_TEST_EQUAL	(3 << 12)
-#	define RADEON_STENCIL_TEST_GREATEREQUAL (4 << 12)
-#	define RADEON_STENCIL_TEST_GREATER	(5 << 12)
-#	define RADEON_STENCIL_TEST_NEQUAL	(6 << 12)
-#	define RADEON_STENCIL_TEST_ALWAYS	(7 << 12)
-#	define RADEON_STENCIL_S_FAIL_KEEP	(0 << 16)
-#	define RADEON_STENCIL_S_FAIL_ZERO	(1 << 16)
-#	define RADEON_STENCIL_S_FAIL_REPLACE	(2 << 16)
-#	define RADEON_STENCIL_S_FAIL_INC	(3 << 16)
-#	define RADEON_STENCIL_S_FAIL_DEC	(4 << 16)
-#	define RADEON_STENCIL_S_FAIL_INV	(5 << 16)
-#	define RADEON_STENCIL_ZPASS_KEEP	(0 << 20)
-#	define RADEON_STENCIL_ZPASS_ZERO	(1 << 20)
-#	define RADEON_STENCIL_ZPASS_REPLACE	(2 << 20)
-#	define RADEON_STENCIL_ZPASS_INC		(3 << 20)
-#	define RADEON_STENCIL_ZPASS_DEC		(4 << 20)
-#	define RADEON_STENCIL_ZPASS_INV		(5 << 20)
-#	define RADEON_STENCIL_ZFAIL_KEEP	(0 << 24)
-#	define RADEON_STENCIL_ZFAIL_ZERO	(1 << 24)
-#	define RADEON_STENCIL_ZFAIL_REPLACE	(2 << 24)
-#	define RADEON_STENCIL_ZFAIL_INC		(3 << 24)
-#	define RADEON_STENCIL_ZFAIL_DEC		(4 << 24)
-#	define RADEON_STENCIL_ZFAIL_INV		(5 << 24)
-#define RADEON_TEX_CNTL_C		    0x1c9c
-#	define RADEON_Z_ENABLE			 (1 <<	0)
-#	define RADEON_Z_WRITE_ENABLE		 (1 <<	1)
-#	define RADEON_STENCIL_ENABLE		 (1 <<	3)
-#	define RADEON_SHADE_ENABLE		 (0 <<	4)
-#	define RADEON_TEXMAP_ENABLE		 (1 <<	4)
-#	define RADEON_SEC_TEXMAP_ENABLE		 (1 <<	5)
-#	define RADEON_FOG_ENABLE		 (1 <<	7)
-#	define RADEON_DITHER_ENABLE		 (1 <<	8)
-#	define RADEON_ALPHA_ENABLE		 (1 <<	9)
-#	define RADEON_ALPHA_TEST_ENABLE		 (1 << 10)
-#	define RADEON_SPEC_LIGHT_ENABLE		 (1 << 11)
-#	define RADEON_TEX_CHROMA_KEY_ENABLE	 (1 << 12)
-#	define RADEON_ALPHA_IN_TEX_COMPLETE_A	 (0 << 13)
-#	define RADEON_ALPHA_IN_TEX_LSB_A	 (1 << 13)
-#	define RADEON_LIGHT_DIS			 (0 << 14)
-#	define RADEON_LIGHT_COPY		 (1 << 14)
-#	define RADEON_LIGHT_MODULATE		 (2 << 14)
-#	define RADEON_LIGHT_ADD			 (3 << 14)
-#	define RADEON_LIGHT_BLEND_CONSTANT	 (4 << 14)
-#	define RADEON_LIGHT_BLEND_TEXTURE	 (5 << 14)
-#	define RADEON_LIGHT_BLEND_VERTEX	 (6 << 14)
-#	define RADEON_LIGHT_BLEND_CONST_COLOR	 (7 << 14)
-#	define RADEON_ALPHA_LIGHT_DIS		 (0 << 18)
-#	define RADEON_ALPHA_LIGHT_COPY		 (1 << 18)
-#	define RADEON_ALPHA_LIGHT_MODULATE	 (2 << 18)
-#	define RADEON_ALPHA_LIGHT_ADD		 (3 << 18)
-#	define RADEON_ANTI_ALIAS		 (1 << 21)
-#	define RADEON_TEX_CACHE_FLUSH		 (1 << 23)
-#	define RADEON_LOD_BIAS_SHIFT		 24
-#define RADEON_MISC_3D_STATE_CNTL_REG	    0x1ca0
-#	define RADEON_REF_ALPHA_MASK		      0xff
-#	define RADEON_MISC_SCALE_3D_NOOP	      (0  <<  8)
-#	define RADEON_MISC_SCALE_3D_SCALE	      (1  <<  8)
-#	define RADEON_MISC_SCALE_3D_TEXMAP_SHADE      (2  <<  8)
-#	define RADEON_MISC_SCALE_PIX_BLEND	      (0  << 10)
-#	define RADEON_MISC_SCALE_PIX_REPLICATE	      (1  << 10)
-#	define RADEON_ALPHA_COMB_ADD_CLAMP	      (0  << 12)
-#	define RADEON_ALPHA_COMB_ADD_NO_CLAMP	      (1  << 12)
-#	define RADEON_ALPHA_COMB_SUB_SRC_DST_CLAMP    (2  << 12)
-#	define RADEON_ALPHA_COMB_SUB_SRC_DST_NO_CLAMP (3  << 12)
-#	define RADEON_FOG_VERTEX		      (0  << 14)
-#	define RADEON_FOG_TABLE			      (1  << 14)
-#	define RADEON_ALPHA_BLEND_SRC_ZERO	      (0  << 16)
-#	define RADEON_ALPHA_BLEND_SRC_ONE	      (1  << 16)
-#	define RADEON_ALPHA_BLEND_SRC_SRCCOLOR	      (2  << 16)
-#	define RADEON_ALPHA_BLEND_SRC_INVSRCCOLOR     (3  << 16)
-#	define RADEON_ALPHA_BLEND_SRC_SRCALPHA	      (4  << 16)
-#	define RADEON_ALPHA_BLEND_SRC_INVSRCALPHA     (5  << 16)
-#	define RADEON_ALPHA_BLEND_SRC_DESTALPHA	      (6  << 16)
-#	define RADEON_ALPHA_BLEND_SRC_INVDESTALPHA    (7  << 16)
-#	define RADEON_ALPHA_BLEND_SRC_DESTCOLOR	      (8  << 16)
-#	define RADEON_ALPHA_BLEND_SRC_INVDESTCOLOR    (9  << 16)
-#	define RADEON_ALPHA_BLEND_SRC_SRCALPHASAT     (10 << 16)
-#	define RADEON_ALPHA_BLEND_SRC_BOTHSRCALPHA    (11 << 16)
-#	define RADEON_ALPHA_BLEND_SRC_BOTHINVSRCALPHA (12 << 16)
-#	define RADEON_ALPHA_BLEND_SRC_MASK	      (15 << 16)
-#	define RADEON_ALPHA_BLEND_DST_ZERO	      (0  << 20)
-#	define RADEON_ALPHA_BLEND_DST_ONE	      (1  << 20)
-#	define RADEON_ALPHA_BLEND_DST_SRCCOLOR	      (2  << 20)
-#	define RADEON_ALPHA_BLEND_DST_INVSRCCOLOR     (3  << 20)
-#	define RADEON_ALPHA_BLEND_DST_SRCALPHA	      (4  << 20)
-#	define RADEON_ALPHA_BLEND_DST_INVSRCALPHA     (5  << 20)
-#	define RADEON_ALPHA_BLEND_DST_DESTALPHA	      (6  << 20)
-#	define RADEON_ALPHA_BLEND_DST_INVDESTALPHA    (7  << 20)
-#	define RADEON_ALPHA_BLEND_DST_DESTCOLOR	      (8  << 20)
-#	define RADEON_ALPHA_BLEND_DST_INVDESTCOLOR    (9  << 20)
-#	define RADEON_ALPHA_BLEND_DST_SRCALPHASAT     (10 << 20)
-#	define RADEON_ALPHA_BLEND_DST_MASK	      (15 << 20)
-#	define RADEON_ALPHA_TEST_NEVER		      (0  << 24)
-#	define RADEON_ALPHA_TEST_LESS		      (1  << 24)
-#	define RADEON_ALPHA_TEST_LESSEQUAL	      (2  << 24)
-#	define RADEON_ALPHA_TEST_EQUAL		      (3  << 24)
-#	define RADEON_ALPHA_TEST_GREATEREQUAL	      (4  << 24)
-#	define RADEON_ALPHA_TEST_GREATER	      (5  << 24)
-#	define RADEON_ALPHA_TEST_NEQUAL		      (6  << 24)
-#	define RADEON_ALPHA_TEST_ALWAYS		      (7  << 24)
-#	define RADEON_ALPHA_TEST_MASK		      (7  << 24)
-#define RADEON_TEXTURE_CLR_CMP_CLR_C	    0x1ca4
-#define RADEON_TEXTURE_CLR_CMP_MSK_C	    0x1ca8
-#define RADEON_FOG_COLOR_C		    0x1cac
-#	define RADEON_FOG_BLUE_SHIFT		 0
-#	define RADEON_FOG_GREEN_SHIFT		 8
-#	define RADEON_FOG_RED_SHIFT		16
-#define RADEON_PRIM_TEX_CNTL_C		    0x1cb0
-#	define RADEON_MIN_BLEND_NEAREST		 (0  <<	 1)
-#	define RADEON_MIN_BLEND_LINEAR		 (1  <<	 1)
-#	define RADEON_MIN_BLEND_MIPNEAREST	 (2  <<	 1)
-#	define RADEON_MIN_BLEND_MIPLINEAR	 (3  <<	 1)
-#	define RADEON_MIN_BLEND_LINEARMIPNEAREST (4  <<	 1)
-#	define RADEON_MIN_BLEND_LINEARMIPLINEAR	 (5  <<	 1)
-#	define RADEON_MIN_BLEND_MASK		 (7  <<	 1)
-#	define RADEON_MAG_BLEND_NEAREST		 (0  <<	 4)
-#	define RADEON_MAG_BLEND_LINEAR		 (1  <<	 4)
-#	define RADEON_MAG_BLEND_MASK		 (7  <<	 4)
-#	define RADEON_MIP_MAP_DISABLE		 (1  <<	 7)
-#	define RADEON_TEX_CLAMP_S_WRAP		 (0  <<	 8)
-#	define RADEON_TEX_CLAMP_S_MIRROR	 (1  <<	 8)
-#	define RADEON_TEX_CLAMP_S_CLAMP		 (2  <<	 8)
-#	define RADEON_TEX_CLAMP_S_BORDER_COLOR	 (3  <<	 8)
-#	define RADEON_TEX_CLAMP_S_MASK		 (3  <<	 8)
-#	define RADEON_TEX_WRAP_S		 (1  << 10)
-#	define RADEON_TEX_CLAMP_T_WRAP		 (0  << 11)
-#	define RADEON_TEX_CLAMP_T_MIRROR	 (1  << 11)
-#	define RADEON_TEX_CLAMP_T_CLAMP		 (2  << 11)
-#	define RADEON_TEX_CLAMP_T_BORDER_COLOR	 (3  << 11)
-#	define RADEON_TEX_CLAMP_T_MASK		 (3  << 11)
-#	define RADEON_TEX_WRAP_T		 (1  << 13)
-#	define RADEON_TEX_PERSPECTIVE_DISABLE	 (1  << 14)
-#	define RADEON_DATATYPE_VQ		 (0  << 16)
-#	define RADEON_DATATYPE_CI4		 (1  << 16)
-#	define RADEON_DATATYPE_CI8		 (2  << 16)
-#	define RADEON_DATATYPE_ARGB1555		 (3  << 16)
-#	define RADEON_DATATYPE_RGB565		 (4  << 16)
-#	define RADEON_DATATYPE_RGB888		 (5  << 16)
-#	define RADEON_DATATYPE_ARGB8888		 (6  << 16)
-#	define RADEON_DATATYPE_RGB332		 (7  << 16)
-#	define RADEON_DATATYPE_Y8		 (8  << 16)
-#	define RADEON_DATATYPE_RGB8		 (9  << 16)
-#	define RADEON_DATATYPE_CI16		 (10 << 16)
-#	define RADEON_DATATYPE_YUV422		 (11 << 16)
-#	define RADEON_DATATYPE_YUV422_2		 (12 << 16)
-#	define RADEON_DATATYPE_AYUV444		 (14 << 16)
-#	define RADEON_DATATYPE_ARGB4444		 (15 << 16)
-#	define RADEON_PALLETE_EITHER		 (0  << 20)
-#	define RADEON_PALLETE_1			 (1  << 20)
-#	define RADEON_PALLETE_2			 (2  << 20)
-#	define RADEON_PSEUDOCOLOR_DT_RGB565	 (0  << 24)
-#	define RADEON_PSEUDOCOLOR_DT_ARGB1555	 (1  << 24)
-#	define RADEON_PSEUDOCOLOR_DT_ARGB4444	 (2  << 24)
+#define RADEON_Z_OFFSET_C                   0x1c90
+#define RADEON_Z_PITCH_C                    0x1c94
+#define RADEON_Z_STEN_CNTL_C                0x1c98
+#       define RADEON_Z_PIX_WIDTH_16            (0 <<  1)
+#       define RADEON_Z_PIX_WIDTH_24            (1 <<  1)
+#       define RADEON_Z_PIX_WIDTH_32            (2 <<  1)
+#       define RADEON_Z_PIX_WIDTH_MASK          (3 <<  1)
+#       define RADEON_Z_TEST_NEVER              (0 <<  4)
+#       define RADEON_Z_TEST_LESS               (1 <<  4)
+#       define RADEON_Z_TEST_LESSEQUAL          (2 <<  4)
+#       define RADEON_Z_TEST_EQUAL              (3 <<  4)
+#       define RADEON_Z_TEST_GREATEREQUAL       (4 <<  4)
+#       define RADEON_Z_TEST_GREATER            (5 <<  4)
+#       define RADEON_Z_TEST_NEQUAL             (6 <<  4)
+#       define RADEON_Z_TEST_ALWAYS             (7 <<  4)
+#       define RADEON_Z_TEST_MASK               (7 <<  4)
+#       define RADEON_STENCIL_TEST_NEVER        (0 << 12)
+#       define RADEON_STENCIL_TEST_LESS         (1 << 12)
+#       define RADEON_STENCIL_TEST_LESSEQUAL    (2 << 12)
+#       define RADEON_STENCIL_TEST_EQUAL        (3 << 12)
+#       define RADEON_STENCIL_TEST_GREATEREQUAL (4 << 12)
+#       define RADEON_STENCIL_TEST_GREATER      (5 << 12)
+#       define RADEON_STENCIL_TEST_NEQUAL       (6 << 12)
+#       define RADEON_STENCIL_TEST_ALWAYS       (7 << 12)
+#       define RADEON_STENCIL_S_FAIL_KEEP       (0 << 16)
+#       define RADEON_STENCIL_S_FAIL_ZERO       (1 << 16)
+#       define RADEON_STENCIL_S_FAIL_REPLACE    (2 << 16)
+#       define RADEON_STENCIL_S_FAIL_INC        (3 << 16)
+#       define RADEON_STENCIL_S_FAIL_DEC        (4 << 16)
+#       define RADEON_STENCIL_S_FAIL_INV        (5 << 16)
+#       define RADEON_STENCIL_ZPASS_KEEP        (0 << 20)
+#       define RADEON_STENCIL_ZPASS_ZERO        (1 << 20)
+#       define RADEON_STENCIL_ZPASS_REPLACE     (2 << 20)
+#       define RADEON_STENCIL_ZPASS_INC         (3 << 20)
+#       define RADEON_STENCIL_ZPASS_DEC         (4 << 20)
+#       define RADEON_STENCIL_ZPASS_INV         (5 << 20)
+#       define RADEON_STENCIL_ZFAIL_KEEP        (0 << 24)
+#       define RADEON_STENCIL_ZFAIL_ZERO        (1 << 24)
+#       define RADEON_STENCIL_ZFAIL_REPLACE     (2 << 24)
+#       define RADEON_STENCIL_ZFAIL_INC         (3 << 24)
+#       define RADEON_STENCIL_ZFAIL_DEC         (4 << 24)
+#       define RADEON_STENCIL_ZFAIL_INV         (5 << 24)
+#define RADEON_TEX_CNTL_C                   0x1c9c
+#       define RADEON_Z_ENABLE                   (1 <<  0)
+#       define RADEON_Z_WRITE_ENABLE             (1 <<  1)
+#       define RADEON_STENCIL_ENABLE             (1 <<  3)
+#       define RADEON_SHADE_ENABLE               (0 <<  4)
+#       define RADEON_TEXMAP_ENABLE              (1 <<  4)
+#       define RADEON_SEC_TEXMAP_ENABLE          (1 <<  5)
+#       define RADEON_FOG_ENABLE                 (1 <<  7)
+#       define RADEON_DITHER_ENABLE              (1 <<  8)
+#       define RADEON_ALPHA_ENABLE               (1 <<  9)
+#       define RADEON_ALPHA_TEST_ENABLE          (1 << 10)
+#       define RADEON_SPEC_LIGHT_ENABLE          (1 << 11)
+#       define RADEON_TEX_CHROMA_KEY_ENABLE      (1 << 12)
+#       define RADEON_ALPHA_IN_TEX_COMPLETE_A    (0 << 13)
+#       define RADEON_ALPHA_IN_TEX_LSB_A         (1 << 13)
+#       define RADEON_LIGHT_DIS                  (0 << 14)
+#       define RADEON_LIGHT_COPY                 (1 << 14)
+#       define RADEON_LIGHT_MODULATE             (2 << 14)
+#       define RADEON_LIGHT_ADD                  (3 << 14)
+#       define RADEON_LIGHT_BLEND_CONSTANT       (4 << 14)
+#       define RADEON_LIGHT_BLEND_TEXTURE        (5 << 14)
+#       define RADEON_LIGHT_BLEND_VERTEX         (6 << 14)
+#       define RADEON_LIGHT_BLEND_CONST_COLOR    (7 << 14)
+#       define RADEON_ALPHA_LIGHT_DIS            (0 << 18)
+#       define RADEON_ALPHA_LIGHT_COPY           (1 << 18)
+#       define RADEON_ALPHA_LIGHT_MODULATE       (2 << 18)
+#       define RADEON_ALPHA_LIGHT_ADD            (3 << 18)
+#       define RADEON_ANTI_ALIAS                 (1 << 21)
+#       define RADEON_TEX_CACHE_FLUSH            (1 << 23)
+#       define RADEON_LOD_BIAS_SHIFT             24
+#define RADEON_MISC_3D_STATE_CNTL_REG       0x1ca0
+#       define RADEON_REF_ALPHA_MASK                  0xff
+#       define RADEON_MISC_SCALE_3D_NOOP              (0  <<  8)
+#       define RADEON_MISC_SCALE_3D_SCALE             (1  <<  8)
+#       define RADEON_MISC_SCALE_3D_TEXMAP_SHADE      (2  <<  8)
+#       define RADEON_MISC_SCALE_PIX_BLEND            (0  << 10)
+#       define RADEON_MISC_SCALE_PIX_REPLICATE        (1  << 10)
+#       define RADEON_ALPHA_COMB_ADD_CLAMP            (0  << 12)
+#       define RADEON_ALPHA_COMB_ADD_NO_CLAMP         (1  << 12)
+#       define RADEON_ALPHA_COMB_SUB_SRC_DST_CLAMP    (2  << 12)
+#       define RADEON_ALPHA_COMB_SUB_SRC_DST_NO_CLAMP (3  << 12)
+#       define RADEON_FOG_VERTEX                      (0  << 14)
+#       define RADEON_FOG_TABLE                       (1  << 14)
+#       define RADEON_ALPHA_BLEND_SRC_ZERO            (0  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_ONE             (1  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_SRCCOLOR        (2  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_INVSRCCOLOR     (3  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_SRCALPHA        (4  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_INVSRCALPHA     (5  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_DESTALPHA       (6  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_INVDESTALPHA    (7  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_DESTCOLOR       (8  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_INVDESTCOLOR    (9  << 16)
+#       define RADEON_ALPHA_BLEND_SRC_SRCALPHASAT     (10 << 16)
+#       define RADEON_ALPHA_BLEND_SRC_BOTHSRCALPHA    (11 << 16)
+#       define RADEON_ALPHA_BLEND_SRC_BOTHINVSRCALPHA (12 << 16)
+#       define RADEON_ALPHA_BLEND_SRC_MASK            (15 << 16)
+#       define RADEON_ALPHA_BLEND_DST_ZERO            (0  << 20)
+#       define RADEON_ALPHA_BLEND_DST_ONE             (1  << 20)
+#       define RADEON_ALPHA_BLEND_DST_SRCCOLOR        (2  << 20)
+#       define RADEON_ALPHA_BLEND_DST_INVSRCCOLOR     (3  << 20)
+#       define RADEON_ALPHA_BLEND_DST_SRCALPHA        (4  << 20)
+#       define RADEON_ALPHA_BLEND_DST_INVSRCALPHA     (5  << 20)
+#       define RADEON_ALPHA_BLEND_DST_DESTALPHA       (6  << 20)
+#       define RADEON_ALPHA_BLEND_DST_INVDESTALPHA    (7  << 20)
+#       define RADEON_ALPHA_BLEND_DST_DESTCOLOR       (8  << 20)
+#       define RADEON_ALPHA_BLEND_DST_INVDESTCOLOR    (9  << 20)
+#       define RADEON_ALPHA_BLEND_DST_SRCALPHASAT     (10 << 20)
+#       define RADEON_ALPHA_BLEND_DST_MASK            (15 << 20)
+#       define RADEON_ALPHA_TEST_NEVER                (0  << 24)
+#       define RADEON_ALPHA_TEST_LESS                 (1  << 24)
+#       define RADEON_ALPHA_TEST_LESSEQUAL            (2  << 24)
+#       define RADEON_ALPHA_TEST_EQUAL                (3  << 24)
+#       define RADEON_ALPHA_TEST_GREATEREQUAL         (4  << 24)
+#       define RADEON_ALPHA_TEST_GREATER              (5  << 24)
+#       define RADEON_ALPHA_TEST_NEQUAL               (6  << 24)
+#       define RADEON_ALPHA_TEST_ALWAYS               (7  << 24)
+#       define RADEON_ALPHA_TEST_MASK                 (7  << 24)
+#define RADEON_TEXTURE_CLR_CMP_CLR_C        0x1ca4
+#define RADEON_TEXTURE_CLR_CMP_MSK_C        0x1ca8
+#define RADEON_FOG_COLOR_C                  0x1cac
+#       define RADEON_FOG_BLUE_SHIFT             0
+#       define RADEON_FOG_GREEN_SHIFT            8
+#       define RADEON_FOG_RED_SHIFT             16
+#define RADEON_PRIM_TEX_CNTL_C              0x1cb0
+#       define RADEON_MIN_BLEND_NEAREST          (0  <<  1)
+#       define RADEON_MIN_BLEND_LINEAR           (1  <<  1)
+#       define RADEON_MIN_BLEND_MIPNEAREST       (2  <<  1)
+#       define RADEON_MIN_BLEND_MIPLINEAR        (3  <<  1)
+#       define RADEON_MIN_BLEND_LINEARMIPNEAREST (4  <<  1)
+#       define RADEON_MIN_BLEND_LINEARMIPLINEAR  (5  <<  1)
+#       define RADEON_MIN_BLEND_MASK             (7  <<  1)
+#       define RADEON_MAG_BLEND_NEAREST          (0  <<  4)
+#       define RADEON_MAG_BLEND_LINEAR           (1  <<  4)
+#       define RADEON_MAG_BLEND_MASK             (7  <<  4)
+#       define RADEON_MIP_MAP_DISABLE            (1  <<  7)
+#       define RADEON_TEX_CLAMP_S_WRAP           (0  <<  8)
+#       define RADEON_TEX_CLAMP_S_MIRROR         (1  <<  8)
+#       define RADEON_TEX_CLAMP_S_CLAMP          (2  <<  8)
+#       define RADEON_TEX_CLAMP_S_BORDER_COLOR   (3  <<  8)
+#       define RADEON_TEX_CLAMP_S_MASK           (3  <<  8)
+#       define RADEON_TEX_WRAP_S                 (1  << 10)
+#       define RADEON_TEX_CLAMP_T_WRAP           (0  << 11)
+#       define RADEON_TEX_CLAMP_T_MIRROR         (1  << 11)
+#       define RADEON_TEX_CLAMP_T_CLAMP          (2  << 11)
+#       define RADEON_TEX_CLAMP_T_BORDER_COLOR   (3  << 11)
+#       define RADEON_TEX_CLAMP_T_MASK           (3  << 11)
+#       define RADEON_TEX_WRAP_T                 (1  << 13)
+#       define RADEON_TEX_PERSPECTIVE_DISABLE    (1  << 14)
+#       define RADEON_DATATYPE_VQ                (0  << 16)
+#       define RADEON_DATATYPE_CI4               (1  << 16)
+#       define RADEON_DATATYPE_CI8               (2  << 16)
+#       define RADEON_DATATYPE_ARGB1555          (3  << 16)
+#       define RADEON_DATATYPE_RGB565            (4  << 16)
+#       define RADEON_DATATYPE_RGB888            (5  << 16)
+#       define RADEON_DATATYPE_ARGB8888          (6  << 16)
+#       define RADEON_DATATYPE_RGB332            (7  << 16)
+#       define RADEON_DATATYPE_Y8                (8  << 16)
+#       define RADEON_DATATYPE_RGB8              (9  << 16)
+#       define RADEON_DATATYPE_CI16              (10 << 16)
+#       define RADEON_DATATYPE_YUV422            (11 << 16)
+#       define RADEON_DATATYPE_YUV422_2          (12 << 16)
+#       define RADEON_DATATYPE_AYUV444           (14 << 16)
+#       define RADEON_DATATYPE_ARGB4444          (15 << 16)
+#       define RADEON_PALLETE_EITHER             (0  << 20)
+#       define RADEON_PALLETE_1                  (1  << 20)
+#       define RADEON_PALLETE_2                  (2  << 20)
+#       define RADEON_PSEUDOCOLOR_DT_RGB565      (0  << 24)
+#       define RADEON_PSEUDOCOLOR_DT_ARGB1555    (1  << 24)
+#       define RADEON_PSEUDOCOLOR_DT_ARGB4444    (2  << 24)
 #define RADEON_PRIM_TEXTURE_COMBINE_CNTL_C  0x1cb4
-#	define RADEON_COMB_DIS		       (0  <<  0)
-#	define RADEON_COMB_COPY		       (1  <<  0)
-#	define RADEON_COMB_COPY_INP	       (2  <<  0)
-#	define RADEON_COMB_MODULATE	       (3  <<  0)
-#	define RADEON_COMB_MODULATE2X	       (4  <<  0)
-#	define RADEON_COMB_MODULATE4X	       (5  <<  0)
-#	define RADEON_COMB_ADD		       (6  <<  0)
-#	define RADEON_COMB_ADD_SIGNED	       (7  <<  0)
-#	define RADEON_COMB_BLEND_VERTEX	       (8  <<  0)
-#	define RADEON_COMB_BLEND_TEXTURE       (9  <<  0)
-#	define RADEON_COMB_BLEND_CONST	       (10 <<  0)
-#	define RADEON_COMB_BLEND_PREMULT       (11 <<  0)
-#	define RADEON_COMB_BLEND_PREV	       (12 <<  0)
-#	define RADEON_COMB_BLEND_PREMULT_INV   (13 <<  0)
-#	define RADEON_COMB_ADD_SIGNED2X	       (14 <<  0)
-#	define RADEON_COMB_BLEND_CONST_COLOR   (15 <<  0)
-#	define RADEON_COMB_MASK		       (15 <<  0)
-#	define RADEON_COLOR_FACTOR_TEX	       (4  <<  4)
-#	define RADEON_COLOR_FACTOR_NTEX	       (5  <<  4)
-#	define RADEON_COLOR_FACTOR_ALPHA       (6  <<  4)
-#	define RADEON_COLOR_FACTOR_NALPHA      (7  <<  4)
-#	define RADEON_COLOR_FACTOR_MASK	       (15 <<  4)
-#	define RADEON_INPUT_FACTOR_CONST_COLOR (2  << 10)
-#	define RADEON_INPUT_FACTOR_CONST_ALPHA (3  << 10)
-#	define RADEON_INPUT_FACTOR_INT_COLOR   (4  << 10)
-#	define RADEON_INPUT_FACTOR_INT_ALPHA   (5  << 10)
-#	define RADEON_INPUT_FACTOR_MASK	       (15 << 10)
-#	define RADEON_COMB_ALPHA_DIS	       (0  << 14)
-#	define RADEON_COMB_ALPHA_COPY	       (1  << 14)
-#	define RADEON_COMB_ALPHA_COPY_INP      (2  << 14)
-#	define RADEON_COMB_ALPHA_MODULATE      (3  << 14)
-#	define RADEON_COMB_ALPHA_MODULATE2X    (4  << 14)
-#	define RADEON_COMB_ALPHA_MODULATE4X    (5  << 14)
-#	define RADEON_COMB_ALPHA_ADD	       (6  << 14)
-#	define RADEON_COMB_ALPHA_ADD_SIGNED    (7  << 14)
-#	define RADEON_COMB_ALPHA_ADD_SIGNED2X  (14 << 14)
-#	define RADEON_COMB_ALPHA_MASK	       (15 << 14)
-#	define RADEON_ALPHA_FACTOR_TEX_ALPHA   (6  << 18)
-#	define RADEON_ALPHA_FACTOR_NTEX_ALPHA  (7  << 18)
-#	define RADEON_ALPHA_FACTOR_MASK	       (15 << 18)
-#	define RADEON_INP_FACTOR_A_CONST_ALPHA (1  << 25)
-#	define RADEON_INP_FACTOR_A_INT_ALPHA   (2  << 25)
-#	define RADEON_INP_FACTOR_A_MASK	       (7  << 25)
-#define RADEON_TEX_SIZE_PITCH_C		    0x1cb8
-#	define RADEON_TEX_PITCH_SHIFT		0
-#	define RADEON_TEX_SIZE_SHIFT		4
-#	define RADEON_TEX_HEIGHT_SHIFT		8
-#	define RADEON_TEX_MIN_SIZE_SHIFT       12
-#	define RADEON_SEC_TEX_PITCH_SHIFT      16
-#	define RADEON_SEC_TEX_SIZE_SHIFT       20
-#	define RADEON_SEC_TEX_HEIGHT_SHIFT     24
-#	define RADEON_SEC_TEX_MIN_SIZE_SHIFT   28
-#	define RADEON_TEX_PITCH_MASK	       (0x0f <<	 0)
-#	define RADEON_TEX_SIZE_MASK	       (0x0f <<	 4)
-#	define RADEON_TEX_HEIGHT_MASK	       (0x0f <<	 8)
-#	define RADEON_TEX_MIN_SIZE_MASK	       (0x0f << 12)
-#	define RADEON_SEC_TEX_PITCH_MASK       (0x0f << 16)
-#	define RADEON_SEC_TEX_SIZE_MASK	       (0x0f << 20)
-#	define RADEON_SEC_TEX_HEIGHT_MASK      (0x0f << 24)
-#	define RADEON_SEC_TEX_MIN_SIZE_MASK    (0x0f << 28)
-#	define RADEON_TEX_SIZE_PITCH_SHIFT	0
-#	define RADEON_SEC_TEX_SIZE_PITCH_SHIFT 16
-#	define RADEON_TEX_SIZE_PITCH_MASK      (0xffff <<  0)
-#	define RADEON_SEC_TEX_SIZE_PITCH_MASK  (0xffff << 16)
-#define RADEON_PRIM_TEX_0_OFFSET_C	    0x1cbc
-#define RADEON_PRIM_TEX_1_OFFSET_C	    0x1cc0
-#define RADEON_PRIM_TEX_2_OFFSET_C	    0x1cc4
-#define RADEON_PRIM_TEX_3_OFFSET_C	    0x1cc8
-#define RADEON_PRIM_TEX_4_OFFSET_C	    0x1ccc
-#define RADEON_PRIM_TEX_5_OFFSET_C	    0x1cd0
-#define RADEON_PRIM_TEX_6_OFFSET_C	    0x1cd4
-#define RADEON_PRIM_TEX_7_OFFSET_C	    0x1cd8
-#define RADEON_PRIM_TEX_8_OFFSET_C	    0x1cdc
-#define RADEON_PRIM_TEX_9_OFFSET_C	    0x1ce0
-#define RADEON_PRIM_TEX_10_OFFSET_C	    0x1ce4
-#	define RADEON_TEX_NO_TILE	    (0 << 30)
-#	define RADEON_TEX_TILED_BY_HOST	    (1 << 30)
-#	define RADEON_TEX_TILED_BY_STORAGE  (2 << 30)
-#	define RADEON_TEX_TILED_BY_STORAGE2 (3 << 30)
+#       define RADEON_COMB_DIS                 (0  <<  0)
+#       define RADEON_COMB_COPY                (1  <<  0)
+#       define RADEON_COMB_COPY_INP            (2  <<  0)
+#       define RADEON_COMB_MODULATE            (3  <<  0)
+#       define RADEON_COMB_MODULATE2X          (4  <<  0)
+#       define RADEON_COMB_MODULATE4X          (5  <<  0)
+#       define RADEON_COMB_ADD                 (6  <<  0)
+#       define RADEON_COMB_ADD_SIGNED          (7  <<  0)
+#       define RADEON_COMB_BLEND_VERTEX        (8  <<  0)
+#       define RADEON_COMB_BLEND_TEXTURE       (9  <<  0)
+#       define RADEON_COMB_BLEND_CONST         (10 <<  0)
+#       define RADEON_COMB_BLEND_PREMULT       (11 <<  0)
+#       define RADEON_COMB_BLEND_PREV          (12 <<  0)
+#       define RADEON_COMB_BLEND_PREMULT_INV   (13 <<  0)
+#       define RADEON_COMB_ADD_SIGNED2X        (14 <<  0)
+#       define RADEON_COMB_BLEND_CONST_COLOR   (15 <<  0)
+#       define RADEON_COMB_MASK                (15 <<  0)
+#       define RADEON_COLOR_FACTOR_TEX         (4  <<  4)
+#       define RADEON_COLOR_FACTOR_NTEX        (5  <<  4)
+#       define RADEON_COLOR_FACTOR_ALPHA       (6  <<  4)
+#       define RADEON_COLOR_FACTOR_NALPHA      (7  <<  4)
+#       define RADEON_COLOR_FACTOR_MASK        (15 <<  4)
+#       define RADEON_INPUT_FACTOR_CONST_COLOR (2  << 10)
+#       define RADEON_INPUT_FACTOR_CONST_ALPHA (3  << 10)
+#       define RADEON_INPUT_FACTOR_INT_COLOR   (4  << 10)
+#       define RADEON_INPUT_FACTOR_INT_ALPHA   (5  << 10)
+#       define RADEON_INPUT_FACTOR_MASK        (15 << 10)
+#       define RADEON_COMB_ALPHA_DIS           (0  << 14)
+#       define RADEON_COMB_ALPHA_COPY          (1  << 14)
+#       define RADEON_COMB_ALPHA_COPY_INP      (2  << 14)
+#       define RADEON_COMB_ALPHA_MODULATE      (3  << 14)
+#       define RADEON_COMB_ALPHA_MODULATE2X    (4  << 14)
+#       define RADEON_COMB_ALPHA_MODULATE4X    (5  << 14)
+#       define RADEON_COMB_ALPHA_ADD           (6  << 14)
+#       define RADEON_COMB_ALPHA_ADD_SIGNED    (7  << 14)
+#       define RADEON_COMB_ALPHA_ADD_SIGNED2X  (14 << 14)
+#       define RADEON_COMB_ALPHA_MASK          (15 << 14)
+#       define RADEON_ALPHA_FACTOR_TEX_ALPHA   (6  << 18)
+#       define RADEON_ALPHA_FACTOR_NTEX_ALPHA  (7  << 18)
+#       define RADEON_ALPHA_FACTOR_MASK        (15 << 18)
+#       define RADEON_INP_FACTOR_A_CONST_ALPHA (1  << 25)
+#       define RADEON_INP_FACTOR_A_INT_ALPHA   (2  << 25)
+#       define RADEON_INP_FACTOR_A_MASK        (7  << 25)
+#define RADEON_TEX_SIZE_PITCH_C             0x1cb8
+#       define RADEON_TEX_PITCH_SHIFT           0
+#       define RADEON_TEX_SIZE_SHIFT            4
+#       define RADEON_TEX_HEIGHT_SHIFT          8
+#       define RADEON_TEX_MIN_SIZE_SHIFT       12
+#       define RADEON_SEC_TEX_PITCH_SHIFT      16
+#       define RADEON_SEC_TEX_SIZE_SHIFT       20
+#       define RADEON_SEC_TEX_HEIGHT_SHIFT     24
+#       define RADEON_SEC_TEX_MIN_SIZE_SHIFT   28
+#       define RADEON_TEX_PITCH_MASK           (0x0f <<  0)
+#       define RADEON_TEX_SIZE_MASK            (0x0f <<  4)
+#       define RADEON_TEX_HEIGHT_MASK          (0x0f <<  8)
+#       define RADEON_TEX_MIN_SIZE_MASK        (0x0f << 12)
+#       define RADEON_SEC_TEX_PITCH_MASK       (0x0f << 16)
+#       define RADEON_SEC_TEX_SIZE_MASK        (0x0f << 20)
+#       define RADEON_SEC_TEX_HEIGHT_MASK      (0x0f << 24)
+#       define RADEON_SEC_TEX_MIN_SIZE_MASK    (0x0f << 28)
+#       define RADEON_TEX_SIZE_PITCH_SHIFT      0
+#       define RADEON_SEC_TEX_SIZE_PITCH_SHIFT 16
+#       define RADEON_TEX_SIZE_PITCH_MASK      (0xffff <<  0)
+#       define RADEON_SEC_TEX_SIZE_PITCH_MASK  (0xffff << 16)
+#define RADEON_PRIM_TEX_0_OFFSET_C          0x1cbc
+#define RADEON_PRIM_TEX_1_OFFSET_C          0x1cc0
+#define RADEON_PRIM_TEX_2_OFFSET_C          0x1cc4
+#define RADEON_PRIM_TEX_3_OFFSET_C          0x1cc8
+#define RADEON_PRIM_TEX_4_OFFSET_C          0x1ccc
+#define RADEON_PRIM_TEX_5_OFFSET_C          0x1cd0
+#define RADEON_PRIM_TEX_6_OFFSET_C          0x1cd4
+#define RADEON_PRIM_TEX_7_OFFSET_C          0x1cd8
+#define RADEON_PRIM_TEX_8_OFFSET_C          0x1cdc
+#define RADEON_PRIM_TEX_9_OFFSET_C          0x1ce0
+#define RADEON_PRIM_TEX_10_OFFSET_C         0x1ce4
+#       define RADEON_TEX_NO_TILE           (0 << 30)
+#       define RADEON_TEX_TILED_BY_HOST     (1 << 30)
+#       define RADEON_TEX_TILED_BY_STORAGE  (2 << 30)
+#       define RADEON_TEX_TILED_BY_STORAGE2 (3 << 30)
 
-#define RADEON_SEC_TEX_CNTL_C		    0x1d00
-#	define RADEON_SEC_SELECT_PRIM_ST    (0	<<  0)
-#	define RADEON_SEC_SELECT_SEC_ST	    (1	<<  0)
-#define RADEON_SEC_TEX_COMBINE_CNTL_C	    0x1d04
-#	define RADEON_INPUT_FACTOR_PREV_COLOR (8  << 10)
-#	define RADEON_INPUT_FACTOR_PREV_ALPHA (9  << 10)
-#	define RADEON_INP_FACTOR_A_PREV_ALPHA (4  << 25)
-#define RADEON_SEC_TEX_0_OFFSET_C	    0x1d08
-#define RADEON_SEC_TEX_1_OFFSET_C	    0x1d0c
-#define RADEON_SEC_TEX_2_OFFSET_C	    0x1d10
-#define RADEON_SEC_TEX_3_OFFSET_C	    0x1d14
-#define RADEON_SEC_TEX_4_OFFSET_C	    0x1d18
-#define RADEON_SEC_TEX_5_OFFSET_C	    0x1d1c
-#define RADEON_SEC_TEX_6_OFFSET_C	    0x1d20
-#define RADEON_SEC_TEX_7_OFFSET_C	    0x1d24
-#define RADEON_SEC_TEX_8_OFFSET_C	    0x1d28
-#define RADEON_SEC_TEX_9_OFFSET_C	    0x1d2c
-#define RADEON_SEC_TEX_10_OFFSET_C	    0x1d30
-#define RADEON_CONSTANT_COLOR_C		    0x1d34
-#	define RADEON_CONSTANT_BLUE_SHIFT	 0
-#	define RADEON_CONSTANT_GREEN_SHIFT	 8
-#	define RADEON_CONSTANT_RED_SHIFT	16
-#	define RADEON_CONSTANT_ALPHA_SHIFT	24
+#define RADEON_SEC_TEX_CNTL_C               0x1d00
+#       define RADEON_SEC_SELECT_PRIM_ST    (0  <<  0)
+#       define RADEON_SEC_SELECT_SEC_ST     (1  <<  0)
+#define RADEON_SEC_TEX_COMBINE_CNTL_C       0x1d04
+#       define RADEON_INPUT_FACTOR_PREV_COLOR (8  << 10)
+#       define RADEON_INPUT_FACTOR_PREV_ALPHA (9  << 10)
+#       define RADEON_INP_FACTOR_A_PREV_ALPHA (4  << 25)
+#define RADEON_SEC_TEX_0_OFFSET_C           0x1d08
+#define RADEON_SEC_TEX_1_OFFSET_C           0x1d0c
+#define RADEON_SEC_TEX_2_OFFSET_C           0x1d10
+#define RADEON_SEC_TEX_3_OFFSET_C           0x1d14
+#define RADEON_SEC_TEX_4_OFFSET_C           0x1d18
+#define RADEON_SEC_TEX_5_OFFSET_C           0x1d1c
+#define RADEON_SEC_TEX_6_OFFSET_C           0x1d20
+#define RADEON_SEC_TEX_7_OFFSET_C           0x1d24
+#define RADEON_SEC_TEX_8_OFFSET_C           0x1d28
+#define RADEON_SEC_TEX_9_OFFSET_C           0x1d2c
+#define RADEON_SEC_TEX_10_OFFSET_C          0x1d30
+#define RADEON_CONSTANT_COLOR_C             0x1d34
+#       define RADEON_CONSTANT_BLUE_SHIFT        0
+#       define RADEON_CONSTANT_GREEN_SHIFT       8
+#       define RADEON_CONSTANT_RED_SHIFT        16
+#       define RADEON_CONSTANT_ALPHA_SHIFT      24
 #define RADEON_PRIM_TEXTURE_BORDER_COLOR_C  0x1d38
-#	define RADEON_PRIM_TEX_BORDER_BLUE_SHIFT   0
-#	define RADEON_PRIM_TEX_BORDER_GREEN_SHIFT  8
-#	define RADEON_PRIM_TEX_BORDER_RED_SHIFT	  16
-#	define RADEON_PRIM_TEX_BORDER_ALPHA_SHIFT 24
+#       define RADEON_PRIM_TEX_BORDER_BLUE_SHIFT   0
+#       define RADEON_PRIM_TEX_BORDER_GREEN_SHIFT  8
+#       define RADEON_PRIM_TEX_BORDER_RED_SHIFT   16
+#       define RADEON_PRIM_TEX_BORDER_ALPHA_SHIFT 24
 #define RADEON_SEC_TEXTURE_BORDER_COLOR_C   0x1d3c
-#	define RADEON_SEC_TEX_BORDER_BLUE_SHIFT	  0
-#	define RADEON_SEC_TEX_BORDER_GREEN_SHIFT  8
-#	define RADEON_SEC_TEX_BORDER_RED_SHIFT	 16
-#	define RADEON_SEC_TEX_BORDER_ALPHA_SHIFT 24
-#define RADEON_STEN_REF_MASK_C		    0x1d40
-#	define RADEON_STEN_REFERENCE_SHIFT	 0
-#	define RADEON_STEN_MASK_SHIFT		16
-#	define RADEON_STEN_WRITE_MASK_SHIFT	24
-#define RADEON_PLANE_3D_MASK_C		    0x1d44
-#define RADEON_TEX_CACHE_STAT_COUNT	    0x1974
+#       define RADEON_SEC_TEX_BORDER_BLUE_SHIFT   0
+#       define RADEON_SEC_TEX_BORDER_GREEN_SHIFT  8
+#       define RADEON_SEC_TEX_BORDER_RED_SHIFT   16
+#       define RADEON_SEC_TEX_BORDER_ALPHA_SHIFT 24
+#define RADEON_STEN_REF_MASK_C              0x1d40
+#       define RADEON_STEN_REFERENCE_SHIFT       0
+#       define RADEON_STEN_MASK_SHIFT           16
+#       define RADEON_STEN_WRITE_MASK_SHIFT     24
+#define RADEON_PLANE_3D_MASK_C              0x1d44
+#define RADEON_TEX_CACHE_STAT_COUNT         0x1974
 
 
 				/* Constants */
-#define RADEON_AGP_TEX_OFFSET		    0x02000000
+#define RADEON_AGP_TEX_OFFSET               0x02000000
 
-#define RADEON_VB_AGE_REG		    RADEON_GUI_SCRATCH_REG0
-#define RADEON_SWAP_AGE_REG		    RADEON_GUI_SCRATCH_REG1
+#define RADEON_VB_AGE_REG                   RADEON_GUI_SCRATCH_REG0
+#define RADEON_SWAP_AGE_REG                 RADEON_GUI_SCRATCH_REG1
 
 				/* CCE packet types */
-#define RADEON_CCE_PACKET0			   0x00000000
-#define RADEON_CCE_PACKET0_ONE_REG_WR		   0x00008000
-#define RADEON_CCE_PACKET1			   0x40000000
-#define RADEON_CCE_PACKET2			   0x80000000
-#define RADEON_CCE_PACKET3_NOP			   0xC0001000
-#define RADEON_CCE_PACKET3_PAINT		   0xC0001100
-#define RADEON_CCE_PACKET3_BITBLT		   0xC0001200
-#define RADEON_CCE_PACKET3_SMALLTEXT		   0xC0001300
-#define RADEON_CCE_PACKET3_HOSTDATA_BLT		   0xC0001400
-#define RADEON_CCE_PACKET3_POLYLINE		   0xC0001500
-#define RADEON_CCE_PACKET3_SCALING		   0xC0001600
-#define RADEON_CCE_PACKET3_TRANS_SCALING	   0xC0001700
-#define RADEON_CCE_PACKET3_POLYSCANLINES	   0xC0001800
-#define RADEON_CCE_PACKET3_NEXT_CHAR		   0xC0001900
-#define RADEON_CCE_PACKET3_PAINT_MULTI		   0xC0001A00
-#define RADEON_CCE_PACKET3_BITBLT_MULTI		   0xC0001B00
-#define RADEON_CCE_PACKET3_PLY_NEXTSCAN		   0xC0001D00
-#define RADEON_CCE_PACKET3_SET_SCISSORS		   0xC0001E00
-#define RADEON_CCE_PACKET3_SET_MODE24BPP	   0xC0001F00
-#define RADEON_CCE_PACKET3_CNTL_PAINT		   0xC0009100
-#define RADEON_CCE_PACKET3_CNTL_BITBLT		   0xC0009200
-#define RADEON_CCE_PACKET3_CNTL_SMALLTEXT	   0xC0009300
-#define RADEON_CCE_PACKET3_CNTL_HOSTDATA_BLT	   0xC0009400
-#define RADEON_CCE_PACKET3_CNTL_POLYLINE	   0xC0009500
-#define RADEON_CCE_PACKET3_CNTL_SCALING		   0xC0009600
-#define RADEON_CCE_PACKET3_CNTL_TRANS_SCALING	   0xC0009700
-#define RADEON_CCE_PACKET3_CNTL_POLYSCANLINES	   0xC0009800
-#define RADEON_CCE_PACKET3_CNTL_NEXT_CHAR	   0xC0009900
-#define RADEON_CCE_PACKET3_CNTL_PAINT_MULTI	   0xC0009A00
-#define RADEON_CCE_PACKET3_CNTL_BITBLT_MULTI	   0xC0009B00
-#define RADEON_CCE_PACKET3_CNTL_TRANS_BITBLT	   0xC0009C00
-#define RADEON_CCE_PACKET3_3D_SAVE_CONTEXT	   0xC0002000
-#define RADEON_CCE_PACKET3_3D_PLAY_CONTEXT	   0xC0002100
+#define RADEON_CCE_PACKET0                         0x00000000
+#define RADEON_CCE_PACKET0_ONE_REG_WR              0x00008000
+#define RADEON_CCE_PACKET1                         0x40000000
+#define RADEON_CCE_PACKET2                         0x80000000
+#define RADEON_CCE_PACKET3_NOP                     0xC0001000
+#define RADEON_CCE_PACKET3_PAINT                   0xC0001100
+#define RADEON_CCE_PACKET3_BITBLT                  0xC0001200
+#define RADEON_CCE_PACKET3_SMALLTEXT               0xC0001300
+#define RADEON_CCE_PACKET3_HOSTDATA_BLT            0xC0001400
+#define RADEON_CCE_PACKET3_POLYLINE                0xC0001500
+#define RADEON_CCE_PACKET3_SCALING                 0xC0001600
+#define RADEON_CCE_PACKET3_TRANS_SCALING           0xC0001700
+#define RADEON_CCE_PACKET3_POLYSCANLINES           0xC0001800
+#define RADEON_CCE_PACKET3_NEXT_CHAR               0xC0001900
+#define RADEON_CCE_PACKET3_PAINT_MULTI             0xC0001A00
+#define RADEON_CCE_PACKET3_BITBLT_MULTI            0xC0001B00
+#define RADEON_CCE_PACKET3_PLY_NEXTSCAN            0xC0001D00
+#define RADEON_CCE_PACKET3_SET_SCISSORS            0xC0001E00
+#define RADEON_CCE_PACKET3_SET_MODE24BPP           0xC0001F00
+#define RADEON_CCE_PACKET3_CNTL_PAINT              0xC0009100
+#define RADEON_CCE_PACKET3_CNTL_BITBLT             0xC0009200
+#define RADEON_CCE_PACKET3_CNTL_SMALLTEXT          0xC0009300
+#define RADEON_CCE_PACKET3_CNTL_HOSTDATA_BLT       0xC0009400
+#define RADEON_CCE_PACKET3_CNTL_POLYLINE           0xC0009500
+#define RADEON_CCE_PACKET3_CNTL_SCALING            0xC0009600
+#define RADEON_CCE_PACKET3_CNTL_TRANS_SCALING      0xC0009700
+#define RADEON_CCE_PACKET3_CNTL_POLYSCANLINES      0xC0009800
+#define RADEON_CCE_PACKET3_CNTL_NEXT_CHAR          0xC0009900
+#define RADEON_CCE_PACKET3_CNTL_PAINT_MULTI        0xC0009A00
+#define RADEON_CCE_PACKET3_CNTL_BITBLT_MULTI       0xC0009B00
+#define RADEON_CCE_PACKET3_CNTL_TRANS_BITBLT       0xC0009C00
+#define RADEON_CCE_PACKET3_3D_SAVE_CONTEXT         0xC0002000
+#define RADEON_CCE_PACKET3_3D_PLAY_CONTEXT         0xC0002100
 #define RADEON_CCE_PACKET3_3D_RNDR_GEN_INDX_PRIM   0xC0002300
-#define RADEON_CCE_PACKET3_3D_RNDR_GEN_PRIM	   0xC0002500
-#define RADEON_CCE_PACKET3_LOAD_PALETTE		   0xC0002C00
-#define RADEON_CCE_PACKET3_PURGE		   0xC0002D00
-#define RADEON_CCE_PACKET3_NEXT_VERTEX_BUNDLE	   0xC0002E00
-#	define RADEON_CCE_PACKET_MASK		   0xC0000000
-#	define RADEON_CCE_PACKET_COUNT_MASK	   0x3fff0000
-#	define RADEON_CCE_PACKET_MAX_DWORDS	   (1 << 14)
-#	define RADEON_CCE_PACKET0_REG_MASK	   0x000007ff
-#	define RADEON_CCE_PACKET1_REG0_MASK	   0x000007ff
-#	define RADEON_CCE_PACKET1_REG1_MASK	   0x003ff800
+#define RADEON_CCE_PACKET3_3D_RNDR_GEN_PRIM        0xC0002500
+#define RADEON_CCE_PACKET3_LOAD_PALETTE            0xC0002C00
+#define RADEON_CCE_PACKET3_PURGE                   0xC0002D00
+#define RADEON_CCE_PACKET3_NEXT_VERTEX_BUNDLE      0xC0002E00
+#       define RADEON_CCE_PACKET_MASK              0xC0000000
+#       define RADEON_CCE_PACKET_COUNT_MASK        0x3fff0000
+#       define RADEON_CCE_PACKET_MAX_DWORDS        (1 << 14)
+#       define RADEON_CCE_PACKET0_REG_MASK         0x000007ff
+#       define RADEON_CCE_PACKET1_REG0_MASK        0x000007ff
+#       define RADEON_CCE_PACKET1_REG1_MASK        0x003ff800
 
-#define RADEON_CCE_VC_FRMT_RHW			   0x00000001
-#define RADEON_CCE_VC_FRMT_DIFFUSE_BGR		   0x00000002
-#define RADEON_CCE_VC_FRMT_DIFFUSE_A		   0x00000004
-#define RADEON_CCE_VC_FRMT_DIFFUSE_ARGB		   0x00000008
-#define RADEON_CCE_VC_FRMT_SPEC_BGR		   0x00000010
-#define RADEON_CCE_VC_FRMT_SPEC_F		   0x00000020
-#define RADEON_CCE_VC_FRMT_SPEC_FRGB		   0x00000040
-#define RADEON_CCE_VC_FRMT_S_T			   0x00000080
-#define RADEON_CCE_VC_FRMT_S2_T2		   0x00000100
-#define RADEON_CCE_VC_FRMT_RHW2			   0x00000200
+#define RADEON_CCE_VC_FRMT_RHW                     0x00000001
+#define RADEON_CCE_VC_FRMT_DIFFUSE_BGR             0x00000002
+#define RADEON_CCE_VC_FRMT_DIFFUSE_A               0x00000004
+#define RADEON_CCE_VC_FRMT_DIFFUSE_ARGB            0x00000008
+#define RADEON_CCE_VC_FRMT_SPEC_BGR                0x00000010
+#define RADEON_CCE_VC_FRMT_SPEC_F                  0x00000020
+#define RADEON_CCE_VC_FRMT_SPEC_FRGB               0x00000040
+#define RADEON_CCE_VC_FRMT_S_T                     0x00000080
+#define RADEON_CCE_VC_FRMT_S2_T2                   0x00000100
+#define RADEON_CCE_VC_FRMT_RHW2                    0x00000200
 
-#define RADEON_CCE_VC_CNTL_PRIM_TYPE_NONE	   0x00000000
-#define RADEON_CCE_VC_CNTL_PRIM_TYPE_POINT	   0x00000001
-#define RADEON_CCE_VC_CNTL_PRIM_TYPE_LINE	   0x00000002
-#define RADEON_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE	   0x00000003
-#define RADEON_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST	   0x00000004
-#define RADEON_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN	   0x00000005
-#define RADEON_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP	   0x00000006
-#define RADEON_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2	   0x00000007
-#define RADEON_CCE_VC_CNTL_PRIM_WALK_IND	   0x00000010
-#define RADEON_CCE_VC_CNTL_PRIM_WALK_LIST	   0x00000020
-#define RADEON_CCE_VC_CNTL_PRIM_WALK_RING	   0x00000030
-#define RADEON_CCE_VC_CNTL_NUM_SHIFT		   16
+#define RADEON_CCE_VC_CNTL_PRIM_TYPE_NONE          0x00000000
+#define RADEON_CCE_VC_CNTL_PRIM_TYPE_POINT         0x00000001
+#define RADEON_CCE_VC_CNTL_PRIM_TYPE_LINE          0x00000002
+#define RADEON_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE     0x00000003
+#define RADEON_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST      0x00000004
+#define RADEON_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN       0x00000005
+#define RADEON_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP     0x00000006
+#define RADEON_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2     0x00000007
+#define RADEON_CCE_VC_CNTL_PRIM_WALK_IND           0x00000010
+#define RADEON_CCE_VC_CNTL_PRIM_WALK_LIST          0x00000020
+#define RADEON_CCE_VC_CNTL_PRIM_WALK_RING          0x00000030
+#define RADEON_CCE_VC_CNTL_NUM_SHIFT               16
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c
index 8f629fd73..550324ed7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c,v 1.1 2000/11/02 16:55:47 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c,v 1.3 2000/11/09 10:30:54 alanh Exp $ */
 /*
  * Copyright 2000 Stuart R. Anderson and Metro Link, Inc.
  *
@@ -42,6 +42,7 @@
  *   should be brought forward.
  *
  *   RADEON ALERT !
+ *   Alan Hourihane <ahourihane@valinux.com>
  *   This is an extremely quick port to the Radeon, it hasn't been tested
  *   thoroughly, although it appears to work.
  */
@@ -71,14 +72,14 @@
 #define OUTREG(addr, val)   { xf86DrvMsgVerb(pScrn->scrnIndex,X_INFO,1,"OUTREG(%s,%x)\n",#addr,val) ;MMIO_OUT32(RADEONMMIO, addr, val);}
 */
 
-#define OFF_DELAY	250  /* milliseconds */
-#define FREE_DELAY	15000
+#define OFF_DELAY       250  /* milliseconds */
+#define FREE_DELAY      15000
 
-#define OFF_TIMER	0x01
-#define FREE_TIMER	0x02
+#define OFF_TIMER       0x01
+#define FREE_TIMER      0x02
 #define CLIENT_VIDEO_ON 0x04
 
-#define TIMER_MASK	(OFF_TIMER | FREE_TIMER)
+#define TIMER_MASK      (OFF_TIMER | FREE_TIMER)
 
 #ifndef XvExtension
 void RADEONInitVideo(ScreenPtr pScreen) {}
@@ -98,28 +99,28 @@ static int RADEONQueryImageAttributes(ScrnInfoPtr,
 
 #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
 
-#define IMAGE_MAX_WIDTH		2048
-#define IMAGE_MAX_HEIGHT	2048
-#define Y_BUF_SIZE		(IMAGE_MAX_WIDTH * IMAGE_MAX_HEIGHT)
+#define IMAGE_MAX_WIDTH         2048
+#define IMAGE_MAX_HEIGHT        2048
+#define Y_BUF_SIZE              (IMAGE_MAX_WIDTH * IMAGE_MAX_HEIGHT)
 
 static Atom xvColorKey;
 
 typedef struct {
-	int		videoStatus;
-	unsigned char	brightness;
-	unsigned char	contrast;
-
-	RegionRec	clip;
-	CARD32		colorKey;
-	CARD8		overlay_pixel_size;
-	CARD8		current_buffer;
-	int		overlay_pad;
-	CARD32		overlay_id;
-	CARD32		overlay_width;
-
-	CARD32		scale_cntl;
-	CARD32		video_format;
-	FBLinearPtr	linear;
+	int             videoStatus;
+	unsigned char   brightness;
+	unsigned char   contrast;
+
+	RegionRec       clip;
+	CARD32          colorKey;
+	CARD8           overlay_pixel_size;
+	CARD8           current_buffer;
+	int             overlay_pad;
+	CARD32          overlay_id;
+	CARD32          overlay_width;
+
+	CARD32          scale_cntl;
+	CARD32          video_format;
+	FBLinearPtr     linear;
 	} RADEONPortPrivRec, *RADEONPortPrivPtr;
 
 void RADEONInitVideo(ScreenPtr pScreen)
@@ -243,11 +244,11 @@ RADEONResetVideo(ScrnInfoPtr pScrn)
     OUTREG(RADEON_OV0_STEP_BY,1|(1<<8));
     OUTREG(RADEON_OV0_FILTER_CNTL,0xf); /* use hardcoded coeff's */
     OUTREG(RADEON_OV0_FILTER_CNTL,0x0); /* use programmable coeff's */
-    OUTREG(RADEON_OV0_FOUR_TAP_COEF_0	, 0x00002000);
-    OUTREG(RADEON_OV0_FOUR_TAP_COEF_1	, 0x0D06200D);
-    OUTREG(RADEON_OV0_FOUR_TAP_COEF_2	, 0x0D0A1C0D);
-    OUTREG(RADEON_OV0_FOUR_TAP_COEF_3	, 0x0C0E1A0C);
-    OUTREG(RADEON_OV0_FOUR_TAP_COEF_4	, 0x0C14140C);
+    OUTREG(RADEON_OV0_FOUR_TAP_COEF_0   , 0x00002000);
+    OUTREG(RADEON_OV0_FOUR_TAP_COEF_1   , 0x0D06200D);
+    OUTREG(RADEON_OV0_FOUR_TAP_COEF_2   , 0x0D0A1C0D);
+    OUTREG(RADEON_OV0_FOUR_TAP_COEF_3   , 0x0C0E1A0C);
+    OUTREG(RADEON_OV0_FOUR_TAP_COEF_4   , 0x0C14140C);
     OUTREG(RADEON_OV0_COLOUR_CNTL,(1<<12)|(1<<20));
     OUTREG(RADEON_OV0_TEST,0);
     OUTREG(RADEON_OV0_SCALE_CNTL,pPriv->scale_cntl|pPriv->video_format);
@@ -308,7 +309,7 @@ RADEONSetupImageVideo(ScreenPtr pScreen)
     pPriv->scale_cntl|= RADEON_SCALER_SMART_SWITCH|RADEON_SCALER_PIX_EXPAND;
     pPriv->scale_cntl|= RADEON_SCALER_SMART_SWITCH;
 
-    xvColorKey	 = MAKE_ATOM("XV_COLORKEY");
+    xvColorKey   = MAKE_ATOM("XV_COLORKEY");
 
     RADEONResetVideo(pScrn);
 
@@ -668,7 +669,7 @@ RADEONPutImage(
 
     switch(id) {
     case FOURCC_YV12:
-	 size =	 width * height * 2; /* 16bpp */
+	 size =  width * height * 2; /* 16bpp */
 	 break;
     case FOURCC_UYVY:
     case FOURCC_YUY2:
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c
index d22accc44..4239ec65d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c,v 1.99 2000/11/03 22:05:46 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c,v 1.100 2000/11/14 16:54:51 dawes Exp $ */
 
 /*
  * Copyright 1993 by Jon Block <block@frc.com>
@@ -801,7 +801,6 @@ static
 OptionInfoPtr
 CHIPSAvailableOptions(int chipid, int busid)
 {
-    int vendor = ((chipid & 0xffff0000) >> 16);
     int chip = chipid & 0x0000ffff;
 
     if (busid == BUS_ISA) {
@@ -6185,16 +6184,16 @@ chipsRestoreExtendedRegs(ScrnInfoPtr pScrn, CHIPSRegPtr Regs)
     /* debug - dump out all the extended registers... */
     if (IS_HiQV(cPtr)) {
 	for (i = 0; i < 0xFF; i++) {
-	    ErrorF("XR%X - %X : %X\n", i, ChipsReg->XR[i],
+	    ErrorF("XR%X - %X : %X\n", i, Regs->XR[i],
 		   cPtr->readXR(cPtr, i));
 	}
 	for (i = 0; i < 0x80; i++) {
-	    ErrorF("FR%X - %X : %X\n", i, ChipsReg->FR[i],
+	    ErrorF("FR%X - %X : %X\n", i, Regs->FR[i],
 		   cPtr->readFR(cPtr, i));
 	}
     } else {
 	for (i = 0; i < 0x80; i++) {
-	    ErrorF("XR%X - %X : %X\n", i, ChipsReg->XR[i],
+	    ErrorF("XR%X - %X : %X\n", i, Regs->XR[i],
 		   cPtr->readXR(cPtr, i));
 	}
     }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/README.pm3 b/xc/programs/Xserver/hw/xfree86/drivers/glint/README.pm3
index 3d5835856..5519a8713 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/README.pm3
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/README.pm3
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/README.pm3,v 1.3 2000/10/17 09:07:03 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/README.pm3,v 1.4 2000/11/14 17:32:59 dawes Exp $ */
   
 STATUS as of Mon, 16 Oct 2000 21:24:51 +0200
   
@@ -7,7 +7,8 @@ Working :
     1280x1024 only as my monitor don't support higher modes.
   * HW cursor.
   * ShadowFb works.
-  * Full 2D Accels. (Need testing and tuning on big endian systems.)
+  * Full 2D Accels.
+    - It should be endian clean, need testing on a big endian box though.
     - Sync.
     - Pixmap cache.
     - Offscreen pixmaps.
@@ -17,13 +18,22 @@ Working :
     - HorVert Solid Lines .
     - 8x8 Mono Pattern Fills.
     - Color Expansion Fills.
+    - Bitmap Writes using direct FIFO writes with or without FIFO Disconnect.
     - Images Writes.
+    - Pixmap Writes using direct FIFO writes with or without FIFO Disconnect.
   * Appian J2000 second head initialization.
   * Dual head : The console fonts will get trashed, but dual head works.
+  * DRI : 
+    - Gamma, if available, get's claimed with the UseGamma option.
 Not Working :
-  * 2D Accel hooks not implemented :
+  * 2D Accel :
     - Solid & Dashed Lines are not possible on glint hardware.
     - 8x8 Color Pattern Fill is almost never used.
+    - Clipping needs cleaning up.
+  * 2D Accel hooks for the Rendering extension ?
+    - Render extension initialization.
+    - CPUToScreenTexture.
+    - CPUToScreenAlphaTexture.
   * Video Overlay.
   * DRI.
   
@@ -33,12 +43,19 @@ Known Problem :
     the vga graphics index & port (GraphicsIndexReg : 0x63ce, GraphicsPort :
     0x3cf). I had to use IO acces for both these two, because if not, console
     fonts would get trashed even in mono headed mode.
+    [FIX] Well, if you really need the console and are running linux, just use
+    vesafb, it will be a bit slower, but the fonts will no more become
+    corrupt. Maybe i will even try writting a specific fbdev for the pm3,
+    which will be much faster and have more functionality.
   * R-B inversion. Sometimes, all of a sudden, it seems as the RGB order
     gets changed. going to console and back solves this.
   * [TRIGGERED IN ENLIGTHENMENT ONLY] When moving a window around a lot
     quicly, the video outputs dies. I have to switch to a console and back
     to have it restored. Is it possible that the accel engine gets
-    overloaded or something such ?
+    overloaded or something such ?  Don't think so, it happens even when
+    PCIRetry is used too ...
+  * Sometimes there are blue transparent garbage in the form of small
+    horizontal bands, few pixels high, and more pixels width, maybe 64pixels ?
 
 Video Overlay [NOTHING DONE YET] : 
 
@@ -55,3 +72,26 @@ DRI/3D Accels [NOTHING DONE YET] :
     pm3 drm kernel driver as well as a pm3 OpenGL driver. Could be useful for 
     boards without gamma chips though.
 
+  * Claiming the Gamma (in the one head only approach) :
+    - The first possibility is the use of the UseGamma Option in the driver
+      section. The UseGamma option then tries to claim a gamma chip, if
+      available, on the same device. This enable the use of the gamma on
+      either head, in a two head setup.
+    - The second possibility is the automatic claiming of a gamma chip if
+      available. This works ok in single headed mode, but in dual head setup,
+      only the first head will be accelerated.
+  * Using the Gamma :
+    - A first try of using the Gamma (for 2D only) gave me a system freeze.
+      This is probably due to bad initialization since i only set the IOBase
+      to the Gamma registers, and did nothing more to initialize the Gamma.
+      I need more info on initialization of the Gamma chip, especially on how
+      to tell it which Permedia3 to use.
+    - A Second try, after initializing MultiGLINTAperture and MultiGLINT1 did
+      end in the same way.
+    - Once that is done, i need to write a pm3_dri.c file, inspired on the
+      glint_dri.c file, which does the dri setup, and the 2d/3d state saving.
+  * Changes to the 2D driver when using the Gamma :
+    - Well, there could be some changes, but in particular, the Gamma has only
+      a 32 entries deep Input FIFO, and not a 120 entries deep one like
+      permedia3.
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h
index 41adfd348..d7467a00d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h,v 1.36 2000/10/17 09:07:04 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h,v 1.37 2000/11/14 17:32:59 dawes Exp $ */
 /*
  * Copyright 1997,1998 by Alan Hourihane <alanh@fairlite.demon.co.uk>
  *
@@ -146,6 +146,11 @@ typedef struct {
     int			PM3_Render2D;
     int			PM3_AreaStippleMode;
     int			PM3_VideoControl;
+    Bool		PM3_UseGamma;
+    pciVideoPtr		PM3_GammaPciInfo;
+    PCITAG		PM3_GammaPciTag;
+    CARD32		PM3_GammaIOAddress;
+    unsigned char *     PM3_GammaIOBase;
 #ifdef XF86DRI
     Bool		directRenderingEnabled;
     DRIInfoPtr		pDRIInfo;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
index 8744c7c91..827aaad3d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
@@ -28,7 +28,7 @@
  * this work is sponsored by S.u.S.E. GmbH, Fuerth, Elsa GmbH, Aachen, 
  * Siemens Nixdorf Informationssysteme and Appian Graphics.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c,v 1.98 2000/10/17 09:07:04 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c,v 1.99 2000/11/14 17:32:59 dawes Exp $ */
 
 #include "fb.h"
 #include "cfb8_32.h"
@@ -179,10 +179,12 @@ typedef enum {
     OPTION_OVERLAY,
     OPTION_SHADOW_FB,
     OPTION_FBDEV,
-    OPTION_NOWRITEBITMAP
+    OPTION_NOWRITEBITMAP,
+    OPTION_PM3_USE_GAMMA
 } GLINTOpts;
 
 static OptionInfoRec GLINTOptions[] = {
+    { OPTION_PM3_USE_GAMMA,	"UseGamma",	OPTV_BOOLEAN,	{0}, FALSE },
     { OPTION_SW_CURSOR,		"SWcursor",	OPTV_BOOLEAN,	{0}, FALSE },
     { OPTION_HW_CURSOR,		"HWcursor",	OPTV_BOOLEAN,	{0}, FALSE },
     { OPTION_PCI_RETRY,		"PciRetry",	OPTV_BOOLEAN,	{0}, FALSE },
@@ -1205,6 +1207,57 @@ GLINTPreInit(ScrnInfoPtr pScrn, int flags)
 
     xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset);
 
+    /* SVEN : Claim a Gamma chip if available. */
+    if (pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_PERMEDIA3) {
+	int eIndex = -1;
+	from = X_DEFAULT;
+	pGlint->PM3_UseGamma = FALSE;
+	if (xf86ReturnOptValBool(GLINTOptions, OPTION_PM3_USE_GAMMA, FALSE)) {
+	    from = X_CONFIG;
+	    pGlint->PM3_UseGamma = TRUE;
+	} 
+	xf86DrvMsg(pScrn->scrnIndex, from, "%s to use Gamma with Permedia 3.\n",
+		(pGlint->PM3_UseGamma ? "Trying" : "Not trying"));
+	if (pGlint->PM3_UseGamma) {
+	    pciVideoPtr *checkusedPci;
+	    checkusedPci = xf86GetPciVideoInfo();
+	    while (*checkusedPci != NULL) {
+		/* Is there a free gamma on the same device ? */
+		if (((*checkusedPci)->chipType == PCI_CHIP_GAMMA) &&
+		  (((*checkusedPci)->bus == pGlint->PciInfo->bus)) &&
+		  (((*checkusedPci)->device == pGlint->PciInfo->device)))
+		    if ((eIndex = xf86ClaimPciSlot((*checkusedPci)->bus, 
+			(*checkusedPci)->device, 
+			(*checkusedPci)->func,
+			pScrn->drv, -1,
+			NULL, FALSE)) != -1) break;
+	    }
+	    checkusedPci++;
+	}
+	if (eIndex == -1) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		"No free Gamma chip was found.\n");
+	    pGlint->PM3_UseGamma = FALSE;
+	} else {
+	    unsigned int r;
+	    /* Add the Gamma to the screen info structure. */
+	    xf86AddEntityToScreen(pScrn,eIndex);
+            pGlint->PM3_GammaPciInfo =
+		xf86GetPciInfoForEntity(eIndex);
+	    pGlint->PM3_GammaPciTag = pciTag(
+		pGlint->PM3_GammaPciInfo->bus,
+		pGlint->PM3_GammaPciInfo->device,
+		pGlint->PM3_GammaPciInfo->func);
+	    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		"Gamma Claimed at BusID PCI:%d:%d:%d.\n",
+		pGlint->PM3_GammaPciInfo->bus,
+		pGlint->PM3_GammaPciInfo->device,
+		pGlint->PM3_GammaPciInfo->func);
+	    /* Let's dump the Gamma registers, at least some of them ... */
+	    pGlint->PM3_GammaIOAddress =
+		pGlint->PM3_GammaPciInfo->memBase[0] & 0xFFFFC000;
+	}
+    }
     if ((pGlint->Chipset == PCI_VENDOR_TI_CHIP_PERMEDIA2) ||
 	(pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_PERMEDIA3) ||
 	(pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_PERMEDIA2V) ||
@@ -1261,6 +1314,11 @@ GLINTPreInit(ScrnInfoPtr pScrn, int flags)
 	 */
 	pGlint->IOAddress = pGlint->pEnt->device->IOBase;
 	from = X_CONFIG;
+#if 0 /* This freezes the box, why ? */
+    } else if ((pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_PERMEDIA3) &&
+	pGlint->PM3_UseGamma) {
+	pGlint->IOAddress = pGlint->PM3_GammaPciInfo->memBase[0] & 0xFFFFC000;
+#endif
     } else {
 	pGlint->IOAddress = pGlint->PciInfo->memBase[0] & 0xFFFFC000;
     }
@@ -2036,6 +2094,7 @@ GLINTUnmapMem(ScrnInfoPtr pScrn)
     	xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pGlint->FbBase, pGlint->FbMapSize);
     pGlint->FbBase = NULL;
 
+    TRACE_EXIT("GLINTUnmapMem");
     return TRUE;
 }
 
@@ -2308,7 +2367,6 @@ GLINTScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
 	/* Timing problem with PM3 & PM2V chips dont like being blasted */
 	/* This solves the dual head problem but trahses the console font. */
-
 	if (pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_PERMEDIA3) {
 	    /* Graphics Index VGA register don't work in mmio mode
 	     * for the Permedia3 chip, it thrashes the console font. 
@@ -2743,9 +2801,6 @@ GLINTEnterVT(int scrnIndex, int flags)
 	Permedia2VideoEnterVT(pScrn);
     }
 
-    if (pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_PERMEDIA3)
-	pGlint->PM3_VideoControl = GLINT_READ_REG(PMVideoControl);
-
     if (!pGlint->NoAccel) {
     	switch (pGlint->Chipset) {
     	case PCI_VENDOR_TI_CHIP_PERMEDIA2:
@@ -2797,12 +2852,6 @@ GLINTLeaveVT(int scrnIndex, int flags)
     GLINTRestore(pScrn);
     if (pGlint->VGAcore)
     	vgaHWLock(VGAHWPTR(pScrn));
-    
-    if (pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_PERMEDIA3)
-	GLINT_SLOW_WRITE_REG(0, PMVideoControl);
-	/* Don't know why the follwong is wrong, should be ok ?
-	GLINT_SLOW_WRITE_REG(pGlint->PM3_VideoControl, PMVideoControl);
-	*/
 
     if (xf86IsPc98())
        outb(0xfac, 0x00);
@@ -2839,9 +2888,9 @@ GLINTCloseScreen(int scrnIndex, ScreenPtr pScreen)
 
     if (pScrn->vtSema) {
 	if(pGlint->CursorInfoRec)
-    		pGlint->CursorInfoRec->HideCursor(pScrn);
+    	    pGlint->CursorInfoRec->HideCursor(pScrn);
 	if (pGlint->FBDev)
-		fbdevHWRestore(pScrn);
+	    fbdevHWRestore(pScrn);
 	else {	
             GLINTRestore(pScrn);
 	    if (pGlint->VGAcore)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c
index db94756b2..9d765803a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c
@@ -26,7 +26,7 @@
  * 
  * Permedia 3 accelerated options.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c,v 1.5 2000/10/26 17:57:56 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c,v 1.6 2000/11/14 17:32:59 dawes Exp $ */
 
 #include "Xarch.h"
 #include "xf86.h"
@@ -47,6 +47,7 @@
 #include "xaalocal.h"		/* For replacements */
 
 #define DEBUG 0
+#define USE_DIRECT_FIFO_WRITES 1
 
 #if DEBUG
 # define TRACE_ENTER(str)       ErrorF("pm3_accel: " str " %d\n",pScrn->scrnIndex)
@@ -89,22 +90,21 @@ static void Permedia3SetupForCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
 				int fg, int bg, int rop,unsigned int planemask);
 static void Permedia3SubsequentCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, 
 				int x, int y, int w, int h, int skipleft);
+/* Direct Fifo Bitmap Writes */
+static void Permedia3WriteBitmap(ScrnInfoPtr pScrn, int x, int y, int w, int h, 
+				unsigned char *src, int srcwidth, int skipleft, 
+				int fg, int bg, int rop,unsigned int planemask);
 /* Images Writes */
 static void Permedia3SetupForImageWrite(ScrnInfoPtr pScrn, int rop,
 				unsigned int planemask, int trans_color,
 				int bpp, int depth);
 static void Permedia3SubsequentImageWriteRect(ScrnInfoPtr pScrn, 
 				int x, int y, int w, int h, int skipleft);
-
-#define MAX_FIFO_ENTRIES 256
-
-/* Mirror stipple pattern horizontally */
-#if X_BYTE_ORDER == X_BIG_ENDIAN
-# define STIPPLE_SWAP	1<<18
-#else
-# define STIPPLE_SWAP	0
-#endif
-
+/* Direct Fifo Pixmap Writes */
+static void Permedia3WritePixmap(ScrnInfoPtr pScrn, int x, int y, int w, int h,
+				unsigned char *src, int srcwidth, int rop,
+				unsigned int planemask, int transparency_color,
+				int bpp, int depth);
 
 void
 Permedia3InitializeEngine(ScrnInfoPtr pScrn)
@@ -240,28 +240,26 @@ Permedia3InitializeEngine(ScrnInfoPtr pScrn)
 	PM3FBSourceReadMode_ReadEnable,
 	PM3FBSourceReadMode);
     TRACE("Permedia3InitializeEngine : SourceRead");
-#if X_BYTE_ORDER == X_BIG_ENDIAN
-    pGlint->RasterizerSwap = 1;
-#else
-    pGlint->RasterizerSwap = 0;
-#endif
     switch (pScrn->bitsPerPixel) {
 	case 8:
 	    GLINT_SLOW_WRITE_REG(0x2, PixelSize);
 #if X_BYTE_ORDER == X_BIG_ENDIAN
-	    pGlint->RasterizerSwap |= 3<<15;	/* Swap host data */
+	    pGlint->RasterizerSwap = 3<<15;	/* Swap host data */
 #endif
 	    break;
 	case 16:
 	    GLINT_SLOW_WRITE_REG(0x1, PixelSize);
 #if X_BYTE_ORDER == X_BIG_ENDIAN
-	    pGlint->RasterizerSwap |= 2<<15;	/* Swap host data */
+	    pGlint->RasterizerSwap = 2<<15;	/* Swap host data */
 #endif
 	    break;
 	case 32:
 	    GLINT_SLOW_WRITE_REG(0x0, PixelSize);
 	    break;
     }
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    GLINT_SLOW_WRITE_REG(1 | pGlint->RasterizerSwap, RasterizerMode);
+#endif
     TRACE("Permedia3InitializeEngine : PixelSize");
     Permedia3Sync(pScrn);
 
@@ -409,9 +407,17 @@ Permedia3AccelInit(ScreenPtr pScreen)
     infoPtr->SubsequentMono8x8PatternFillRect = 
 	Permedia3SubsequentMono8x8PatternFillRect;
 
+#if USE_DIRECT_FIFO_WRITES
+    /* Direct Fifo Bitmap Writes */
+    infoPtr->WriteBitmapFlags = 0;
+    infoPtr->WriteBitmap = Permedia3WriteBitmap;
+#endif
+
     /* Color Expand Fills */
     infoPtr->CPUToScreenColorExpandFillFlags =
+	/*
 	SYNC_AFTER_COLOR_EXPAND |
+	*/
 	LEFT_EDGE_CLIPPING |
 	BIT_ORDER_IN_BYTE_LSBFIRST |
 	CPU_TRANSFER_BASE_FIXED |
@@ -423,21 +429,31 @@ Permedia3AccelInit(ScreenPtr pScreen)
     infoPtr->SubsequentCPUToScreenColorExpandFill = 
 	    Permedia3SubsequentCPUToScreenColorExpandFill;
 
+#if USE_DIRECT_FIFO_WRITES
+    /* Direct Fifo Images Writes */
+    infoPtr->WritePixmapFlags = 0;
+    infoPtr->WritePixmap = Permedia3WritePixmap;
+#else
     /* Images Writes */
     infoPtr->ImageWriteFlags = 
 	NO_GXCOPY |
+	/*
 	SYNC_AFTER_IMAGE_WRITE |
+	*/
 	LEFT_EDGE_CLIPPING |
+	LEFT_EDGE_CLIPPING_NEGATIVE_X |
 	BIT_ORDER_IN_BYTE_LSBFIRST |
 	CPU_TRANSFER_BASE_FIXED |
 	CPU_TRANSFER_PAD_DWORD;
     infoPtr->ImageWriteBase = pGlint->IOBase + PM3FBSourceData;
-    infoPtr->ImageWriteRange = 8;
+    infoPtr->ImageWriteRange = 4;
     infoPtr->SetupForImageWrite =
 	    Permedia3SetupForImageWrite;
     infoPtr->SubsequentImageWriteRect =
 	    Permedia3SubsequentImageWriteRect;
-    
+#endif
+
+    /* Available Framebuffer Area for XAA. */
     AvailFBArea.x1 = 0;
     AvailFBArea.y1 = 0;
     AvailFBArea.x2 = pScrn->displayWidth;
@@ -634,6 +650,10 @@ Permedia3SetupForMono8x8PatternFill(ScrnInfoPtr pScrn,
 	pGlint->PM3_Config2D |= PM3Config2D_UserScissorEnable;
     */
     pGlint->PM3_AreaStippleMode = 1;
+/* Mirror stipple pattern horizontally */
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    pGlint->PM3_AreaStippleMode |= (1<<18);
+#endif
     pGlint->PM3_AreaStippleMode |= (2<<1);
     pGlint->PM3_AreaStippleMode |= (2<<4);
     if (bg != -1) {
@@ -729,6 +749,73 @@ static void Permedia3SubsequentCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
     TRACE_EXIT("Permedia3SubsequentCPUToScreenColorExpandFill");
 }
 
+/* Direct Fifo BItmap Writes */
+
+/* Be carefull, if we use the gamma, the fifo is only 32 entries deep. */
+#define BitmapWriteRange 120
+#define BitmapWriteBase_Fixed ((CARD32 *)(pGlint->IOBase + BitMaskPattern))
+#define BitmapWriteBase ((CARD32 *)(pGlint->IOBase + OutputFIFO + 4))
+
+static void
+Permedia3WriteBitmap(ScrnInfoPtr pScrn,
+    int x, int y, int w, int h,
+    unsigned char *src,
+    int srcwidth, int skipleft,
+    int fg, int bg, int rop,
+    unsigned int planemask
+)
+{
+    int dwords;
+    GLINTPtr pGlint = GLINTPTR(pScrn);
+    TRACE_ENTER("Permedia3WriteBitmap");
+
+    w += skipleft;
+    x -= skipleft;
+    dwords = (w + 31) >>5;
+
+    /* width of the stuff to copy in 32 bit words */
+    Permedia3SetupForCPUToScreenColorExpandFill(pScrn, fg, bg, rop, planemask);
+    Permedia3SubsequentCPUToScreenColorExpandFill(pScrn, x, y, w, h, skipleft);
+
+    if (dwords > BitmapWriteRange) {
+	while(h--) {
+	    XAAMoveDWORDS_FixedBase(BitmapWriteBase_Fixed,
+		(CARD32*)src, dwords);
+	    src += srcwidth;
+	}
+    } else {
+	/* the src is exatcly as wide as the target rectangle. We copy all
+	 * of it, so no need to separate stuff by scanline */
+	if(srcwidth == (dwords << 5)) {
+	    /* decrement contains the number of lines that can be
+	     * put in the fifo */
+ 	    int decrement = BitmapWriteRange/dwords;
+
+	    while(h > decrement) {
+		GLINT_WAIT(dwords * decrement);
+       		GLINT_WRITE_REG((((dwords * decrement)-1) << 16) | 0xd,
+		    OutputFIFO);
+		XAAMoveDWORDS(BitmapWriteBase, (CARD32*)src, dwords * decrement);
+		src += (srcwidth * decrement);
+		h -= decrement;
+	    }
+	    if(h) {
+		GLINT_WAIT(dwords * h);
+       		GLINT_WRITE_REG((((dwords * h)-1) << 16) | 0xd, OutputFIFO);
+		XAAMoveDWORDS(BitmapWriteBase, (CARD32*)src, dwords * h);
+	    }
+	} else {
+	    while(h--) {
+		GLINT_WAIT(dwords);
+       		GLINT_WRITE_REG(((dwords-1) << 16) | 0xd, OutputFIFO);
+		XAAMoveDWORDS(BitmapWriteBase, (CARD32*)src, dwords);
+		src += srcwidth;
+	    }
+	}
+    }
+    TRACE_EXIT("Permedia3WriteBitmap");
+}
+
 /* Images Writes */
 static void Permedia3SetupForImageWrite(ScrnInfoPtr pScrn, int rop,
 	unsigned int planemask, int trans_color, int bpp, int depth)
@@ -770,3 +857,83 @@ static void Permedia3SubsequentImageWriteRect(ScrnInfoPtr pScrn,
     TRACE_EXIT("Permedia3SubsequentImageWrite");
 }
 
+/* Direct Fifo Images Writes */
+
+/* Be carefull, if we use the gamma, the fifo is only 32 entries deep. */
+#define ImageWriteRange 120
+#define ImageWriteBase_Fixed ((CARD32 *)(pGlint->IOBase + PM3FBSourceData))
+#define ImageWriteBase ((CARD32 *)(pGlint->IOBase + OutputFIFO + 4))
+static void
+Permedia3WritePixmap(
+    ScrnInfoPtr pScrn,
+    int x, int y, int w, int h,
+    unsigned char *src,
+    int srcwidth,
+    int rop,
+    unsigned int planemask,
+    int trans,
+    int bpp, int depth
+)
+{
+    int dwords;
+    int skipleft = (long)src & 0x03L;
+    int Bpp = bpp >> 3;
+    GLINTPtr pGlint = GLINTPTR(pScrn);
+    TRACE_ENTER("Permedia3WritePixmap");
+
+    if (skipleft) {
+	/* Skipleft is either
+	 *   - 0, 1, 2 or 3 in 8 bpp
+	 *   - 0 or 1 in 16 bpp
+	 *   - 0 in 32 bpp
+	 */
+	skipleft /= Bpp;
+
+	x -= skipleft;	     
+	w += skipleft;
+	
+	src = (unsigned char*)((long)src & ~0x03L);     
+    }
+    Permedia3SetupForImageWrite(pScrn, rop, planemask, trans, bpp, depth);
+    Permedia3SubsequentImageWriteRect(pScrn, x, y, w, h, skipleft);
+
+    /* width of the stuff to copy in 32 bit words */
+    dwords = ((w * Bpp) + 3) >> 2;
+
+    if (dwords > ImageWriteRange) {
+	while(h--) {
+	    XAAMoveDWORDS_FixedBase(ImageWriteBase_Fixed, (CARD32*)src, dwords);
+	    src += srcwidth;
+	}
+    } else {
+	/* the src is exatcly as wide as the target rectangle. We copy all
+	 * of it, so no need to separate stuff by scanline */
+	if(srcwidth == (dwords << 2)) {
+	    /* decrement contains the number of lines that can be
+	     * put in the fifo */
+ 	    int decrement = ImageWriteRange/dwords;
+
+	    while(h > decrement) {
+		GLINT_WAIT(dwords * decrement);
+       		GLINT_WRITE_REG((((dwords * decrement)-1) << 16) | 0x155,
+		    OutputFIFO);
+		XAAMoveDWORDS(ImageWriteBase, (CARD32*)src, dwords * decrement);
+		src += (srcwidth * decrement);
+		h -= decrement;
+	    }
+	    if(h) {
+		GLINT_WAIT(dwords * h);
+       		GLINT_WRITE_REG((((dwords * h)-1) << 16) | 0x155, OutputFIFO);
+		XAAMoveDWORDS(ImageWriteBase, (CARD32*)src, dwords * h);
+	    }
+	} else {
+	    while(h--) {
+		GLINT_WAIT(dwords);
+       		GLINT_WRITE_REG(((dwords-1) << 16) | 0x155, OutputFIFO);
+		XAAMoveDWORDS(ImageWriteBase, (CARD32*)src, dwords);
+		src += srcwidth;
+	    }
+	}
+    }
+    TRACE_EXIT("Permedia3WritePixmap");
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c
index 7997567c5..7f0d32958 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c
@@ -25,7 +25,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c,v 1.34 2000/09/26 15:57:11 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c,v 1.35 2000/11/13 23:06:08 dawes Exp $ */
 
 /*
  * Authors:
@@ -1951,7 +1951,7 @@ I810CloseScreen(int scrnIndex, ScreenPtr pScreen)
 static void
 I810FreeScreen(int scrnIndex, int flags) {
    I810FreeRec(xf86Screens[scrnIndex]);
-   if (vgaHWFreeHWRec)
+   if (xf86LoaderCheckSymbol("vgaHWFreeHWRec"))
        vgaHWFreeHWRec(xf86Screens[scrnIndex]);
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h
index ad7e80061..7bbca675a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h,v 1.65 2000/10/24 22:45:06 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h,v 1.67 2000/11/08 05:03:04 dawes Exp $ */
 /*
  * MGA Millennium (MGA2064W) functions
  *
@@ -82,7 +82,7 @@ typedef struct {
 typedef struct {
    unsigned char brightness;
    unsigned char contrast;
-   FBAreaPtr	area;
+   FBLinearPtr	linear;
    RegionRec	clip;
    CARD32	colorKey;
    CARD32	videoStatus;
@@ -270,6 +270,7 @@ typedef struct {
     int			expandHeight;
     int			expandY;
 #ifdef XF86DRI
+    int 		agp_mode;
     Bool		have_quiescense;
     Bool 		directRenderingEnabled;
     DRIInfoPtr 		pDRIInfo;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
index b8d46ade3..1674a177a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c,v 1.10 2000/11/02 19:10:51 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c,v 1.12 2000/11/13 23:31:39 dawes Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -179,6 +179,7 @@ MGAInitVisualConfigs(ScreenPtr pScreen)
                pConfigs[i].redSize = 5;
                pConfigs[i].greenSize = 6;
                pConfigs[i].blueSize = 5;
+               pConfigs[i].alphaSize = 0;
                pConfigs[i].redMask = 0x0000F800;
                pConfigs[i].greenMask = 0x000007E0;
                pConfigs[i].blueMask = 0x0000001F;
@@ -260,9 +261,10 @@ MGAInitVisualConfigs(ScreenPtr pScreen)
                pConfigs[i].vid = -1;
                pConfigs[i].class = -1;
                pConfigs[i].rgba = TRUE;
-               pConfigs[i].redSize = 5;
-               pConfigs[i].greenSize = 6;
-               pConfigs[i].blueSize = 5;
+               pConfigs[i].redSize = 8;
+               pConfigs[i].greenSize = 8;
+               pConfigs[i].blueSize = 8;
+               pConfigs[i].alphaSize = 0;
                pConfigs[i].redMask   = 0x00FF0000;
                pConfigs[i].greenMask = 0x0000FF00;
                pConfigs[i].blueMask  = 0x000000FF;
@@ -335,6 +337,39 @@ static unsigned int mylog2(unsigned int n)
    return log2;
 }
 
+static unsigned long MGAParseAgpMode(ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+   MGAPtr pMga = MGAPTR(pScrn);
+   unsigned long mode_mask;
+
+   switch(pMga->agp_mode) {
+   case 4:
+      mode_mask = ~0x00000003;
+      break;
+   case 2:
+      if (pMga->Chipset == PCI_CHIP_MGAG200) {
+	 xf86DrvMsg(pScreen->myNum, X_INFO, 
+		    "[drm] Enabling AGP 2x pll encoding\n");
+	 OUTREG(MGAREG_AGP_PLL, AGP_PLL_agp2xpllen_enable);
+      }
+      mode_mask = ~0x00000005;
+      break;
+   default:
+   /* Default to 1X agp mode */
+   case 1:
+      if (pMga->Chipset == PCI_CHIP_MGAG200) {
+	 xf86DrvMsg(pScreen->myNum, X_INFO, 
+		    "[drm] Disabling AGP 2x pll encoding\n");
+	 OUTREG(MGAREG_AGP_PLL, AGP_PLL_agp2xpllen_disable);
+      }
+      pMga->agp_mode = 1;
+      mode_mask = ~0x00000006;
+      break;
+   }
+
+   return mode_mask;
+}
 
 Bool MGADRIScreenInit(ScreenPtr pScreen)
 {
@@ -347,6 +382,7 @@ Bool MGADRIScreenInit(ScreenPtr pScreen)
    int prim_size;
    int init_offset;
    int i;
+   unsigned long mode_mask;
 
    switch(pMGA->Chipset) {
    case PCI_CHIP_MGAG400:
@@ -543,16 +579,17 @@ Bool MGADRIScreenInit(ScreenPtr pScreen)
       DRICloseScreen(pScreen);
       return FALSE;
    }
-   
+
+   mode_mask = MGAParseAgpMode(pScreen);
+
    pMGADRIServer->agpMode = drmAgpGetMode(pMGA->drmSubFD);
-   /* Default to 1X agp mode */
-   pMGADRIServer->agpMode &= ~0x00000002;
+   pMGADRIServer->agpMode &= mode_mask;
    if (drmAgpEnable(pMGA->drmSubFD, pMGADRIServer->agpMode) < 0) {
       xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpEnable failed\n");
       DRICloseScreen(pScreen);
       return FALSE;
    }
-   ErrorF("[drm] drmAgpEnabled succeeded\n");
+   ErrorF("[drm] drmAgpEnabled succeeded for AGP mode %dx\n", pMGA->agp_mode);
 
    prim_size = 65536;
    init_offset = ((prim_size + pMGADRIServer->warp_ucode_size + 
@@ -741,22 +778,16 @@ MGADRICloseScreen(ScreenPtr pScreen)
   MGAPtr pMGA = MGAPTR(pScrn);
   MGADRIServerPrivatePtr pMGADRIServer = pMGA->DRIServerInfo;
 
-  MgaCleanupDma(pScrn);
-
+/* The DRI will automagically clean these up when driFD is closed */
   if(pMGADRIServer->agp_map) {  
-     ErrorF("Unmapped agp region\n");
      drmUnmap(pMGADRIServer->agp_map, pMGADRIServer->agpSizep);
      pMGADRIServer->agp_map = 0;
   }
   if(pMGADRIServer->agpHandle) {
-     ErrorF("Freeing agp memory\n");
-     drmAgpFree(pMGA->drmSubFD, pMGADRIServer->agpHandle);
      pMGADRIServer->agpHandle = 0;
      pMGADRIServer->agpSizep = 0;
   }
   if(pMGADRIServer->agpAcquired == TRUE) {
-     ErrorF("releasing agp module\n");
-     drmAgpRelease(pMGA->drmSubFD);
      pMGADRIServer->agpAcquired = FALSE;
   }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c
index 685721aaf..7d4bbab5d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c
@@ -43,7 +43,7 @@
  *		Fixed 32bpp hires 8MB horizontal line glitch at middle right
  */
  
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c,v 1.178 2000/11/03 18:46:10 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c,v 1.180 2000/11/13 23:07:31 dawes Exp $ */
 
 /*
  * This is a first cut at a non-accelerated version to work with the
@@ -214,11 +214,12 @@ typedef enum {
     OPTION_XAALINES,
     OPTION_CRTC2HALF,
     OPTION_INT10,
+    OPTION_AGP_MODE_2X,
+    OPTION_AGP_MODE_4X,
     OPTION_DIGITAL,
     OPTION_TV,
     OPTION_TVSTANDARD,
     OPTION_CABLETYPE
-
 } MGAOpts;
 
 static OptionInfoRec MGAOptions[] = {
@@ -241,6 +242,8 @@ static OptionInfoRec MGAOptions[] = {
     { OPTION_XAALINES,		"XAALines",	OPTV_INTEGER,	{0}, FALSE },
     { OPTION_CRTC2HALF,		"Crtc2Half",	OPTV_BOOLEAN,	{0}, FALSE },
     { OPTION_INT10,		"Int10",	OPTV_BOOLEAN,	{0}, FALSE },
+    { OPTION_AGP_MODE_2X,	"AGPMode2x",	OPTV_BOOLEAN,	{0}, FALSE },
+    { OPTION_AGP_MODE_4X,	"AGPMode4x",	OPTV_BOOLEAN,	{0}, FALSE },
     { OPTION_DIGITAL,		"DigitalScreen",OPTV_BOOLEAN,	{0}, FALSE },
     { OPTION_TV,		"TV",		OPTV_BOOLEAN,	{0}, FALSE },
     { OPTION_TVSTANDARD,	"TVStandard",	OPTV_ANYSTR,	{0}, FALSE },
@@ -1434,6 +1437,29 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags)
 		   pMga->numXAALines);
     }
 
+#ifdef XF86DRI
+    {
+        Bool temp;
+
+        from = X_DEFAULT;
+
+        pMga->agp_mode = 1;
+        if (xf86GetOptValBool(MGAOptions, OPTION_AGP_MODE_2X,
+			      &temp)) {
+	    pMga->agp_mode = 2;
+	    from = X_CONFIG;
+	}
+
+        if (xf86GetOptValBool(MGAOptions, OPTION_AGP_MODE_4X,
+			      &temp)) {
+	    pMga->agp_mode = 4;
+	    from = X_CONFIG;
+	}
+        xf86DrvMsg(pScrn->scrnIndex, from, "Using AGP Mode %dx\n",
+		   pMga->agp_mode);
+    }
+#endif
+
     from = X_DEFAULT;
 
     /*
@@ -2191,7 +2217,6 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags)
 	    return FALSE;
 	}
 	reqSym = "fbScreenInit";
-	xf86LoaderReqSymbols("fbScreenInit", NULL);
 #ifdef RENDER
 	xf86LoaderReqSymbols("fbPictureInit", NULL);
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h
index 247acbdff..ba0d8fabc 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h
@@ -2,7 +2,7 @@
 
 
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h,v 1.13 2000/11/01 21:55:09 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h,v 1.14 2000/11/08 05:03:04 dawes Exp $ */
 
 
 
@@ -431,6 +431,9 @@
 #define MGAREG_ALPHACTRL	0x2c7c
 #define MGAREG_DWGSYNC		0x2c4c
 
+#define MGAREG_AGP_PLL			0x1e4c
+#define AGP_PLL_agp2xpllen_enable	0x1
+#define AGP_PLL_agp2xpllen_disable	0x0
 
 #endif
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_video.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_video.c
index c6b5a59c4..3899ef258 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_video.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_video.c,v 1.19 2000/11/02 19:10:53 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_video.c,v 1.20 2000/11/08 00:51:10 mvojkovi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -451,9 +451,9 @@ MGAStopVideo(ScrnInfoPtr pScrn, pointer data, Bool exit)
   if(exit) {
      if(pPriv->videoStatus & CLIENT_VIDEO_ON)
 	OUTREG(MGAREG_BESCTL, 0);
-     if(pPriv->area) {
-	xf86FreeOffscreenArea(pPriv->area);
-	pPriv->area = NULL;
+     if(pPriv->linear) {
+	xf86FreeOffscreenLinear(pPriv->linear);
+	pPriv->linear = NULL;
      }
      pPriv->videoStatus = 0;
   } else {
@@ -613,45 +613,45 @@ MGACopyMungedData(
 }
 
 
-static FBAreaPtr
+static FBLinearPtr
 MGAAllocateMemory(
    ScrnInfoPtr pScrn,
-   FBAreaPtr area,
-   int numlines
+   FBLinearPtr linear,
+   int size
 ){
    ScreenPtr pScreen;
-   FBAreaPtr new_area;
+   FBLinearPtr new_linear;
 
-   if(area) {
-	if((area->box.y2 - area->box.y1) >= numlines) 
-	   return area;
+   if(linear) {
+	if(linear->size >= size) 
+	   return linear;
         
-        if(xf86ResizeOffscreenArea(area, pScrn->displayWidth, numlines))
-	   return area;
+        if(xf86ResizeOffscreenLinear(linear, size))
+	   return linear;
 
-	xf86FreeOffscreenArea(area);
+	xf86FreeOffscreenLinear(linear);
    }
 
    pScreen = screenInfo.screens[pScrn->scrnIndex];
 
-   new_area = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth, 
-				numlines, 0, NULL, NULL, NULL);
+   new_linear = xf86AllocateOffscreenLinear(pScreen, size, 16, 
+   						NULL, NULL, NULL);
 
-   if(!new_area) {
-	int max_w, max_h;
+   if(!new_linear) {
+	int max_size;
 
-	xf86QueryLargestOffscreenArea(pScreen, &max_w, &max_h, 0,
-			FAVOR_WIDTH_THEN_AREA, PRIORITY_EXTREME);
+	xf86QueryLargestOffscreenLinear(pScreen, &max_size, 16, 
+						PRIORITY_EXTREME);
 	
-	if((max_w < pScrn->displayWidth) || (max_h < numlines))
+	if(max_size < size)
 	   return NULL;
 
 	xf86PurgeUnlockedOffscreenAreas(pScreen);
-	new_area = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth, 
-				numlines, 0, NULL, NULL, NULL);
+	new_linear = xf86AllocateOffscreenLinear(pScreen, size, 16, 
+						NULL, NULL, NULL);
    }
 
-   return new_area;
+   return new_linear;
 }
 
 static void
@@ -820,9 +820,9 @@ MGAPutImage(
    MGAPortPrivPtr pPriv = pMga->portPrivate;
    INT32 x1, x2, y1, y2;
    unsigned char *dst_start;
-   int pitch, new_h, offset, offset2, offset3;
+   int pitch, new_size, offset, offset2, offset3;
    int srcPitch, srcPitch2, dstPitch;
-   int top, left, npixels, nlines;
+   int top, left, npixels, nlines, bpp;
    BoxRec dstBox;
    CARD32 tmp;
 
@@ -847,11 +847,12 @@ MGAPutImage(
 	dstBox.y2 -= pScrn->frameY0;
    }
 
-   pitch = pScrn->bitsPerPixel * pScrn->displayWidth >> 3;
+   bpp = pScrn->bitsPerPixel >> 3;
+   pitch = bpp * pScrn->displayWidth;
 
    dstPitch = ((width << 1) + 15) & ~15;
-   new_h = ((dstPitch * height) + pitch - 1) / pitch;
-
+   new_size = ((dstPitch * height) + bpp - 1) / bpp;
+   
    switch(id) {
    case FOURCC_YV12:
    case FOURCC_I420:
@@ -867,26 +868,25 @@ MGAPutImage(
 	break;
    }  
 
-   if(!(pPriv->area = MGAAllocateMemory(pScrn, pPriv->area, new_h)))
+   if(!(pPriv->linear = MGAAllocateMemory(pScrn, pPriv->linear, new_size)))
 	return BadAlloc;
 
     /* copy data */
-    top = y1 >> 16;
-    left = (x1 >> 16) & ~1;
-    npixels = ((((x2 + 0xffff) >> 16) + 1) & ~1) - left;
-    left <<= 1;
+   top = y1 >> 16;
+   left = (x1 >> 16) & ~1;
+   npixels = ((((x2 + 0xffff) >> 16) + 1) & ~1) - left;
+   left <<= 1;
 
-    offset = pPriv->area->box.y1 * pitch;
-    dst_start = pMga->FbStart + offset + left + (top * dstPitch);
+   offset = pPriv->linear->offset * bpp;
+   dst_start = pMga->FbStart + offset + left + (top * dstPitch);
 
-    if(pMga->TexturedVideo && pMga->AccelInfoRec->NeedToSync &&
+   if(pMga->TexturedVideo && pMga->AccelInfoRec->NeedToSync &&
 	((long)data != pPriv->lastPort)) 
-    {
+   {
 	MGAStormSync(pScrn);
-	pMga->AccelInfoRec->NeedToSync = FALSE;
-    }
+   }
 
-    switch(id) {
+   switch(id) {
     case FOURCC_YV12:
     case FOURCC_I420:
 	top &= ~1;
@@ -1005,9 +1005,9 @@ MGAVideoTimerCallback(ScrnInfoPtr pScrn, Time time)
 	    }
 	} else {  /* FREE_TIMER */
 	    if(pPriv->freeTime < time) {
-		if(pPriv->area) {
-		   xf86FreeOffscreenArea(pPriv->area);
-		   pPriv->area = NULL;
+		if(pPriv->linear) {
+		   xf86FreeOffscreenLinear(pPriv->linear);
+		   pPriv->linear = NULL;
 		}
 		pPriv->videoStatus = 0;
 	        pMga->VideoTimerCallback = NULL;
@@ -1021,7 +1021,7 @@ MGAVideoTimerCallback(ScrnInfoPtr pScrn, Time time)
 /****************** Offscreen stuff ***************/
 
 typedef struct {
-  FBAreaPtr area;
+  FBLinearPtr linear;
   Bool isOn;
 } OffscreenPrivRec, * OffscreenPrivPtr;
 
@@ -1033,8 +1033,8 @@ MGAAllocateSurface(
     unsigned short h,
     XF86SurfacePtr surface
 ){
-    FBAreaPtr area;
-    int pitch, fbpitch, numlines;
+    FBLinearPtr linear;
+    int pitch, fbpitch, size, bpp;
     OffscreenPrivPtr pPriv;
 
     if((w > 1024) || (h > 1024))
@@ -1042,38 +1042,39 @@ MGAAllocateSurface(
 
     w = (w + 1) & ~1;
     pitch = ((w << 1) + 15) & ~15;
-    fbpitch = pScrn->bitsPerPixel * pScrn->displayWidth >> 3;
-    numlines = ((pitch * h) + fbpitch - 1) / fbpitch;
+    bpp = pScrn->bitsPerPixel >> 3;
+    fbpitch = bpp * pScrn->displayWidth;
+    size = ((pitch * h) + bpp - 1) / bpp;
 
-    if(!(area = MGAAllocateMemory(pScrn, NULL, numlines)))
+    if(!(linear = MGAAllocateMemory(pScrn, NULL, size)))
 	return BadAlloc;
 
     surface->width = w;
     surface->height = h;
 
     if(!(surface->pitches = xalloc(sizeof(int)))) {
-	xf86FreeOffscreenArea(area);
+	xf86FreeOffscreenLinear(linear);
 	return BadAlloc;
     }
     if(!(surface->offsets = xalloc(sizeof(int)))) {
 	xfree(surface->pitches);
-	xf86FreeOffscreenArea(area);
+	xf86FreeOffscreenLinear(linear);
 	return BadAlloc;
     }
     if(!(pPriv = xalloc(sizeof(OffscreenPrivRec)))) {
 	xfree(surface->pitches);
 	xfree(surface->offsets);
-	xf86FreeOffscreenArea(area);
+	xf86FreeOffscreenLinear(linear);
 	return BadAlloc;
     }
 
-    pPriv->area = area;
+    pPriv->linear = linear;
     pPriv->isOn = FALSE;
 
     surface->pScrn = pScrn;
     surface->id = id;   
     surface->pitches[0] = pitch;
-    surface->offsets[0] = area->box.y1 * fbpitch;
+    surface->offsets[0] = linear->offset * bpp;
     surface->devPrivate.ptr = (pointer)pPriv;
 
     return Success;
@@ -1103,7 +1104,7 @@ MGAFreeSurface(
 
     if(pPriv->isOn)
 	MGAStopSurface(surface);
-    xf86FreeOffscreenArea(pPriv->area);
+    xf86FreeOffscreenLinear(pPriv->linear);
     xfree(surface->pitches);
     xfree(surface->offsets);
     xfree(surface->devPrivate.ptr);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES
index 74695ba1c..e42f8cac8 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES
@@ -1,7 +1,7 @@
 S3 ViRGE 4.0 devel notes
 
 rev: 
-21 Oct 2000 KJB
+7 Nov 2000 KJB
 
 
 Function		Implemented
@@ -23,6 +23,27 @@ S3VRestore		X
 
 Status
 ------
+11/7/00 KJB
+Ver 1.4.0
+Enable MX fixes, testing with accel BLT_BUG set is worse on GX2, so left
+it out.  BLT_BUG wasn't being enabled on ViRGE & VX because of case usage,
+enabled now.  Re-enable silken mouse for GX2.  Add Render/fbPicture support.
+
+11/5/00 KJB
+Continued work on GX2, much stabler now, but I think there is a lockup case
+left if you enable pci_burst and pci_retry with accel.  I still see screen
+flashes with vertical bars once in a while, and the log reports a GEReset.
+Added fbPicture (render) support, untested.  XV code for GX2 is added,
+but not working yet.
+
+10/29/00 KJB
+Much work on GX2, now SWCursor locks up but HWCursor is stable, go figure.
+Loading Netscape a couple times with the mail window was enough to lock it
+up twice in a row.  Server was locked but not a box (PCI) lock.  Also, 
+vertical barring still occurred a couple times, so HW cursor wasn't causing
+that.  Try blt_bug flag again for lock up case.  And attach to debug server
+and bt...  Sleep now...
+
 10/21/00 KJB
 Ver 1.3.0
 Depth 16 Xv support added.  Testing on ViRGE DX.  1280x1024x24 is noisy, so
@@ -225,4 +246,4 @@ the new config. management stuff may help here.
 
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES,v 1.16 2000/10/23 12:10:15 alanh Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES,v 1.17 2000/11/14 16:54:52 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h
index ddd93555a..1175c2cd4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h,v 1.24 2000/11/02 16:29:12 anderson Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h,v 1.25 2000/11/14 16:54:52 dawes Exp $ */
 
 /*
 Copyright (C) 1994-1999 The XFree86 Project, Inc.  All Rights Reserved.
@@ -139,8 +139,9 @@ typedef struct {
    unsigned char CR40, CR41, CR42, CR43, CR45;
    unsigned char CR51, CR53, CR54, CR55, CR58, CR5D, CR5E;
    unsigned char CR63, CR65, CR66, CR67, CR68, CR69, CR6D; /* Video attrib. */
-   unsigned char CR85, CR86;
-   unsigned char CR90, CR91;
+   unsigned char CR7B, CR7D;
+   unsigned char CR85, CR86, CR87;
+   unsigned char CR90, CR91, CR92, CR93;
    unsigned char ColorStack[8]; /* S3 hw cursor color stack CR4A/CR4B */
    unsigned int  STREAMS[22];   /* Streams regs */
    unsigned int  MMPR0, MMPR1, MMPR2, MMPR3;   /* MIU regs */
@@ -168,7 +169,7 @@ typedef struct {
 /* S3VRec  		 */
 /*************************/
 
-typedef struct {
+typedef struct tagS3VRec {
 	/* accel additions */
 	CARD32		AccelFlags;
 	CARD32		AccelCmd;
@@ -247,9 +248,12 @@ typedef struct {
   /* Limit the number of errors	*/
   /* printed using a counter 	*/
   int			GEResetCnt;
+  /* Accel WaitFifo function */
+  void (*pWaitFifo)(struct tagS3VRec *, int);
+
   /*************************/
   /* ViRGE options -start- */
-  
+  /*************************/  
   /* Enable PCI burst mode for reads? */
   Bool 		pci_burst;
   /* Diasable PCI retries */
@@ -389,6 +393,8 @@ extern void S3VCommonCalcClock(long freq, int min_m, int min_n1, int max_n1,
 extern Bool S3VAccelInit(ScreenPtr pScreen);
 extern Bool S3VAccelInit32(ScreenPtr pScreen);
 void S3VAccelSync(ScrnInfoPtr);
+void S3VWaitFifoGX2(S3VPtr ps3v, int slots );
+void S3VWaitFifoMain(S3VPtr ps3v, int slots );
 
 /* s3v_hwcurs.c */
 extern Bool S3VHWCursorInit(ScreenPtr pScreen);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_accel.c
index 39d718f45..3a04234f0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_accel.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_accel.c,v 1.19 2000/10/23 12:10:15 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_accel.c,v 1.20 2000/11/14 16:54:52 dawes Exp $ */
 
 /*
 Copyright (C) 1994-1999 The XFree86 Project, Inc.  All Rights Reserved.
@@ -69,6 +69,7 @@ static void S3VPolylinesThinSolidWrapper(DrawablePtr, GCPtr, int, int,
 				DDXPointPtr);
 static void S3VPolySegmentThinSolidWrapper(DrawablePtr, GCPtr, int, xSegment*);
 
+
 Bool 
 S3VAccelInit(ScreenPtr pScreen)
 {
@@ -80,15 +81,16 @@ S3VAccelInit(ScreenPtr pScreen)
     ps3v->AccelInfoRec = infoPtr = XAACreateInfoRec();
     if(!infoPtr) return FALSE;
 
-
-    switch(ps3v->Chipset) {
-    case S3_ViRGE:
-    case S3_ViRGE_VX:
+    switch(ps3v->Chipset) 
+      {
+      case S3_ViRGE:
+      case S3_ViRGE_VX:
 	ps3v->AccelFlags = BLT_BUG;
-    default:
+	break;
+      default:
 	ps3v->AccelFlags = 0;
 	break;
-    }
+      }
 
     ps3v->AccelFlags |= MONO_TRANS_BUG; /* which aren't broken ? */
 
@@ -140,7 +142,6 @@ S3VAccelInit(ScreenPtr pScreen)
                 S3VSetupForCPUToScreenColorExpand;
     infoPtr->SubsequentCPUToScreenColorExpandFill =
                 S3VSubsequentCPUToScreenColorExpand;
-
     
     /* Image Writes */
     infoPtr->ImageWriteFlags =  	ROP_NEEDS_SOURCE |
@@ -1013,4 +1014,22 @@ fbBres (DrawablePtr     pDrawable,
 
 
 
+void
+S3VWaitFifoGX2(S3VPtr ps3v, int slots )
+{
+  if(ps3v->NoPCIRetry)
+    while(((INREG(SUBSYS_STAT_REG) >> 9) & 0x60) < slots){}
+}
+
+
+
+void
+S3VWaitFifoMain(S3VPtr ps3v, int slots )
+{
+  if(ps3v->NoPCIRetry) 
+    while(((INREG(SUBSYS_STAT_REG) >> 8) & 0x1f) < slots){}
+}
+
+
+/*EOF*/
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c
index 6752f9633..322b599d9 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c,v 1.64 2000/11/03 18:46:13 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c,v 1.66 2000/11/15 22:30:05 dawes Exp $ */
 
 /*
 Copyright (C) 1994-1999 The XFree86 Project, Inc.  All Rights Reserved.
@@ -116,9 +116,9 @@ static int pix24bpp = 0;
  
 #define S3VIRGE_NAME "S3VIRGE"
 #define S3VIRGE_DRIVER_NAME "s3virge"
-#define S3VIRGE_VERSION_NAME "1.3.0"
+#define S3VIRGE_VERSION_NAME "1.4.0"
 #define S3VIRGE_VERSION_MAJOR   1
-#define S3VIRGE_VERSION_MINOR   3
+#define S3VIRGE_VERSION_MINOR   4
 #define S3VIRGE_PATCHLEVEL      0
 #define S3VIRGE_DRIVER_VERSION ((S3VIRGE_VERSION_MAJOR << 24) | \
 				(S3VIRGE_VERSION_MINOR << 16) | \
@@ -319,6 +319,9 @@ static const char *vbeSymbols[] = {
 static const char *fbSymbols[] = {
   "fbScreenInit",
   "fbBres",
+#ifdef RENDER
+  "fbPictureInit",
+#endif
   NULL
 };
 
@@ -1510,7 +1513,24 @@ S3VPreInit(ScrnInfoPtr pScrn, int flags)
 	}
 	xf86LoaderReqSymLists(shadowSymbols, NULL);
     }
-   
+
+    /* Setup WAITFIFO() for accel and ModeInit() */
+    /* Needs to be done prior to first ModeInit call */
+    /* and any accel activity. */
+    switch(ps3v->Chipset) 
+      {
+	/* GX2_SERIES chips, GX2 & TRIO_3D_2X */
+      case S3_ViRGE_GX2:
+      case S3_TRIO_3D_2X:
+	ps3v->pWaitFifo = S3VWaitFifoGX2;
+	break;
+      case S3_ViRGE:
+      case S3_ViRGE_VX:
+      default:
+	ps3v->pWaitFifo = S3VWaitFifoMain;
+	break;
+      }
+
     return TRUE;
 }
 
@@ -1537,14 +1557,6 @@ S3VEnterVT(int scrnIndex, int flags)
 #ifdef unmap_always
     S3VMapMem(pScrn);
 #endif
-    #if 0
-    	/* todo - KJB - cep */
-    				/* New pointer mapping means we need to call */
-    				/* cfb...Init again and anything else required */
-    				/* to notify the upper layers of the change. */
-    if( !S3VInternalScreenInit(scrnIndex, pScreen) )
-    	return FALSE;
-	#endif
     S3VSave(pScrn);
     return S3VModeInit(pScrn, pScrn->currentMode);
 }
@@ -1687,7 +1699,7 @@ S3VSave (ScrnInfoPtr pScrn)
    VGAOUT8(vgaCRIndex, 0x33);             
    save->CR33 = VGAIN8(vgaCRReg);
    if (S3_TRIO_3D_2X_SERIES(ps3v->Chipset) || S3_ViRGE_GX2_SERIES(ps3v->Chipset) 
-      /* MXTESTME || S3_ViRGE_MX_SERIES(ps3v->Chipset) */ ) 
+       /* MXTESTME */ || S3_ViRGE_MX_SERIES(ps3v->Chipset) ) 
    {
       VGAOUT8(vgaCRIndex, 0x85);
       save->CR85 = VGAIN8(vgaCRReg);
@@ -1696,6 +1708,19 @@ S3VSave (ScrnInfoPtr pScrn)
       VGAOUT8(vgaCRIndex, 0x86);
       save->CR86 = VGAIN8(vgaCRReg);
    }
+   if (S3_ViRGE_GX2_SERIES(ps3v->Chipset) ||
+       S3_ViRGE_MX_SERIES(ps3v->Chipset) ) {
+      VGAOUT8(vgaCRIndex, 0x7B);
+      save->CR7B = VGAIN8(vgaCRReg);
+      VGAOUT8(vgaCRIndex, 0x7D);
+      save->CR7D = VGAIN8(vgaCRReg);
+      VGAOUT8(vgaCRIndex, 0x87);
+      save->CR87 = VGAIN8(vgaCRReg);
+      VGAOUT8(vgaCRIndex, 0x92);
+      save->CR92 = VGAIN8(vgaCRReg);
+      VGAOUT8(vgaCRIndex, 0x93);
+      save->CR93 = VGAIN8(vgaCRReg);
+   }
    if (ps3v->Chipset == S3_ViRGE_DXGX || S3_ViRGE_GX2_SERIES(ps3v->Chipset) || 
        S3_ViRGE_MX_SERIES(ps3v->Chipset)) {
       VGAOUT8(vgaCRIndex, 0x90);
@@ -1773,7 +1798,7 @@ S3VSave (ScrnInfoPtr pScrn)
 
    /* Now save Memory Interface Unit registers */
    if( S3_ViRGE_GX2_SERIES(ps3v->Chipset) 
-      /* MXTESTME || S3_ViRGE_MX_SERIES(ps3v->Chipset) */ )
+      /* MXTESTME */ || S3_ViRGE_MX_SERIES(ps3v->Chipset) )
      {
      /* No MMPR regs on MX & GX2 */
      }
@@ -1910,9 +1935,6 @@ S3VWriteMode (ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, S3VRegPtr restore)
    VGAOUT8(vgaCRIndex, 0x55);
    VGAOUT8(vgaCRReg, restore->CR55);
 
-   /* cep kjb 
-      sleep( 7 );*/
-
    /* Extended mode timings registers */  
    VGAOUT8(vgaCRIndex, 0x53);             
    VGAOUT8(vgaCRReg, restore->CR53); 
@@ -1931,9 +1953,6 @@ S3VWriteMode (ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, S3VRegPtr restore)
    VGAOUT8(vgaCRIndex, 0x6d);
    VGAOUT8(vgaCRReg, restore->CR6D);
 
-   /* cep kjb 
-      sleep( 7 );*/
-
    /* Restore the desired video mode with CR67 */
         
    VGAOUT8(vgaCRIndex, 0x67);             
@@ -1974,7 +1993,7 @@ S3VWriteMode (ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, S3VRegPtr restore)
    VGAOUT8(vgaCRIndex, 0x33);
    VGAOUT8(vgaCRReg, restore->CR33);
    if (S3_TRIO_3D_2X_SERIES(ps3v->Chipset) || S3_ViRGE_GX2_SERIES(ps3v->Chipset)
-      /* MXTESTME || S3_ViRGE_MX_SERIES(ps3v->Chipset) */ ) 
+       /* MXTESTME */ || S3_ViRGE_MX_SERIES(ps3v->Chipset) ) 
    {
       VGAOUT8(vgaCRIndex, 0x85);
       VGAOUT8(vgaCRReg, restore->CR85);
@@ -1983,6 +2002,18 @@ S3VWriteMode (ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, S3VRegPtr restore)
       VGAOUT8(vgaCRIndex, 0x86);
       VGAOUT8(vgaCRReg, restore->CR86);
    }
+   if (ps3v->Chipset == S3_ViRGE_GX2) {
+      VGAOUT8(vgaCRIndex, 0x7B);
+      VGAOUT8(vgaCRReg, restore->CR7B);
+      VGAOUT8(vgaCRIndex, 0x7D);
+      VGAOUT8(vgaCRReg, restore->CR7D);
+      VGAOUT8(vgaCRIndex, 0x87);
+      VGAOUT8(vgaCRReg, restore->CR87);
+      VGAOUT8(vgaCRIndex, 0x92);
+      VGAOUT8(vgaCRReg, restore->CR92);
+      VGAOUT8(vgaCRIndex, 0x93);
+      VGAOUT8(vgaCRReg, restore->CR93);
+   }
    if (ps3v->Chipset == S3_ViRGE_DXGX || S3_ViRGE_GX2_SERIES(ps3v->Chipset) ||
        S3_ViRGE_MX_SERIES(ps3v->Chipset)) {
       VGAOUT8(vgaCRIndex, 0x90);
@@ -2090,7 +2121,7 @@ S3VWriteMode (ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, S3VRegPtr restore)
 
    VerticalRetraceWait();
    if (S3_ViRGE_GX2_SERIES(ps3v->Chipset) 
-       /* MXTESTME || S3_ViRGE_MX_SERIES(ps3v->Chipset) */ )
+       /* MXTESTME */ || S3_ViRGE_MX_SERIES(ps3v->Chipset) )
      {
       VGAOUT8(vgaCRIndex, 0x85);    
       /* primary stream threshold */
@@ -2101,7 +2132,7 @@ S3VWriteMode (ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, S3VRegPtr restore)
        OUTREG(FIFO_CONTROL_REG, restore->MMPR0);
      }
    if( !( S3_ViRGE_GX2_SERIES(ps3v->Chipset) 
-         /* MXTESTME || S3_ViRGE_MX_SERIES(ps3v->Chipset) */ ))
+	  /* MXTESTME */ || S3_ViRGE_MX_SERIES(ps3v->Chipset) ))
    {
      WaitIdle();                  /* Don't ask... */
      OUTREG(MIU_CONTROL_REG, restore->MMPR1);
@@ -2443,14 +2474,7 @@ S3VScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	
   miInitializeBackingStore(pScreen);
   xf86SetBackingStore(pScreen);
-  /* Problem with accel appears to crash GX2 on mouse moves */
-  /* re-enable this when fixed. */
-  if( S3_ViRGE_GX2_SERIES(ps3v->Chipset) )
-  {}
-  else
-    {
-    xf86SetSilkenMouse(pScreen);
-    }
+  xf86SetSilkenMouse(pScreen);
   						/* hardware cursor needs to wrap this layer */
   S3VDGAInit(pScreen);
 
@@ -2600,6 +2624,10 @@ S3VInternalScreenInit( int scrnIndex, ScreenPtr pScreen)
 	  ret = FALSE;
 	  break;
 	}
+#ifdef RENDER
+      if (ret)
+	fbPictureInit (pScreen, 0, 0);
+#endif
     }
   else
     {
@@ -2721,7 +2749,7 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
    VGAOUT8(vgaCRIndex, 0x3a);
    tmp = VGAIN8(vgaCRReg);
    if( S3_ViRGE_GX2_SERIES(ps3v->Chipset) 
-       /* MXTESTME || S3_ViRGE_MX_SERIES(ps3v->Chipset) */ )
+       /* MXTESTME */ || S3_ViRGE_MX_SERIES(ps3v->Chipset) )
      {
      if(ps3v->pci_burst)
         new->CR3A = (tmp & 0x78) | 0x10; /* ENH 256, PCI burst */
@@ -2754,8 +2782,17 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
       new->CR63 = 0x09;
       }
    else {
-      new->CR66 = 0x89; 
-      new->CR63 = 0;
+     new->CR66 = 0x89; 
+     /* Set display fifo */
+     if( S3_ViRGE_GX2_SERIES(ps3v->Chipset) ||
+	 S3_ViRGE_MX_SERIES(ps3v->Chipset) )
+       {
+	 new->CR63 = 0x08;
+       }
+     else
+       {
+	 new->CR63 = 0;
+       }
       }    
 
   /* Now set linear addr. registers */
@@ -2909,19 +2946,19 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
        if (pScrn->bitsPerPixel == 8)
 	  new->CR67 = 0x00;
        else if (pScrn->bitsPerPixel == 16) {
+	 /* XV support needs STREAMS in depth 16 */
+          ps3v->NeedSTREAMS = TRUE;
+          S3VInitSTREAMS(pScrn, new->STREAMS, mode);
 	  if (pScrn->weight.green == 5)
-	     new->CR67 = 0x30;                  /* 15bpp */
+	     new->CR67 = 0x30 | 0x4;                  /* 15bpp */
 	  else
-	     new->CR67 = 0x50;                  /* 16bpp */
+	     new->CR67 = 0x50 | 0x4;                  /* 16bpp */
           }
-       else if ((pScrn->bitsPerPixel == 24) /* || (pScrn->bitsPerPixel == 32) */ ) {
-          new->CR67 = 0x74;              /* 24bpp, STREAMS */
+       else if ((pScrn->bitsPerPixel == 24) ) {
+	 new->CR67 = 0x74;              /* 24bpp, STREAMS */
 	  					/* Flag STREAMS proc. required */
           ps3v->NeedSTREAMS = TRUE;
           S3VInitSTREAMS(pScrn, new->STREAMS, mode);
-          /* MXTESTME - remove the next 2 lines completely */
-          if( S3_ViRGE_MX_SERIES(ps3v->Chipset) )
-            new->MMPR0 = 0xc098;            /* Adjust FIFO slots */
           }
        else if (pScrn->bitsPerPixel == 32) {
           new->CR67 = 0xd0;              /* 32bpp */
@@ -3040,8 +3077,8 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
          }
       else if (pScrn->bitsPerPixel == 16) {
          new->CR67 = 0x50 | 0x0c;
-	  					/* Flag STREAMS proc. required */
-	 /* cep */
+	 /* Flag STREAMS proc. required */
+	 /* XV support needs STREAMS in depth 16 */
          ps3v->NeedSTREAMS = TRUE;
          S3VInitSTREAMS(pScrn, new->STREAMS, mode);
 	 /*new->MMPR0 = 0xc000;            / Adjust FIFO slots */
@@ -3054,7 +3091,6 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
          S3VInitSTREAMS(pScrn, new->STREAMS, mode);
 	 /*new->MMPR0 = 0xc000;            / Adjust FIFO slots */
          new->MMPR0 = 0x107c02;            /* Adjust FIFO slots, overlay */
-	 /* kjb cep */
          }
       else if (pScrn->bitsPerPixel == 32) { 
          new->CR67 = 0xd0 | 0x0c;
@@ -3091,9 +3127,16 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
         new->CR42 = 0x00;
         }
 
-   /* Set display fifo */
-   new->CR34 = 0x10;  
-
+   if(S3_ViRGE_GX2_SERIES(ps3v->Chipset) || 
+      S3_ViRGE_MX_SERIES(ps3v->Chipset) )
+     {
+       new->CR34 = 0;
+     }
+   else
+     {
+       /* Set display fifo */
+       new->CR34 = 0x10;  
+     }
    /* Now we adjust registers for extended mode timings */
    /* This is taken without change from the accel/s3_virge code */
 
@@ -3138,11 +3181,20 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 
    new->CR33 = 0x20;
    if (S3_TRIO_3D_2X_SERIES(ps3v->Chipset) || S3_ViRGE_GX2_SERIES(ps3v->Chipset) 
-       /* MXTESTME || S3_ViRGE_MX_SERIES(ps3v->Chipset) */ ) 
+       /* MXTESTME */ || S3_ViRGE_MX_SERIES(ps3v->Chipset) ) 
    {
-      new->CR85 = 0x1f;  /* avoid sreen flickering */
+     new->CR85 = 0x12;  /* avoid sreen flickering */
       /* by increasing FIFO filling, larger # fills FIFO from memory earlier */
       /* on GX2 this affects all depths, not just those running STREAMS. */
+      /* new, secondary stream settings. */
+      new->CR87 = 0x10;
+      /* gx2 - set up in XV init code */
+      new->CR92 = 0x00;
+      new->CR93 = 0x00;
+      /* gx2 primary mclk timeout, def=0xb */
+      new->CR7B = 0xb;
+      /* gx2 secondary mclk timeout, def=0xb */
+      new->CR7D = 0xb;
    }
    if (ps3v->Chipset == S3_ViRGE_DXGX || S3_TRIO_3D_SERIES(ps3v->Chipset)) {
       new->CR86 = 0x80;  /* disable DAC power saving to avoid bright left edge */
@@ -3318,6 +3370,8 @@ S3VSaveScreen(ScreenPtr pScreen, int mode)
 static void
 S3VInitSTREAMS(ScrnInfoPtr pScrn, unsigned int *streams, DisplayModePtr mode)
 {
+  PVERB5("	S3VInitSTREAMS\n");
+  
   switch (pScrn->bitsPerPixel)
     {
     case 16:
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_macros.h b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_macros.h
index a6ca27eda..f54d2557f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_macros.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_macros.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_macros.h,v 1.9 2000/03/31 20:13:33 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_macros.h,v 1.10 2000/11/14 16:54:53 dawes Exp $ */
 
 /*
 Copyright (C) 1994-1999 The XFree86 Project, Inc.  All Rights Reserved.
@@ -33,6 +33,7 @@ in this Software without prior written authorization from the XFree86 Project.
 
 /* miscellaneous registers */
 #define SUBSYS_STAT_REG 0x8504
+#define ADV_FUNC_CNTR 0x850c
 
 /* memory port controller registers */
 #define FIFO_CONTROL_REG 0x8200
@@ -95,9 +96,12 @@ in this Software without prior written authorization from the XFree86 Project.
 
 #define MAXLOOP 0x0fffff /* timeout value for engine waits, 0.5 secs */
 
+/* Switchable per chipset, must be initialized prior to a mode */
+/* switch! */
+#define WAITFIFO(n) ((*ps3v->pWaitFifo)(ps3v,n))
 
-#define WAITFIFO(n) if(ps3v->NoPCIRetry) \
-	 while(((INREG(SUBSYS_STAT_REG) >> 8) & 0x1f) < n){}
+/* gx2 only (16 slots), not used yet */
+#define WAITCMD() while(((INREG(ADV_FUNC_CNTR) >> 6) & 0x1f) != 16){}
 
 #define WAITIDLE()\
   do { int loop=0; mem_barrier(); \
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile
index a66c4db4f..04819e1c8 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile,v 1.20 2000/10/09 23:12:46 alanh Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile,v 1.21 2000/11/09 11:32:21 alanh Exp $
 XCOMM
 XCOMM This is an Imakefile for the SIS driver.  
 XCOMM
@@ -26,7 +26,7 @@ INCLUDES = -I. -I../../include
 #else
 INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \
            -I$(SERVERSRC)/mfb -I$(SERVERSRC)/mi \
-           -I$(SERVERSRC)/cfb -I$(XF86SRC)/xaa \
+           -I$(SERVERSRC)/fb -I$(XF86SRC)/xaa \
            -I$(XF86SRC)/xf1bpp -I$(XF86SRC)/xf4bpp \
            -I$(XF86SRC)/xf24_32bpp \
            -I$(XF86SRC)/vgahw -I$(XF86SRC)/ramdac \
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c
index 7d72a139d..1ef028274 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c,v 1.6 2000/10/10 16:38:19 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c,v 1.7 2000/11/09 11:32:21 alanh Exp $ */
 
 /* modified from tdfx_dri.c, mga_dri.c */
 
@@ -9,11 +9,7 @@
 
 #include "xf86PciInfo.h"
 #include "xf86Pci.h"
-#define PSZ 8
-#include "cfb.h"
-#undef PSZ
-#include "cfb16.h"
-#include "cfb32.h"
+#include "fb.h"
 
 #include "miline.h"
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c
index 9ffbfa2e5..9b0b6c11a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c
@@ -25,16 +25,10 @@
  *           Mitani Hiroshi <hmitani@drl.mei.co.jp> 
  *           David Thomas <davtom@dream.org.uk>. 
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c,v 1.52 2000/10/09 23:37:15 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c,v 1.53 2000/11/09 11:32:21 alanh Exp $ */
 
 
-#define PSZ 8
-#include "cfb.h"
-#undef PSZ
-#include "cfb16.h"
-#include "cfb24.h"
-#include "cfb32.h"
-#include "cfb24_32.h"
+#include "fb.h"
 #include "xf1bpp.h"
 #include "xf4bpp.h"
 #include "mibank.h"
@@ -200,11 +194,7 @@ static const char *vgahwSymbols[] = {
 static const char *fbSymbols[] = {
     "xf1bppScreenInit",
     "xf4bppScreenInit",
-    "cfbScreenInit",
-    "cfb16ScreenInit",
-    "cfb24ScreenInit",
-    "cfb24_32ScreenInit",
-    "cfb32ScreenInit",
+    "fbScreenInit",
     NULL
 };
 
@@ -939,25 +929,11 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
         Sym = "xf4bppScreenInit";
         break;
     case 8:
-        mod = "cfb";
-        Sym = "cfbScreenInit";
-        break;
     case 16:
-        mod = "cfb16";
-        Sym = "cfb16ScreenInit";
-        break;
     case 24:
-        if (pix24bpp == 24) {
-            mod = "cfb24";
-            Sym = "cfb24ScreenInit";
-        } else {
-            mod = "xf24_32bpp";
-            Sym = "cfb24_32ScreenInit";
-        }
-        break;
     case 32:
-        mod = "cfb32";
-        Sym = "cfb32ScreenInit";
+        mod = "fb";
+        Sym = "fbScreenInit";
         break;
     }
 
@@ -1316,29 +1292,12 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
                         pScrn->displayWidth);
         break;
     case 8:
-        ret = cfbScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX,
-                        pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, 
-                        pScrn->displayWidth);
-        break;
     case 16:
-        ret = cfb16ScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX,
-                        pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, 
-                        pScrn->displayWidth);
-        break;
     case 24:
-        if (pix24bpp == 24)
-            ret = cfb24ScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX,
-                        pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, 
-                        pScrn->displayWidth);
-        else
-            ret = cfb24_32ScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX,
-                        pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, 
-                        pScrn->displayWidth);
-        break;
     case 32:
-        ret = cfb32ScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX,
+        ret = fbScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX,
                         pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, 
-                        pScrn->displayWidth);
+                        pScrn->displayWidth, pScrn->bitsPerPixel);
         break;
     default:
         xf86DrvMsg(scrnIndex, X_ERROR,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c
index 61fedbebb..a02188670 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c
@@ -25,16 +25,10 @@
  *           Mitani Hiroshi <hmitani@drl.mei.co.jp> 
  *           David Thomas <davtom@dream.org.uk>. 
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c,v 1.2 2000/03/31 20:13:37 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c,v 1.3 2000/11/09 11:32:22 alanh Exp $ */
 
 
-#define PSZ 8
-#include "cfb.h"
-#undef PSZ
-#include "cfb16.h"
-#include "cfb24.h"
-#include "cfb32.h"
-#include "cfb24_32.h"
+#include "fb.h"
 #include "xf1bpp.h"
 #include "xf4bpp.h"
 #include "mibank.h"
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
index 48c16e61e..72a7bef23 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
@@ -25,7 +25,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c,v 1.43 2000/09/24 13:51:31 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c,v 1.45 2000/11/14 13:12:21 alanh Exp $ */
 
 /*
  * Authors:
@@ -667,11 +667,6 @@ TDFXPreInit(ScrnInfoPtr pScrn, int flags)
 
   if (pTDFX->pEnt->location.type != BUS_PCI) return FALSE;
 
-  if (flags & PROBE_DETECT) {
-    TDFXProbeDDC(pScrn, pTDFX->pEnt->index);
-    return TRUE;
-  }
-  
   /* The vgahw module should be loaded here when needed */
   if (!xf86LoadSubModule(pScrn, "vgahw")) return FALSE;
 
@@ -701,8 +696,11 @@ TDFXPreInit(ScrnInfoPtr pScrn, int flags)
   match=pTDFX->PciInfo=xf86GetPciInfoForEntity(pTDFX->pEnt->index);
   TDFXFindChips(pScrn, match);
 
-  if (xf86RegisterResources(pTDFX->pEnt->index, 0, ResNone))
+  if (xf86RegisterResources(pTDFX->pEnt->index, 0, ResExclusive)) {
+      TDFXFreeRec(pScrn);
       return FALSE;
+  }
+
   if (pTDFX->usePIO)
     pScrn->racIoFlags = RAC_FB | RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT;
   else
@@ -1764,16 +1762,19 @@ TDFXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) {
 
   miSetPixmapDepths ();
     
+  pTDFX->NoAccel=xf86ReturnOptValBool(TDFXOptions, OPTION_NOACCEL, FALSE);
 #ifdef XF86DRI
   /*
    * Setup DRI after visuals have been established, but before fbScreenInit
    * is called.   fbScreenInit will eventually call into the drivers
    * InitGLXVisuals call back.
    */
-  pTDFX->directRenderingEnabled = TDFXDRIScreenInit(pScreen);
-  /* Force the initialization of the context */
-  if (pTDFX->directRenderingEnabled)
+  if (!pTDFX->NoAccel) {
+    pTDFX->directRenderingEnabled = TDFXDRIScreenInit(pScreen);
+    /* Force the initialization of the context */
+    if (pTDFX->directRenderingEnabled)
   	TDFXLostContext(pScreen);
+  }
 #endif
 
   switch (pScrn->bitsPerPixel) {
@@ -1823,7 +1824,6 @@ TDFXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) {
   }
   REGION_UNINIT(pScreen, &MemRegion);
 
-  pTDFX->NoAccel=xf86ReturnOptValBool(TDFXOptions, OPTION_NOACCEL, FALSE);
   if (!pTDFX->NoAccel) {
     if (!TDFXAccelInit(pScreen)) {
       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -1863,17 +1863,19 @@ TDFXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) {
 #endif
 
 #ifdef XF86DRI
+  if (!pTDFX->NoAccel) {
     if (pTDFX->directRenderingEnabled) {
 	/* Now that mi, fb, drm and others have done their thing, 
          * complete the DRI setup.
          */
 	pTDFX->directRenderingEnabled = TDFXDRIFinishScreenInit(pScreen);
     }
-    if (pTDFX->directRenderingEnabled) {
+  }
+  if (pTDFX->directRenderingEnabled) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering enabled\n");
-    } else {
+  } else {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering disabled\n");
-    }
+  }
 #endif
 
 #ifdef XvExtension
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c b/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c
index 494075d00..68b7adf65 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c
@@ -26,7 +26,7 @@
  *
  * Authors: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c,v 1.5 2000/10/29 14:24:12 tsi Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c,v 1.6 2000/11/14 16:54:54 dawes Exp $
  */
 
 #include "vesa.h"
@@ -1621,12 +1621,13 @@ VESASaveScreen(ScreenPtr pScreen, int mode)
 {
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
     Bool on = xf86IsUnblank(mode);
-    unsigned char scrn = ReadSeq(0x01);
 
     if (on)
 	SetTimeSinceLastInputEvent();
 
     if (pScrn->vtSema) {
+	unsigned char scrn = ReadSeq(0x01);
+
 	if (on)
 	    scrn &= ~0x20;
 	else
diff --git a/xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c b/xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c
index 601256fcc..19f01fdcc 100644
--- a/xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c
+++ b/xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c
@@ -1,6 +1,6 @@
 /* $XConsortium: xf86Wacom.c /main/20 1996/10/27 11:05:20 kaleb $ */
 /*
- * Copyright 1995-1999 by Frederic Lepied, France. <Lepied@XFree86.org>
+ * Copyright 1995-2000 by Frederic Lepied, France. <Lepied@XFree86.org>
  *                                                                            
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is  hereby granted without fee, provided that
@@ -22,7 +22,7 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c,v 1.19 2000/08/11 19:10:49 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c,v 1.20 2000/11/14 17:33:00 dawes Exp $ */
 
 /*
  * This driver is only able to handle the Wacom IV and Wacom V protocols.
@@ -49,7 +49,7 @@
  *
  */
 
-static const char identification[] = "$Identification: 18 $";
+static const char identification[] = "$Identification: 19 $";
 
 #include <xf86Version.h>
 
@@ -290,6 +290,7 @@ typedef struct _WacomCommonRec
     int			wcmThreshold;	/* Threshold for counting pressure as a button */
     WacomDeviceState	wcmDevStat[2];	/* device state for each tool */
     int			wcmInitNumber;  /* magic number for the init phasis */
+    unsigned int	wcmLinkSpeed;   /* serial link speed */
 } WacomCommonRec, *WacomCommonPtr;
 
 /******************************************************************************
@@ -323,6 +324,7 @@ typedef struct _WacomCommonRec
 #define RESOLUTION_X	20
 #define RESOLUTION_Y	21
 #define RESOLUTION_Z	22
+#define USB		23
 
 #if !defined(sun) || defined(i386)
 static SymTabRec WcmTab[] = {
@@ -349,6 +351,7 @@ static SymTabRec WcmTab[] = {
   { RESOLUTION_X,	"resolutionx" },
   { RESOLUTION_Y,	"resolutiony" },
   { RESOLUTION_Z,	"resolutionz" },
+  { USB,		"usb" },
   { -1,			"" }
 };
 
@@ -368,6 +371,7 @@ static SymTabRec ModeTabRec[] = {
 /******************************************************************************
  * constant and macros declarations
  *****************************************************************************/
+#define DEFAULT_MAXZ 240	/* default value of MaxZ when nothing is configured */
 #define BUFFER_SIZE 256		/* size of reception buffer */
 #define XI_STYLUS "STYLUS"	/* X device name for the stylus */
 #define XI_CURSOR "CURSOR"	/* X device name for the cursor */
@@ -410,6 +414,7 @@ static const char * penpartner_setup_string = WC_PRESSURE_MODE WC_START;
 #define WC_V_MULTI	"MT1\r"
 #define WC_V_ID		"ID1\r"
 #define WC_V_19200	"BA19\r"
+#define WC_V_38400	"BA38\r"
 /*  #define WC_V_9600	"BA96\r" */
 #define WC_V_9600	"$\r"
 
@@ -717,11 +722,14 @@ xf86WcmConfig(LocalDevicePtr    *array,
 	    if (xf86GetToken(NULL) != NUMBER)
 		xf86ConfigError("Option number expected");
 	    switch(val->num) {
+		case 38400:
+		    common->wcmLinkSpeed = 38400;
+		    break;
 		case 19200:
-		    common->wcmFlags = common->wcmFlags | BAUD_19200_FLAG;
+		    common->wcmLinkSpeed = 19200;
 		    break;
 		case 9600:
-		    common->wcmFlags = common->wcmFlags & ~BAUD_19200_FLAG; 
+		    common->wcmLinkSpeed = 9600;
 		    break;
 		default:
 		    xf86ConfigError("Illegal speed value");
@@ -791,6 +799,10 @@ xf86WcmConfig(LocalDevicePtr    *array,
 		ErrorF("%s Wacom resolution y = %d\n", XCONFIG_GIVEN, common->wcmResolZ);
 	    break;
 
+	case USB:
+	    /*  local->read_input=xf86WcmReadUSBInput; */
+	    break;
+	    
 	case EOF:
 	    FatalError("Unexpected EOF (missing EndSubSection)");
 	    break;
@@ -1721,17 +1733,17 @@ xf86WcmReadInput(LocalDevicePtr         local)
 		((common->wcmData[3] & ZAXIS_BIT) >> 2);
 
 	    if (common->wcmMaxZ == 512) {
-		z = z*2 + ((common->wcmData[0] & ZAXIS_BIT) >> 2);
+		z = z*4 + ((common->wcmData[0] & ZAXIS_BIT) >> 1);
 
 		if (common->wcmData[6] & ZAXIS_SIGN_BIT) {
-		    z -= 256;
+		    z /= 2;
 		}
 		DBG(10, ErrorF("graphire pressure(%c)=%d\n",
 			       (common->wcmData[6] & ZAXIS_SIGN_BIT) ? '-' : '+', z));
 	    }
 	    else {
 		if (common->wcmData[6] & ZAXIS_SIGN_BIT) {
-		    z -= 128;
+		    z /= 2;
 		}
 	    }
 	    
@@ -1939,7 +1951,7 @@ xf86WcmReadInput(LocalDevicePtr         local)
 			 ((common->wcmData[5] & 0x78) >> 3));
 		if ((common->wcmData[0] & 0xb8) == 0xa0) {
 		    ds->pressure = (((common->wcmData[5] & 0x07) << 7) |
-				    (common->wcmData[6] & 0x7f)) - 512;
+				    (common->wcmData[6] & 0x7f));
 		    ds->buttons = (((common->wcmData[0]) & 0x06) |
 				   (ds->pressure >= common->wcmThreshold));
 		}
@@ -2113,6 +2125,36 @@ xf86WcmOpen(LocalDevicePtr	local)
 
     DBG(1, ErrorF("initializing tablet\n"));    
 
+    /* Set the speed of the serial link to 38400 */
+#ifdef XFREE86_V4
+   if (xf86SetSerialSpeed(local->fd, 38400) < 0) {
+       return !Success;
+   }
+#else
+    if (set_serial_speed(local->fd, B38400) == !Success)
+        return !Success;
+#endif
+    
+    /* Send reset to the tablet */
+    SYSCALL(err = write(local->fd, WC_RESET_BAUD, strlen(WC_RESET_BAUD)));
+    if (err == -1) {
+	ErrorF("Wacom write error : %s\n", strerror(errno));
+	return !Success;
+    }
+    
+    /* Wait 250 mSecs */
+    WAIT(250);
+
+    /* Send reset to the tablet */
+    SYSCALL(err = write(local->fd, WC_RESET, strlen(WC_RESET)));
+    if (err == -1) {
+	ErrorF("Wacom write error : %s\n", strerror(errno));
+	return !Success;
+    }
+    
+    /* Wait 75 mSecs */
+    WAIT(75);
+
     /* Set the speed of the serial link to 19200 */
 #ifdef XFREE86_V4
    if (xf86SetSerialSpeed(local->fd, 19200) < 0) {
@@ -2201,7 +2243,7 @@ xf86WcmOpen(LocalDevicePtr	local)
     if (buffer[2] == 'G' && buffer[3] == 'D') {
 	DBG(2, ErrorF("detected an Intuos model\n"));
 	common->wcmProtocolLevel = 5;
-	common->wcmMaxZ = 1024;		/* max Z value */
+	common->wcmMaxZ = 1023;		/* max Z value */
 	common->wcmResolX = 2540;	/* X resolution in points/inch */
 	common->wcmResolY = 2540;	/* Y resolution in points/inch */
 	common->wcmResolZ = 2540;	/* Z resolution in points/inch */
@@ -2252,7 +2294,7 @@ xf86WcmOpen(LocalDevicePtr	local)
 	     * config header don't use buffer+xx because the header size
 	     * varies on different tablets
 	     */
-	    if (sscanf(buffer, "%[^,],%d,%d,%d,%d", header, &a, &b, &common->wcmResolX, &common->wcmResolY) == 5) {
+	    if (sscanf(buffer, "%[^,],%d,%d,%d,%d", &header, &a, &b, &common->wcmResolX, &common->wcmResolY) == 5) {
 		DBG(6, ErrorF("WC_CONFIG Header = %s\n", header));
 	    }
 	    else {
@@ -2264,7 +2306,6 @@ xf86WcmOpen(LocalDevicePtr	local)
 	    ErrorF("WACOM: unable to read resolution. Using default.\n");
 	    common->wcmResolX = common->wcmResolY = 1270;
 	}
-	
     }
 
     if (!(common->wcmFlags & GRAPHIRE_FLAG) && !(common->wcmMaxX && common->wcmMaxY)) {
@@ -2305,7 +2346,7 @@ xf86WcmOpen(LocalDevicePtr	local)
 	     * config header don't use buffer+xx because the header size
 	     * varies on different tablets
 	     */
-	    if (sscanf(buffer, "%[^,],%d,%d,%d,%d", header, &a, &b, &common->wcmResolX, &common->wcmResolY) == 5) {
+	    if (sscanf(buffer, "%[^,],%d,%d,%d,%d", &header, &a, &b, &common->wcmResolX, &common->wcmResolY) == 5) {
 		DBG(6, ErrorF("WC_CONFIG Header = %s\n", header));
 	    }
 	    else {
@@ -2396,12 +2437,37 @@ xf86WcmOpen(LocalDevicePtr	local)
     }
 
     /* change the serial speed if requested */
-    if (common->wcmFlags & BAUD_19200_FLAG) {
+    if (common->wcmLinkSpeed > 9600) {
 	if (common->wcmProtocolLevel == 5) {
-	    DBG(1, ErrorF("Switching serial link to 19200\n"));
-	    
-	    /* Switch the tablet to 19200 */
-	    SYSCALL(err = write(local->fd, WC_V_19200, strlen(WC_V_19200)));
+	    char	*speed_init_string = WC_V_19200;
+#ifndef XFREE86_V4
+	    int		speed = B19200;
+#endif
+	    DBG(1, ErrorF("Switching serial link to %d\n", common->wcmLinkSpeed));
+
+	    if (common->wcmLinkSpeed == 38400 && version < 2.0) {
+		ErrorF("Wacom: 38400 speed not supported with this Intuos firmware (%f)\n", version);
+		ErrorF("Switching to 19200\n");
+		common->wcmLinkSpeed = 19200;
+	    }
+
+	    switch (common->wcmLinkSpeed) {
+	    case 38400:
+		speed_init_string = WC_V_38400;
+#ifndef XFREE86_V4
+		speed = B38400;
+#endif
+		break;
+
+	    case 19200:
+		speed_init_string = WC_V_19200;
+#ifndef XFREE86_V4
+		speed = B19200;
+#endif
+		break;
+	    }
+	    /* Switch the tablet to the requested speed */
+	    SYSCALL(err = write(local->fd, speed_init_string, strlen(speed_init_string)));
 	    if (err == -1) {
 		ErrorF("Wacom write error : %s\n", strerror(errno));
 		return !Success;
@@ -2410,13 +2476,13 @@ xf86WcmOpen(LocalDevicePtr	local)
 	    /* Wait 75 mSecs */
 	    WAIT(75);
     
-	    /* Set the speed of the serial link to 19200 */
+	    /* Set the speed of the serial link to requested speed */
 #ifdef XFREE86_V4
-	    if (xf86SetSerialSpeed(local->fd, 19200) < 0) {
+	    if (xf86SetSerialSpeed(local->fd, common->wcmLinkSpeed) < 0) {
 		return !Success;
 	    }
 #else
-	    if (set_serial_speed(local->fd, B19200) == !Success)
+	    if (set_serial_speed(local->fd, speed) == !Success)
 		return !Success;
 #endif
 	}
@@ -2552,39 +2618,39 @@ xf86WcmOpenDevice(DeviceIntPtr       pWcm)
     /* Check threshold correctness */
     DBG(2, ErrorF("Threshold=%d\n", common->wcmThreshold));
     
-    if (common->wcmThreshold > ((common->wcmMaxZ / 2) - 1) ||
-	common->wcmThreshold < - (common->wcmMaxZ / 2)) {
+    if (common->wcmThreshold > common->wcmMaxZ ||
+	common->wcmThreshold < 0) {
 	if (((common->wcmProtocolLevel == 5) ||
 	     (common->wcmFlags & GRAPHIRE_FLAG)) &&
 	    xf86Verbose &&
 	    common->wcmThreshold != INVALID_THRESHOLD)
 	    ErrorF("%s Wacom invalid threshold %d. Reset to %d\n",
-		   XCONFIG_PROBED, common->wcmThreshold, - (common->wcmMaxZ / 3));
-	common->wcmThreshold = - (common->wcmMaxZ / 3);
+		   XCONFIG_PROBED, common->wcmThreshold, common->wcmMaxZ / 3);
+	common->wcmThreshold = common->wcmMaxZ / 3;
     }
     DBG(2, ErrorF("New threshold=%d\n", common->wcmThreshold));    
 
     /* Set the real values */
     InitValuatorAxisStruct(pWcm,
 			   0,
-			   0, /* min val */
+			   0,		/* min val */
 			   priv->bottomX - priv->topX, /* max val */
 			   mils(common->wcmResolX), /* resolution */
-			   0, /* min_res */
+			   0,		/* min_res */
 			   mils(common->wcmResolX)); /* max_res */
     InitValuatorAxisStruct(pWcm,
 			   1,
-			   0, /* min val */
+			   0,		/* min val */
 			   priv->bottomY - priv->topY, /* max val */
 			   mils(common->wcmResolY), /* resolution */
-			   0, /* min_res */
+			   0,		/* min_res */
 			   mils(common->wcmResolY)); /* max_res */
     InitValuatorAxisStruct(pWcm,
 			   2,
-			   - common->wcmMaxZ / 2, /* min val */
-			   (common->wcmMaxZ / 2) - 1, /* max val */
+			   0,		/* min val */
+			   common->wcmMaxZ, /* max val */
 			   mils(common->wcmResolZ), /* resolution */
-			   0, /* min_res */
+			   0,		/* min_res */
 			   mils(common->wcmResolZ)); /* max_res */
     InitValuatorAxisStruct(pWcm,
 			   3,
@@ -2948,7 +3014,7 @@ xf86WcmAllocate(char *  name,
     common->wcmPktLength = 7;		/* length of a packet */
     common->wcmMaxX = 0;		/* max X value */
     common->wcmMaxY = 0;		/* max Y value */
-    common->wcmMaxZ = 240;		/* max Z value */
+    common->wcmMaxZ = DEFAULT_MAXZ;	/* max Z value */
     common->wcmResolX = 0;		/* X resolution in points/inch */
     common->wcmResolY = 0;		/* Y resolution in points/inch */
     common->wcmResolZ = 1270;		/* Z resolution in points/inch */
@@ -2958,6 +3024,7 @@ xf86WcmAllocate(char *  name,
     common->wcmProtocolLevel = 4;	/* protocol level */
     common->wcmThreshold = INVALID_THRESHOLD; /* button 1 threshold for some tablet models */
     common->wcmInitNumber = 0;	        /* magic number for the init phasis */
+    common->wcmLinkSpeed = 9600;        /* serial link speed */
     return local;
 }
 
@@ -3236,6 +3303,10 @@ xf86WcmInit(InputDriverPtr	drv,
 	common->wcmFlags |= TILT_FLAG;
     }
 
+    if (xf86SetBoolOption(local->options, "Usb", 0)) {
+	/*local->read_input = xf86WcmReadUSBInput;*/
+    }
+
     if (xf86SetBoolOption(local->options, "KeepShape", 0)) {
 	priv->flags |= KEEP_SHAPE_FLAG;
 	xf86Msg(X_CONFIG, "%s: keeps shape\n", dev->identifier);
@@ -3279,8 +3350,8 @@ xf86WcmInit(InputDriverPtr	drv,
 	xf86Msg(X_CONFIG, "%s: max x = %d\n", dev->identifier,
 		common->wcmMaxY);
     }
-    common->wcmMaxZ = xf86SetIntOption(local->options, "MaxZ", 0);
-    if (common->wcmMaxZ != 0) {
+    common->wcmMaxZ = xf86SetIntOption(local->options, "MaxZ", DEFAULT_MAXZ);
+    if (common->wcmMaxZ != DEFAULT_MAXZ) {
 	xf86Msg(X_CONFIG, "%s: max x = %d\n", dev->identifier,
 		common->wcmMaxZ);
     }
@@ -3305,14 +3376,17 @@ xf86WcmInit(InputDriverPtr	drv,
 	val = xf86SetIntOption(local->options, "BaudRate", 0);
 
 	switch(val) {
+	case 38400:
+	    common->wcmLinkSpeed = 38400;
+	    break;
 	case 19200:
-	    common->wcmFlags = common->wcmFlags | BAUD_19200_FLAG;
+	    common->wcmLinkSpeed = 19200;
 	    break;
 	case 9600:
-	    common->wcmFlags = common->wcmFlags & ~BAUD_19200_FLAG; 
+	    common->wcmLinkSpeed = 9600;
 	    break;
 	default:
-	    xf86Msg(X_ERROR, "%s: Illegal speed value (must be 9600 or 19200).", dev->identifier);
+	    xf86Msg(X_ERROR, "%s: Illegal speed value (must be 9600 or 19200 or 38400).", dev->identifier);
 	    break;
 	}
 	if (xf86Verbose)
@@ -3330,7 +3404,9 @@ xf86WcmInit(InputDriverPtr	drv,
 	xfree(common);
     if (priv)
 	xfree(priv);
-    return local;
+    if (local)
+	xfree(local);
+    return NULL;
 }
 
 #ifdef XFree86LOADER
diff --git a/xc/programs/Xserver/hw/xfree86/int10/Imakefile b/xc/programs/Xserver/hw/xfree86/int10/Imakefile
index b2d7f3141..1664f33a6 100644
--- a/xc/programs/Xserver/hw/xfree86/int10/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/int10/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/int10/Imakefile,v 1.11 2000/09/29 08:59:47 eich Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/int10/Imakefile,v 1.12 2000/11/14 00:11:21 dawes Exp $
 
 /* An OS-independent INT10 module/library */
 
@@ -37,7 +37,7 @@ X86EMUDEFINES = -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG
 
 # if defined(i386Architecture)
 ARCHDEFINES = -D_PC
-#else if  defined(ia64Architecture)
+# elif  defined(ia64Architecture)
 ARCHDEFINES = -D_PC_IO -DPC_PCI
 # endif
 
diff --git a/xc/programs/Xserver/hw/xfree86/loader/loader.c b/xc/programs/Xserver/hw/xfree86/loader/loader.c
index 60acebe02..b4cf43d55 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/loader.c
+++ b/xc/programs/Xserver/hw/xfree86/loader/loader.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.c,v 1.46 2000/11/03 18:46:16 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.c,v 1.47 2000/11/13 23:09:55 dawes Exp $ */
 
 /*
  *
@@ -1309,3 +1309,24 @@ LoaderDuplicateSymbol(const char *symbol, const int handle)
 void _loader_debug_state()
 {
 }
+
+unsigned long LoaderOptions = 0;
+
+void
+LoaderResetOptions(void)
+{
+	LoaderOptions = 0;
+}
+
+void
+LoaderSetOptions(unsigned long opts)
+{
+	LoaderOptions |= opts;
+}
+
+void
+LoaderClearOptions(unsigned long opts)
+{
+	LoaderOptions &= ~opts;
+}
+
diff --git a/xc/programs/Xserver/hw/xfree86/loader/loader.h b/xc/programs/Xserver/hw/xfree86/loader/loader.h
index 4fdc1c15f..5bdc63366 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/loader.h
+++ b/xc/programs/Xserver/hw/xfree86/loader/loader.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.h,v 1.22 2000/09/26 15:57:18 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.h,v 1.23 2000/11/13 23:09:56 dawes Exp $ */
 
 /*
  *
@@ -208,6 +208,8 @@ typedef struct {
 } ModuleVersions;
 extern ModuleVersions LoaderVersionInfo;
 
+extern unsigned long LoaderOptions;
+
 /* Internal Functions */
 
 void LoaderAddSymbols(int, int, LOOKUP *);
diff --git a/xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h b/xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h
index a6759df22..d6c0d9eab 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h
+++ b/xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h,v 1.16 2000/01/29 17:17:05 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h,v 1.17 2000/11/13 23:09:57 dawes Exp $ */
 
 /*
  *
@@ -81,4 +81,12 @@ void LoaderShowStack(void);
 void *LoaderSymbolHandle(const char *, int);
 int LoaderUnload(int);
 
+void LoaderResetOptions(void);
+void LoaderSetOptions(unsigned long);
+void LoaderClearOptions(unsigned long);
+
+/* Options for LoaderSetOptions */
+#define LDR_OPT_ABI_MISMATCH_NONFATAL		0x0001
+
+
 #endif /* _LOADERPROCS_H */
diff --git a/xc/programs/Xserver/hw/xfree86/loader/loadmod.c b/xc/programs/Xserver/hw/xfree86/loader/loadmod.c
index f1025f944..fbc631453 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/loadmod.c
+++ b/xc/programs/Xserver/hw/xfree86/loader/loadmod.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loadmod.c,v 1.56 2000/11/03 18:46:16 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loadmod.c,v 1.57 2000/11/13 23:09:57 dawes Exp $ */
 
 /*
  *
@@ -545,6 +545,7 @@ CheckVersion (const char *module, XF86ModuleVersionInfo *data,
 	int vercode[3];
 	char verstr[4];
 	long ver = data->xf86version;
+	int errtype = 0;
 
 	xf86Msg (X_INFO, "Module %s: vendor=\"%s\"\n",
 			data->modname ? data->modname : "UNKNOWN!",
@@ -593,17 +594,27 @@ CheckVersion (const char *module, XF86ModuleVersionInfo *data,
 			vermaj = GET_ABI_MAJOR(ver);
 			vermin = GET_ABI_MINOR(ver);
 			if (abimaj != vermaj) {
-				/* XXX This should be an error condition */
-				xf86MsgVerb(X_WARNING, 0,
+				if (LoaderOptions & LDR_OPT_ABI_MISMATCH_NONFATAL)
+					errtype = X_WARNING;
+				else
+					errtype = X_ERROR;
+				xf86MsgVerb(errtype, 0,
 					"module ABI major version (%d) doesn't"
 					" match the server's version (%d)\n",
 					abimaj, vermaj);
+				if (!(LoaderOptions & LDR_OPT_ABI_MISMATCH_NONFATAL))
+					return FALSE;
 			} else if (abimin > vermin) {
-				/* XXX This should be an error condition */
-				xf86MsgVerb(X_WARNING, 0,
+				if (LoaderOptions & LDR_OPT_ABI_MISMATCH_NONFATAL)
+					errtype = X_WARNING;
+				else
+					errtype = X_ERROR;
+				xf86MsgVerb(errtype, 0,
 					"module ABI minor version (%d) is "
 					"newer than the server's version "
 					"(%d)\n", abimin, vermin);
+				if (!(LoaderOptions & LDR_OPT_ABI_MISMATCH_NONFATAL))
+					return FALSE;
 			}
 		}
 	}
diff --git a/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c b/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c
index 77523bee5..e235b5732 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c
+++ b/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v 1.170 2000/11/06 19:24:08 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v 1.171 2000/11/14 16:54:54 dawes Exp $ */
 
 /*
  *
@@ -915,7 +915,7 @@ LOOKUP xfree86LookupTab[] = {
    SYMFUNC(xf86WriteMmioNB8)
    SYMFUNC(memcpy)
 #endif
-#if defined(sun) || defined(SVR4) && !defined(USL)
+#if defined(sun) && defined(SVR4)
    SYMFUNC(inb)
    SYMFUNC(inw)
    SYMFUNC(inl)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c
index 73ad37281..e25769eda 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c,v 3.14 2000/11/06 19:24:08 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c,v 3.15 2000/11/14 21:59:24 dawes Exp $ */
 /*
  * Copyright 1992 by Rich Murphey <Rich@Rice.edu>
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -143,6 +143,7 @@ void
 xf86OpenConsole()
 {
     int i, fd = -1;
+    int result;
     xf86ConsOpen_t *driver;
 #if defined (SYSCONS_SUPPORT) || defined (PCVT_SUPPORT)
     vtmode_t vtmode;
@@ -243,11 +244,15 @@ xf86OpenConsole()
 	    /*
 	     * now get the VT
 	     */
-	    if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno) != 0)
+	    SYSCALL(result =
+		    ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno));
+	    if (result != 0)
 	    {
     	        xf86Msg(X_WARNING, "xf86OpenConsole: VT_ACTIVATE failed\n");
 	    }
-	    if (ioctl(xf86Info.consoleFd, VT_WAITACTIVE, xf86Info.vtno) != 0)
+	    SYSCALL(result =
+		    ioctl(xf86Info.consoleFd, VT_WAITACTIVE, xf86Info.vtno));
+	    if (result != 0)
 	    {
 	        xf86Msg(X_WARNING, "xf86OpenConsole: VT_WAITACTIVE failed\n");
 	    }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile
index 0740c0c31..6adb8a6e4 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile,v 1.12 2000/08/15 16:05:38 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile,v 1.13 2000/11/14 18:20:37 dawes Exp $
 
 #include <Server.tmpl>
 
@@ -8,11 +8,11 @@ MOUSESRC = hurd_mouse.c
 MOUSEOBJ = hurd_mouse.o
 
 SRCS = hurd_init.c hurd_video.c hurd_io.c libc_wrapper.c $(BIOS_MOD).c \
-       VTsw_noop.c posix_tty.c std_kbdEv.c $(MOUSESRC) \
+       VTsw_noop.c posix_tty.c $(MOUSESRC) \
        stdResource.c stdPci.c sigiostubs.c pm_noop.c kmod_noop.c agp_noop.c
 
 OBJS = hurd_init.o hurd_video.o hurd_io.o libc_wrapper.o $(BIOS_MOD).o \
-       VTsw_noop.o posix_tty.o std_kbdEv.o $(MOUSEOBJ) \
+       VTsw_noop.o posix_tty.o $(MOUSEOBJ) \
        stdResource.o stdPci.o sigiostubs.o pm_noop.o kmod_noop.o agp_noop.o
 
 INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \
@@ -28,7 +28,6 @@ NormalLibraryObjectRule()
 
 LinkSourceFile(VTsw_noop.c,../shared)
 LinkSourceFile(posix_tty.c,../shared)
-LinkSourceFile(std_kbdEv.c,../shared)
 LinkSourceFile(libc_wrapper.c,../shared)
 LinkSourceFile(stdResource.c,../shared)
 LinkSourceFile(stdPci.c,../shared)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c b/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c
index d187eb5a6..85a47f32b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c
@@ -20,7 +20,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c,v 1.6 1999/09/04 13:04:43 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c,v 1.7 2000/11/14 18:20:37 dawes Exp $ */
 
 #define NEED_EVENTS
 #include "X.h"
@@ -117,3 +117,11 @@ xf86KbdOff()
     if( ioctl( xf86Info.consoleFd, _IOW('k', 1, int),&data) < 0)
 	FatalError("can't reset keyboard mode (%s)\n",strerror(errno));
 }
+
+void
+xf86KbdEvents()
+{
+    kd_event ke;
+    while( read(xf86Info.consoleFd, &ke, sizeof(ke)) == sizeof(ke) )
+	xf86PostKbdEvent(ke.value.sc);
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c b/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c
index 3320f147d..6d0b06299 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c
@@ -20,7 +20,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c,v 1.7 2000/02/10 22:33:44 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c,v 1.8 2000/11/14 18:20:37 dawes Exp $ */
 
 #define NEED_EVENTS
 #include "X.h"
@@ -168,7 +168,7 @@ OsMouseReadInput(InputInfoPtr pInfo)
     pBuf = (unsigned char *)eventList;
     n = 0;
     while ((c = XisbRead(pMse->buffer)) >= 0 && n < sizeof(eventList))
-	pBuf[n] = (unsigned char)c;
+	pBuf[n++] = (unsigned char)c;
 
     if (n == 0)
 	return;
@@ -289,7 +289,7 @@ xf86OSMouseInit(int flags)
     p->BuiltinNames = BuiltinNames;
     p->DefaultProtocol = DefaultProtocol;
     p->CheckProtocol = CheckProtocol;
-    p->PreInit = OSMousePreInit;
+    p->PreInit = OsMousePreInit;
     return p;
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c b/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c
index 63f77da24..867b70ac4 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c
@@ -20,7 +20,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c,v 1.3 1999/04/29 12:24:52 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c,v 1.4 2000/11/14 18:20:37 dawes Exp $ */
 
 #include <mach.h>
 #include <device/device.h>
@@ -169,3 +169,9 @@ xf86MapReadSideEffects(int ScreenNum, int Flags, pointer Base,
 {
 }
 
+Bool
+xf86CheckMTRR(int s)
+{
+	return FALSE;
+}
+
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile
index 7a5fea61c..1b24a75a1 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile
@@ -1,15 +1,7 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile,v 1.2 2000/02/23 04:47:24 martin Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile,v 1.3 2000/11/08 05:03:06 dawes Exp $
 
 #include <Server.tmpl>
 
-LinkSourceFile(xf86drm.c,..)
-LinkSourceFile(xf86drmHash.c,..)
-LinkSourceFile(xf86drmRandom.c,..)
-LinkSourceFile(xf86drmSL.c,..)
-LinkSourceFile(xf86drm.h,$(XF86OSSRC))
-LinkSourceFile(xf86_OSproc.h,$(XF86OSSRC))
-LinkSourceFile(sigio.c,$(XF86OSSRC)/shared)
-
 XCOMM This is a kludge until we determine how best to build the
 XCOMM kernel-specific device driver.  This allows us to continue
 XCOMM to maintain the single Makefile.linux with kernel-specific
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel
index 0791af455..b1b8d9768 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel
@@ -1,4 +1,3 @@
-# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel,v 1.8 2000/08/28 02:43:14 tsi Exp $
 #
 # Makefile for the drm device driver.  This driver provides support for
 # the Direct Rendering Infrastructure (DRI) in XFree86 4.x.
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux
index 65430c1ce..adf190059 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux
@@ -24,7 +24,6 @@
 # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 # DEALINGS IN THE SOFTWARE.
 # 
-# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux,v 1.13 2000/10/05 21:59:29 tsi Exp $
 #
 # ***** NOTE NOTE NOTE NOTE NOTE *****
 # To override the automatic Linux source tree determination, pass the
@@ -50,7 +49,6 @@
 
 MODS=           gamma.o tdfx.o r128.o
 LIBS=           libdrm.a
-PROGS=		drmstat
 
 DRMOBJS=	init.o memory.o proc.o auth.o context.o drawable.o bufs.o \
 		lists.o lock.o ioctl.o fops.o vm.o dma.o ctxbitmap.o
@@ -65,9 +63,6 @@ TDFXHEADERS=    tdfx_drv.h $(DRMHEADERS)
 R128OBJS=	r128_drv.o r128_dma.o r128_bufs.o r128_context.o
 R128HEADERS=	r128_drv.h r128_drm.h $(DRMHEADERS)
 
-PROGOBJS=       drmstat.po xf86drm.po xf86drmHash.po xf86drmRandom.po sigio.po
-PROGHEADERS=    xf86drm.h $(DRMHEADERS)
-
 INC=		/usr/include
 
 CFLAGS=		-O2 $(WARNINGS)
@@ -227,9 +222,6 @@ i810.o: $(I810OBJS) $(LIBS)
 	$(LD) -r $^ -o $@
 endif
 
-drmstat: $(PROGOBJS)
-	$(CC) $(PRGCFLAGS) $^ $(PRGLIBS) -o $@
-
 .PHONY: ChangeLog
 ChangeLog:
 	@rm -f Changelog
@@ -243,9 +235,6 @@ ChangeLog:
 %.o: %.c
 	$(CC) $(MODCFLAGS) -I$(TREE) -c $< -o $@
 
-%.po: %.c
-	$(CC) $(PRGCFLAGS) -DDRM_USE_MALLOC -c $< -o $@
-
 $(DRMOBJS): $(DRMHEADERS)
 $(GAMMAOBJS): $(GAMMAHEADERS)
 $(TDFXOBJS): $(TDFXHEADERS)
@@ -254,7 +243,6 @@ ifeq ($(AGP),1)
 $(MGAOBJS): $(MGAHEADERS)
 $(I810OBJS): $(I810HEADERS)
 endif
-$(PROGOBJS): $(PROGHEADERS)
 
 clean:
-	rm -f *.o *.a *.po *~ core $(PROGS)
+	rm -f *.o *.a *~ core
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/README.drm b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/README.drm
index 97dd0d840..6441e01e5 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/README.drm
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/README.drm
@@ -1,5 +1,3 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/README.drm,v 1.4 2000/08/28 02:43:14 tsi Exp $ */
-
 ************************************************************
 * For the very latest on DRI development, please see:      *
 *     http://dri.sourceforge.net/                          *
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/dma.c
index 62340170b..5cc3ec369 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/dma.c
@@ -397,10 +397,10 @@ int drm_dma_enqueue(drm_device_t *dev, drm_dma_t *d)
 
 	atomic_inc(&q->use_count);
 	if (atomic_read(&q->block_write)) {
-		current->state = TASK_INTERRUPTIBLE;
 		add_wait_queue(&q->write_queue, &entry);
 		atomic_inc(&q->block_count);
 		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 			if (!atomic_read(&q->block_write)) break;
 			schedule();
 			if (signal_pending(current)) {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
index 6b4414bdc..57032d6e2 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
@@ -37,8 +37,10 @@
 
 #if defined(__linux__)
 #include <asm/ioctl.h>		/* For _IO* macros */
+#define DRM_IOCTL_NR(n)	     _IOC_NR(n)
 #elif defined(__FreeBSD__)
 #include <sys/ioccom.h>
+#define DRM_IOCTL_NR(n)	     ((n) & 0xff)
 #endif
 
 #define DRM_PROC_DEVICES "/proc/devices"
@@ -294,11 +296,6 @@ typedef struct drm_agp_info {
 } drm_agp_info_t;
 
 #define DRM_IOCTL_BASE	     'd'
-#if defined(__linux__)
-#define DRM_IOCTL_NR(n)	     _IOC_NR(n)
-#elif defined(__FreeBSD__)
-#define DRM_IOCTL_NR(n)	     ((n) & 0xff)
-#endif
 #define DRM_IO(nr)	     _IO(DRM_IOCTL_BASE,nr)
 #define DRM_IOR(nr,size)     _IOR(DRM_IOCTL_BASE,nr,size)
 #define DRM_IOW(nr,size)     _IOW(DRM_IOCTL_BASE,nr,size)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h
index 35a9ae0aa..46e08e057 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h
@@ -161,11 +161,6 @@ typedef struct wait_queue *wait_queue_head_t;
 #define module_exit(x)  void cleanup_module(void) { x(); }
 #endif
 
-				/* virt_to_page added in 2.4.0-test6 */
-#if LINUX_VERSION_CODE < 0x020400
-#define virt_to_page(kaddr) (mem_map + MAP_NR(kaddr))
-#endif
-
 				/* Generic cmpxchg added in 2.3.x */
 #ifndef __HAVE_ARCH_CMPXCHG
 				/* Include this here so that driver can be
@@ -444,6 +439,7 @@ typedef struct drm_file {
 	struct drm_file	  *next;
 	struct drm_file	  *prev;
 	struct drm_device *dev;
+	int 		  remove_auth_on_close;
 } drm_file_t;
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
index 794333877..4ab67281c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
@@ -542,10 +542,9 @@ static int gamma_dma_send_buffers(drm_device_t *dev, drm_dma_t *d)
 	
 	if (d->flags & _DRM_DMA_BLOCK) {
 		DRM_DEBUG("%d waiting\n", current->pid);
-		current->state = TASK_INTERRUPTIBLE;
 		for (;;) {
-			if (!last_buf->waiting
-			    && !last_buf->pending)
+			current->state = TASK_INTERRUPTIBLE;
+			if (!last_buf->waiting && !last_buf->pending)
 				break; /* finished */
 			schedule();
 			if (signal_pending(current)) {
@@ -778,6 +777,7 @@ int gamma_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 		}
 		add_wait_queue(&dev->lock.lock_queue, &entry);
 		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 			if (!dev->lock.hw_lock) {
 				/* Device has been unregistered */
 				ret = -EINTR;
@@ -794,7 +794,6 @@ int gamma_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 			
 				/* Contention */
 			atomic_inc(&dev->total_sleeps);
-			current->state = TASK_INTERRUPTIBLE;
 			schedule();
 			if (signal_pending(current)) {
 				ret = -ERESTARTSYS;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
index e2a866068..26fe0c1c1 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
@@ -252,16 +252,15 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
 	buf = i810_freelist_get(dev);
 	if (!buf) {
 		retcode = -ENOMEM;
-	   	DRM_DEBUG("%s retcode %d\n", __FUNCTION__, retcode);
-		goto out_get_buf;
+	   	DRM_DEBUG("retcode=%d\n", retcode);
+		return retcode;
 	}
    
 	retcode = i810_map_buffer(buf, filp);
 	if(retcode) {
 		i810_freelist_put(dev, buf);
-	   	DRM_DEBUG("mapbuf failed in %s retcode %d\n", 
-			  __FUNCTION__, retcode);
-	   	goto out_get_buf;
+	   	DRM_DEBUG("mapbuf failed, retcode %d\n", retcode);
+		return retcode;
 	}
 	buf->pid     = priv->pid;
 	buf_priv = buf->dev_private;	
@@ -270,7 +269,6 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
    	d->request_size = buf->total;
    	d->virtual = buf_priv->virtual;
 
-out_get_buf:
 	return retcode;
 }
 
@@ -1069,11 +1067,11 @@ static void i810_dma_quiescent(drm_device_t *dev)
 	   	return;
 	}
       	atomic_set(&dev_priv->flush_done, 0);
-   	current->state = TASK_INTERRUPTIBLE;
    	add_wait_queue(&dev_priv->flush_queue, &entry);
    	end = jiffies + (HZ*3);
    
    	for (;;) {
+		current->state = TASK_INTERRUPTIBLE;
 	      	i810_dma_quiescent_emit(dev);
 	   	if (atomic_read(&dev_priv->flush_done) == 1) break;
 		if((signed)(end - jiffies) <= 0) {
@@ -1104,10 +1102,10 @@ static int i810_flush_queue(drm_device_t *dev)
 	   	return 0;
 	}
       	atomic_set(&dev_priv->flush_done, 0);
-   	current->state = TASK_INTERRUPTIBLE;
    	add_wait_queue(&dev_priv->flush_queue, &entry);
    	end = jiffies + (HZ*3);
    	for (;;) {
+		current->state = TASK_INTERRUPTIBLE;
 	      	i810_dma_emit_flush(dev);
 	   	if (atomic_read(&dev_priv->flush_done) == 1) break;
 		if((signed)(end - jiffies) <= 0) {
@@ -1201,6 +1199,7 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 	if (!ret) {
 		add_wait_queue(&dev->lock.lock_queue, &entry);
 		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 			if (!dev->lock.hw_lock) {
 				/* Device has been unregistered */
 				ret = -EINTR;
@@ -1216,7 +1215,6 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 			
 				/* Contention */
 			atomic_inc(&dev->total_sleeps);
-			current->state = TASK_INTERRUPTIBLE;
 		   	DRM_DEBUG("Calling lock schedule\n");
 			schedule();
 			if (signal_pending(current)) {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c
index 86d5e2302..ed880c41a 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c
@@ -35,7 +35,7 @@
 
 #define I810_NAME	 "i810"
 #define I810_DESC	 "Intel I810"
-#define I810_DATE	 "20000910"
+#define I810_DATE	 "20000928"
 #define I810_MAJOR	 1
 #define I810_MINOR	 1
 #define I810_PATCHLEVEL	 0
@@ -508,6 +508,7 @@ int i810_release(struct inode *inode, struct file *filp)
 	   	DECLARE_WAITQUEUE(entry, current);
 	   	add_wait_queue(&dev->lock.lock_queue, &entry);
 		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 			if (!dev->lock.hw_lock) {
 				/* Device has been unregistered */
 				retcode = -EINTR;
@@ -522,7 +523,6 @@ int i810_release(struct inode *inode, struct file *filp)
 			}
 				/* Contention */
 			atomic_inc(&dev->total_sleeps);
-			current->state = TASK_INTERRUPTIBLE;
 			schedule();
 			if (signal_pending(current)) {
 				retcode = -ERESTARTSYS;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/lists.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/lists.c
index 5da7cc6c5..60e66b8fb 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/lists.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/lists.c
@@ -34,7 +34,6 @@
 
 int drm_waitlist_create(drm_waitlist_t *bl, int count)
 {
-	DRM_DEBUG("%d\n", count);
 	if (bl->count) return -EINVAL;
 	
 	bl->count      = count;
@@ -50,7 +49,6 @@ int drm_waitlist_create(drm_waitlist_t *bl, int count)
 
 int drm_waitlist_destroy(drm_waitlist_t *bl)
 {
-	DRM_DEBUG("\n");
 	if (bl->rp != bl->wp) return -EINVAL;
 	if (bl->bufs) drm_free(bl->bufs,
 			       (bl->count + 2) * sizeof(*bl->bufs),
@@ -69,8 +67,6 @@ int drm_waitlist_put(drm_waitlist_t *bl, drm_buf_t *buf)
 	unsigned long flags;
 
 	left = DRM_LEFTCOUNT(bl);
-	DRM_DEBUG("put %d (%d left, rp = %p, wp = %p)\n",
-		  buf->idx, left, bl->rp, bl->wp);
 	if (!left) {
 		DRM_ERROR("Overflow while adding buffer %d from pid %d\n",
 			  buf->idx, buf->pid);
@@ -103,13 +99,11 @@ drm_buf_t *drm_waitlist_get(drm_waitlist_t *bl)
 	if (++bl->rp >= bl->end) bl->rp = bl->bufs;
 	spin_unlock_irqrestore(&bl->read_lock, flags);
 	
-	DRM_DEBUG("get %d\n", buf->idx);
 	return buf;
 }
 
 int drm_freelist_create(drm_freelist_t *bl, int count)
 {
-	DRM_DEBUG("\n");
 	atomic_set(&bl->count, 0);
 	bl->next      = NULL;
 	init_waitqueue_head(&bl->waiting);
@@ -123,7 +117,6 @@ int drm_freelist_create(drm_freelist_t *bl, int count)
 
 int drm_freelist_destroy(drm_freelist_t *bl)
 {
-	DRM_DEBUG("\n");
 	atomic_set(&bl->count, 0);
 	bl->next = NULL;
 	return 0;
@@ -142,9 +135,6 @@ int drm_freelist_put(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf)
 		DRM_ERROR("Freed buffer %d: w%d, p%d, l%d\n",
 			  buf->idx, buf->waiting, buf->pending, buf->list);
 	}
-	DRM_DEBUG("%d, count = %d, wfh = %d, w%d, p%d\n",
-		  buf->idx, atomic_read(&bl->count), atomic_read(&bl->wfh),
-		  buf->waiting, buf->pending);
 	if (!bl) return 1;
 #if DRM_DMA_HISTOGRAM
 	buf->time_freed = get_cycles();
@@ -190,9 +180,6 @@ static drm_buf_t *drm_freelist_try(drm_freelist_t *bl)
 	atomic_dec(&bl->count);
 	buf->next = NULL;
 	buf->list = DRM_LIST_NONE;
-	DRM_DEBUG("%d, count = %d, wfh = %d, w%d, p%d\n",
-		  buf->idx, atomic_read(&bl->count), atomic_read(&bl->wfh),
-		  buf->waiting, buf->pending);
 	if (buf->waiting || buf->pending) {
 		DRM_ERROR("Free buffer %d: w%d, p%d, l%d\n",
 			  buf->idx, buf->waiting, buf->pending, buf->list);
@@ -212,13 +199,10 @@ drm_buf_t *drm_freelist_get(drm_freelist_t *bl, int block)
 	if (atomic_read(&bl->count) <= bl->low_mark) /* Became low */
 		atomic_set(&bl->wfh, 1);
 	if (atomic_read(&bl->wfh)) {
-		DRM_DEBUG("Block = %d, count = %d, wfh = %d\n",
-			  block, atomic_read(&bl->count),
-			  atomic_read(&bl->wfh));
 		if (block) {
 			add_wait_queue(&bl->waiting, &entry);
-			current->state = TASK_INTERRUPTIBLE;
 			for (;;) {
+				current->state = TASK_INTERRUPTIBLE;
 				if (!atomic_read(&bl->wfh)
 				    && (buf = drm_freelist_try(bl))) break;
 				schedule();
@@ -230,7 +214,5 @@ drm_buf_t *drm_freelist_get(drm_freelist_t *bl, int block)
 		return buf;
 	}
 		
-	DRM_DEBUG("Count = %d, wfh = %d\n",
-		  atomic_read(&bl->count), atomic_read(&bl->wfh));
 	return drm_freelist_try(bl);
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/lock.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/lock.c
index e5fd435fb..90d2f1300 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/lock.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/lock.c
@@ -50,7 +50,6 @@ int drm_lock_take(__volatile__ unsigned int *lock, unsigned int context)
 {
 	unsigned int old, new, prev;
 
-	DRM_DEBUG("%d attempts\n", context);
 	do {
 		old = *lock;
 		if (old & _DRM_LOCK_HELD) new = old | _DRM_LOCK_CONT;
@@ -68,11 +67,8 @@ int drm_lock_take(__volatile__ unsigned int *lock, unsigned int context)
 	}
 	if (new == (context | _DRM_LOCK_HELD)) {
 				/* Have lock */
-		DRM_DEBUG("%d\n", context);
 		return 1;
 	}
-	DRM_DEBUG("%d unable to get lock held by %d\n",
-		  context, _DRM_LOCKING_CONTEXT(old));
 	return 0;
 }
 
@@ -89,7 +85,6 @@ int drm_lock_transfer(drm_device_t *dev,
 		new  = context | _DRM_LOCK_HELD;
 		prev = cmpxchg(lock, old, new);
 	} while (prev != old);
-	DRM_DEBUG("%d => %d\n", _DRM_LOCKING_CONTEXT(old), context);
 	return 1;
 }
 
@@ -99,7 +94,6 @@ int drm_lock_free(drm_device_t *dev,
 	unsigned int old, new, prev;
 	pid_t        pid = dev->lock.pid;
 
-	DRM_DEBUG("%d\n", context);
 	dev->lock.pid = 0;
 	do {
 		old  = *lock;
@@ -128,10 +122,10 @@ static int drm_flush_queue(drm_device_t *dev, int context)
 	atomic_inc(&q->use_count);
 	if (atomic_read(&q->use_count) > 1) {
 		atomic_inc(&q->block_write);
-		current->state = TASK_INTERRUPTIBLE;
 		add_wait_queue(&q->flush_queue, &entry);
 		atomic_inc(&q->block_count);
 		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 			if (!DRM_BUFCOUNT(&q->waitlist)) break;
 			schedule();
 			if (signal_pending(current)) {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_bufs.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_bufs.c
index 3ec28a765..00c0ea7f9 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_bufs.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_bufs.c
@@ -66,7 +66,7 @@ int mga_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
 	order = drm_order(request.size);
 	size	= 1 << order;
 	agp_offset = request.agp_start;
-	alignment  = (request.flags & _DRM_PAGE_ALIGN) ? PAGE_ALIGN(size) :size;
+	alignment  = (request.flags & _DRM_PAGE_ALIGN) ? PAGE_ALIGN(size):size;
 	page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
 	total = PAGE_SIZE << page_order;
 	byte_count = 0;
@@ -119,8 +119,6 @@ int mga_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
 		buf->order = order;
 		buf->used = 0;
 
-		DRM_DEBUG("offset : %ld\n", offset);
-
 		buf->offset = offset; /* Hrm */
 		buf->bus_address = dev->agp->base + agp_offset + offset;
 		buf->address = (void *)(agp_offset + offset + dev->agp->base);
@@ -130,7 +128,8 @@ int mga_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
 		init_waitqueue_head(&buf->dma_wait);
 		buf->pid = 0;
 
-		buf->dev_private = drm_alloc(sizeof(drm_mga_buf_priv_t), DRM_MEM_BUFS);
+		buf->dev_private = drm_alloc(sizeof(drm_mga_buf_priv_t),
+					     DRM_MEM_BUFS);
 		buf->dev_priv_size = sizeof(drm_mga_buf_priv_t);
 
 #if DRM_DMA_HISTOGRAM
@@ -142,9 +141,6 @@ int mga_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
 		offset = offset + alignment;
 		entry->buf_count++;
 		byte_count += PAGE_SIZE << page_order;
-      
-		DRM_DEBUG("buffer %d @ %p\n",
-			  entry->buf_count, buf->address);
 	}
    
 	dma->buflist = drm_realloc(dma->buflist,
@@ -234,7 +230,7 @@ int mga_addbufs_pci(struct inode *inode, struct file *filp, unsigned int cmd,
 	if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER) return -EINVAL;
 	if (dev->queue_count) return -EBUSY; /* Not while in use */
 
-	alignment  = (request.flags & _DRM_PAGE_ALIGN) ? PAGE_ALIGN(size) :size;
+	alignment  = (request.flags & _DRM_PAGE_ALIGN) ? PAGE_ALIGN(size):size;
 	page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
 	total	   = PAGE_SIZE << page_order;
 
@@ -402,8 +398,6 @@ int mga_infobufs(struct inode *inode, struct file *filp, unsigned int cmd,
 		if (dma->bufs[i].buf_count) ++count;
 	}
 	
-	DRM_DEBUG("count = %d\n", count);
-	
 	if (request.count >= count) {
 		for (i = 0, count = 0; i < DRM_MAX_ORDER+1; i++) {
 			if (dma->bufs[i].buf_count) {
@@ -427,12 +421,6 @@ int mga_infobufs(struct inode *inode, struct file *filp, unsigned int cmd,
 							.freelist.high_mark)))
 					return -EFAULT;
 
-				DRM_DEBUG("%d %d %d %d %d\n",
-					  i,
-					  dma->bufs[i].buf_count,
-					  dma->bufs[i].buf_size,
-					  dma->bufs[i].freelist.low_mark,
-					  dma->bufs[i].freelist.high_mark);
 				++count;
 			}
 		}
@@ -459,13 +447,9 @@ int mga_markbufs(struct inode *inode, struct file *filp, unsigned int cmd,
 
 	if (!dma) return -EINVAL;
 
-	if (copy_from_user(&request,
-			   (drm_buf_desc_t *)arg,
-			   sizeof(request)))
+	if (copy_from_user(&request, (drm_buf_desc_t *)arg, sizeof(request)))
 		return -EFAULT;
 
-	DRM_DEBUG("%d, %d, %d\n",
-		  request.size, request.low_mark, request.high_mark);
 	order = drm_order(request.size);
 	if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER) return -EINVAL;
 	entry = &dma->bufs[order];
@@ -499,7 +483,6 @@ int mga_freebufs(struct inode *inode, struct file *filp, unsigned int cmd,
 			   sizeof(request)))
 		return -EFAULT;
 
-	DRM_DEBUG("%d\n", request.count);
 	for (i = 0; i < request.count; i++) {
 		if (copy_from_user(&idx,
 				   &request.list[i],
@@ -537,12 +520,9 @@ int mga_mapbufs(struct inode *inode, struct file *filp, unsigned int cmd,
 
 	if (!dma) return -EINVAL;
 	
-	DRM_DEBUG("\n");
-
 	spin_lock(&dev->count_lock);
 	if (atomic_read(&dev->buf_alloc)) {
 		spin_unlock(&dev->count_lock);
-		DRM_DEBUG("Busy\n");
 		return -EBUSY;
 	}
 	++dev->buf_use;		/* Can't allocate more after this call */
@@ -553,9 +533,6 @@ int mga_mapbufs(struct inode *inode, struct file *filp, unsigned int cmd,
 			   sizeof(request)))
 		return -EFAULT;
 
-	DRM_DEBUG("mga_mapbufs\n");
-   	DRM_DEBUG("dma->flags : %x\n", dma->flags);
-   
 	if (request.count >= dma->buf_count) {
 		if(dma->flags & _DRM_DMA_USE_AGP) {
 			drm_mga_private_t *dev_priv = dev->dev_private;
@@ -563,7 +540,6 @@ int mga_mapbufs(struct inode *inode, struct file *filp, unsigned int cmd,
 	 
 			map = dev->maplist[dev_priv->buffer_map_idx];
 			if (!map) {
-				DRM_DEBUG("map is null\n");
 				retcode = -EINVAL;
 				goto done;
 			}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_context.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_context.c
index 43733c140..b26c7c98e 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_context.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_context.c
@@ -35,9 +35,7 @@
 
 static int mga_alloc_queue(drm_device_t *dev)
 {
-   	int temp = drm_ctxbitmap_next(dev);
-   	DRM_DEBUG("mga_alloc_queue: %d\n", temp);
-	return temp;
+   	return drm_ctxbitmap_next(dev);
 }
 
 int mga_context_switch(drm_device_t *dev, int old, int new)
@@ -102,7 +100,6 @@ int mga_resctx(struct inode *inode, struct file *filp, unsigned int cmd,
 	drm_ctx_t	ctx;
 	int		i;
 
-	DRM_DEBUG("%d\n", DRM_RESERVED_CONTEXTS);
 	if (copy_from_user(&res, (drm_ctx_res_t *)arg, sizeof(res)))
 		return -EFAULT;
 	if (res.count >= DRM_RESERVED_CONTEXTS) {
@@ -135,8 +132,6 @@ int mga_addctx(struct inode *inode, struct file *filp, unsigned int cmd,
 		ctx.handle = mga_alloc_queue(dev);
 	}
         if (ctx.handle == -1) {
-		DRM_DEBUG("Not enough free contexts.\n");
-				/* Should this return -EBUSY instead? */
 		return -ENOMEM;
 	}
 	DRM_DEBUG("%d\n", ctx.handle);
@@ -204,6 +199,8 @@ int mga_rmctx(struct inode *inode, struct file *filp, unsigned int cmd,
 	if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
 		return -EFAULT;
 	DRM_DEBUG("%d\n", ctx.handle);
+	if(ctx.handle == DRM_KERNEL_CONTEXT+1) priv->remove_auth_on_close = 1;
+
       	if(ctx.handle != DRM_KERNEL_CONTEXT) {
 	   	drm_ctxbitmap_free(dev, ctx.handle);
 	}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c
index 4daa03acb..6adffb8a9 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c
@@ -52,34 +52,28 @@ static unsigned long mga_alloc_page(drm_device_t *dev)
 {
 	unsigned long address;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
 	address = __get_free_page(GFP_KERNEL);
 	if(address == 0UL) {
 		return 0;
 	}
 	atomic_inc(&virt_to_page(address)->count);
-	set_bit(PG_locked, &virt_to_page(address)->flags);
+	set_bit(PG_reserved, &virt_to_page(address)->flags);
 
 	return address;
 }
 
 static void mga_free_page(drm_device_t *dev, unsigned long page)
 {
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
-	if(page == 0UL) {
-		return;
-	}
+	if(!page) return;
 	atomic_dec(&virt_to_page(page)->count);
-	clear_bit(PG_locked, &virt_to_page(page)->flags);
-	wake_up(&virt_to_page(page)->wait);
+	clear_bit(PG_reserved, &virt_to_page(page)->flags);
 	free_page(page);
 	return;
 }
 
 static void mga_delay(void)
 {
-   	return;
+	return;
 }
 
 /* These are two age tags that will never be sent to
@@ -96,8 +90,6 @@ static int mga_freelist_init(drm_device_t *dev)
    	drm_mga_freelist_t *item;
    	int i;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
    	dev_priv->head = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
 	if(dev_priv->head == NULL) return -ENOMEM;
    	memset(dev_priv->head, 0, sizeof(drm_mga_freelist_t));
@@ -132,8 +124,6 @@ static void mga_freelist_cleanup(drm_device_t *dev)
    	drm_mga_freelist_t *item;
    	drm_mga_freelist_t *prev;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
    	item = dev_priv->head;
    	while(item) {
 	   	prev = item;
@@ -153,7 +143,7 @@ static inline void mga_dma_quiescent(drm_device_t *dev)
    	unsigned long end;
 	int i;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
+	DRM_DEBUG("dispatch_status = 0x%02x\n", dev_priv->dispatch_status);
 	end = jiffies + (HZ*3);
     	while(1) {
 		if(!test_and_set_bit(MGA_IN_DISPATCH,
@@ -164,8 +154,10 @@ static inline void mga_dma_quiescent(drm_device_t *dev)
 			DRM_ERROR("irqs: %d wanted %d\n",
 				  atomic_read(&dev->total_irq),
 				  atomic_read(&dma->total_lost));
-			DRM_ERROR("lockup\n");
-			goto out_nolock;
+			DRM_ERROR("lockup: dispatch_status = 0x%02x,"
+				  " jiffies = %lu, end = %lu\n",
+				  dev_priv->dispatch_status, jiffies, end);
+			return;
 		}
 		for (i = 0 ; i < 2000 ; i++) mga_delay();
 	}
@@ -177,15 +169,16 @@ static inline void mga_dma_quiescent(drm_device_t *dev)
 				  atomic_read(&dev->total_irq),
 				  atomic_read(&dma->total_lost));
 			DRM_ERROR("lockup\n");
-			goto out_status;
+			clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
+			return;
 		}
 		for (i = 0 ; i < 2000 ; i++) mga_delay();
 	}
     	sarea_priv->dirty |= MGA_DMA_FLUSH;
 
-out_status:
     	clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
-out_nolock:
+	DRM_DEBUG("exit, dispatch_status = 0x%02x\n",
+		  dev_priv->dispatch_status);
 }
 
 static void mga_reset_freelist(drm_device_t *dev)
@@ -216,29 +209,26 @@ drm_buf_t *mga_freelist_get(drm_device_t *dev)
 	static int failed = 0;
 	int return_null = 0;
 
-	DRM_DEBUG("%s : tail->age : %d last_prim_age : %d\n", __FUNCTION__,
-	       dev_priv->tail->age, dev_priv->last_prim_age);
-
 	if(failed >= 1000 && dev_priv->tail->age >= dev_priv->last_prim_age) {
-		DRM_DEBUG("I'm waiting on the freelist!!! %d\n",
-		       dev_priv->last_prim_age);
-	   	set_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
+		DRM_DEBUG("Waiting on freelist,"
+			  " tail->age = %d, last_prim_age= %d\n",
+			  dev_priv->tail->age,
+			  dev_priv->last_prim_age);
 	   	add_wait_queue(&dev_priv->buf_queue, &entry);
+		set_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
 	   	for (;;) {
-		   	mga_dma_schedule(dev, 0);
 			current->state = TASK_INTERRUPTIBLE;
-		   	if(!test_bit(MGA_IN_GETBUF,
-				     &dev_priv->dispatch_status))
+		   	mga_dma_schedule(dev, 0);
+			if(dev_priv->tail->age < dev_priv->last_prim_age)
 				break;
 		   	atomic_inc(&dev->total_sleeps);
 		   	schedule();
 		   	if (signal_pending(current)) {
 				++return_null;
-				clear_bit(MGA_IN_GETBUF,
-					  &dev_priv->dispatch_status);
 				break;
 			}
 		}
+		clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
 		current->state = TASK_RUNNING;
 	   	remove_wait_queue(&dev_priv->buf_queue, &entry);
 		if (return_null) return NULL;
@@ -254,6 +244,7 @@ drm_buf_t *mga_freelist_get(drm_device_t *dev)
 		failed = 0;
 	   	return next->buf;
 	}
+
 	failed++;
    	return NULL;
 }
@@ -267,8 +258,6 @@ int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf)
    	drm_mga_freelist_t *head;
    	drm_mga_freelist_t *next;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
    	if(buf_priv->my_freelist->age == MGA_BUF_USED) {
 		/* Discarded buffer, put it on the tail */
 		next = buf_priv->my_freelist;
@@ -278,7 +267,6 @@ int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf)
 		next->prev = prev;
 		next->next = NULL;
 		dev_priv->tail = next;
-		DRM_DEBUG("Discarded\n");
 	} else {
 		/* Normally aged buffer, put it on the head + 1,
 		 * as the real head is a sentinal element
@@ -302,7 +290,6 @@ static int mga_init_primary_bufs(drm_device_t *dev, drm_mga_init_t *init)
    	int i, temp, size_of_buf;
    	int offset = init->reserved_map_agpstart;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
    	dev_priv->primary_size = ((init->primary_size + PAGE_SIZE - 1) /
 				  PAGE_SIZE) * PAGE_SIZE;
    	size_of_buf = dev_priv->primary_size / MGA_NUM_PRIM_BUFS;
@@ -323,7 +310,7 @@ static int mga_init_primary_bufs(drm_device_t *dev, drm_mga_init_t *init)
 	dev_priv->ioremap = drm_ioremap(dev->agp->base + offset,
 					temp);
 	if(dev_priv->ioremap == NULL) {
-		DRM_DEBUG("Ioremap failed\n");
+		DRM_ERROR("Ioremap failed\n");
 		return -ENOMEM;
 	}
    	init_waitqueue_head(&dev_priv->wait_queue);
@@ -370,7 +357,6 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
    	int next_idx;
        	PRIMLOCALS;
 
-   	DRM_DEBUG("%s\n", __FUNCTION__);
    	dev_priv->last_prim = prim;
 
  	/* We never check for overflow, b/c there is always room */
@@ -387,14 +373,12 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
 
 	end = jiffies + (HZ*3);
     	if(sarea_priv->dirty & MGA_DMA_FLUSH) {
-		DRM_DEBUG("Dma top flush\n");
 		while((MGA_READ(MGAREG_STATUS) & 0x00030001) != 0x00020000) {
 			if((signed)(end - jiffies) <= 0) {
 				DRM_ERROR("irqs: %d wanted %d\n",
 					  atomic_read(&dev->total_irq),
 					  atomic_read(&dma->total_lost));
-				DRM_ERROR("lockup in fire primary "
-					  "(Dma Top Flush)\n");
+				DRM_ERROR("lockup (flush)\n");
 				goto out_prim_wait;
 			}
 
@@ -402,14 +386,12 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
 		}
 		sarea_priv->dirty &= ~(MGA_DMA_FLUSH);
 	} else {
-		DRM_DEBUG("Status wait\n");
 		while((MGA_READ(MGAREG_STATUS) & 0x00020001) != 0x00020000) {
 			if((signed)(end - jiffies) <= 0) {
 				DRM_ERROR("irqs: %d wanted %d\n",
 					  atomic_read(&dev->total_irq),
 					  atomic_read(&dma->total_lost));
-				DRM_ERROR("lockup in fire primary "
-					  "(Status Wait)\n");
+				DRM_ERROR("lockup (wait)\n");
 				goto out_prim_wait;
 			}
 
@@ -452,7 +434,6 @@ int mga_advance_primary(drm_device_t *dev)
    	/* This needs to reset the primary buffer if available,
 	 * we should collect stats on how many times it bites
 	 * it's tail */
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
    	next_prim_idx = dev_priv->current_prim_idx + 1;
    	if(next_prim_idx >= MGA_NUM_PRIM_BUFS)
@@ -464,9 +445,8 @@ int mga_advance_primary(drm_device_t *dev)
 
    	if(test_and_set_bit(MGA_BUF_IN_USE, &prim_buffer->buffer_status)) {
 	   	add_wait_queue(&dev_priv->wait_queue, &entry);
-		current->state = TASK_INTERRUPTIBLE;
-
 	   	for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 		   	mga_dma_schedule(dev, 0);
 		   	if(!test_and_set_bit(MGA_BUF_IN_USE,
 					     &prim_buffer->buffer_status))
@@ -479,7 +459,7 @@ int mga_advance_primary(drm_device_t *dev)
 			   	break;
 			}
 		}
-	   	current->state = TASK_RUNNING;
+		current->state = TASK_RUNNING;
 	   	remove_wait_queue(&dev_priv->wait_queue, &entry);
 	   	if(ret) return ret;
 	}
@@ -491,10 +471,10 @@ int mga_advance_primary(drm_device_t *dev)
    	prim_buffer->sec_used = 0;
 	prim_buffer->prim_age = dev_priv->next_prim_age++;
 	if(prim_buffer->prim_age == 0 || prim_buffer->prim_age == 0xffffffff) {
-	   mga_flush_queue(dev);
-	   mga_dma_quiescent(dev);
-	   mga_reset_freelist(dev);
-	   prim_buffer->prim_age = (dev_priv->next_prim_age += 2);
+		mga_flush_queue(dev);
+		mga_dma_quiescent(dev);
+		mga_reset_freelist(dev);
+		prim_buffer->prim_age = (dev_priv->next_prim_age += 2);
 	}
 
 	/* Reset all buffer status stuff */
@@ -511,67 +491,55 @@ int mga_advance_primary(drm_device_t *dev)
 static inline int mga_decide_to_fire(drm_device_t *dev)
 {
    	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
-      	drm_device_dma_t  *dma	    = dev->dma;
-
-   	DRM_DEBUG("%s\n", __FUNCTION__);
 
    	if(test_bit(MGA_BUF_FORCE_FIRE, &dev_priv->next_prim->buffer_status)) {
-	   	atomic_inc(&dma->total_prio);
 	   	return 1;
 	}
 
 	if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
 	    dev_priv->next_prim->num_dwords) {
-	   	atomic_inc(&dma->total_prio);
 	   	return 1;
 	}
 
 	if (test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
 	    dev_priv->next_prim->num_dwords) {
-	   	atomic_inc(&dma->total_prio);
 	   	return 1;
 	}
 
    	if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS - 1) {
 		if(test_bit(MGA_BUF_SWAP_PENDING,
 			    &dev_priv->next_prim->buffer_status)) {
-			atomic_inc(&dma->total_dmas);
 			return 1;
 		}
 	}
 
    	if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS / 2) {
 		if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 8) {
-			atomic_inc(&dma->total_hit);
 			return 1;
 		}
 	}
 
    	if(atomic_read(&dev_priv->pending_bufs) >= MGA_NUM_PRIM_BUFS / 2) {
 		if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 4) {
-			atomic_inc(&dma->total_missed_free);
 			return 1;
 		}
 	}
 
-   	atomic_inc(&dma->total_tried);
    	return 0;
 }
 
 int mga_dma_schedule(drm_device_t *dev, int locked)
 {
       	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
-      	drm_device_dma_t  *dma	    = dev->dma;
-	int retval = 0;
+	int               retval    = 0;
 
-   	if (test_and_set_bit(0, &dev->dma_flag)) {
-		atomic_inc(&dma->total_missed_dma);
+   	if (!dev_priv) return -EBUSY;
+	
+	if (test_and_set_bit(0, &dev->dma_flag)) {
 		retval = -EBUSY;
 		goto sch_out_wakeup;
 	}
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
    	if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) ||
 	   test_bit(MGA_IN_WAIT, &dev_priv->dispatch_status) ||
 	   test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)) {
@@ -580,18 +548,14 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
 
    	if (!locked &&
 	    !drm_lock_take(&dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) {
-	   	atomic_inc(&dma->total_missed_lock);
 	   	clear_bit(0, &dev->dma_flag);
-		DRM_DEBUG("Not locked\n");
 		retval = -EBUSY;
 		goto sch_out_wakeup;
 	}
-   	DRM_DEBUG("I'm locked\n");
 
    	if(!test_and_set_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status)) {
 	   	/* Fire dma buffer */
 	   	if(mga_decide_to_fire(dev)) {
-		   	DRM_DEBUG("idx :%d\n", dev_priv->next_prim->idx);
 			clear_bit(MGA_BUF_FORCE_FIRE,
 				  &dev_priv->next_prim->buffer_status);
 		   	if(dev_priv->current_prim == dev_priv->next_prim) {
@@ -603,8 +567,6 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
 		} else {
 			clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
 		}
-	} else {
-		DRM_DEBUG("I can't get the dispatch lock\n");
 	}
 
 	if (!locked) {
@@ -614,6 +576,8 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
 		}
 	}
 
+	clear_bit(0, &dev->dma_flag);
+
 sch_out_wakeup:
       	if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
 	   atomic_read(&dev_priv->pending_bufs) == 0) {
@@ -622,18 +586,10 @@ sch_out_wakeup:
 		wake_up_interruptible(&dev_priv->flush_queue);
 	}
 
-	if(test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
-	   dev_priv->tail->age < dev_priv->last_prim_age) {
-		clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
-		DRM_DEBUG("Waking up buf queue\n");
+	if(test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)
+	   && dev_priv->tail->age < dev_priv->last_prim_age)
 		wake_up_interruptible(&dev_priv->buf_queue);
-	} else if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)) {
-	   	DRM_DEBUG("Not waking buf_queue on %d %d\n",
-			  atomic_read(&dev->total_irq),
-			  dev_priv->last_prim_age);
-	}
 
-   	clear_bit(0, &dev->dma_flag);
 	return retval;
 }
 
@@ -643,7 +599,6 @@ static void mga_dma_service(int irq, void *device, struct pt_regs *regs)
     	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
     	drm_mga_prim_buf_t *last_prim_buffer;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
     	atomic_inc(&dev->total_irq);
 	if((MGA_READ(MGAREG_STATUS) & 0x00000001) != 0x00000001) return;
       	MGA_WRITE(MGAREG_ICLEAR, 0x00000001);
@@ -653,28 +608,28 @@ static void mga_dma_service(int irq, void *device, struct pt_regs *regs)
 	dev_priv->sarea_priv->last_dispatch =
 		dev_priv->last_prim_age = last_prim_buffer->prim_age;
       	clear_bit(MGA_BUF_IN_USE, &last_prim_buffer->buffer_status);
-   	wake_up_interruptible(&dev_priv->wait_queue);
       	clear_bit(MGA_BUF_SWAP_PENDING, &last_prim_buffer->buffer_status);
       	clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
       	atomic_dec(&dev_priv->pending_bufs);
    	queue_task(&dev->tq, &tq_immediate);
    	mark_bh(IMMEDIATE_BH);
+   	wake_up_interruptible(&dev_priv->wait_queue);
 }
 
 static void mga_dma_task_queue(void *device)
 {
-	DRM_DEBUG("%s\n", __FUNCTION__);
 	mga_dma_schedule((drm_device_t *)device, 0);
 }
 
 int mga_dma_cleanup(drm_device_t *dev)
 {
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if(dev->dev_private) {
 		drm_mga_private_t *dev_priv =
 			(drm_mga_private_t *) dev->dev_private;
 
+		if (dev->irq) mga_flush_queue(dev);
+		mga_dma_quiescent(dev);
+
 		if(dev_priv->ioremap) {
 			int temp = (dev_priv->warp_ucode_size +
 				    dev_priv->primary_size +
@@ -717,9 +672,6 @@ int mga_dma_cleanup(drm_device_t *dev)
 static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
 	drm_mga_private_t *dev_priv;
 	drm_map_t *sarea_map = NULL;
-	int i;
-
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER);
 	if(dev_priv == NULL) return -ENOMEM;
@@ -730,7 +682,6 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
 	if((init->reserved_map_idx >= dev->map_count) ||
 	   (init->buffer_map_idx >= dev->map_count)) {
 		mga_dma_cleanup(dev);
-		DRM_DEBUG("reserved_map or buffer_map are invalid\n");
 		return -EINVAL;
 	}
 
@@ -758,7 +709,7 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
 	dev_priv->WarpPipe = 0xff000000;
 	dev_priv->vertexsize = 0;
 
-   	DRM_DEBUG("chipset: %d ucode_size: %d backOffset: %x depthOffset: %x\n",
+   	DRM_DEBUG("chipset=%d ucode_size=%d backOffset=%x depthOffset=%x\n",
 		  dev_priv->chipset, dev_priv->warp_ucode_size,
 		  dev_priv->backOffset, dev_priv->depthOffset);
    	DRM_DEBUG("cpp: %d sgram: %d stride: %d maccess: %x\n",
@@ -768,13 +719,6 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
 	memcpy(&dev_priv->WarpIndex, &init->WarpIndex,
 	       sizeof(drm_mga_warp_index_t) * MGA_MAX_WARP_PIPES);
 
-   	for (i = 0 ; i < MGA_MAX_WARP_PIPES ; i++)
-		DRM_DEBUG("warp pipe %d: installed: %d phys: %lx size: %x\n",
-			  i,
-			  dev_priv->WarpIndex[i].installed,
-			  dev_priv->WarpIndex[i].phys_addr,
-			  dev_priv->WarpIndex[i].size);
-
    	if(mga_init_primary_bufs(dev, init) != 0) {
 		DRM_ERROR("Can not initialize primary buffers\n");
 		mga_dma_cleanup(dev);
@@ -839,8 +783,6 @@ int mga_dma_init(struct inode *inode, struct file *filp,
 	drm_device_t *dev = priv->dev;
 	drm_mga_init_t init;
 
-   	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if (copy_from_user(&init, (drm_mga_init_t *)arg, sizeof(init)))
 		return -EFAULT;
 
@@ -927,8 +869,6 @@ int mga_control(struct inode *inode, struct file *filp, unsigned int cmd,
 	if (copy_from_user(&ctl, (drm_control_t *)arg, sizeof(ctl)))
 		return -EFAULT;
 
-   	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	switch (ctl.func) {
 	case DRM_INST_HANDLER:
 		return mga_irq_install(dev, ctl.irq);
@@ -945,18 +885,16 @@ static int mga_flush_queue(drm_device_t *dev)
   	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
    	int ret = 0;
 
-   	DRM_DEBUG("%s\n", __FUNCTION__);
-
-   	if(dev_priv == NULL) {
-	   	return 0;
-	}
+   	if(!dev_priv) return 0;
 
    	if(dev_priv->next_prim->num_dwords != 0) {
-   		current->state = TASK_INTERRUPTIBLE;
    		add_wait_queue(&dev_priv->flush_queue, &entry);
+		if (test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status)) 
+			DRM_ERROR("Incorrect mga_flush_queue logic\n");
 		set_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status);
 		mga_dma_schedule(dev, 0);
    		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 	   		if (!test_bit(MGA_IN_FLUSH,
 				      &dev_priv->dispatch_status))
 				break;
@@ -969,7 +907,7 @@ static int mga_flush_queue(drm_device_t *dev)
 		   		break;
 			}
 		}
-   		current->state = TASK_RUNNING;
+		current->state = TASK_RUNNING;
    		remove_wait_queue(&dev_priv->flush_queue, &entry);
 	}
    	return ret;
@@ -985,7 +923,8 @@ void mga_reclaim_buffers(drm_device_t *dev, pid_t pid)
       	if(dev->dev_private == NULL) return;
 	if(dma->buflist == NULL) return;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
+	DRM_DEBUG("buf_count=%d\n", dma->buf_count);
+	
         mga_flush_queue(dev);
 
 	for (i = 0; i < dma->buf_count; i++) {
@@ -1011,7 +950,6 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 	int		  ret	= 0;
 	drm_lock_t	  lock;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
 	if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
 		return -EFAULT;
 
@@ -1021,13 +959,7 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 		return -EINVAL;
 	}
 
-   	DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
-	       lock.context, current->pid, dev->lock.hw_lock->lock,
-	       lock.flags);
-
-	if (lock.context < 0) {
-		return -EINVAL;
-	}
+	if (lock.context < 0) return -EINVAL;
 
 	/* Only one queue:
 	 */
@@ -1035,6 +967,7 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 	if (!ret) {
 		add_wait_queue(&dev->lock.lock_queue, &entry);
 		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 			if (!dev->lock.hw_lock) {
 				/* Device has been unregistered */
 				ret = -EINTR;
@@ -1050,7 +983,6 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 
 				/* Contention */
 			atomic_inc(&dev->total_sleeps);
-			current->state = TASK_INTERRUPTIBLE;
 			schedule();
 			if (signal_pending(current)) {
 				ret = -ERESTARTSYS;
@@ -1078,7 +1010,8 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 		}
 	}
 
-	DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
+	if (ret) DRM_DEBUG("%d %s\n", lock.context,
+			   ret ? "interrupted" : "has lock");
 	return ret;
 }
 
@@ -1090,12 +1023,11 @@ int mga_flush_ioctl(struct inode *inode, struct file *filp,
 	drm_lock_t	  lock;
       	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
 
-   	DRM_DEBUG("%s\n", __FUNCTION__);
 	if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
 		return -EFAULT;
 
 	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
-		DRM_ERROR("mga_flush_ioctl called without lock held\n");
+		DRM_ERROR("lock not held\n");
 		return -EINVAL;
 	}
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c
index c551ba6ef..4aaac6254 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c
@@ -36,10 +36,10 @@
 
 #define MGA_NAME	 "mga"
 #define MGA_DESC	 "Matrox G200/G400"
-#define MGA_DATE	 "20000910"
+#define MGA_DATE	 "20000928"
 #define MGA_MAJOR	 2
 #define MGA_MINOR	 0
-#define MGA_PATCHLEVEL	 0
+#define MGA_PATCHLEVEL	 1
 
 static drm_device_t	      mga_device;
 drm_ctx_t		      mga_res_ctx;
@@ -216,6 +216,7 @@ static int mga_takedown(drm_device_t *dev)
 
 	DRM_DEBUG("\n");
 
+	if (dev->dev_private) mga_dma_cleanup(dev);
 	if (dev->irq) mga_irq_uninstall(dev);
 
 	down(&dev->struct_sem);
@@ -351,7 +352,6 @@ static int mga_init(void)
 #ifdef MODULE
 	drm_parse_options(mga);
 #endif
-	DRM_DEBUG("doing misc_register\n");
 	if ((retcode = misc_register(&mga_misc))) {
 		DRM_ERROR("Cannot register \"%s\"\n", MGA_NAME);
 		return retcode;
@@ -359,11 +359,8 @@ static int mga_init(void)
 	dev->device = MKDEV(MISC_MAJOR, mga_misc.minor);
 	dev->name   = MGA_NAME;
 
-   	DRM_DEBUG("doing mem init\n");
 	drm_mem_init();
-	DRM_DEBUG("doing proc init\n");
 	drm_proc_init(dev);
-	DRM_DEBUG("doing agp init\n");
 	dev->agp    = drm_agp_init();
       	if(dev->agp == NULL) {
 	   	DRM_INFO("The mga drm module requires the agpgart module"
@@ -380,7 +377,6 @@ static int mga_init(void)
 				      MTRR_TYPE_WRCOMB,
 				      1);
 #endif
-	DRM_DEBUG("doing ctxbitmap init\n");
 	if((retcode = drm_ctxbitmap_init(dev))) {
 		DRM_ERROR("Cannot allocate memory for context bitmap.\n");
 		drm_proc_cleanup();
@@ -415,7 +411,6 @@ static void mga_cleanup(void)
 		DRM_INFO("Module unloaded\n");
 	}
 	drm_ctxbitmap_cleanup(dev);
-	mga_dma_cleanup(dev);
 #ifdef CONFIG_MTRR
    	if(dev->agp && dev->agp->agp_mtrr) {
 	   	int retval;
@@ -508,22 +503,27 @@ int mga_release(struct inode *inode, struct file *filp)
 	if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
 	    && dev->lock.pid == current->pid) {
 	      	mga_reclaim_buffers(dev, priv->pid);
-		DRM_ERROR("Process %d dead, freeing lock for context %d\n",
-			  current->pid,
-			  _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
+		DRM_INFO("Process %d dead (ctx %d, d_s = 0x%02x)\n",
+			 current->pid,
+			 _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock),
+			 dev->dev_private ?
+			 ((drm_mga_private_t *)dev->dev_private)
+			 ->dispatch_status
+			 : 0);
+
+		if (dev->dev_private)
+			((drm_mga_private_t *)dev->dev_private)
+				->dispatch_status &= MGA_IN_DISPATCH;
+		
 		drm_lock_free(dev,
 			      &dev->lock.hw_lock->lock,
 			      _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
-
-				/* FIXME: may require heavy-handed reset of
-                                   hardware at this point, possibly
-                                   processed via a callback to the X
-                                   server. */
 	} else if (dev->lock.hw_lock) {
 	   	/* The lock is required to reclaim buffers */
 	   	DECLARE_WAITQUEUE(entry, current);
 	   	add_wait_queue(&dev->lock.lock_queue, &entry);
 		for (;;) {
+			current->state = TASK_INTERRUPTIBLE;
 			if (!dev->lock.hw_lock) {
 				/* Device has been unregistered */
 				retcode = -EINTR;
@@ -538,7 +538,6 @@ int mga_release(struct inode *inode, struct file *filp)
 			}
 				/* Contention */
 			atomic_inc(&dev->total_sleeps);
-			current->state = TASK_INTERRUPTIBLE;
 			schedule();
 			if (signal_pending(current)) {
 				retcode = -ERESTARTSYS;
@@ -549,6 +548,9 @@ int mga_release(struct inode *inode, struct file *filp)
 		remove_wait_queue(&dev->lock.lock_queue, &entry);
 	   	if(!retcode) {
 		   	mga_reclaim_buffers(dev, priv->pid);
+			if (dev->dev_private)
+				((drm_mga_private_t *)dev->dev_private)
+					->dispatch_status &= MGA_IN_DISPATCH;
 		   	drm_lock_free(dev, &dev->lock.hw_lock->lock,
 				      DRM_KERNEL_CONTEXT);
 		}
@@ -556,6 +558,13 @@ int mga_release(struct inode *inode, struct file *filp)
 	drm_fasync(-1, filp, 0);
 
 	down(&dev->struct_sem);
+	if (priv->remove_auth_on_close == 1) {
+		drm_file_t *temp = dev->file_first;
+		while(temp) {
+			temp->authenticated = 0;
+			temp = temp->next;
+		}
+	}
 	if (priv->prev) priv->prev->next = priv->next;
 	else		dev->file_first	 = priv->next;
 	if (priv->next) priv->next->prev = priv->prev;
@@ -603,9 +612,6 @@ int mga_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
 	atomic_inc(&dev->total_ioctl);
 	++priv->ioctl_count;
 
-	DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n",
-		  current->pid, cmd, nr, dev->device, priv->authenticated);
-
 	if (nr >= MGA_IOCTL_COUNT) {
 		retcode = -EINVAL;
 	} else {
@@ -613,7 +619,10 @@ int mga_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
 		func	  = ioctl->func;
 
 		if (!func) {
-			DRM_DEBUG("no function\n");
+			DRM_DEBUG("no function: pid = %d, cmd = 0x%02x,"
+				  " nr = 0x%02x, dev 0x%x, auth = %d\n",
+				  current->pid, cmd, nr, dev->device,
+				  priv->authenticated);
 			retcode = -EINVAL;
 		} else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
 			    || (ioctl->auth_needed && !priv->authenticated)) {
@@ -643,9 +652,6 @@ int mga_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
 		return -EINVAL;
 	}
 
-	DRM_DEBUG("%d frees lock (%d holds)\n",
-		  lock.context,
-		  _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
 	atomic_inc(&dev->total_unlocks);
 	if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
 		atomic_inc(&dev->total_contends);
@@ -653,9 +659,7 @@ int mga_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
 	mga_dma_schedule(dev, 1);
 
 	if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
-			  DRM_KERNEL_CONTEXT)) {
-	   DRM_ERROR("\n");
-	}
+			  DRM_KERNEL_CONTEXT)) DRM_ERROR("\n");
 
 	unblock_all_signals();
 	return 0;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h
index 6feba09a6..e37cc2ef4 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h
@@ -50,7 +50,7 @@ typedef struct {
 } drm_mga_prim_buf_t;
 
 typedef struct _drm_mga_freelist {
-   	unsigned int age;
+   	__volatile__ unsigned int age;
    	drm_buf_t *buf;
    	struct _drm_mga_freelist *next;
    	struct _drm_mga_freelist *prev;
@@ -377,6 +377,72 @@ drm_mga_prim_buf_t *tmp_buf = 					\
 #define MGAREG_YTOP 				0x1c98
 #define MGAREG_ZORG 				0x1c0c
 
+/* Warp registers */
+#define MGAREG_WR0                              0x2d00
+#define MGAREG_WR1                              0x2d04
+#define MGAREG_WR2                              0x2d08
+#define MGAREG_WR3                              0x2d0c
+#define MGAREG_WR4                              0x2d10
+#define MGAREG_WR5                              0x2d14
+#define MGAREG_WR6                              0x2d18
+#define MGAREG_WR7                              0x2d1c
+#define MGAREG_WR8                              0x2d20
+#define MGAREG_WR9                              0x2d24
+#define MGAREG_WR10                             0x2d28
+#define MGAREG_WR11                             0x2d2c
+#define MGAREG_WR12                             0x2d30
+#define MGAREG_WR13                             0x2d34
+#define MGAREG_WR14                             0x2d38
+#define MGAREG_WR15                             0x2d3c
+#define MGAREG_WR16                             0x2d40
+#define MGAREG_WR17                             0x2d44
+#define MGAREG_WR18                             0x2d48
+#define MGAREG_WR19                             0x2d4c
+#define MGAREG_WR20                             0x2d50
+#define MGAREG_WR21                             0x2d54
+#define MGAREG_WR22                             0x2d58
+#define MGAREG_WR23                             0x2d5c
+#define MGAREG_WR24                             0x2d60
+#define MGAREG_WR25                             0x2d64
+#define MGAREG_WR26                             0x2d68
+#define MGAREG_WR27                             0x2d6c
+#define MGAREG_WR28                             0x2d70
+#define MGAREG_WR29                             0x2d74
+#define MGAREG_WR30                             0x2d78
+#define MGAREG_WR31                             0x2d7c
+#define MGAREG_WR32                             0x2d80
+#define MGAREG_WR33                             0x2d84
+#define MGAREG_WR34                             0x2d88
+#define MGAREG_WR35                             0x2d8c
+#define MGAREG_WR36                             0x2d90
+#define MGAREG_WR37                             0x2d94
+#define MGAREG_WR38                             0x2d98
+#define MGAREG_WR39                             0x2d9c
+#define MGAREG_WR40                             0x2da0
+#define MGAREG_WR41                             0x2da4
+#define MGAREG_WR42                             0x2da8
+#define MGAREG_WR43                             0x2dac
+#define MGAREG_WR44                             0x2db0
+#define MGAREG_WR45                             0x2db4
+#define MGAREG_WR46                             0x2db8
+#define MGAREG_WR47                             0x2dbc
+#define MGAREG_WR48                             0x2dc0
+#define MGAREG_WR49                             0x2dc4
+#define MGAREG_WR50                             0x2dc8
+#define MGAREG_WR51                             0x2dcc
+#define MGAREG_WR52                             0x2dd0
+#define MGAREG_WR53                             0x2dd4
+#define MGAREG_WR54                             0x2dd8
+#define MGAREG_WR55                             0x2ddc
+#define MGAREG_WR56                             0x2de0
+#define MGAREG_WR57                             0x2de4
+#define MGAREG_WR58                             0x2de8
+#define MGAREG_WR59                             0x2dec
+#define MGAREG_WR60                             0x2df0
+#define MGAREG_WR61                             0x2df4
+#define MGAREG_WR62                             0x2df8
+#define MGAREG_WR63                             0x2dfc
+
 #define PDEA_pagpxfer_enable			0x2
 
 #define WIA_wmode_suspend			0x0
@@ -430,6 +496,7 @@ drm_mga_prim_buf_t *tmp_buf = 					\
 #define DC_clipdis_disable 			0x0
 #define DC_clipdis_enable 			0x80000000
 
+
 #define SETADD_mode_vertlist                   	0x0
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c
index 0c2f57299..6ac3d6059 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c
@@ -43,7 +43,7 @@
 #define MGAG200EMITTEX_SIZE 	20
 #define MGAG400EMITTEX0_SIZE	30
 #define MGAG400EMITTEX1_SIZE	25
-#define MGAG400EMITPIPE_SIZE	55
+#define MGAG400EMITPIPE_SIZE	50
 #define MGAG200EMITPIPE_SIZE	15
 
 #define MAX_STATE_SIZE ((MGAEMITCLIP_SIZE * MGA_NR_SAREA_CLIPRECTS) + \
@@ -56,24 +56,24 @@ static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->ContextState;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	/* This takes 10 dwords */
 	PRIMGETPTR(dev_priv);
 
-	/* Force reset of dwgctl (eliminates clip disable) */
+	/* Force reset of dwgctl on G400 (eliminates clip disable bit) */
+	if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
 #if 0
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
-	PRIMOUTREG(MGAREG_DWGSYNC, 0);
-	PRIMOUTREG(MGAREG_DWGSYNC, 0);
-	PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+		PRIMOUTREG(MGAREG_DMAPAD, 0);
+		PRIMOUTREG(MGAREG_DWGSYNC, 0);
+		PRIMOUTREG(MGAREG_DWGSYNC, 0);
+		PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
 #else
-	PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
-	PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
-	PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
-	PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
+		PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
+		PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
 #endif
-
+	}
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_CXBNDRY, ((box->x2) << 16) | (box->x1));
 	PRIMOUTREG(MGAREG_YTOP, box->y1 * dev_priv->stride / dev_priv->cpp);
@@ -87,7 +87,6 @@ static void mgaEmitContext(drm_mga_private_t * dev_priv)
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->ContextState;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	/* This takes a max of 20 dwords */
 	PRIMGETPTR(dev_priv);
@@ -127,7 +126,6 @@ static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->TexState[0];
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
 
@@ -146,9 +144,9 @@ static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
 	PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
 	PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
 	PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
-	PRIMOUTREG(0x2d00 + 24 * 4, regs[MGA_TEXREG_WIDTH]);
+	PRIMOUTREG(MGAREG_WR24, regs[MGA_TEXREG_WIDTH]);
 
-	PRIMOUTREG(0x2d00 + 34 * 4, regs[MGA_TEXREG_HEIGHT]);
+	PRIMOUTREG(MGAREG_WR34, regs[MGA_TEXREG_HEIGHT]);
 	PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
 	PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -162,13 +160,11 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->TexState[0];
-	int multitex = regs[MGA_TEXREG_CTL2] & TMC_dualtex_enable;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
 
-	/* This takes a max of 30 dwords */
+	/* This takes 30 dwords */
 
 	PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
 	PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
@@ -183,22 +179,20 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
 	PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
 	PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
 	PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
-	PRIMOUTREG(0x2d00 + 49 * 4, 0);
+	PRIMOUTREG(MGAREG_WR49, 0);
 
-	PRIMOUTREG(0x2d00 + 57 * 4, 0);
-	PRIMOUTREG(0x2d00 + 53 * 4, 0);
-	PRIMOUTREG(0x2d00 + 61 * 4, 0);
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_WR57, 0);
+	PRIMOUTREG(MGAREG_WR53, 0);
+	PRIMOUTREG(MGAREG_WR61, 0);
+	PRIMOUTREG(MGAREG_WR52, 0x40);
 
-	if (!multitex || 1) {
-		PRIMOUTREG(0x2d00 + 52 * 4, 0x40);
-		PRIMOUTREG(0x2d00 + 60 * 4, 0x40);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
-	}
+	PRIMOUTREG(MGAREG_WR60, 0x40);
+	PRIMOUTREG(MGAREG_WR54, regs[MGA_TEXREG_WIDTH] | 0x40);
+	PRIMOUTREG(MGAREG_WR62, regs[MGA_TEXREG_HEIGHT] | 0x40);
+	PRIMOUTREG(MGAREG_DMAPAD, 0);
 
-	PRIMOUTREG(0x2d00 + 54 * 4, regs[MGA_TEXREG_WIDTH] | 0x40);
-	PRIMOUTREG(0x2d00 + 62 * 4, regs[MGA_TEXREG_HEIGHT] | 0x40);
+	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
 	PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
 
@@ -207,12 +201,11 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
 
 #define TMC_map1_enable 		0x80000000
 
-static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
+static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-	unsigned int *regs = sarea_priv->TexState[source];
+	unsigned int *regs = sarea_priv->TexState[1];
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
 
@@ -232,14 +225,14 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
 	PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
 	PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
 	PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
-	PRIMOUTREG(0x2d00 + 49 * 4, 0);
+	PRIMOUTREG(MGAREG_WR49, 0);
 
-	PRIMOUTREG(0x2d00 + 57 * 4, 0);
-	PRIMOUTREG(0x2d00 + 53 * 4, 0);
-	PRIMOUTREG(0x2d00 + 61 * 4, 0);
-	PRIMOUTREG(0x2d00 + 52 * 4, regs[MGA_TEXREG_WIDTH] | 0x40);
+	PRIMOUTREG(MGAREG_WR57, 0);
+	PRIMOUTREG(MGAREG_WR53, 0);
+	PRIMOUTREG(MGAREG_WR61, 0);
+	PRIMOUTREG(MGAREG_WR52, regs[MGA_TEXREG_WIDTH] | 0x40);
 
-	PRIMOUTREG(0x2d00 + 60 * 4, regs[MGA_TEXREG_HEIGHT] | 0x40);
+	PRIMOUTREG(MGAREG_WR60, regs[MGA_TEXREG_HEIGHT] | 0x40);
 	PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
 	PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
 	PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
@@ -247,50 +240,29 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
 	PRIMADVANCE(dev_priv);
 }
 
+#define MAGIC_FPARAM_HEX_VALUE 0x46480000
+/* This is the hex value of 12800.0f which is a magic value we must
+ * set in wr56.
+ */
+
 static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int pipe = sarea_priv->WarpPipe;
-	float fParam = 12800.0f;
-	int multitex = (sarea_priv->TexState[0][MGA_TEXREG_CTL2] &
-			TMC_dualtex_enable);
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
 
 	/* This takes 50 dwords */
 
-	/* Establish vertex size.
+	/* Establish vertex size.  
 	 */
 	PRIMOUTREG(MGAREG_WIADDR2, WIA_wmode_suspend);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 
-	if (sarea_priv->vertexsize == 10) {
-		PRIMOUTREG(MGAREG_YDST, 0);
-		PRIMOUTREG(MGAREG_FXLEFT, 0);
-		PRIMOUTREG(MGAREG_FXRIGHT, 1);
-		PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
-
-		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
-		PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
-
-		if (multitex) {
-			PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-			PRIMOUTREG(MGAREG_TEXCTL2, 0x80 | 0x00008000);
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-		} else {
-			PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-			PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-		}
-
+	if (pipe & MGA_T2) {
 		PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001e09);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -301,21 +273,23 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
 		PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
 		PRIMOUTREG(MGAREG_WACCEPTSEQ, 0x1e000000);
 	} else {
-		/* Flush the WARP pipe */
-		PRIMOUTREG(MGAREG_YDST, 0);
-		PRIMOUTREG(MGAREG_FXLEFT, 0);
-		PRIMOUTREG(MGAREG_FXRIGHT, 1);
-		PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
-
-		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
-		PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
-		PRIMOUTREG(MGAREG_DMAPAD, 0);
+		if (dev_priv->WarpPipe & MGA_T2) {
+			/* Flush the WARP pipe */
+			PRIMOUTREG(MGAREG_YDST, 0);
+			PRIMOUTREG(MGAREG_FXLEFT, 0);
+			PRIMOUTREG(MGAREG_FXRIGHT, 1);
+			PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
+
+			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
+			PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
+			PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
+			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
 
-		PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-		PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+			PRIMOUTREG(MGAREG_TEXCTL2, 0x80 | 0x00008000);
+			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+			PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
+			PRIMOUTREG(MGAREG_DMAPAD, 0);
+		}
 
 		PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001807);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -330,29 +304,26 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
 
 	PRIMOUTREG(MGAREG_WFLAG, 0);
 	PRIMOUTREG(MGAREG_WFLAG1, 0);
-	PRIMOUTREG(0x2d00 + 56 * 4, *((u32 *) (&fParam)));
+	PRIMOUTREG(MGAREG_WR56, MAGIC_FPARAM_HEX_VALUE);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 
-	PRIMOUTREG(0x2d00 + 49 * 4, 0);	/* Tex stage 0 */
-	PRIMOUTREG(0x2d00 + 57 * 4, 0);	/* Tex stage 0 */
-	PRIMOUTREG(0x2d00 + 53 * 4, 0);	/* Tex stage 1 */
-	PRIMOUTREG(0x2d00 + 61 * 4, 0);	/* Tex stage 1 */
-
-	PRIMOUTREG(0x2d00 + 54 * 4, 0x40);	/* Tex stage 0 : w */
-	PRIMOUTREG(0x2d00 + 62 * 4, 0x40);	/* Tex stage 0 : h */
-	PRIMOUTREG(0x2d00 + 52 * 4, 0x40);	/* Tex stage 1 : w */
-	PRIMOUTREG(0x2d00 + 60 * 4, 0x40);	/* Tex stage 1 : h */
-
-	if (dev_priv->WarpPipe != pipe || 1) {
-		/* Dma pading required due to hw bug */
-		PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-		PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-		PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-		PRIMOUTREG(MGAREG_WIADDR2,
-			   (u32) (dev_priv->WarpIndex[pipe].phys_addr |
-				  WIA_wmode_start | WIA_wagp_agp));
-	}
+	PRIMOUTREG(MGAREG_WR49, 0);	/* Tex stage 0 */
+	PRIMOUTREG(MGAREG_WR57, 0);	/* Tex stage 0 */
+	PRIMOUTREG(MGAREG_WR53, 0);	/* Tex stage 1 */
+	PRIMOUTREG(MGAREG_WR61, 0);	/* Tex stage 1 */
+
+	PRIMOUTREG(MGAREG_WR54, 0x40);	/* Tex stage 0 : w */
+	PRIMOUTREG(MGAREG_WR62, 0x40);	/* Tex stage 0 : h */
+	PRIMOUTREG(MGAREG_WR52, 0x40);	/* Tex stage 1 : w */
+	PRIMOUTREG(MGAREG_WR60, 0x40);	/* Tex stage 1 : h */
 
+	/* Dma pading required due to hw bug */
+	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+	PRIMOUTREG(MGAREG_WIADDR2,
+		   (u32) (dev_priv->WarpIndex[pipe].
+			  phys_addr | WIA_wmode_start | WIA_wagp_agp));
 	PRIMADVANCE(dev_priv);
 }
 
@@ -361,7 +332,6 @@ static void mgaG200EmitPipe(drm_mga_private_t * dev_priv)
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int pipe = sarea_priv->WarpPipe;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
 
@@ -370,12 +340,12 @@ static void mgaG200EmitPipe(drm_mga_private_t * dev_priv)
 	PRIMOUTREG(MGAREG_WIADDR, WIA_wmode_suspend);
 	PRIMOUTREG(MGAREG_WVRTXSZ, 7);
 	PRIMOUTREG(MGAREG_WFLAG, 0);
-	PRIMOUTREG(0x2d00 + 24 * 4, 0);	/* tex w/h */
+	PRIMOUTREG(MGAREG_WR24, 0);	/* tex w/h */
 
-	PRIMOUTREG(0x2d00 + 25 * 4, 0x100);
-	PRIMOUTREG(0x2d00 + 34 * 4, 0);	/* tex w/h */
-	PRIMOUTREG(0x2d00 + 42 * 4, 0xFFFF);
-	PRIMOUTREG(0x2d00 + 60 * 4, 0xFFFF);
+	PRIMOUTREG(MGAREG_WR25, 0x100);
+	PRIMOUTREG(MGAREG_WR34, 0);	/* tex w/h */
+	PRIMOUTREG(MGAREG_WR42, 0xFFFF);
+	PRIMOUTREG(MGAREG_WR60, 0xFFFF);
 
 	/* Dma pading required due to hw bug */
 	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
@@ -392,23 +362,13 @@ static void mgaEmitState(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int dirty = sarea_priv->dirty;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
-	        int multitex = (sarea_priv->TexState[0][MGA_TEXREG_CTL2] &
-				TMC_dualtex_enable);
+		int multitex = sarea_priv->WarpPipe & MGA_T2;
 
-  		dirty = ~0;
-
-		if (dirty & MGA_UPLOAD_PIPE
-/*  		    && (sarea_priv->WarpPipe != dev_priv->WarpPipe || */
-/*  		        sarea_priv->vertexsize != dev_priv->vertexsize) */
-		   )
-		{
+		if (sarea_priv->WarpPipe != dev_priv->WarpPipe) {
 			mgaG400EmitPipe(dev_priv);
 			dev_priv->WarpPipe = sarea_priv->WarpPipe;
-			dev_priv->vertexsize = sarea_priv->vertexsize;
-			sarea_priv->dirty &= ~MGA_UPLOAD_PIPE;
 		}
 
 		if (dirty & MGA_UPLOAD_CTX) {
@@ -421,11 +381,8 @@ static void mgaEmitState(drm_mga_private_t * dev_priv)
 			sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
 		}
 
-		if (dirty & MGA_UPLOAD_TEX1) {
-			if (multitex)
-				mgaG400EmitTex1(dev_priv, 1);
-			else
-				mgaG400EmitTex1(dev_priv, 0);
+		if ((dirty & MGA_UPLOAD_TEX1) && multitex) {
+			mgaG400EmitTex1(dev_priv);
 			sarea_priv->dirty &= ~MGA_UPLOAD_TEX1;
 		}
 	} else {
@@ -446,7 +403,6 @@ static void mgaEmitState(drm_mga_private_t * dev_priv)
 	}
 }
 
-
 /* Disallow all write destinations except the front and backbuffer.
  */
 static int mgaVerifyContext(drm_mga_private_t * dev_priv)
@@ -454,8 +410,6 @@ static int mgaVerifyContext(drm_mga_private_t * dev_priv)
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->ContextState;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if (regs[MGA_CTXREG_DSTORG] != dev_priv->frontOffset &&
 	    regs[MGA_CTXREG_DSTORG] != dev_priv->backOffset) {
 		DRM_DEBUG("BAD DSTORG: %x (front %x, back %x)\n\n",
@@ -474,8 +428,6 @@ static int mgaVerifyTex(drm_mga_private_t * dev_priv, int unit)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if ((sarea_priv->TexState[unit][MGA_TEXREG_ORG] & 0x3) == 0x1) {
 		DRM_DEBUG("BAD TEXREG_ORG: %x, unit %d\n",
 			  sarea_priv->TexState[unit][MGA_TEXREG_ORG],
@@ -493,8 +445,6 @@ static int mgaVerifyState(drm_mga_private_t * dev_priv)
 	unsigned int dirty = sarea_priv->dirty;
 	int rv = 0;
 
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
 		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
 
@@ -522,8 +472,6 @@ static int mgaVerifyIload(drm_mga_private_t * dev_priv,
 			  unsigned long bus_address,
 			  unsigned int dstOrg, int length)
 {
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
 	if (dstOrg < dev_priv->textureOffset ||
 	    dstOrg + length >
 	    (dev_priv->textureOffset + dev_priv->textureSize)) {
@@ -546,7 +494,6 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
 	int use_agp = PDEA_pagpxfer_enable | 0x00000001;
 	u16 y2;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	y2 = length / 64;
 
@@ -554,7 +501,6 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
 
 	PRIMOUTREG(MGAREG_DSTORG, destOrg);
 	PRIMOUTREG(MGAREG_MACCESS, 0x00000000);
-	DRM_DEBUG("srcorg : %lx\n", bus_address | use_agp);
 	PRIMOUTREG(MGAREG_SRCORG, (u32) bus_address | use_agp);
 	PRIMOUTREG(MGAREG_AR5, 64);
 
@@ -568,10 +514,10 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
 	PRIMOUTREG(MGAREG_FXBNDRY, (63 << 16));
 	PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, y2);
 
+	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_SRCORG, 0);
 	PRIMOUTREG(MGAREG_PITCH, dev_priv->stride / dev_priv->cpp);
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
-	PRIMOUTREG(MGAREG_DMAPAD, 0);
+	PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
 	PRIMADVANCE(dev_priv);
 }
 
@@ -585,14 +531,6 @@ static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
 	int use_agp = PDEA_pagpxfer_enable;
 	int i = 0;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
-	DRM_DEBUG("dispatch vertex %d addr 0x%lx, "
-		  "length 0x%x nbox %d dirty %x\n",
-		  buf->idx, address, length,
-		  sarea_priv->nbox, sarea_priv->dirty);
-
-	DRM_DEBUG("used : %d, total : %d\n", buf->used, buf->total);
 
 	if (buf->used) {
 		/* WARNING: if you change any of the state functions verify
@@ -603,19 +541,12 @@ static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
 			      (MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
 		mgaEmitState(dev_priv);
 
-/*  		length = dev_priv->vertexsize * 3 * 4; */
+#if 0
+		length = dev_priv->vertexsize * 3 * 4;
+#endif
 
 		do {
 			if (i < sarea_priv->nbox) {
-				DRM_DEBUG("idx %d Emit box %d/%d:"
-					  "%d,%d - %d,%d\n",
-					  buf->idx,
-					  i, sarea_priv->nbox,
-					  sarea_priv->boxes[i].x1,
-					  sarea_priv->boxes[i].y1,
-					  sarea_priv->boxes[i].x2,
-					  sarea_priv->boxes[i].y2);
-
 				mgaEmitClipRect(dev_priv,
 						&sarea_priv->boxes[i]);
 			}
@@ -652,12 +583,6 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
 	int use_agp = PDEA_pagpxfer_enable;
 	int i = 0;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
-
-	DRM_DEBUG("dispatch indices %d addr 0x%x, "
-		  "start 0x%x end 0x%x nbox %d dirty %x\n",
-		  buf->idx, address, start, end,
-		  sarea_priv->nbox, sarea_priv->dirty);
 
 	if (start != end) {
 		/* WARNING: if you change any of the state functions verify
@@ -670,15 +595,6 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
 
 		do {
 			if (i < sarea_priv->nbox) {
-				DRM_DEBUG("idx %d Emit box %d/%d:"
-					  "%d,%d - %d,%d\n",
-					  buf->idx,
-					  i, sarea_priv->nbox,
-					  sarea_priv->boxes[i].x1,
-					  sarea_priv->boxes[i].y1,
-					  sarea_priv->boxes[i].x2,
-					  sarea_priv->boxes[i].y2);
-
 				mgaEmitClipRect(dev_priv,
 						&sarea_priv->boxes[i]);
 			}
@@ -718,7 +634,6 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 	unsigned int cmd;
 	int i;
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (dev_priv->sgram)
 		cmd = MGA_CLEAR_CMD | DC_atype_blk;
@@ -730,12 +645,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 	for (i = 0; i < nbox; i++) {
 		unsigned int height = pbox[i].y2 - pbox[i].y1;
 
-		DRM_DEBUG("dispatch clear %d,%d-%d,%d flags %x!\n",
-			  pbox[i].x1, pbox[i].y1, pbox[i].x2,
-			  pbox[i].y2, flags);
-
 		if (flags & MGA_FRONT) {
-			DRM_DEBUG("clear front\n");
 			PRIMOUTREG(MGAREG_DMAPAD, 0);
 			PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
 			PRIMOUTREG(MGAREG_YDSTLEN,
@@ -750,7 +660,6 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 		}
 
 		if (flags & MGA_BACK) {
-			DRM_DEBUG("clear back\n");
 			PRIMOUTREG(MGAREG_DMAPAD, 0);
 			PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
 			PRIMOUTREG(MGAREG_YDSTLEN,
@@ -765,7 +674,6 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 		}
 
 		if (flags & MGA_DEPTH) {
-			DRM_DEBUG("clear depth\n");
 			PRIMOUTREG(MGAREG_DMAPAD, 0);
 			PRIMOUTREG(MGAREG_PLNWT, clear_depthmask);
 			PRIMOUTREG(MGAREG_YDSTLEN,
@@ -799,7 +707,6 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
 	int pixel_stride = dev_priv->stride / dev_priv->cpp;
 
 	PRIMLOCALS;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIM_OVERFLOW(dev, dev_priv, (MGA_NR_SAREA_CLIPRECTS * 5) + 20);
 
@@ -822,9 +729,6 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
 		unsigned int h = pbox[i].y2 - pbox[i].y1;
 		unsigned int start = pbox[i].y1 * pixel_stride;
 
-		DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
-			  pbox[i].x1, pbox[i].y1, pbox[i].x2, pbox[i].y2);
-
 		PRIMOUTREG(MGAREG_AR0, start + pbox[i].x2 - 1);
 		PRIMOUTREG(MGAREG_AR3, start + pbox[i].x1);
 		PRIMOUTREG(MGAREG_FXBNDRY,
@@ -854,7 +758,6 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
 
 	if (copy_from_user(&clear, (drm_mga_clear_t *) arg, sizeof(clear)))
 		return -EFAULT;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_clear_bufs called without lock held\n");
@@ -886,7 +789,6 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
 	drm_mga_private_t *dev_priv =
 	    (drm_mga_private_t *) dev->dev_private;
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_swap_bufs called without lock held\n");
@@ -921,9 +823,7 @@ int mga_iload(struct inode *inode, struct file *filp,
 	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_iload_t iload;
 	unsigned long bus_address;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	DRM_DEBUG("Starting Iload\n");
 	if (copy_from_user(&iload, (drm_mga_iload_t *) arg, sizeof(iload)))
 		return -EFAULT;
 
@@ -935,8 +835,6 @@ int mga_iload(struct inode *inode, struct file *filp,
 	buf = dma->buflist[iload.idx];
 	buf_priv = buf->dev_private;
 	bus_address = buf->bus_address;
-	DRM_DEBUG("bus_address %lx, length %d, destorg : %x\n",
-		  bus_address, iload.length, iload.destOrg);
 
 	if (mgaVerifyIload(dev_priv,
 			   bus_address, iload.destOrg, iload.length)) {
@@ -967,7 +865,6 @@ int mga_vertex(struct inode *inode, struct file *filp,
 	drm_buf_t *buf;
 	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_vertex_t vertex;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (copy_from_user(&vertex, (drm_mga_vertex_t *) arg, sizeof(vertex)))
 		return -EFAULT;
@@ -977,8 +874,6 @@ int mga_vertex(struct inode *inode, struct file *filp,
 		return -EINVAL;
 	}
 
-	DRM_DEBUG("mga_vertex\n");
-
 	buf = dma->buflist[vertex.idx];
 	buf_priv = buf->dev_private;
 
@@ -992,7 +887,6 @@ int mga_vertex(struct inode *inode, struct file *filp,
 			buf_priv->dispatched = 0;
 			mga_freelist_put(dev, buf);
 		}
-		DRM_DEBUG("bad state\n");
 		return -EINVAL;
 	}
 
@@ -1016,9 +910,9 @@ int mga_indices(struct inode *inode, struct file *filp,
 	drm_buf_t *buf;
 	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_indices_t indices;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	if (copy_from_user(&indices, (drm_mga_indices_t *) arg, sizeof(indices)))
+	if (copy_from_user(&indices,
+			   (drm_mga_indices_t *)arg, sizeof(indices)))
 		return -EFAULT;
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
@@ -1026,8 +920,6 @@ int mga_indices(struct inode *inode, struct file *filp,
 		return -EINVAL;
 	}
 
-	DRM_DEBUG("mga_indices\n");
-
 	buf = dma->buflist[indices.idx];
 	buf_priv = buf->dev_private;
 
@@ -1057,7 +949,6 @@ static int mga_dma_get_buffers(drm_device_t * dev, drm_dma_t * d)
 {
 	int i;
 	drm_buf_t *buf;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	for (i = d->granted_count; i < d->request_count; i++) {
 		buf = mga_freelist_get(dev);
@@ -1083,12 +974,9 @@ int mga_dma(struct inode *inode, struct file *filp, unsigned int cmd,
 	drm_device_dma_t *dma = dev->dma;
 	int retcode = 0;
 	drm_dma_t d;
-	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (copy_from_user(&d, (drm_dma_t *) arg, sizeof(d)))
 		return -EFAULT;
-	DRM_DEBUG("%d %d: %d send, %d req\n",
-		  current->pid, d.context, d.send_count, d.request_count);
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_dma called without lock held\n");
@@ -1119,8 +1007,6 @@ int mga_dma(struct inode *inode, struct file *filp, unsigned int cmd,
 		retcode = mga_dma_get_buffers(dev, &d);
 	}
 
-	DRM_DEBUG("%d returning, granted = %d\n",
-		  current->pid, d.granted_count);
 	if (copy_to_user((drm_dma_t *) arg, &d, sizeof(d)))
 		return -EFAULT;
 	return retcode;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/picker.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/picker.c
index cdb24025b..4b4fbe90c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/picker.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/picker.c
@@ -1,4 +1,5 @@
-#include <linux/autoconf.h>
+
+#include <linux/config.h>
 #include <linux/version.h>
 
 #ifndef CONFIG_SMP
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c
index b58dcf066..7ae498014 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c
@@ -35,7 +35,7 @@
 
 #define R128_NAME	 "r128"
 #define R128_DESC	 "ATI Rage 128"
-#define R128_DATE	 "20000910"
+#define R128_DATE	 "20000928"
 #define R128_MAJOR	 1
 #define R128_MINOR	 0
 #define R128_PATCHLEVEL  0
@@ -602,6 +602,7 @@ int r128_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 #endif
                 add_wait_queue(&dev->lock.lock_queue, &entry);
                 for (;;) {
+                        current->state = TASK_INTERRUPTIBLE;
                         if (!dev->lock.hw_lock) {
                                 /* Device has been unregistered */
                                 ret = -EINTR;
@@ -617,7 +618,6 @@ int r128_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 
                                 /* Contention */
                         atomic_inc(&dev->total_sleeps);
-                        current->state = TASK_INTERRUPTIBLE;
 #if 1
 			current->policy |= SCHED_YIELD;
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h
index f08e9ecce..73807f317 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h
@@ -1,11 +1,12 @@
-#ifndef _sis_drm_h_
-#define _sis_drm_h_
+
+#ifndef _sis_drm_public_h_
+#define _sis_drm_public_h_
 
 typedef struct { 
   int context;
   unsigned int offset;
   unsigned int size;
-  unsigned long free;
+  unsigned int free;
 } drm_sis_mem_t; 
 
 typedef struct { 
@@ -16,4 +17,15 @@ typedef struct {
   unsigned int left, right;
 } drm_sis_flip_t; 
 
+#define SIS_IOCTL_FB_ALLOC     DRM_IOWR( 0x44, drm_sis_mem_t)
+#define SIS_IOCTL_FB_FREE      DRM_IOW( 0x45, drm_sis_mem_t)
+
+#define SIS_IOCTL_AGP_INIT     DRM_IOWR( 0x53, drm_sis_agp_t)
+#define SIS_IOCTL_AGP_ALLOC    DRM_IOWR( 0x54, drm_sis_mem_t)
+#define SIS_IOCTL_AGP_FREE     DRM_IOW( 0x55, drm_sis_mem_t)
+
+#define SIS_IOCTL_FLIP         DRM_IOW( 0x48, drm_sis_flip_t)
+#define SIS_IOCTL_FLIP_INIT    DRM_IO( 0x49)
+#define SIS_IOCTL_FLIP_FINAL   DRM_IO( 0x50)
+
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drv.c
index 6a91318c3..2f98e3221 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drv.c
@@ -574,6 +574,7 @@ int sis_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 #endif
                 add_wait_queue(&dev->lock.lock_queue, &entry);
                 for (;;) {
+                        current->state = TASK_INTERRUPTIBLE;
                         if (!dev->lock.hw_lock) {
                                 /* Device has been unregistered */
                                 ret = -EINTR;
@@ -589,7 +590,6 @@ int sis_lock(struct inode *inode, struct file *filp, unsigned int cmd,
                         
                                 /* Contention */
                         atomic_inc(&dev->total_sleeps);
-                        current->state = TASK_INTERRUPTIBLE;
 #if 1
 			current->policy |= SCHED_YIELD;
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/tdfx_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/tdfx_drv.c
index 2026e9d07..5f2c804af 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/tdfx_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/tdfx_drv.c
@@ -1,4 +1,4 @@
-/* tdfx.c -- tdfx driver -*- linux-c -*-
+/* tdfx_drv.c -- tdfx driver -*- linux-c -*-
  * Created: Thu Oct  7 10:38:32 1999 by faith@precisioninsight.com
  *
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -36,7 +36,7 @@
 
 #define TDFX_NAME	 "tdfx"
 #define TDFX_DESC	 "3dfx Banshee/Voodoo3+"
-#define TDFX_DATE	 "20000910"
+#define TDFX_DATE	 "20000928"
 #define TDFX_MAJOR	 1
 #define TDFX_MINOR	 0
 #define TDFX_PATCHLEVEL  0
@@ -561,6 +561,7 @@ int tdfx_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 #endif
                 add_wait_queue(&dev->lock.lock_queue, &entry);
                 for (;;) {
+                        current->state = TASK_INTERRUPTIBLE;
                         if (!dev->lock.hw_lock) {
                                 /* Device has been unregistered */
                                 ret = -EINTR;
@@ -576,7 +577,6 @@ int tdfx_lock(struct inode *inode, struct file *filp, unsigned int cmd,
 
                                 /* Contention */
                         atomic_inc(&dev->total_sleeps);
-                        current->state = TASK_INTERRUPTIBLE;
 #if 1
 			current->policy |= SCHED_YIELD;
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/vm.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/vm.c
index 7c5a24bc9..964921b46 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/vm.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/vm.c
@@ -67,8 +67,6 @@ struct page *drm_vm_nopage(struct vm_area_struct *vma,
 			   int write_access)
 #endif
 {
-	DRM_DEBUG("0x%08lx, %d\n", address, write_access);
-
 	return NOPAGE_SIGBUS;		/* Disallow mremap */
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c
index 314530dc8..5590a926d 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c,v 3.12 2000/02/25 18:28:11 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c,v 3.13 2000/11/14 21:59:24 dawes Exp $ */
 /*
  * Copyright 1992 by Orest Zborowski <obz@Kodak.com>
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -49,6 +49,7 @@ void
 xf86OpenConsole(void)
 {
     int i, fd;
+    int result;
     struct vt_mode VT;
     char vtname[11];
     struct vt_stat vts;
@@ -158,15 +159,19 @@ xf86OpenConsole(void)
 	/*
 	 * now get the VT
 	 */
-	if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno) != 0)
+	SYSCALL(result = ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno));
+	if (result != 0)
 	{
 	    xf86Msg(X_WARNING, "xf86OpenConsole: VT_ACTIVATE failed\n");
 	}
-	if (ioctl(xf86Info.consoleFd, VT_WAITACTIVE, xf86Info.vtno) != 0)
+	SYSCALL(result =
+		  ioctl(xf86Info.consoleFd, VT_WAITACTIVE, xf86Info.vtno));
+	if (result != 0)
 	{
 	    xf86Msg(X_WARNING, "xf86OpenConsole: VT_WAITACTIVE failed\n");
 	}
-	if (ioctl(xf86Info.consoleFd, VT_GETMODE, &VT) < 0) 
+	SYSCALL(result = ioctl(xf86Info.consoleFd, VT_GETMODE, &VT));
+	if (result < 0) 
 	{
 	    FatalError("xf86OpenConsole: VT_GETMODE failed\n");
 	}
@@ -203,11 +208,14 @@ xf86OpenConsole(void)
 	/*
 	 * now get the VT
 	 */
-	if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno) != 0)
+	SYSCALL(result = ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno));
+	if (result != 0)
 	{
 	    xf86Msg(X_WARNING, "xf86OpenConsole: VT_ACTIVATE failed\n");
 	}
-	if (ioctl(xf86Info.consoleFd, VT_WAITACTIVE, xf86Info.vtno) != 0)
+	SYSCALL(result =
+		ioctl(xf86Info.consoleFd, VT_WAITACTIVE, xf86Info.vtno));
+	if (result != 0)
 	{
 	    xf86Msg(X_WARNING, "xf86OpenConsole: VT_WAITACTIVE failed\n");
 	}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
index 6b4414bdc..57032d6e2 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
@@ -37,8 +37,10 @@
 
 #if defined(__linux__)
 #include <asm/ioctl.h>		/* For _IO* macros */
+#define DRM_IOCTL_NR(n)	     _IOC_NR(n)
 #elif defined(__FreeBSD__)
 #include <sys/ioccom.h>
+#define DRM_IOCTL_NR(n)	     ((n) & 0xff)
 #endif
 
 #define DRM_PROC_DEVICES "/proc/devices"
@@ -294,11 +296,6 @@ typedef struct drm_agp_info {
 } drm_agp_info_t;
 
 #define DRM_IOCTL_BASE	     'd'
-#if defined(__linux__)
-#define DRM_IOCTL_NR(n)	     _IOC_NR(n)
-#elif defined(__FreeBSD__)
-#define DRM_IOCTL_NR(n)	     ((n) & 0xff)
-#endif
 #define DRM_IO(nr)	     _IO(DRM_IOCTL_BASE,nr)
 #define DRM_IOR(nr,size)     _IOR(DRM_IOCTL_BASE,nr,size)
 #define DRM_IOW(nr,size)     _IOW(DRM_IOCTL_BASE,nr,size)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c
index 547e7006b..2d61839a9 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c,v 3.24 1999/11/19 13:55:02 hohndel Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c,v 3.25 2000/11/14 21:59:24 dawes Exp $ */
 /*
  * Copyright 1993-1999 by The XFree86 Project, Inc.
  *
@@ -60,8 +60,6 @@
 #include "xf86Priv.h"
 #include "xf86_OSlib.h"
 
-#define SYSCALL(call) while(((call) == -1) && (errno == EINTR))
-
 static int 
 GetBaud (int baudrate)
 {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c
index e603af4d7..7f8cbc1db 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c
@@ -25,7 +25,7 @@
  * 
  * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c,v 1.11 2000/06/17 00:03:43 martin Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c,v 1.12 2000/11/14 21:59:24 dawes Exp $
  * 
  */
 
@@ -46,6 +46,7 @@
 # include <errno.h>
 # include <stdio.h>
 # include <string.h>
+# define SYSCALL(call) while(((call) == -1) && (errno == EINTR))
 #endif
 
 /*
@@ -76,8 +77,6 @@ static int		xf86SigIOMax;
 static int		xf86SigIOMaxFd;
 static fd_set		xf86SigIOMask;
 
-#define SYSCALL(call) while(((call) == -1) && (errno == EINTR))
-
 /*
  * SIGIO gives no way of discovering which fd signalled, select
  * to discover
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h
index e444f7366..4549805b3 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h,v 3.75 2000/10/17 16:53:19 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h,v 3.76 2000/11/14 21:59:23 dawes Exp $ */
 /*
  * Copyright 1990, 1991 by Thomas Roell, Dinkelscherben, Germany
  * Copyright 1992 by David Dawes <dawes@XFree86.org>
@@ -889,6 +889,8 @@ double RInt(
 # endif
 #endif
 
+#define SYSCALL(call) while(((call) == -1) && (errno == EINTR))
+
 #define XF86_OS_PRIVS
 #include "xf86_OSproc.h"
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h
index ad389070d..1096a242d 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h
@@ -64,11 +64,15 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h,v 3.46 2000/08/23 21:06:21 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h,v 3.47 2000/11/14 18:20:37 dawes Exp $ */
 
 #ifndef _XF86_OSPROC_H
 #define _XF86_OSPROC_H
 
+#ifdef XF86_OS_PRIVS
+#include "xf86Pci.h"
+#endif
+
 /*
  * The actual prototypes have been pulled into this seperate file so
  * that they can can be used without pulling in all of the OS specific
@@ -257,6 +261,7 @@ resPtr xf86PciBusAccWindowsFromOS(void);
 resPtr xf86IsaBusAccWindowsFromOS(void);
 resPtr xf86AccResFromOS(resPtr ret);
 #endif /* NEED_OS_RAC_PROTOS */
+
 Bool xf86GetPciSizeFromOS(PCITAG tag, int index, int* bits);
 
 #endif /* XF86_OS_PRIVS */
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Monitor.c b/xc/programs/Xserver/hw/xfree86/parser/Monitor.c
index 9b91207c9..9009cc231 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Monitor.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Monitor.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Monitor.c,v 1.15 2000/10/24 22:45:10 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Monitor.c,v 1.17 2000/11/15 00:22:27 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -201,6 +201,7 @@ xf86parseModeLine (void)
 			if (xf86getToken (NULL) != NUMBER)
 				Error (NUMBER_MSG, "Vscan");
 			ptr->ml_vscan = val.num;
+			ptr->ml_flags |= XF86CONF_VSCAN;
 			break;
 		case TT_CUSTOM:
 			ptr->ml_flags |= XF86CONF_CUSTOM;
@@ -345,6 +346,7 @@ xf86parseVerboseMode (void)
 		case VSCAN:
 			if (xf86getToken (NULL) != NUMBER)
 				Error ("Vertical scan count expected", NULL);
+			ptr->ml_flags |= XF86CONF_VSCAN;
 			ptr->ml_vscan = val.num;
 			break;
 		case EOF_TOKEN:
@@ -634,10 +636,12 @@ xf86printMonitorSection (FILE * cf, XF86ConfMonitorPtr ptr)
 {
 	int i;
 	XF86ConfModeLinePtr mlptr;
+	XF86ConfModesLinkPtr mptr;
 	XF86OptionPtr optr;
 
 	while (ptr)
 	{
+		mptr = ptr->mon_modes_sect_lst;
 		fprintf (cf, "Section \"Monitor\"\n");
 		if (ptr->mon_comment)
 			fprintf (cf, "\t###          \"%s\"\n", ptr->mon_comment);
@@ -647,6 +651,10 @@ xf86printMonitorSection (FILE * cf, XF86ConfMonitorPtr ptr)
 			fprintf (cf, "\tVendorName   \"%s\"\n", ptr->mon_vendor);
 		if (ptr->mon_modelname)
 			fprintf (cf, "\tModelName    \"%s\"\n", ptr->mon_modelname);
+		while (mptr) {
+			fprintf (cf, "\tUseModes     \"%s\"\n", mptr->ml_modes_str);
+			mptr = mptr->list.next;
+		}
 		if (ptr->mon_width)
 			fprintf (cf, "\tDisplaySize  %d\t%d\n",
 					 ptr->mon_width,
@@ -760,6 +768,8 @@ xf86printModesSection (FILE * cf, XF86ConfModesPtr ptr)
 				fprintf (cf, " doublescan");
 			if (mlptr->ml_flags & XF86CONF_HSKEW)
 				fprintf (cf, " hskew %d", mlptr->ml_hskew);
+			if (mlptr->ml_flags & XF86CONF_VSCAN)
+				fprintf (cf, " vscan %d", mlptr->ml_vscan);
 			if (mlptr->ml_flags & XF86CONF_BCAST)
 				fprintf (cf, " bcast");
 			fprintf (cf, "\n");
@@ -870,6 +880,7 @@ xf86validateMonitor (XF86ConfigPtr p, XF86ConfScreenPtr screen)
 					     screen->scrn_identifier);
 			return (FALSE);
 		}
+		modeslnk->ml_modes = modes;
 		modeslnk = modeslnk->list.next;
 	}
 	return (TRUE);
diff --git a/xc/programs/Xserver/hw/xfree86/parser/read.c b/xc/programs/Xserver/hw/xfree86/parser/read.c
index 1be2b5760..b684ab210 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/read.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/read.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/read.c,v 1.14 2000/11/02 19:10:58 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/read.c,v 1.15 2000/11/15 00:22:27 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -210,6 +210,7 @@ xf86freeConfig (XF86ConfigPtr p)
 	xf86freeModules (p->conf_modules);
 	xf86freeFlags (p->conf_flags);
 	xf86freeMonitorList (p->conf_monitor_lst);
+	xf86freeModesList (p->conf_modes_lst);
 	xf86freeVideoAdaptorList (p->conf_videoadaptor_lst);
 	xf86freeDeviceList (p->conf_device_lst);
 	xf86freeScreenList (p->conf_screen_lst);
diff --git a/xc/programs/Xserver/hw/xfree86/parser/write.c b/xc/programs/Xserver/hw/xfree86/parser/write.c
index 8d5ab3a0c..9afe9a549 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/write.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/write.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/write.c,v 1.11 2000/10/20 14:59:03 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/write.c,v 1.12 2000/11/14 17:33:01 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -90,6 +90,8 @@ doWriteConfigFile (const char *filename, XF86ConfigPtr cptr)
 
 	xf86printVideoAdaptorSection (cf, cptr->conf_videoadaptor_lst);
 
+	xf86printModesSection (cf, cptr->conf_modes_lst);
+
 	xf86printMonitorSection (cf, cptr->conf_monitor_lst);
 
 	xf86printDeviceSection (cf, cptr->conf_device_lst);
diff --git a/xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h b/xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h
index 5a780e6cb..3bfce72a9 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h
+++ b/xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h,v 1.25 2000/11/02 19:58:21 anderson Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h,v 1.26 2000/11/15 00:22:27 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -83,6 +83,7 @@ XF86ConfModuleRec, *XF86ConfModulePtr;
 #define XF86CONF_HSKEW     0x0200	/* hskew provided */
 #define XF86CONF_BCAST     0x0400
 #define XF86CONF_CUSTOM    0x0800	/* timing numbers customized by editor */
+#define XF86CONF_VSCAN     0x1000
 
 typedef struct
 {
@@ -421,7 +422,7 @@ XF86ConfVendorPtr xf86findVendor(const char *name, XF86ConfVendorPtr list);
 XF86ConfVideoAdaptorPtr xf86findVideoAdaptor(const char *ident,
 						XF86ConfVideoAdaptorPtr p);
 
-GenericListPtr xf86addListItem(GenericListPtr head, GenericListPtr new);
+GenericListPtr xf86addListItem(GenericListPtr head, GenericListPtr c_new);
 
 int xf86pathIsAbsolute(const char *path);
 int xf86pathIsSafe(const char *path);
diff --git a/xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c b/xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c
index 2730ba091..d14a5097d 100644
--- a/xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c
+++ b/xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c,v 1.41 2000/11/03 18:46:17 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c,v 1.42 2000/11/14 18:20:38 dawes Exp $ */
 
 /*
  *
@@ -30,7 +30,7 @@
 #define SAVE_FONT1
 #endif
 
-#if defined(Lynx) || defined(CSRG_BASED) || defined(MACH386) || defined(linux) || defined(AMOEBA) || defined(MINIX) || defined(__QNX__) || defined(sun)
+#if defined(Lynx) || defined(CSRG_BASED) || defined(MACH386) || defined(linux) || defined(AMOEBA) || defined(MINIX) || defined(__QNX__) || defined(sun) || defined(__GNU__)
 #ifndef NEED_SAVED_CMAP
 #define NEED_SAVED_CMAP
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/xf86Version.h b/xc/programs/Xserver/hw/xfree86/xf86Version.h
index a1ffbf12c..ca47f3eb3 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86Version.h
+++ b/xc/programs/Xserver/hw/xfree86/xf86Version.h
@@ -1,13 +1,13 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf86Version.h,v 3.449 2000/11/06 18:21:56 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf86Version.h,v 3.450 2000/11/16 20:43:23 dawes Exp $ */
 
-#define XF86_VERSION " 4.0.1e "
+#define XF86_VERSION " 4.0.1f "
 
 /* The finer points in versions... */
 #define XF86_VERSION_MAJOR	4
 #define XF86_VERSION_MINOR	0
 #define XF86_VERSION_SUBMINOR	1
 #define XF86_VERSION_BETA	0	/* 0="", 1="A", 2="B", etc... */
-#define XF86_VERSION_ALPHA	5	/* 0="", 1="a", 2="b", etc... */
+#define XF86_VERSION_ALPHA	6	/* 0="", 1="a", 2="b", etc... */
 
 #define XF86_VERSION_NUMERIC(major,minor,subminor,beta,alpha)	\
    ((((((((major << 7) | minor) << 7) | subminor) << 5) | beta) << 5) | alpha)
@@ -18,6 +18,6 @@
 			XF86_VERSION_BETA,			\
 			XF86_VERSION_ALPHA)
 
-#define XF86_DATE	"6 November 2000"
+#define XF86_DATE	"16 November 2000"
 
 /* $XConsortium: xf86Version.h /main/78 1996/10/28 05:42:10 kaleb $ */
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/loader.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/loader.c
index 6d836644c..4a562d422 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/loader.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/loader.c
@@ -26,7 +26,7 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/loader.c,v 1.1 2000/10/20 14:59:05 alanh Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/loader.c,v 1.2 2000/11/08 17:58:43 alanh Exp $
  */
 #define LOADER_PRIVATE
 #include "loader.h"
@@ -227,9 +227,6 @@ LOOKUP xfree86LookupTab[] = {
    SYMFUNC(xf86shmctl)
    SYMFUNC(xf86setjmp)
    SYMFUNC(xf86longjmp)
-#ifdef __alpha__
-   SYMFUNC(_bus_base)
-#endif
 
     SYMFUNC(xf86AddDriver)
     {0,0}
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/vidmode.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/vidmode.c
index e9dafe5cf..9316a5211 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/vidmode.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/vidmode.c
@@ -26,7 +26,7 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/vidmode.c,v 1.3 2000/10/20 14:59:08 alanh Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/vidmode.c,v 1.4 2000/11/14 21:59:24 dawes Exp $
  */
 
 /*
@@ -34,7 +34,6 @@
  */
 
 #include "vidmode.h"
-#include <X11/extensions/Xinerama.h>
 #include <X11/Xaw/Command.h>
 #include <X11/Xaw/Form.h>
 #include <X11/Xaw/Label.h>
diff --git a/xc/programs/Xserver/os/utils.c b/xc/programs/Xserver/os/utils.c
index 29936b2b2..e9e138d29 100644
--- a/xc/programs/Xserver/os/utils.c
+++ b/xc/programs/Xserver/os/utils.c
@@ -45,7 +45,7 @@ OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE
 OR PERFORMANCE OF THIS SOFTWARE.
 
 */
-/* $XFree86: xc/programs/Xserver/os/utils.c,v 3.65 2000/09/29 22:09:06 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/os/utils.c,v 3.66 2000/11/14 18:20:38 dawes Exp $ */
 #ifdef __CYGWIN__
 #include <stdlib.h>
 #include <signal.h>
@@ -155,7 +155,7 @@ extern int SelectWaitTime;
 #ifdef MEMBUG
 #define MEM_FAIL_SCALE 100000
 long Memory_fail = 0;
-#ifdef linux
+#ifndef X_NOT_STDC_ENV
 #include <stdlib.h>  /* for random() */
 #endif
 #endif
diff --git a/xc/programs/Xserver/os/xalloc.c b/xc/programs/Xserver/os/xalloc.c
index 8acdf3256..7c3ec2bf4 100644
--- a/xc/programs/Xserver/os/xalloc.c
+++ b/xc/programs/Xserver/os/xalloc.c
@@ -25,7 +25,7 @@ dealings in this Software without prior written authorization from
 Pascal Haible.
 */
 
-/* $XFree86: xc/programs/Xserver/os/xalloc.c,v 3.27 2000/08/23 22:10:17 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/os/xalloc.c,v 3.28 2000/11/14 18:20:38 dawes Exp $ */
 
 /* Only used if INTERNAL_MALLOC is defined
  * - otherwise xalloc() in utils.c is used
@@ -249,6 +249,15 @@ static unsigned long *free_lists[MAX_SMALL/SIZE_STEPS];
 #define HAS_GETPAGESIZE
 #endif /* linux */
 
+#if defined(__GNU__)
+#define HAS_MMAP_ANON
+#include <sys/types.h>
+#include <sys/mman.h>
+#include <mach/vm_param.h>     /* PAGE_SIZE */
+#define HAS_SC_PAGESIZE
+#define HAS_GETPAGESIZE
+#endif /* __GNU__ */
+
 #if defined(CSRG_BASED)
 #define HAS_MMAP_ANON
 #define HAS_GETPAGESIZE
diff --git a/xc/programs/Xserver/xkb/ddxLoad.c b/xc/programs/Xserver/xkb/ddxLoad.c
index b67c64e9a..94debe75e 100644
--- a/xc/programs/Xserver/xkb/ddxLoad.c
+++ b/xc/programs/Xserver/xkb/ddxLoad.c
@@ -24,7 +24,7 @@ OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION  WITH
 THE USE OR PERFORMANCE OF THIS SOFTWARE.
 
 ********************************************************/
-/* $XFree86: xc/programs/Xserver/xkb/ddxLoad.c,v 3.25 2000/06/15 22:04:13 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/xkb/ddxLoad.c,v 3.26 2000/11/14 18:20:38 dawes Exp $ */
 
 #include <stdio.h>
 #include <ctype.h>
@@ -41,7 +41,7 @@ THE USE OR PERFORMANCE OF THIS SOFTWARE.
 #include "XKBsrv.h"
 #include "XI.h"
 
-#if defined(CSRG_BASED) || defined(linux) || defined(__sgi) || defined(AIXV3) || defined(__osf__)
+#if defined(CSRG_BASED) || defined(linux) || defined(__sgi) || defined(AIXV3) || defined(__osf__) || defined(__GNU__)
 #include <paths.h>
 #endif