4.0.1e merge

1 files changed, 11 insertions, 19 deletions

diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c
index 5ec08696f..0979a7281 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c,v 1.54 2000/10/24 22:45:07 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c,v 1.55 2000/11/02 02:51:19 dawes Exp $ */
 /*
  * Copyright 1994 by Robin Cutshaw <robin@XFree86.org>
  *
@@ -50,12 +50,10 @@
 #include "mga_bios.h"
 #include "mga_reg.h"
 #include "mga.h"
+#include "mga_macros.h"
 
 #include "xf86DDC.h"
 
-/* Set to 1 if you want to set MCLK from XF86Config - AT YOUR OWN RISK! */
-#define MCLK_FROM_XCONFIG 0
-
 /*
  * Only change these bits in the Option register.  Make sure that the
  * vgaioen bit is never in this mask because it is controlled elsewhere
@@ -269,7 +267,6 @@ MGATi3026CalcClock (
 	return f_pll;
 }
 
-#ifndef USEMGAHAL
 /*
  * MGATi3026SetMCLK - Set the memory clock (MCLK) PLL.
  *
@@ -353,7 +350,6 @@ MGATi3026SetMCLK( ScrnInfoPtr pScrn, long f_out )
 		;
 	}
 }
-#endif
 
 /*
  * MGATi3026SetPCLK - Set the pixel (PCLK) and loop (LCLK) clocks.
@@ -505,9 +501,7 @@ MGA3026Init(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	int i, BppShift, index_1d = 0;
 	const unsigned char* initDAC;
 	MGAPtr pMga = MGAPTR(pScrn);
-#ifndef USEMGAHAL
 	MGARamdacPtr MGAdac = &pMga->Dac;
-#endif
 	MGAFBLayout *pLayout = &pMga->CurrentLayout;
 	MGARegPtr pReg = &pMga->ModeReg;
 	vgaRegPtr pVga = &VGAHWPTR(pScrn)->ModeReg;
@@ -720,9 +714,7 @@ MGA3026Init(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	   but that's no big deal since we will Restore right after
 	   this function */
 
-#ifndef USEMGAHAL
-	MGATi3026SetMCLK( pScrn, MGAdac->MemoryClock );
-#endif
+	MGA_NOT_HAL(MGATi3026SetMCLK(pScrn, MGAdac->MemoryClock));
 
 #ifdef DEBUG		
 	ErrorF("%6ld: %02X %02X %02X	%02X %02X %02X	%08lX\n", mode->Clock,
@@ -760,7 +752,7 @@ MGA3026Restore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg,
 	pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, OPTION_MASK,
 		       mgaReg->Option);
 
-#ifndef USEMGAHAL
+	MGA_NOT_HAL(
 	/* select pixel clock PLL as clock source */
 	outTi3026(TVP3026_CLK_SEL, 0, mgaReg->DacRegs[3]);
 	
@@ -768,7 +760,7 @@ MGA3026Restore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg,
 	outTi3026(TVP3026_PLL_ADDR, 0, 0x2A);
 	outTi3026(TVP3026_LOAD_CLK_DATA, 0, 0);
 	outTi3026(TVP3026_PIX_CLK_DATA, 0, 0);
-#endif
+	);	/* MGA_NOT_HAL */
 	 
 	/*
 	 * This function handles restoring the generic VGA registers.
@@ -782,7 +774,7 @@ MGA3026Restore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg,
 	 * goes here. 
 	 */
 
-#ifndef USEMGAHAL
+	MGA_NOT_HAL(
 	/* program pixel clock PLL */
 	outTi3026(TVP3026_PLL_ADDR, 0, 0x00);
 	for (i = 0; i < 3; i++)
@@ -796,20 +788,20 @@ MGA3026Restore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg,
 
 	/* set Q divider for loop clock PLL */
 	outTi3026(TVP3026_MCLK_CTL, 0, mgaReg->DacRegs[18]);
-#endif
+	);	/* MGA_NOT_HAL */
 	
 	/* program loop PLL */
 	outTi3026(TVP3026_PLL_ADDR, 0, 0x00);
 	for (i = 3; i < 6; i++)
 		outTi3026(TVP3026_LOAD_CLK_DATA, 0, mgaReg->DacClk[i]);
 
-#ifndef USEMGAHAL
+	MGA_NOT_HAL(
 	if ((vgaReg->MiscOutReg & 0x08) && ((mgaReg->DacClk[3] & 0xC0) == 0xC0) ) {
 		/* poll until loop PLL LOCK bit is set */
 		outTi3026(TVP3026_PLL_ADDR, 0, 0x3F);
 		while ( ! (inTi3026(TVP3026_LOAD_CLK_DATA) & 0x40) );
 	}
-#endif
+	);	/* MGA_NOT_HAL */
 
 	/*
 	 * restore other DAC registers
@@ -862,7 +854,7 @@ MGA3026Save(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg,
 		mgaReg->ExtVga[i] = INREG8(0x1FDF);
 	}
 
-#ifndef USEMGAHAL
+	MGA_NOT_HAL(
 	outTi3026(TVP3026_PLL_ADDR, 0, 0x00);
 	for (i = 0; i < 3; i++)
 		outTi3026(TVP3026_PIX_CLK_DATA, 0, mgaReg->DacClk[i] =
@@ -872,7 +864,7 @@ MGA3026Save(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg,
 	for (i = 3; i < 6; i++)
 		outTi3026(TVP3026_LOAD_CLK_DATA, 0, mgaReg->DacClk[i] =
 					inTi3026(TVP3026_LOAD_CLK_DATA));
-#endif
+	);	/* MGA_NOT_HAL */
 	
 	for (i = 0; i < DACREGSIZE; i++)
 		mgaReg->DacRegs[i]	 = inTi3026(MGADACregs[i]);