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authoragd5f <agd5f>2004-03-26 17:09:04 +0000
committeragd5f <agd5f>2004-03-26 17:09:04 +0000
commita6abdf9f345474d00ce9a7dc927bbd74cf3bb036 (patch)
tree4606f0a1f2b7e1f69ab2b1e48720fa1e9179e6b1
parent43fc0834873e378d99b4021496da21314cfceded (diff)
- Fix tile mode and enable it by default. It can still be disabled with the
"disabletile" option - fix xrandr with tile mode (still broken in linear mode) - clean up some cruft and unnecassary code in savage_video.c - correct the comments and fix spelling errors in savage_accel.c
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c22
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c36
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c11
3 files changed, 12 insertions, 57 deletions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c
index c00923c9e..59aede666 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c
@@ -516,7 +516,6 @@ void SavageSetGBD_Twister(ScrnInfoPtr pScrn)
| 0xC0000000 | (psav->lDelta & 0x00001fff));
}
-#if 0
/*
* CR69, bit 7 = 1
* to use MM streams processor registers to control primary stream.
@@ -524,7 +523,6 @@ void SavageSetGBD_Twister(ScrnInfoPtr pScrn)
OUTREG8(CRT_ADDRESS_REG,0x69);
byte = INREG8(CRT_DATA_REG) | 0x80;
OUTREG8(CRT_DATA_REG,byte);
-#endif
OUTREG32(0x8128, 0xFFFFFFFFL);
OUTREG32(0x812C, 0xFFFFFFFFL);
@@ -561,7 +559,7 @@ void SavageSetGBD_Twister(ScrnInfoPtr pScrn)
* 01: destination tiling format
* 10: texture tiling format
* 11: reserved
- * bit 29: block write disble/enable
+ * bit 28: block write disble/enable
* 0: disable
* 1: enable
*/
@@ -572,7 +570,7 @@ void SavageSetGBD_Twister(ScrnInfoPtr pScrn)
* 01: reserved
* 10: 16 bpp tiles
* 11: 32 bpp tiles
- * bit 29: block write disable/enable
+ * bit 28: block write disable/enable
* 0: enable
* 1: disable
*/
@@ -657,7 +655,6 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
byte = INREG8(SEQ_DATA_REG) | 0x20;
OUTREG8(SEQ_DATA_REG,byte);
-#if 0
/*
* CR67_3:
* = 1 stream processor MMIO address and stride register
@@ -677,7 +674,6 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
OUTREG8(CRT_DATA_REG,byte);
OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA1);
-#endif
/*
* load ps1 active registers as determined by MM81C0/81C4
@@ -784,7 +780,7 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
* 01: reserved
* 10: 16 bit
* 11: 32 bit
- * bit 29: block write disble/enable
+ * bit 28: block write disble/enable
* 0: enable
* 1: disable
*/
@@ -864,7 +860,6 @@ void SavageSetGBD_PM(ScrnInfoPtr pScrn)
byte = INREG8(SEQ_DATA_REG) | 0x20;
OUTREG8(SEQ_DATA_REG,byte);
-#if 0
/*
* CR67_3:
* = 1 stream processor MMIO address and stride register
@@ -884,7 +879,6 @@ void SavageSetGBD_PM(ScrnInfoPtr pScrn)
OUTREG8(CRT_DATA_REG,byte);
OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA1);
-#endif
/*
* load ps1 active registers as determined by MM81C0/81C4
@@ -930,9 +924,11 @@ void SavageSetGBD_PM(ScrnInfoPtr pScrn)
}
/* MM81C0 and 81C4 are used to control primary stream. */
- OUTREG32(PRI_STREAM_FBUF_ADDR0,0x80000000);
+ /*OUTREG32(PRI_STREAM_FBUF_ADDR0,0x80000000);*/
+ OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000);
OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000);
- OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x80000000);
+ /*OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x80000000);*/
+ OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x00000000);
OUTREG32(PRI_STREAM2_FBUF_ADDR1,0x00000000);
OUTREG32(0x8128, 0xFFFFFFFFL);
@@ -1363,7 +1359,7 @@ SavageInitAccel(ScreenPtr pScreen)
pSAVAGEDRIServer->depthPitch = tiledwidthBytes;
xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "depthOffset:0x%08lx,depthPicth:%d\n",
+ "depthOffset:0x%08lx,depthPitch:%d\n",
pSAVAGEDRIServer->depthOffset,pSAVAGEDRIServer->depthPitch);
/* Reserve space for the shared back buffer */
@@ -1373,7 +1369,7 @@ SavageInitAccel(ScreenPtr pScreen)
pSAVAGEDRIServer->backPitch = tiledwidthBytes;
xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "backOffset:0x%08lx,backPicth:%d\n",
+ "backOffset:0x%08lx,backPitch:%d\n",
pSAVAGEDRIServer->backOffset,pSAVAGEDRIServer->backPitch);
/*scanlines = pSAVAGEDRIServer->backOffset / widthBytes - 1;*/
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c
index f6b6a342f..803957bf2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c
@@ -1068,9 +1068,7 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags)
"Option: ForceInit enabled\n" );
/* we can use Option "DisableTile TRUE" to disable tile mode */
- psav->bDisableTile = TRUE; /* AGD: was FALSE; however, I gain about 30 fps
- defaulting to linear mode, and it seems to render
- the same either way */
+ psav->bDisableTile = FALSE;
if (xf86GetOptValBool(psav->Options, OPTION_DISABLE_TILE,&psav->bDisableTile)) {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Option: %s Tile Mode and Program it \n",(psav->bDisableTile?"Disable":"Enable"));
@@ -2088,13 +2086,6 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr,
}
}
- /* enable streams */
- VerticalRetraceWait();
- VGAOUT8(vgaCRIndex, 0x69);
- VGAOUT8(vgaCRReg, restore->CR69);
- VGAOUT8(vgaCRIndex, 0x67);
- VGAOUT8(vgaCRReg, restore->CR67);
-
SavageInitialize2DEngine(pScrn);
VGAOUT16(vgaCRIndex, 0x0140);
@@ -2783,7 +2774,7 @@ static int SavageInternalScreenInit(int scrnIndex, ScreenPtr pScreen)
ret = fbScreenInit(pScreen, FBStart, width, height,
pScrn->xDpi, pScrn->yDpi,
- displayWidth,
+ psav->ulAperturePitch / (pScrn->bitsPerPixel >> 3), /*displayWidth,*/
pScrn->bitsPerPixel);
return ret;
}
@@ -2921,27 +2912,6 @@ static Bool SavageModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
break;
}
- /* setup streams */
- switch (psav->Chipset) {
- case S3_SAVAGE3D:
- case S3_SAVAGE_MX:
- case S3_SUPERSAVAGE:
- new->CR67 |= 0x08; /* CR67[3] = 1 : Mem-mapped regs */
- /*new->CR67 |= 0x04;*/ /* CR67[2] = 1 : enable stream 1 */
- /*new->CR67 |= 0x02;*/ /* CR67[1] = 1 : enable stream 2 */
- new->CR69 = 0;
- break;
- case S3_SAVAGE4:
- case S3_TWISTER:
- case S3_PROSAVAGE:
- case S3_PROSAVAGEDDR:
- case S3_SAVAGE2000:
- new->CR69 = 0x80; /* CR69[0] = 1 : Mem-mapped regs */
- /*new->CR67 |= 0x0c;*/ /* CR67[2] = 1 : enable stream 1 */
- break;
- default:
- break;
- }
if( psav->UseBIOS ) {
int refresh;
@@ -3166,7 +3136,7 @@ static Bool SavageModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
VGAOUT8(vgaCRIndex, 0x68);
new->CR68 = VGAIN8(vgaCRReg);
- /*new->CR69 = 0;*/
+ new->CR69 = 0;
VGAOUT8(vgaCRIndex, 0x6f);
new->CR6F = VGAIN8(vgaCRReg);
VGAOUT8(vgaCRIndex, 0x86);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c
index f868c24cb..2e4d78d87 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c
@@ -344,13 +344,6 @@ void SavageInitStreamsOld(ScrnInfoPtr pScrn)
}
-#undef OUTREG
-#if 0
-#define OUTREG(a,v) myOUTREG(psav,a,v)
-#else
-#define OUTREG(addr,val) MMIO_OUT32(psav->MapBase, addr, val)
-#endif
-
void SavageInitStreamsNew(ScrnInfoPtr pScrn)
{
SavagePtr psav = SAVPTR(pScrn);
@@ -501,7 +494,6 @@ void SavageStreamsOn(ScrnInfoPtr pScrn, int id)
psav->videoFourCC = id;
}
-
void SavageStreamsOff(ScrnInfoPtr pScrn)
{
SavagePtr psav = SAVPTR(pScrn);
@@ -521,7 +513,6 @@ void SavageStreamsOff(ScrnInfoPtr pScrn)
VGAOUT8( vgaCRIndex, EXT_MISC_CTRL2 );
if( S3_SAVAGE_MOBILE_SERIES(psav->Chipset) ||
- (psav->Chipset == S3_SUPERSAVAGE) ||
(psav->Chipset == S3_SAVAGE2000) )
jStreamsControl = VGAIN8( vgaCRReg ) & NO_STREAMS;
else
@@ -542,7 +533,6 @@ void SavageStreamsOff(ScrnInfoPtr pScrn)
psav->videoFlags &= ~VF_STREAMS_ON;
}
-
void SavageInitVideo(ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
@@ -554,7 +544,6 @@ void SavageInitVideo(ScreenPtr pScreen)
xf86ErrorFVerb(XVTRACE,"SavageInitVideo\n");
if(
S3_SAVAGE_MOBILE_SERIES(psav->Chipset) ||
- (psav->Chipset == S3_SUPERSAVAGE) ||
(psav->Chipset == S3_SAVAGE2000)
)
{