diff options
author | alanh <alanh> | 2001-05-17 15:20:40 +0000 |
---|---|---|
committer | alanh <alanh> | 2001-05-17 15:20:40 +0000 |
commit | 0a76777f470f063bf38c1247f612c6b6cbbcf0f2 (patch) | |
tree | 838a3936fbee86ea90a8eda7956ecea96e650eb4 | |
parent | 556edc9683bd21358d84da19c0449421835589a6 (diff) |
Make the SiS module work again.
At least glxinfo reports it's working,
yet trying to run the simple apps return 'out of video memory'
12 files changed, 1880 insertions, 817 deletions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c index 864509c71..918675dbc 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c @@ -199,7 +199,7 @@ Bool SISDRIScreenInit(ScreenPtr pScreen) { int major, minor, patch; DRIQueryVersion(&major, &minor, &patch); - if (major != 3 || minor != 1 || patch < 0) { + if (major != 4 || minor < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] SISDRIScreenInit failed because of a version mismatch.\n" "[dri] libDRI version is %d.%d.%d but version 4.0.x is needed.\n" diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c index ce650153d..7ee056f71 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c @@ -25,17 +25,9 @@ * Mitani Hiroshi <hmitani@drl.mei.co.jp> * David Thomas <davtom@dream.org.uk>. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c,v 1.29 1999/06/20 15:02:56 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c,v 1.61 2001/04/19 14:05:55 alanh Exp $ */ -#define DEBUG - -#define PSZ 8 -#include "cfb.h" -#undef PSZ -#include "cfb16.h" -#include "cfb24.h" -#include "cfb32.h" -#include "cfb24_32.h" +#include "fb.h" #include "xf1bpp.h" #include "xf4bpp.h" #include "mibank.h" @@ -50,51 +42,79 @@ #include "xf86cmap.h" #include "vgaHW.h" #include "xf86RAC.h" +#include "shadowfb.h" -#include "mipointer.h" +#include "sis_shadow.h" + +#include "mipointer.h" #include "mibstore.h" -#include "sis_regs.h" #include "sis.h" +#include "sis_regs.h" +#include "sis_bios.h" +#include "sis_vb.h" +#include "sis_dac.h" -#ifdef XFreeXDGA #define _XF86DGA_SERVER_ #include "extensions/xf86dgastr.h" -#endif -#ifdef DPMSExtension #include "globals.h" #define DPMS_SERVER #include "extensions/dpms.h" + +#ifdef XvExtension +#include "xf86xv.h" +#include "Xv.h" +#endif + +#ifdef XF86DRI +#include "dri.h" #endif -static void SISIdentify(int flags); -static Bool SISProbe(DriverPtr drv, int flags); -static Bool SISPreInit(ScrnInfoPtr pScrn, int flags); -static Bool SISScreenInit(int Index, ScreenPtr pScreen, int argc, - char **argv); -static Bool SISEnterVT(int scrnIndex, int flags); -static void SISLeaveVT(int scrnIndex, int flags); -static Bool SISCloseScreen(int scrnIndex, ScreenPtr pScreen); -static Bool SISSaveScreen(ScreenPtr pScreen, Bool unblank); - -/* Required if the driver supports mode switching */ -static Bool SISSwitchMode(int scrnIndex, DisplayModePtr mode, int flags); -/* Required if the driver supports moving the viewport */ -static void SISAdjustFrame(int scrnIndex, int x, int y, int flags); + +/* mandatory functions */ +static void SISIdentify(int flags); +static Bool SISProbe(DriverPtr drv, int flags); +static Bool SISPreInit(ScrnInfoPtr pScrn, int flags); +static Bool SISScreenInit(int Index, ScreenPtr pScreen, int argc, + char **argv); +static Bool SISEnterVT(int scrnIndex, int flags); +static void SISLeaveVT(int scrnIndex, int flags); +static Bool SISCloseScreen(int scrnIndex, ScreenPtr pScreen); +static Bool SISSaveScreen(ScreenPtr pScreen, int mode); +static Bool SISSwitchMode(int scrnIndex, DisplayModePtr mode, int flags); +static void SISAdjustFrame(int scrnIndex, int x, int y, int flags); /* Optional functions */ -static void SISFreeScreen(int scrnIndex, int flags); -static int SISValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, - int flags); +static void SISFreeScreen(int scrnIndex, int flags); +static int SISValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, + int flags); /* Internally used functions */ -static Bool SISMapMem(ScrnInfoPtr pScrn); -static Bool SISUnmapMem(ScrnInfoPtr pScrn); -static void SISSave(ScrnInfoPtr pScrn); -static void SISRestore(ScrnInfoPtr pScrn); -static Bool SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); +static Bool SISMapMem(ScrnInfoPtr pScrn); +static Bool SISUnmapMem(ScrnInfoPtr pScrn); +static void SISSave(ScrnInfoPtr pScrn); +static void SISRestore(ScrnInfoPtr pScrn); +static Bool SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); +static void SISModifyModeInfo(DisplayModePtr mode); +static void SiSPreSetMode(ScrnInfoPtr pScrn); + +void SiSOptions(ScrnInfoPtr pScrn); +OptionInfoPtr SISAvailableOptions(int chipid, int busid); +void SiSSetup(ScrnInfoPtr pScrn); +void SISVGAPreInit(ScrnInfoPtr pScrn); +Bool SiSAccelInit(ScreenPtr pScreen); +Bool SiS300AccelInit(ScreenPtr pScreen); +Bool SiS530AccelInit(ScreenPtr pScreen); +Bool SiSHWCursorInit(ScreenPtr pScreen); +Bool SISDGAInit(ScreenPtr pScreen); +void SISInitVideo(ScreenPtr pScreen); + + +#ifdef DEBUG +static void SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode); +#endif /* * This is intentionally screen-independent. It indicates the binding @@ -102,12 +122,6 @@ static Bool SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); */ static int pix24bpp = 0; -#define VERSION 4000 -#define SIS_NAME "SIS" -#define SIS_DRIVER_NAME "sis" -#define SIS_MAJOR_VERSION 1 -#define SIS_MINOR_VERSION 0 -#define SIS_PATCHLEVEL 0 /* * This contains the functions needed by the server after loading the driver @@ -118,67 +132,57 @@ static int pix24bpp = 0; */ DriverRec SIS = { - VERSION, - "accelerated driver for SiS chipsets", + SIS_CURRENT_VERSION, + SIS_DRIVER_NAME, SISIdentify, SISProbe, + SISAvailableOptions, NULL, 0 }; static SymTabRec SISChipsets[] = { - { PCI_CHIP_SG86C201, "SIS86c201" }, - { PCI_CHIP_SG86C202, "SIS86c202" }, - { PCI_CHIP_SG86C205, "SIS86c205" }, - { PCI_CHIP_SG86C215, "SIS86c215" }, - { PCI_CHIP_SG86C225, "SIS86c225" }, - { PCI_CHIP_SIS5597, "SIS5597" }, - { PCI_CHIP_SIS5597, "SIS5598" }, - { PCI_CHIP_SIS530, "SIS530" }, - { PCI_CHIP_SIS6326, "SIS6326" }, - { -1, NULL } +#if 0 + { PCI_CHIP_SG86C201, "SIS86c201" }, + { PCI_CHIP_SG86C202, "SIS86c202" }, + { PCI_CHIP_SG86C205, "SIS86c205" }, + { PCI_CHIP_SG86C215, "SIS86c215" }, + { PCI_CHIP_SG86C225, "SIS86c225" }, +#endif + { PCI_CHIP_SIS5597, "SIS5597" }, + { PCI_CHIP_SIS5597, "SIS5598" }, + { PCI_CHIP_SIS530, "SIS530" }, + { PCI_CHIP_SIS6326, "SIS6326" }, + { PCI_CHIP_SIS300, "SIS300" }, + { PCI_CHIP_SIS630, "SIS630" }, + { PCI_CHIP_SIS540, "SIS540" }, + { -1, NULL } }; static PciChipsets SISPciChipsets[] = { - { PCI_CHIP_SG86C201, PCI_CHIP_SG86C201, RES_SHARED_VGA }, - { PCI_CHIP_SG86C202, PCI_CHIP_SG86C202, RES_SHARED_VGA }, - { PCI_CHIP_SG86C205, PCI_CHIP_SG86C205, RES_SHARED_VGA }, - { PCI_CHIP_SG86C205, PCI_CHIP_SG86C205, RES_SHARED_VGA }, - { PCI_CHIP_SIS5597, PCI_CHIP_SIS5597, RES_SHARED_VGA }, - { PCI_CHIP_SIS530, PCI_CHIP_SIS530, RES_SHARED_VGA }, - { PCI_CHIP_SIS6326, PCI_CHIP_SIS6326, RES_SHARED_VGA }, - { -1, -1, RES_UNDEFINED } +#if 0 + { PCI_CHIP_SG86C201, PCI_CHIP_SG86C201, RES_SHARED_VGA }, + { PCI_CHIP_SG86C202, PCI_CHIP_SG86C202, RES_SHARED_VGA }, + { PCI_CHIP_SG86C205, PCI_CHIP_SG86C205, RES_SHARED_VGA }, + { PCI_CHIP_SG86C205, PCI_CHIP_SG86C205, RES_SHARED_VGA }, +#endif + { PCI_CHIP_SIS5597, PCI_CHIP_SIS5597, RES_SHARED_VGA }, + { PCI_CHIP_SIS530, PCI_CHIP_SIS530, RES_SHARED_VGA }, + { PCI_CHIP_SIS6326, PCI_CHIP_SIS6326, RES_SHARED_VGA }, + { PCI_CHIP_SIS300, PCI_CHIP_SIS300, RES_SHARED_VGA }, + { PCI_CHIP_SIS630, PCI_CHIP_SIS630, RES_SHARED_VGA }, + { PCI_CHIP_SIS540, PCI_CHIP_SIS540, RES_SHARED_VGA }, + { -1, -1, RES_UNDEFINED } }; -typedef enum { - OPTION_SW_CURSOR, - OPTION_HW_CURSOR, - OPTION_PCI_RETRY, - OPTION_RGB_BITS, - OPTION_NOACCEL, - OPTION_TURBOQUEUE, - OPTION_FAST_VRAM, - OPTION_SET_MEMCLOCK -} SISOpts; - -static OptionInfoRec SISOptions[] = { - { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_PCI_RETRY, "PciRetry", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_RGB_BITS, "rgbbits", OPTV_INTEGER, {0}, -1 }, - { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_TURBOQUEUE, "TurboQueue", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_SET_MEMCLOCK, "SetMClk", OPTV_FREQ, {0}, -1 }, - { OPTION_FAST_VRAM, "FastVram", OPTV_BOOLEAN, {0}, FALSE }, - { -1, NULL, OPTV_NONE, {0}, FALSE } -}; + int sisReg32MMIO[]={0x8280,0x8284,0x8288,0x828C,0x8290,0x8294,0x8298,0x829C, - 0x82A0,0x82A4,0x82A8,0x82AC}; + 0x82A0,0x82A4,0x82A8,0x82AC}; /* Engine Register for the 2nd Generation Graphics Engine */ int sis2Reg32MMIO[]={0x8200,0x8204,0x8208,0x820C,0x8210,0x8214,0x8218,0x821C, - 0x8220,0x8224,0x8228,0x822C,0x8230,0x8234,0x8238,0x823C, - 0x8240, 0x8300}; + 0x8220,0x8224,0x8228,0x822C,0x8230,0x8234,0x8238,0x823C, + 0x8240, 0x8300}; static const char *xaaSymbols[] = { "XAADestroyInfoRec", @@ -188,6 +192,9 @@ static const char *xaaSymbols[] = { "XAAOverlayFBfuncs", "XAACachePlanarMonoStipple", "XAAScreenIndex", + "XAACopyROP", + "XAAHelpPatternROP", + "XAAFillSolidRects", NULL }; @@ -209,14 +216,16 @@ static const char *vgahwSymbols[] = { static const char *fbSymbols[] = { "xf1bppScreenInit", "xf4bppScreenInit", - "cfbScreenInit", - "cfb16ScreenInit", - "cfb24ScreenInit", - "cfb24_32ScreenInit", - "cfb32ScreenInit", + "fbScreenInit", NULL }; +static const char *shadowSymbols[] = { + "ShadowFBInit", + NULL +}; + + static const char *ddcSymbols[] = { "xf86PrintEDID", "xf86DoEDID_DDC1", @@ -229,22 +238,65 @@ static const char *i2cSymbols[] = { NULL }; +#ifdef XF86DRI +static const char *drmSymbols[] = { + "drmAddBufs", + "drmAddMap", + "drmAvailable", + "drmCtlAddCommand", + "drmCtlInstHandler", + "drmGetInterruptFromBusID", + "drmMapBufs", + "drmMarkBufs", + "drmUnmapBufs", + "drmAgpAcquire", + "drmAgpRelease", + "drmAgpEnable", + "drmAgpAlloc", + "drmAgpFree", + "drmAgpBind", + "drmAgpGetMode", + "drmAgpBase", + "drmAgpSize", + "drmSiSAgpInit", + NULL +}; + +static const char *driSymbols[] = { + "DRIGetDrawableIndex", + "DRIFinishScreenInit", + "DRIDestroyInfoRec", + "DRICloseScreen", + "DRIDestroyInfoRec", + "DRIScreenInit", + "DRIQueryVersion", + "DRICreateInfoRec", + "DRILock", + "DRIUnlock", + "DRIGetSAREAPrivate", + "DRIGetContext", + "GlxSetVisualConfigs", + NULL +}; +#endif + + #ifdef XFree86LOADER static MODULESETUPPROTO(sisSetup); static XF86ModuleVersionInfo sisVersRec = { - "sis", - MODULEVENDORSTRING, - MODINFOSTRING1, - MODINFOSTRING2, - XF86_VERSION_CURRENT, - SIS_MAJOR_VERSION, SIS_MINOR_VERSION, SIS_PATCHLEVEL, - ABI_CLASS_VIDEODRV, /* This is a video driver */ - ABI_VIDEODRV_VERSION, - MOD_CLASS_VIDEODRV, - {0,0,0,0} + SIS_DRIVER_NAME, + MODULEVENDORSTRING, + MODINFOSTRING1, + MODINFOSTRING2, + XF86_VERSION_CURRENT, + SIS_MAJOR_VERSION, SIS_MINOR_VERSION, SIS_PATCHLEVEL, + ABI_CLASS_VIDEODRV, /* This is a video driver */ + ABI_VIDEODRV_VERSION, + MOD_CLASS_VIDEODRV, + {0,0,0,0} }; XF86ModuleData sisModuleData = { &sisVersRec, sisSetup, NULL }; @@ -255,11 +307,15 @@ sisSetup(pointer module, pointer opts, int *errmaj, int *errmin) static Bool setupDone = FALSE; if (!setupDone) { - setupDone = TRUE; - xf86AddDriver(&SIS, module, 0); - LoaderRefSymLists(vgahwSymbols, fbSymbols, i2cSymbols, - xaaSymbols, NULL); - return (pointer)TRUE; + setupDone = TRUE; + xf86AddDriver(&SIS, module, 0); + LoaderRefSymLists(vgahwSymbols, fbSymbols, i2cSymbols, xaaSymbols, + shadowSymbols, +#ifdef XF86DRI + drmSymbols, driSymbols, +#endif + NULL); + return (pointer)TRUE; } if (errmaj) *errmaj = LDR_ONCEONLY; @@ -277,7 +333,7 @@ SISGetRec(ScrnInfoPtr pScrn) * the allocation has already been done. */ if (pScrn->driverPrivate != NULL) - return TRUE; + return TRUE; pScrn->driverPrivate = xnfcalloc(sizeof(SISRec), 1); /* Initialise it */ @@ -289,63 +345,62 @@ static void SISFreeRec(ScrnInfoPtr pScrn) { if (pScrn->driverPrivate == NULL) - return; + return; xfree(pScrn->driverPrivate); pScrn->driverPrivate = NULL; } -#ifdef DPMSExtension static void SISDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags) { - unsigned char extDDC_PCR; - unsigned char crtc17 = 0; - unsigned char seq1 = 0 ; - int vgaIOBase = VGAHWPTR(pScrn)->IOBase; - - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,"SISDisplayPowerManagementSet(%d)\n",PowerManagementMode); - outb(vgaIOBase + 4, 0x17); - crtc17 = inb(vgaIOBase + 5); - outb(VGA_SEQ_INDEX, 0x11); - extDDC_PCR = inb(VGA_SEQ_DATA) & ~0xC0; - switch (PowerManagementMode) - { - case DPMSModeOn: - /* HSync: On, VSync: On */ - seq1 = 0x00 ; - crtc17 |= 0x80; - break; - case DPMSModeStandby: - /* HSync: Off, VSync: On */ - seq1 = 0x20 ; - extDDC_PCR |= 0x40; - break; - case DPMSModeSuspend: - /* HSync: On, VSync: Off */ - seq1 = 0x20 ; - extDDC_PCR |= 0x80; - break; - case DPMSModeOff: - /* HSync: Off, VSync: Off */ - seq1 = 0x20 ; - extDDC_PCR |= 0xC0; - /* DPMSModeOff is not supported with ModeStandby | ModeSuspend */ + unsigned char extDDC_PCR; + unsigned char crtc17 = 0; + unsigned char seq1 = 0 ; + int vgaIOBase = VGAHWPTR(pScrn)->IOBase; + + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,"SISDisplayPowerManagementSet(%d)\n",PowerManagementMode); + outb(vgaIOBase + 4, 0x17); + crtc17 = inb(vgaIOBase + 5); + outb(VGA_SEQ_INDEX, 0x11); + extDDC_PCR = inb(VGA_SEQ_DATA) & ~0xC0; + switch (PowerManagementMode) + { + case DPMSModeOn: + /* HSync: On, VSync: On */ + seq1 = 0x00 ; + crtc17 |= 0x80; + break; + case DPMSModeStandby: + /* HSync: Off, VSync: On */ + seq1 = 0x20 ; + extDDC_PCR |= 0x40; + break; + case DPMSModeSuspend: + /* HSync: On, VSync: Off */ + seq1 = 0x20 ; + extDDC_PCR |= 0x80; + break; + case DPMSModeOff: + /* HSync: Off, VSync: Off */ + seq1 = 0x20 ; + extDDC_PCR |= 0xC0; + /* DPMSModeOff is not supported with ModeStandby | ModeSuspend */ /* need same as the generic VGA function */ - crtc17 &= ~0x80; - break; - } - outw(VGA_SEQ_INDEX, 0x0100); /* Synchronous Reset */ - outb(VGA_SEQ_INDEX, 0x01); /* Select SEQ1 */ - seq1 |= inb(VGA_SEQ_DATA) & ~0x20; - outb(VGA_SEQ_DATA, seq1); - usleep(10000); - outb(vgaIOBase + 4, 0x17); - outb(vgaIOBase + 5, crtc17); - outb(VGA_SEQ_INDEX, 0x11); - outb(VGA_SEQ_DATA, extDDC_PCR); - outw(VGA_SEQ_INDEX, 0x0300); /* End Reset */ + crtc17 &= ~0x80; + break; + } + outw(VGA_SEQ_INDEX, 0x0100); /* Synchronous Reset */ + outb(VGA_SEQ_INDEX, 0x01); /* Select SEQ1 */ + seq1 |= inb(VGA_SEQ_DATA) & ~0x20; + outb(VGA_SEQ_DATA, seq1); + usleep(10000); + outb(vgaIOBase + 4, 0x17); + outb(vgaIOBase + 5, crtc17); + outb(VGA_SEQ_INDEX, 0x11); + outb(VGA_SEQ_DATA, extDDC_PCR); + outw(VGA_SEQ_INDEX, 0x0300); /* End Reset */ } -#endif + /* Mandatory */ static void @@ -355,14 +410,19 @@ SISIdentify(int flags) } static void -SIS1bppColorMap(ScrnInfoPtr pScrn) { -/* In 1 bpp we have color 0 at LUT 0 and color 1 at LUT 0x3f. - This makes white and black look right (otherwise they were both - black. I'm sure there's a better way to do that, just lazy to - search the docs. */ - - outb(0x3C8, 0x00); outb(0x3C9, 0x00); outb(0x3C9, 0x00); outb(0x3C9, 0x00); - outb(0x3C8, 0x3F); outb(0x3C9, 0x3F); outb(0x3C9, 0x3F); outb(0x3C9, 0x3F); +SIS1bppColorMap(ScrnInfoPtr pScrn) +{ + SISPtr pSiS = SISPTR(pScrn); + + outb(pSiS->RelIO+0x48, 0x00); + outb(pSiS->RelIO+0x49, 0x00); + outb(pSiS->RelIO+0x49, 0x00); + outb(pSiS->RelIO+0x49, 0x00); + + outb(pSiS->RelIO+0x48, 0x3F); + outb(pSiS->RelIO+0x49, 0x3F); + outb(pSiS->RelIO+0x49, 0x3F); + outb(pSiS->RelIO+0x49, 0x3F); } /* Mandatory */ @@ -399,12 +459,12 @@ SISProbe(DriverPtr drv, int flags) */ if ((numDevSections = xf86MatchDevice(SIS_DRIVER_NAME, - &devSections)) <= 0) { - /* - * There's no matching device section in the config file, so quit - * now. - */ - return FALSE; + &devSections)) <= 0) { + /* + * There's no matching device section in the config file, so quit + * now. + */ + return FALSE; } /* @@ -423,45 +483,48 @@ SISProbe(DriverPtr drv, int flags) * amounts to checking the PCI data that the server has already collected. */ if (xf86GetPciVideoInfo() == NULL) { - /* - * We won't let anything in the config file override finding no - * PCI video cards at all. This seems reasonable now, but we'll see. - */ - return FALSE; + /* + * We won't let anything in the config file override finding no + * PCI video cards at all. This seems reasonable now, but we'll see. + */ + return FALSE; } numUsed = xf86MatchPciInstances(SIS_NAME, PCI_VENDOR_SIS, - SISChipsets, SISPciChipsets, devSections, - numDevSections, drv, &usedChips); + SISChipsets, SISPciChipsets, devSections, + numDevSections, drv, &usedChips); /* Free it since we don't need that list after this */ xfree(devSections); - devSections = NULL; if (numUsed <= 0) - return FALSE; - - for (i = 0; i < numUsed; i++) { - ScrnInfoPtr pScrn; - - /* Allocate a ScrnInfoRec and claim the slot */ - pScrn = xf86AllocateScreen(drv, 0); - - /* Fill in what we can of the ScrnInfoRec */ - pScrn->driverVersion = VERSION; - pScrn->driverName = SIS_DRIVER_NAME; - pScrn->name = SIS_NAME; - pScrn->Probe = SISProbe; - pScrn->PreInit = SISPreInit; - pScrn->ScreenInit = SISScreenInit; - pScrn->SwitchMode = SISSwitchMode; - pScrn->AdjustFrame = SISAdjustFrame; - pScrn->EnterVT = SISEnterVT; - pScrn->LeaveVT = SISLeaveVT; - pScrn->FreeScreen = SISFreeScreen; - pScrn->ValidMode = SISValidMode; - foundScreen = TRUE; - xf86ConfigActivePciEntity(pScrn, usedChips[i], SISPciChipsets, - NULL, NULL, NULL, NULL, NULL); + return FALSE; + + if (flags & PROBE_DETECT) + foundScreen = TRUE; + else for (i = 0; i < numUsed; i++) { + ScrnInfoPtr pScrn; + + /* Allocate a ScrnInfoRec and claim the slot */ + pScrn = NULL; + + if ((pScrn = xf86ConfigPciEntity(pScrn, 0, usedChips[i], + SISPciChipsets, NULL, NULL, + NULL, NULL, NULL))) { + /* Fill in what we can of the ScrnInfoRec */ + pScrn->driverVersion = SIS_CURRENT_VERSION; + pScrn->driverName = SIS_DRIVER_NAME; + pScrn->name = SIS_NAME; + pScrn->Probe = SISProbe; + pScrn->PreInit = SISPreInit; + pScrn->ScreenInit = SISScreenInit; + pScrn->SwitchMode = SISSwitchMode; + pScrn->AdjustFrame = SISAdjustFrame; + pScrn->EnterVT = SISEnterVT; + pScrn->LeaveVT = SISLeaveVT; + pScrn->FreeScreen = SISFreeScreen; + pScrn->ValidMode = SISValidMode; + foundScreen = TRUE; + } } xfree(usedChips); return foundScreen; @@ -481,21 +544,23 @@ GetAccelPitchValues(ScrnInfoPtr pScrn) } #endif + /* Mandatory */ static Bool SISPreInit(ScrnInfoPtr pScrn, int flags) { SISPtr pSiS; MessageType from; - unsigned char videoram; - char *ramtype = NULL, *mclk = NULL; int vgaIOBase; int i; - double real; - unsigned char temp, unlock; + unsigned char unlock; ClockRangePtr clockRanges; char *mod = NULL; const char *Sym = NULL; + int pix24flags; + + if (flags & PROBE_DETECT) + return FALSE; /* * Note: This function is only called once at server startup, and @@ -512,11 +577,11 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) /* Check the number of entities, and fail if it isn't one. */ if (pScrn->numEntities != 1) - return FALSE; + return FALSE; /* The vgahw module should be loaded here when needed */ if (!xf86LoadSubModule(pScrn, "vgahw")) - return FALSE; + return FALSE; xf86LoaderReqSymLists(vgahwSymbols, NULL); @@ -524,18 +589,18 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) * Allocate a vgaHWRec */ if (!vgaHWGetHWRec(pScrn)) - return FALSE; + return FALSE; - VGAHWPTR(pScrn)->MapSize = 0x10000; /* Standard 64k VGA window */ + VGAHWPTR(pScrn)->MapSize = 0x10000; /* Standard 64k VGA window */ if (!vgaHWMapMem(pScrn)) - return FALSE; + return FALSE; vgaHWGetIOBase(VGAHWPTR(pScrn)); vgaIOBase = VGAHWPTR(pScrn)->IOBase; /* Allocate the SISRec driverPrivate */ if (!SISGetRec(pScrn)) { - return FALSE; + return FALSE; } pSiS = SISPTR(pScrn); pSiS->pScrn = pScrn; @@ -543,23 +608,23 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) /* Get the entity, and make sure it is PCI. */ pSiS->pEnt = xf86GetEntityInfo(pScrn->entityList[0]); if (pSiS->pEnt->location.type != BUS_PCI) - return FALSE; + return FALSE; /* Find the PCI info for this screen */ pSiS->PciInfo = xf86GetPciInfoForEntity(pSiS->pEnt->index); pSiS->PciTag = pciTag(pSiS->PciInfo->bus, pSiS->PciInfo->device, - pSiS->PciInfo->func); + pSiS->PciInfo->func); /* * XXX This could be refined if some VGA memory resources are not * decoded in operating mode. */ { - resRange vgamem[] = { {ResShrMemBlock,0xA0000,0xAFFFF}, - {ResShrMemBlock,0xB0000,0xB7FFF}, - {ResShrMemBlock,0xB8000,0xBFFFF}, - _END }; - xf86SetOperatingState(vgamem, pSiS->pEnt->index, ResUnusedOpr); + resRange vgamem[] = { {ResShrMemBlock,0xA0000,0xAFFFF}, + {ResShrMemBlock,0xB0000,0xB7FFF}, + {ResShrMemBlock,0xB8000,0xBFFFF}, + _END }; + xf86SetOperatingState(vgamem, pSiS->pEnt->index, ResUnusedOpr); } /* Operations for which memory access is required */ @@ -569,70 +634,115 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) /* The ramdac module should be loaded here when needed */ if (!xf86LoadSubModule(pScrn, "ramdac")) - return FALSE; + return FALSE; /* Set pScrn->monitor */ pScrn->monitor = pScrn->confScreen->monitor; /* + * Set the Chipset and ChipRev, allowing config file entries to + * override. + */ + if (pSiS->pEnt->device->chipset && *pSiS->pEnt->device->chipset) { + pScrn->chipset = pSiS->pEnt->device->chipset; + pSiS->Chipset = xf86StringToToken(SISChipsets, pScrn->chipset); + from = X_CONFIG; + } else if (pSiS->pEnt->device->chipID >= 0) { + pSiS->Chipset = pSiS->pEnt->device->chipID; + pScrn->chipset = (char *)xf86TokenToString(SISChipsets, pSiS->Chipset); + + from = X_CONFIG; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n", + pSiS->Chipset); + } else { + from = X_PROBED; + pSiS->Chipset = pSiS->PciInfo->chipType; + pScrn->chipset = (char *)xf86TokenToString(SISChipsets, pSiS->Chipset); + } + if (pSiS->pEnt->device->chipRev >= 0) { + pSiS->ChipRev = pSiS->pEnt->device->chipRev; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n", + pSiS->ChipRev); + } else { + pSiS->ChipRev = pSiS->PciInfo->chipRev; + } + + /* + * This shouldn't happen because such problems should be caught in + * SISProbe(), but check it just in case. + */ + if (pScrn->chipset == NULL) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "ChipID 0x%04X is not recognised\n", pSiS->Chipset); + return FALSE; + } + if (pSiS->Chipset < 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Chipset \"%s\" is not recognised\n", pScrn->chipset); + return FALSE; + } + + + /* * The first thing we should figure out is the depth, bpp, etc. * Our default depth is 8, so pass it to the helper function. * Our preference for depth 24 is 24bpp, so tell it that too. */ - if (!xf86SetDepthBpp(pScrn, 8, 0, 0, Support24bppFb | - SupportConvert32to24 | PreferConvert32to24)) { - return FALSE; - } else { - /* Check that the returned depth is one we support */ - switch (pScrn->depth) { - case 1: - case 4: - case 8: - case 15: - case 16: - case 24: - /* OK */ - break; - default: - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Given depth (%d) is not supported by this driver\n", - pScrn->depth); - return FALSE; - } + pix24flags = Support32bppFb | Support24bppFb | + SupportConvert24to32 | SupportConvert32to24; + if (pSiS->Chipset == PCI_CHIP_SIS6326) + pix24flags |= PreferConvert32to24; + + if (!xf86SetDepthBpp(pScrn, 8, 8, 8, pix24flags)) + return FALSE; + + /* Check that the returned depth is one we support */ + switch (pScrn->depth) { + case 8: + case 15: + case 16: + case 24: + /* OK */ + break; + default: + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Given depth (%d) is not supported by this driver\n", + pScrn->depth); + return FALSE; } xf86PrintDepthBpp(pScrn); /* Get the depth24 pixmap format */ if (pScrn->depth == 24 && pix24bpp == 0) - pix24bpp = xf86GetBppFromDepth(pScrn, 24); + pix24bpp = xf86GetBppFromDepth(pScrn, 24); /* * This must happen after pScrn->display has been set because * xf86SetWeight references it. */ if (pScrn->depth > 8) { - /* The defaults are OK for us */ - rgb zeros = {0, 0, 0}; - - if (!xf86SetWeight(pScrn, zeros, zeros)) { - return FALSE; - } else { - /* XXX check that weight returned is supported */ - ; + /* The defaults are OK for us */ + rgb zeros = {0, 0, 0}; + + if (!xf86SetWeight(pScrn, zeros, zeros)) { + return FALSE; + } else { + /* XXX check that weight returned is supported */ + ; } } if (!xf86SetDefaultVisual(pScrn, -1)) { - return FALSE; + return FALSE; } else { - /* We don't currently support DirectColor at > 8bpp */ - if (pScrn->depth > 8 && pScrn->defaultVisual != TrueColor) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual" - " (%s) is not supported at depth %d\n", - xf86GetVisualName(pScrn->defaultVisual), pScrn->depth); - return FALSE; - } + /* We don't currently support DirectColor at > 8bpp */ + if (pScrn->depth > 8 && pScrn->defaultVisual != TrueColor) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual" + " (%s) is not supported at depth %d\n", + xf86GetVisualName(pScrn->defaultVisual), pScrn->depth); + return FALSE; + } } /* @@ -640,431 +750,187 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) */ { - Gamma zeros = {0.0, 0.0, 0.0}; + Gamma zeros = {0.0, 0.0, 0.0}; - if (!xf86SetGamma(pScrn, zeros)) { - return FALSE; - } + if (!xf86SetGamma(pScrn, zeros)) { + return FALSE; + } } /* We use a programamble clock */ pScrn->progClock = TRUE; - /* Collect all of the relevant option flags (fill in pScrn->options) */ - xf86CollectOptions(pScrn, NULL); - - /* Process the options */ - xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, SISOptions); - /* Set the bits per RGB for 8bpp mode */ if (pScrn->depth == 8) { - /* XXX This is here just to test options. */ - /* Default to 8 */ - pScrn->rgbBits = 6; -#if 0 - if (xf86GetOptValInteger(SISOptions, OPTION_RGB_BITS, - &pScrn->rgbBits)) { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Bits per RGB set to %d\n", - pScrn->rgbBits); - } -#endif - } - from = X_DEFAULT; - pSiS->HWCursor = TRUE; - if (xf86GetOptValBool(SISOptions, OPTION_HW_CURSOR, &pSiS->HWCursor)) - from = X_CONFIG; - if (xf86ReturnOptValBool(SISOptions, OPTION_SW_CURSOR, FALSE)) { - from = X_CONFIG; - pSiS->HWCursor = FALSE; - } - xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n", - pSiS->HWCursor ? "HW" : "SW"); - if (xf86ReturnOptValBool(SISOptions, OPTION_NOACCEL, FALSE)) { - pSiS->NoAccel = TRUE; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n"); - } - if (xf86ReturnOptValBool(SISOptions, OPTION_PCI_RETRY, FALSE)) { - pSiS->UsePCIRetry = TRUE; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "PCI retry enabled\n"); - } - if (xf86GetOptValFreq(SISOptions, OPTION_SET_MEMCLOCK, OPTUNITS_MHZ, - &real)) { - pSiS->MemClock = (int)(real * 1000.0); - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Memory clock set to %.3f MHz\n", - pSiS->MemClock/1000.0); - } - if (xf86ReturnOptValBool(SISOptions, OPTION_FAST_VRAM, FALSE)) { - pSiS->FastVram = TRUE; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Fast VRAM enabled\n"); + pScrn->rgbBits = 6; } - pSiS->TurboQueue = FALSE; /* For now */ - pSiS->ddc1Read = SiSddc1Read; - /* - * Set the Chipset and ChipRev, allowing config file entries to - * override. - */ - if (pSiS->pEnt->device->chipset && *pSiS->pEnt->device->chipset) { - pScrn->chipset = pSiS->pEnt->device->chipset; - pSiS->Chipset = xf86StringToToken(SISChipsets, pScrn->chipset); - from = X_CONFIG; - } else if (pSiS->pEnt->device->chipID >= 0) { - pSiS->Chipset = pSiS->pEnt->device->chipID; - pScrn->chipset = (char *)xf86TokenToString(SISChipsets, pSiS->Chipset); - - from = X_CONFIG; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n", - pSiS->Chipset); - } else { - from = X_PROBED; - pSiS->Chipset = pSiS->PciInfo->chipType; - pScrn->chipset = (char *)xf86TokenToString(SISChipsets, pSiS->Chipset); - } - if (pSiS->pEnt->device->chipRev >= 0) { - pSiS->ChipRev = pSiS->pEnt->device->chipRev; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n", - pSiS->ChipRev); - } else { - pSiS->ChipRev = pSiS->PciInfo->chipRev; - } + pSiS->ddc1Read = SiSddc1Read; /* this cap will be modified */ - /* - * This shouldn't happen because such problems should be caught in - * SISProbe(), but check it just in case. - */ - if (pScrn->chipset == NULL) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "ChipID 0x%04X is not recognised\n", pSiS->Chipset); - return FALSE; - } - if (pSiS->Chipset < 0) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Chipset \"%s\" is not recognised\n", pScrn->chipset); - return FALSE; - } + from = X_DEFAULT; outb(VGA_SEQ_INDEX, 0x05); unlock = inb(VGA_SEQ_DATA); outw(VGA_SEQ_INDEX, 0x8605); /* Unlock registers */ - switch (pSiS->Chipset) { - case PCI_CHIP_SG86C201: - case PCI_CHIP_SG86C202: - case PCI_CHIP_SG86C205: - case PCI_CHIP_SG86C215: - case PCI_CHIP_SG86C225: - pSiS->MaxClock = 135000; - pSiS->TurboQueue = FALSE; - break; - case PCI_CHIP_SIS5597: - pSiS->MaxClock = 135000; - pSiS->TurboQueue = FALSE; - xf86DrvMsg(pScrn->scrnIndex, from, "Memory clock was set by BIOS to %3.3fMHz\n",SiSMclk()/1000.0); - if (xf86ReturnOptValBool(SISOptions, OPTION_TURBOQUEUE, FALSE)) { - pSiS->TurboQueue = TRUE; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Enabling TurboQueue\n"); - } - break; - case PCI_CHIP_SIS6326: - case PCI_CHIP_SIS530: - pSiS->MaxClock = 175000; /* XXX Guess, need to check this */ - pSiS->TurboQueue = FALSE; /* Turn on for 6326 */ - xf86DrvMsg(pScrn->scrnIndex, from, "Memory clock was set by BIOS to %3.3fMHz\n",SiSMclk()/1000.0); - if (xf86ReturnOptValBool(SISOptions, OPTION_TURBOQUEUE, FALSE)) { - pSiS->TurboQueue = TRUE; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Enabling TurboQueue\n"); - } - outb(VGA_SEQ_INDEX, ExtConfStatus1); temp = inb(VGA_SEQ_DATA); - switch (temp & 0x03) { - case 0x00: - ramtype = "SGRAM/SDRAM"; - switch ((temp & 0xE0)>>5) { - case 0x00: - mclk = "66"; - break; - case 0x01: - mclk = "75"; - break; - case 0x02: - mclk = "83"; - break; - case 0x03: - mclk = "90"; - break; - case 0x04: - mclk = "100"; - break; - case 0x05: - mclk = "115"; - break; - case 0x06: - mclk = "134"; - break; - case 0x07: - mclk = "50"; - break; - } - break; - case 0x01: - ramtype = "2cycle EDO DRAM"; - switch ((temp & 0xE0)>>5) { - case 0x00: - mclk = "65"; - break; - case 0x01: - mclk = "70"; - break; - case 0x02: - mclk = "75"; - break; - case 0x03: - mclk = "80"; - break; - case 0x04: - mclk = "85"; - break; - case 0x05: - mclk = "90"; - break; - case 0x06: - mclk = "55"; - break; - case 0x07: - mclk = "60"; - break; - } - break; - case 0x02: - ramtype = "1cycle EDO DRAM"; - switch ((temp & 0xE0)>>5) { - case 0x00: - mclk = "50"; - break; - case 0x01: - mclk = "55"; - break; - case 0x02: - mclk = "60"; - break; - case 0x03: - mclk = "65"; - break; - case 0x04: - mclk = "70"; - break; - case 0x05: - mclk = "75"; - break; - case 0x06: - mclk = "80"; - break; - case 0x07: - mclk = "45"; - break; - } - break; - case 0x03: - ramtype = "Fast Page DRAM"; - switch ((temp & 0xE0)>>5) { - case 0x00: - mclk = "55"; - break; - case 0x01: - mclk = "60"; - break; - case 0x02: - mclk = "65"; - break; - case 0x03: - mclk = "70"; - break; - case 0x04: - mclk = "75"; - break; - case 0x05: - mclk = "80"; - break; - case 0x06: - mclk = "45"; - break; - case 0x07: - mclk = "50"; - break; - } - break; + /* get VBIOS image */ + if (!(pSiS->BIOS=xcalloc(1, BIOS_SIZE))) { + ErrorF("Allocate memory fail !!\n"); + return FALSE; } - xf86DrvMsg(pScrn->scrnIndex, from, "Installed RAM type is %s\n",ramtype); - xf86DrvMsg(pScrn->scrnIndex, from, "Memory speed is %sMHz\n",mclk); - break; + if (xf86ReadBIOS(BIOS_BASE, 0, pSiS->BIOS, BIOS_SIZE) != BIOS_SIZE) { + xfree(pSiS->BIOS); + ErrorF("Read VBIOS image fail !!\n"); + return FALSE; } + SiSOptions(pScrn); + SiSSetup(pScrn); + + from = X_PROBED; if (pSiS->pEnt->device->MemBase != 0) { - /* - * XXX Should check that the config file value matches one of the - * PCI base address values. - */ - pSiS->FbAddress = pSiS->pEnt->device->MemBase; - from = X_CONFIG; + /* + * XXX Should check that the config file value matches one of the + * PCI base address values. + */ + pSiS->FbAddress = pSiS->pEnt->device->MemBase; + from = X_CONFIG; } else { - pSiS->FbAddress = pSiS->PciInfo->memBase[0] & 0xFFFFFFF0; + pSiS->FbAddress = pSiS->PciInfo->memBase[0] & 0xFFFFFFF0; } xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n", - (unsigned long)pSiS->FbAddress); + (unsigned long)pSiS->FbAddress); if (pSiS->pEnt->device->IOBase != 0) { - /* - * XXX Should check that the config file value matches one of the - * PCI base address values. - */ - pSiS->IOAddress = pSiS->pEnt->device->IOBase; - from = X_CONFIG; + /* + * XXX Should check that the config file value matches one of the + * PCI base address values. + */ + pSiS->IOAddress = pSiS->pEnt->device->IOBase; + from = X_CONFIG; } else { - pSiS->IOAddress = pSiS->PciInfo->memBase[1] & 0xFFFFFFF0; + pSiS->IOAddress = pSiS->PciInfo->memBase[1] & 0xFFFFFFF0; } xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n", - (unsigned long)pSiS->IOAddress); + (unsigned long)pSiS->IOAddress); + + pSiS->RelIO = pSiS->PciInfo->ioBase[2] & 0xFFFC; + xf86DrvMsg(pScrn->scrnIndex, from, "Relocate IO registers at 0x%lX\n", + (unsigned long)pSiS->RelIO); /* Register the PCI-assigned resources. */ if (xf86RegisterResources(pSiS->pEnt->index, NULL, ResExclusive)) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "xf86RegisterResources() found resource conflicts\n"); - return FALSE; + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "xf86RegisterResources() found resource conflicts\n"); + return FALSE; } - /* HW bpp matches reported bpp */ - pSiS->HwBpp = pScrn->bitsPerPixel; - - if (pSiS->pEnt->device->videoRam != 0) { - pScrn->videoRam = pSiS->pEnt->device->videoRam; - from = X_CONFIG; - } else { - switch (pSiS->Chipset) { - - case PCI_CHIP_SG86C201: - case PCI_CHIP_SG86C202: - case PCI_CHIP_SG86C205: - case PCI_CHIP_SG86C215: - case PCI_CHIP_SG86C225: - outb(VGA_SEQ_INDEX, RAMSize); /* Memory configuration register */ - temp = inb(VGA_SEQ_DATA); - switch (temp & 0x03) { - case 0: - pScrn->videoRam = 1024; - break; - case 1: - pScrn->videoRam = 2048; - break; - case 2: - pScrn->videoRam = 4096; - break; - case 3: - pScrn->videoRam = 1024; - break; - } - case PCI_CHIP_SIS5597: - outb(VGA_SEQ_INDEX, FBSize); - /* The framebuffer size is configured in 256K increments - (512 for 64 bits bus) */ - pScrn->videoRam = (1+(inb(VGA_SEQ_DATA) & 7))*256; - outb(VGA_SEQ_INDEX, Mode64); - if ((inb(VGA_SEQ_DATA) >> 1) & 3) { - pScrn->videoRam *= 2; - } - break; - case PCI_CHIP_SIS6326: - case PCI_CHIP_SIS530: - outb(VGA_SEQ_INDEX, RAMSize); /* Get memory size */ - videoram = (inb(VGA_SEQ_DATA) >> 1); - switch (videoram & 0x0B) { - case 0x00: - pScrn->videoRam = 1024; - break; - case 0x01: - pScrn->videoRam = 2048; - break; - case 0x02: - pScrn->videoRam = 4096; - break; - case 0x03: - pScrn->videoRam = 1024; - break; - case 0x08: - pScrn->videoRam = 0; /* OUCH ! */ - break; - case 0x09: - pScrn->videoRam = 2048; - break; - case 0x0A: - pScrn->videoRam = 4096; - break; - case 0x0B: - pScrn->videoRam = 8192; - break; - default: - pScrn->videoRam = 1024; - xf86DrvMsg(pScrn->scrnIndex, from, - "Unable to determine VideoRam, defaulting to 1MB\n", - pScrn->videoRam); - break; - } - break; - } + from = X_PROBED; + if (pSiS->pEnt->device->videoRam != 0) { + pScrn->videoRam = pSiS->pEnt->device->videoRam; + from = X_CONFIG; } - outw(VGA_SEQ_INDEX, (unlock << 8) | 0x05); - xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d kByte\n", + if ((pSiS->Chipset == PCI_CHIP_SIS6326) + && (pScrn->videoRam >= 8192) + && (from != X_CONFIG)) { + pScrn->videoRam = 4096; + xf86DrvMsg(pScrn->scrnIndex, from, "Limiting VideoRAM to %d KB\n", + pScrn->videoRam); + } else + xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d KB\n", pScrn->videoRam); pSiS->FbMapSize = pScrn->videoRam * 1024; + SISVGAPreInit(pScrn); + SISLCDPreInit(pScrn); + SISTVPreInit(pScrn); + SISCRT2PreInit(pScrn); + if (pSiS->ForceCRT2Type == CRT2_DEFAULT) + { if (pSiS->VBFlags & CRT2_VGA) + pSiS->ForceCRT2Type = CRT2_VGA; + else if (pSiS->VBFlags & CRT2_LCD) + pSiS->ForceCRT2Type = CRT2_LCD; + else if (pSiS->VBFlags & CRT2_TV) + pSiS->ForceCRT2Type = CRT2_TV; + } + switch (pSiS->ForceCRT2Type) + { case CRT2_TV: + pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_LCD | CRT2_VGA); + if (pSiS->VBFlags & (VB_301|VB_302|VB_303|VB_LVDS|VB_CHRONTEL)) + pSiS->VBFlags = pSiS->VBFlags | CRT2_TV; + else + pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_TV); + break; + case CRT2_LCD: + pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_TV | CRT2_VGA); + if (pSiS->VBFlags & (VB_301|VB_302|VB_303|VB_LVDS|VB_CHRONTEL)) + pSiS->VBFlags = pSiS->VBFlags | CRT2_LCD; + else + pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_LCD); + break; + case CRT2_VGA: + pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_TV | CRT2_LCD); + if (pSiS->VBFlags & (VB_301|VB_302|VB_303|VB_LVDS|VB_CHRONTEL)) + pSiS->VBFlags = pSiS->VBFlags | CRT2_VGA; + else + pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_VGA); + break; + } + + SISDACPreInit(pScrn); + + outw(VGA_SEQ_INDEX, (unlock << 8) | 0x05); + /* Set the min pixel clock */ - pSiS->MinClock = 16250; /* XXX Guess, need to check this */ - pSiS->MinClock = 10000; /* XXX Guess, need to check this */ + pSiS->MinClock = 16250; /* XXX Guess, need to check this */ xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock is %d MHz\n", - pSiS->MinClock / 1000); + pSiS->MinClock / 1000); + from = X_PROBED; /* * If the user has specified ramdac speed in the XF86Config * file, we respect that setting. */ if (pSiS->pEnt->device->dacSpeeds[0]) { - int speed = 0; - - switch (pScrn->bitsPerPixel) { - case 8: - speed = pSiS->pEnt->device->dacSpeeds[DAC_BPP8]; - break; - case 16: - speed = pSiS->pEnt->device->dacSpeeds[DAC_BPP16]; - break; - case 24: - speed = pSiS->pEnt->device->dacSpeeds[DAC_BPP24]; - break; - case 32: - speed = pSiS->pEnt->device->dacSpeeds[DAC_BPP32]; - break; - } - if (speed == 0) - pSiS->MaxClock = pSiS->pEnt->device->dacSpeeds[0]; - else - pSiS->MaxClock = speed; - from = X_CONFIG; + int speed = 0; + + switch (pScrn->bitsPerPixel) { + case 8: + speed = pSiS->pEnt->device->dacSpeeds[DAC_BPP8]; + break; + case 16: + speed = pSiS->pEnt->device->dacSpeeds[DAC_BPP16]; + break; + case 24: + speed = pSiS->pEnt->device->dacSpeeds[DAC_BPP24]; + break; + case 32: + speed = pSiS->pEnt->device->dacSpeeds[DAC_BPP32]; + break; + } + if (speed == 0) + pSiS->MaxClock = pSiS->pEnt->device->dacSpeeds[0]; + else + pSiS->MaxClock = speed; + from = X_CONFIG; } xf86DrvMsg(pScrn->scrnIndex, from, "Max pixel clock is %d MHz\n", - pSiS->MaxClock / 1000); + pSiS->MaxClock / 1000); /* * Setup the ClockRanges, which describe what clock ranges are available, * and what sort of modes they can be used for. */ - clockRanges = xnfalloc(sizeof(ClockRange)); + clockRanges = xnfcalloc(sizeof(ClockRange), 1); clockRanges->next = NULL; clockRanges->minClock = pSiS->MinClock; clockRanges->maxClock = pSiS->MaxClock; - clockRanges->clockIndex = -1; /* programmable */ + clockRanges->clockIndex = -1; /* programmable */ clockRanges->interlaceAllowed = TRUE; - clockRanges->doubleScanAllowed = TRUE; /* XXX check this */ + clockRanges->doubleScanAllowed = TRUE; /* XXX check this */ /* * xf86ValidateModes will check that the mode HTotal and VTotal values @@ -1075,30 +941,30 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) /* Select valid modes from those available */ /* - * XXX Assuming min pitch 256, max 4096 + * XXX Assuming min pitch 256, max 4096 ==> 8192 * XXX Assuming min height 128, max 4096 */ i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, - pScrn->display->modes, clockRanges, - NULL, 256, 4096, - pScrn->bitsPerPixel * 8, 128, 4096, - pScrn->display->virtualX, - pScrn->display->virtualY, - pSiS->FbMapSize, - LOOKUP_BEST_REFRESH); + pScrn->display->modes, clockRanges, + NULL, 256, 8192, + pScrn->bitsPerPixel * 8, 128, 4096, + pScrn->display->virtualX, + pScrn->display->virtualY, + pSiS->FbMapSize, + LOOKUP_BEST_REFRESH); if (i == -1) { - SISFreeRec(pScrn); - return FALSE; + SISFreeRec(pScrn); + return FALSE; } /* Prune the modes marked as invalid */ xf86PruneDriverModes(pScrn); if (i == 0 || pScrn->modes == NULL) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n"); - SISFreeRec(pScrn); - return FALSE; + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n"); + SISFreeRec(pScrn); + return FALSE; } xf86SetCrtcForModes(pScrn, INTERLACE_HALVE_V); @@ -1115,72 +981,69 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) /* Load bpp-specific modules */ switch (pScrn->bitsPerPixel) { case 1: - mod = "xf1bpp"; - Sym = "xf1bppScreenInit"; - break; + mod = "xf1bpp"; + Sym = "xf1bppScreenInit"; + break; case 4: - mod = "xf4bpp"; - Sym = "xf4bppScreenInit"; - break; + mod = "xf4bpp"; + Sym = "xf4bppScreenInit"; + break; case 8: - mod = "cfb"; - Sym = "cfbScreenInit"; - break; case 16: - mod = "cfb16"; - Sym = "cfb16ScreenInit"; - break; case 24: - if (pix24bpp == 24) { - mod = "cfb24"; - Sym = "cfb24ScreenInit"; - } else { - mod = "xf24_32bpp"; - Sym = "cfb24_32ScreenInit"; - } - break; case 32: - mod = "cfb32"; - Sym = "cfb32ScreenInit"; - break; + mod = "fb"; + Sym = "fbScreenInit"; + break; } if (mod && xf86LoadSubModule(pScrn, mod) == NULL) { - SISFreeRec(pScrn); - return FALSE; + SISFreeRec(pScrn); + return FALSE; } xf86LoaderReqSymbols(Sym, NULL); if (!xf86LoadSubModule(pScrn, "i2c")) { - SISFreeRec(pScrn); - return FALSE; + SISFreeRec(pScrn); + return FALSE; } xf86LoaderReqSymLists(i2cSymbols, NULL); /* Load XAA if needed */ if (!pSiS->NoAccel) { - if (!xf86LoadSubModule(pScrn, "xaa")) { - SISFreeRec(pScrn); - return FALSE; - } + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Accel Enable\n"); + if (!xf86LoadSubModule(pScrn, "xaa")) { + SISFreeRec(pScrn); + return FALSE; + } xf86LoaderReqSymLists(xaaSymbols, NULL); } + /* Load shadowfb if needed */ + if (pSiS->ShadowFB) { + if (!xf86LoadSubModule(pScrn, "shadowfb")) { + SISFreeRec(pScrn); + return FALSE; + } + xf86LoaderReqSymLists(shadowSymbols, NULL); + } + /* Load DDC if needed */ /* This gives us DDC1 - we should be able to get DDC2B using i2c */ if (!xf86LoadSubModule(pScrn, "ddc")) { - SISFreeRec(pScrn); - return FALSE; + SISFreeRec(pScrn); + return FALSE; } xf86LoaderReqSymLists(ddcSymbols, NULL); +#if 0 /* Initialize DDC1 if possible */ if (pSiS->ddc1Read) - xf86PrintEDID(xf86DoEDID_DDC1(pScrn->scrnIndex,vgaHWddc1SetSpeed,pSiS->ddc1Read ) ); - + xf86PrintEDID(xf86DoEDID_DDC1(pScrn->scrnIndex,vgaHWddc1SetSpeed,pSiS->ddc1Read)); +#endif return TRUE; } @@ -1211,9 +1074,9 @@ SISMapMem(ScrnInfoPtr pScrn) mmioFlags = VIDMEM_MMIO | VIDMEM_SPARSE; #endif pSiS->IOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, - pSiS->PciTag, pSiS->IOAddress, 0x10000); + pSiS->PciTag, pSiS->IOAddress, 0x10000); if (pSiS->IOBase == NULL) - return FALSE; + return FALSE; #ifdef __alpha__ /* @@ -1221,18 +1084,18 @@ SISMapMem(ScrnInfoPtr pScrn) * setting CPUToScreenColorExpandBase. */ pSiS->IOBaseDense = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO, - pSiS->PciTag, pSiS->IOAddress, 0x10000); + pSiS->PciTag, pSiS->IOAddress, 0x10000); if (pSiS->IOBaseDense == NULL) - return FALSE; + return FALSE; #endif /* __alpha__ */ pSiS->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, - pSiS->PciTag, - (unsigned long)pSiS->FbAddress, - pSiS->FbMapSize); + pSiS->PciTag, + (unsigned long)pSiS->FbAddress, + pSiS->FbMapSize); if (pSiS->FbBase == NULL) - return FALSE; + return FALSE; return TRUE; } @@ -1282,10 +1145,9 @@ SISSave(ScrnInfoPtr pScrn) vgaHWSave(pScrn, vgaReg, VGA_SR_ALL); - SiSSave(pScrn, sisReg); + (*pSiS->SiSSave)(pScrn, sisReg); } - /* * Initialise a new mode. This is currently still using the old * "initialise struct, restore/write struct to HW" model. That could @@ -1302,15 +1164,20 @@ SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) vgaHWUnlock(hwp); + SISModifyModeInfo(mode); + /* Initialise the ModeReg values */ if (!vgaHWInit(pScrn, mode)) - return FALSE; + return FALSE; pScrn->vtSema = TRUE; - if (!SiSInit(pScrn, mode)) - return FALSE; + if (!(*pSiS->ModeInit)(pScrn, mode)) + return FALSE; + + PDEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "HDisplay: %d, VDisplay: %d \n", + mode->HDisplay, mode->VDisplay)); - xf86DrvMsg(pScrn->scrnIndex,X_INFO,"HDisplay: %d, VDisplay: %d \n",mode->HDisplay,mode->VDisplay); /* Program the registers */ vgaHWProtect(pScrn, TRUE); vgaReg = &hwp->ModeReg; @@ -1318,20 +1185,29 @@ SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) vgaReg->Attribute[0x10] = 0x01; if (pScrn->bitsPerPixel > 8) - vgaReg->Graphics[0x05] = 0x00; + vgaReg->Graphics[0x05] = 0x00; vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE); - SiSRestore(pScrn, sisReg); + if ((pSiS->Chipset == PCI_CHIP_SIS300) || + (pSiS->Chipset == PCI_CHIP_SIS630) || + (pSiS->Chipset == PCI_CHIP_SIS540)) { + SiSPreSetMode(pScrn); + SiSSetMode(pScrn, pScrn->currentMode); + } else + (*pSiS->SiSRestore)(pScrn, sisReg); vgaHWProtect(pScrn, FALSE); - if (pSiS->MemClock) - xf86DrvMsgVerb(pScrn->scrnIndex,2, X_INFO, "Memory clock is set to %3.3fMHz\n",SiSMclk()/1000.0); - +/* Reserved for debug + * + SiSDumpModeInfo(pScrn, mode); + * + */ return TRUE; } + /* * Restore the initial (text) mode. */ @@ -1350,7 +1226,7 @@ SISRestore(ScrnInfoPtr pScrn) vgaHWProtect(pScrn, TRUE); - SiSRestore(pScrn, sisReg); + (*pSiS->SiSRestore)(pScrn, sisReg); vgaHWRestore(pScrn, vgaReg, VGA_SR_ALL); @@ -1358,10 +1234,8 @@ SISRestore(ScrnInfoPtr pScrn) } -/* Mandatory */ - -/* This gets called at the start of each server generation */ - +/* Mandatory + * This gets called at the start of each server generation */ static Bool SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) { @@ -1371,6 +1245,10 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) SISPtr pSiS; int ret; VisualPtr visual; + unsigned long OnScreenSize; + int height, width, displayWidth; + unsigned char *FBStart; + /* * First get the ScrnInfoRec @@ -1379,31 +1257,32 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) hwp = VGAHWPTR(pScrn); - hwp->MapSize = 0x10000; /* Standard 64k VGA window */ + hwp->MapSize = 0x10000; /* Standard 64k VGA window */ pSiS = SISPTR(pScrn); /* Map the VGA memory and get the VGA IO base */ if (!vgaHWMapMem(pScrn)) - return FALSE; + return FALSE; vgaHWGetIOBase(hwp); /* Map the SIS memory and MMIO areas */ if (!SISMapMem(pScrn)) - return FALSE; + return FALSE; /* Save the current state */ SISSave(pScrn); - /* Darken the screen for aesthetic reasons and set the viewport */ - SISSaveScreen(pScreen, FALSE); - /* Initialise the first mode */ if (!SISModeInit(pScrn, pScrn->currentMode)) - return FALSE; + return FALSE; + + /* Clear frame buffer */ + OnScreenSize = pScrn->displayWidth * pScrn->currentMode->VDisplay * (pScrn->bitsPerPixel / 8); + memset(pSiS->FbBase, 0, OnScreenSize); /* Darken the screen for aesthetic reasons and set the viewport */ - SISSaveScreen(pScreen, FALSE); + SISSaveScreen(pScreen, SCREEN_SAVER_ON); SISAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); /* @@ -1423,6 +1302,7 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) */ miClearVisualTypes(); + /* Setup the visuals we support. */ /* @@ -1431,16 +1311,49 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) */ if (pScrn->bitsPerPixel > 8) { - if (!miSetVisualTypes(pScrn->depth, TrueColorMask, pScrn->rgbBits, - pScrn->defaultVisual)) - return FALSE; + if (!miSetVisualTypes(pScrn->depth, TrueColorMask, pScrn->rgbBits, + pScrn->defaultVisual)) + return FALSE; + } else { + if (!miSetVisualTypes(pScrn->depth, + miGetDefaultVisualMask(pScrn->depth), + pScrn->rgbBits, pScrn->defaultVisual)) + return FALSE; + } + + width = pScrn->virtualX; + height = pScrn->virtualY; + displayWidth = pScrn->displayWidth; + + if (pSiS->Rotate) { + height = pScrn->virtualX; + width = pScrn->virtualY; + } + + if (pSiS->ShadowFB) { + pSiS->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width); + pSiS->ShadowPtr = xalloc(pSiS->ShadowPitch * height); + displayWidth = pSiS->ShadowPitch / (pScrn->bitsPerPixel >> 3); + FBStart = pSiS->ShadowPtr; } else { - if (!miSetVisualTypes(pScrn->depth, - miGetDefaultVisualMask(pScrn->depth), - pScrn->rgbBits, pScrn->defaultVisual)) - return FALSE; + pSiS->ShadowPtr = NULL; + FBStart = pSiS->FbBase; } + if (!miSetPixmapDepths()) + return FALSE; + + { + static int GlobalHWQueueLength = 0; + + pSiS->cmdQueueLenPtr = &(GlobalHWQueueLength); + } + +#ifdef XF86DRI + pSiS->directRenderingEnabled = SISDRIScreenInit(pScreen); + /* Force the initialization of the context */ +#endif + /* * Call the framebuffer layer's ScreenInit function, and fill in other * pScreen fields. @@ -1448,125 +1361,184 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) switch (pScrn->bitsPerPixel) { case 1: - ret = xf1bppScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX, - pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, - pScrn->displayWidth); - break; + ret = xf1bppScreenInit(pScreen, FBStart, width, + height, pScrn->xDpi, pScrn->yDpi, + displayWidth); + break; case 4: - ret = xf4bppScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX, - pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, - pScrn->displayWidth); - break; + ret = xf4bppScreenInit(pScreen, FBStart, width, + height, pScrn->xDpi, pScrn->yDpi, + displayWidth); + break; case 8: - ret = cfbScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX, - pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, - pScrn->displayWidth); - break; case 16: - ret = cfb16ScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX, - pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, - pScrn->displayWidth); - break; case 24: - if (pix24bpp == 24) - ret = cfb24ScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX, - pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, - pScrn->displayWidth); - else - ret = cfb24_32ScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX, - pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, - pScrn->displayWidth); - break; case 32: - ret = cfb32ScreenInit(pScreen, pSiS->FbBase, pScrn->virtualX, - pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, - pScrn->displayWidth); - break; + ret = fbScreenInit(pScreen, FBStart, width, + height, pScrn->xDpi, pScrn->yDpi, + displayWidth, pScrn->bitsPerPixel); + + fbPictureInit(pScreen, 0, 0); + break; default: - xf86DrvMsg(scrnIndex, X_ERROR, - "Internal error: invalid bpp (%d) in SISScrnInit\n", - pScrn->bitsPerPixel); - ret = FALSE; - break; + xf86DrvMsg(scrnIndex, X_ERROR, + "Internal error: invalid bpp (%d) in SISScrnInit\n", + pScrn->bitsPerPixel); + ret = FALSE; + break; } if (!ret) - return FALSE; + { + ErrorF ("SetMode Error@!\n"); + return FALSE; + } - xf86SetBlackWhitePixels(pScreen); if (pScrn->bitsPerPixel > 8) { /* Fixup RGB ordering */ visual = pScreen->visuals + pScreen->numVisuals; while (--visual >= pScreen->visuals) { - if ((visual->class | DynamicClass) == DirectColor) { - visual->offsetRed = pScrn->offset.red; - visual->offsetGreen = pScrn->offset.green; - visual->offsetBlue = pScrn->offset.blue; - visual->redMask = pScrn->mask.red; - visual->greenMask = pScrn->mask.green; - visual->blueMask = pScrn->mask.blue; - } - } + if ((visual->class | DynamicClass) == DirectColor) { + visual->offsetRed = pScrn->offset.red; + visual->offsetGreen = pScrn->offset.green; + visual->offsetBlue = pScrn->offset.blue; + visual->redMask = pScrn->mask.red; + visual->greenMask = pScrn->mask.green; + visual->blueMask = pScrn->mask.blue; + } + } } else if (pScrn->depth == 1) { - SIS1bppColorMap(pScrn); + SIS1bppColorMap(pScrn); } + if (!pSiS->ShadowFB) /* hardware cursor needs to wrap this layer */ + SISDGAInit(pScreen); + xf86SetBlackWhitePixels(pScreen); + if (!pSiS->NoAccel) { - if ( pSiS->Chipset == PCI_CHIP_SIS530 ) - SiS2AccelInit(pScreen); - else - SiSAccelInit(pScreen); + if ( pSiS->Chipset == PCI_CHIP_SIS300 || + pSiS->Chipset == PCI_CHIP_SIS630 || + pSiS->Chipset == PCI_CHIP_SIS540) + SiS300AccelInit(pScreen); + else if (pSiS->Chipset == PCI_CHIP_SIS530) + SiS530AccelInit(pScreen); + else + SiSAccelInit(pScreen); } miInitializeBackingStore(pScreen); xf86SetBackingStore(pScreen); + xf86SetSilkenMouse(pScreen); /* Initialise cursor functions */ miDCInitialize (pScreen, xf86GetPointerScreenFuncs()); if (pSiS->HWCursor) - SiSHWCursorInit(pScreen); + SiSHWCursorInit(pScreen); /* Initialise default colourmap */ if (!miCreateDefColormap(pScreen)) - return FALSE; + return FALSE; + +/* marked by archer for adding VB palette + if (!vgaHWHandleColormaps(pScreen)) + return FALSE; +*/ + + if (!xf86HandleColormaps(pScreen, 256, 8, SISLoadPalette, NULL, + CMAP_RELOAD_ON_MODE_SWITCH)) + return FALSE; + + if(pSiS->ShadowFB) { + RefreshAreaFuncPtr refreshArea = SISRefreshArea; - if (!vgaHWHandleColormaps(pScreen)) - return FALSE; + if(pSiS->Rotate) { + if (!pSiS->PointerMoved) { + pSiS->PointerMoved = pScrn->PointerMoved; + pScrn->PointerMoved = SISPointerMoved; + } + + switch(pScrn->bitsPerPixel) { + case 8: refreshArea = SISRefreshArea8; break; + case 16: refreshArea = SISRefreshArea16; break; + case 24: refreshArea = SISRefreshArea24; break; + case 32: refreshArea = SISRefreshArea32; break; + } + } + + ShadowFBInit(pScreen, refreshArea); + } -#ifdef DPMSExtension xf86DPMSInit(pScreen, (DPMSSetProcPtr)SISDisplayPowerManagementSet, 0); + +#ifdef XvExtension + { + XF86VideoAdaptorPtr *ptr; + int n; + + n = xf86XVListGenericAdaptors(pScrn, &ptr); + if (n) { + xf86XVScreenInit(pScreen, ptr, n); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "use generic Xv\n" ); + } + } +#endif + +#ifdef XF86DRI + if (pSiS->directRenderingEnabled) { + /* Now that mi, drm and others have done their thing, + * complete the DRI setup. + */ + pSiS->directRenderingEnabled = SISDRIFinishScreenInit(pScreen); + } + if (pSiS->directRenderingEnabled) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering enabled\n"); + /* TODO */ + /* SISSetLFBConfig(pSiS); */ + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering disabled\n"); + } #endif + if (pSiS->Chipset == PCI_CHIP_SIS630) { + SISInitVideo(pScreen); + } + pSiS->CloseScreen = pScreen->CloseScreen; pScreen->CloseScreen = SISCloseScreen; pScreen->SaveScreen = SISSaveScreen; /* Report any unused options (only for the first generation) */ if (serverGeneration == 1) { - xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); + xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); } /* Turn on the screen now */ - SISSaveScreen(pScreen, TRUE); + SISSaveScreen(pScreen, SCREEN_SAVER_OFF); return TRUE; } /* Usually mandatory */ -static Bool +Bool SISSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) { - return SISModeInit(xf86Screens[scrnIndex], mode); + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + SISPtr pSiS = SISPTR(pScrn); + if ((pSiS->Chipset == PCI_CHIP_SIS300) || + (pSiS->Chipset == PCI_CHIP_SIS630) || + (pSiS->Chipset == PCI_CHIP_SIS540)) + return SiSSetMode(xf86Screens[scrnIndex], mode); + else + return SISModeInit(xf86Screens[scrnIndex], mode); } - /* * This function is used to initialize the Start Address - the first * displayed location in the video memory. */ /* Usually mandatory */ -static void +void SISAdjustFrame(int scrnIndex, int x, int y, int flags) { ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; @@ -1574,46 +1546,68 @@ SISAdjustFrame(int scrnIndex, int x, int y, int flags) vgaHWPtr hwp; int base = y * pScrn->displayWidth + x; int vgaIOBase; - unsigned char temp,temp2; + unsigned char SR5State, temp; hwp = VGAHWPTR(pScrn); pSiS = SISPTR(pScrn); vgaIOBase = VGAHWPTR(pScrn)->IOBase; outb(VGA_SEQ_INDEX, 0x05); /* Unlock Registers */ - temp = inb(VGA_SEQ_DATA); + SR5State = inb(VGA_SEQ_DATA); outw(VGA_SEQ_INDEX, 0x8605); if (pScrn->bitsPerPixel < 8) { - base = (y * pScrn->displayWidth + x + 3) >> 3; + base = (y * pScrn->displayWidth + x + 3) >> 3; } else { - base = y * pScrn->displayWidth + x ; - /* calculate base bpp dep. */ - switch (pScrn->bitsPerPixel) { - case 16: - base >>= 1; - break; - case 24: - base = ((base * 3)) >> 2; - base -= base % 6; - break; - default: /* 8bpp */ - base >>= 2; - break; - } + base = y * pScrn->displayWidth + x ; + /* calculate base bpp dep. */ + switch (pScrn->bitsPerPixel) { + case 16: + base >>= 1; + break; + case 24: + base = ((base * 3)) >> 2; + base -= base % 6; + break; + case 32: + break; + default: /* 8bpp */ + base >>= 2; + break; + } } outw(vgaIOBase + 4, (base & 0x00FF00) | 0x0C); outw(vgaIOBase + 4, ((base & 0x00FF) << 8) | 0x0D); + switch (pSiS->Chipset) { + case PCI_CHIP_SIS300: + case PCI_CHIP_SIS630: + case PCI_CHIP_SIS540: + outb(VGA_SEQ_INDEX, 0x0D); + temp = (base & 0xFF0000) >> 16; + PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, + "3C5/0Dh set to hex %2X, base 0x%x\n", temp, base)); + outb(VGA_SEQ_DATA, temp); + if (pSiS->VBFlags) { +/* UnLockCRT2(pSiS->RelIO); */ + UnLockCRT2(pSiS->RelIO+0x30); + outSISIDXREG(pSiS->RelIO+4, 6, GETVAR8(base)); + outSISIDXREG(pSiS->RelIO+4, 5, GETBITS(base, 15:8)); + outSISIDXREG(pSiS->RelIO+4, 4, GETBITS(base, 23:16)); +/* LockCRT2(pSiS->RelIO); */ + LockCRT2(pSiS->RelIO+0x30); + } + break; + default: + outb(VGA_SEQ_INDEX, 0x27); + temp = inb(VGA_SEQ_DATA) & 0xF0; + temp |= (base & 0x0F0000) >> 16; + PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, + "3C5/27h set to hex %2X, base %d\n", temp, base)); + outb(VGA_SEQ_DATA, temp); + } - outb(VGA_SEQ_INDEX, 0x27); - temp2 = inb(VGA_SEQ_DATA) & 0xF0; - temp2 |= (base & 0x0F0000) >> 16; - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, - "3C5/27h set to hex %2X, base %d\n", temp, base); - outb(VGA_SEQ_DATA, temp2); - - outw(VGA_SEQ_INDEX, (temp << 8) | 0x05); /* Relock Registers */ + outw(VGA_SEQ_INDEX, (SR5State << 8) | 0x05); /* Relock Registers */ } /* @@ -1628,11 +1622,33 @@ static Bool SISEnterVT(int scrnIndex, int flags) { ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + SISPtr pSiS = SISPTR(pScrn); - /* Should we re-save the text mode on each VT enter? */ - if (!SISModeInit(pScrn, pScrn->currentMode)) - return FALSE; +#ifdef XF86DRI + ScreenPtr pScreen; +#endif +#ifdef XF86DRI + if (pSiS->directRenderingEnabled) { + pScreen = screenInfo.screens[scrnIndex]; + DRIUnlock(pScreen); + } +#endif + + /* Should we re-save the text mode on each VT enter? */ + if((pSiS->Chipset == PCI_CHIP_SIS300) || + (pSiS->Chipset == PCI_CHIP_SIS630) || + (pSiS->Chipset == PCI_CHIP_SIS540)) { + SiSPreSetMode(pScrn); + if (!SiSSetMode(pScrn, pScrn->currentMode)) + return FALSE; + } + else + if (!SISModeInit(pScrn, pScrn->currentMode)) + return FALSE; + + SISAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + return TRUE; } @@ -1651,8 +1667,21 @@ SISLeaveVT(int scrnIndex, int flags) ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; vgaHWPtr hwp = VGAHWPTR(pScrn); +#ifdef XF86DRI + ScreenPtr pScreen; + SISPtr pSiS; +#endif + SISRestore(pScrn); vgaHWLock(hwp); + +#ifdef XF86DRI + pSiS = SISPTR(pScrn); + if (pSiS->directRenderingEnabled) { + pScreen = screenInfo.screens[scrnIndex]; + DRILock(pScreen, 0); + } +#endif } @@ -1668,16 +1697,26 @@ SISCloseScreen(int scrnIndex, ScreenPtr pScreen) ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; vgaHWPtr hwp = VGAHWPTR(pScrn); SISPtr pSiS = SISPTR(pScrn); + xf86CursorInfoPtr pCursorInfo = pSiS->CursorInfoPtr; + +#ifdef XF86DRI + if (pSiS->directRenderingEnabled) { + SISDRICloseScreen(pScreen); + pSiS->directRenderingEnabled=FALSE; + } +#endif if (pScrn->vtSema) { - SISRestore(pScrn); - vgaHWLock(hwp); - SISUnmapMem(pScrn); + if (pCursorInfo) + pCursorInfo->HideCursor(pScrn); + SISRestore(pScrn); + vgaHWLock(hwp); + SISUnmapMem(pScrn); } - if(pSiS->AccelInfoRec) - XAADestroyInfoRec(pSiS->AccelInfoRec); - if(pSiS->CursorInfoRec) - xf86DestroyCursorInfoRec(pSiS->CursorInfoRec); + if(pSiS->AccelInfoPtr) + XAADestroyInfoRec(pSiS->AccelInfoPtr); + if(pCursorInfo) + xf86DestroyCursorInfoRec(pCursorInfo); pScrn->vtSema = FALSE; pScreen->CloseScreen = pSiS->CloseScreen; @@ -1691,7 +1730,8 @@ SISCloseScreen(int scrnIndex, ScreenPtr pScreen) static void SISFreeScreen(int scrnIndex, int flags) { - vgaHWFreeHWRec(xf86Screens[scrnIndex]); + if (xf86LoaderCheckSymbol("vgaHWFreeHWRec")) + vgaHWFreeHWRec(xf86Screens[scrnIndex]); SISFreeRec(xf86Screens[scrnIndex]); } @@ -1709,7 +1749,124 @@ SISValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags) /* Mandatory */ static Bool -SISSaveScreen(ScreenPtr pScreen, Bool unblank) +SISSaveScreen(ScreenPtr pScreen, int mode) +{ + return vgaHWSaveScreen(pScreen, mode); +} + +#ifdef DEBUG +/* local used for debug */ +static void +SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode) +{ + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Clock : %x\n", mode->Clock); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Display : %x\n", mode->CrtcHDisplay); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Blank Start : %x\n", mode->CrtcHBlankStart); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Sync Start : %x\n", mode->CrtcHSyncStart); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Sync End : %x\n", mode->CrtcHSyncEnd); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Blank End : %x\n", mode->CrtcHBlankEnd); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Total : %x\n", mode->CrtcHTotal); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Skew : %x\n", mode->CrtcHSkew); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz HAdjusted : %x\n", mode->CrtcHAdjusted); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Display : %x\n", mode->CrtcVDisplay); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Blank Start : %x\n", mode->CrtcVBlankStart); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Sync Start : %x\n", mode->CrtcVSyncStart); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Sync End : %x\n", mode->CrtcVSyncEnd); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Blank End : %x\n", mode->CrtcVBlankEnd); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Total : %x\n", mode->CrtcVTotal); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt VAdjusted : %x\n", mode->CrtcVAdjusted); + +/* + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Display : %x\n", mode->HDisplay); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Sync Start : %x\n", mode->HSyncStart); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Sync End : %x\n", mode->HSyncEnd); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Total : %x\n", mode->HTotal); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Skew : %x\n", mode->HSkew); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Display : %x\n", mode->VDisplay); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Sync Start : %x\n", mode->VSyncStart); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Sync End : %x\n", mode->VSyncEnd); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Total : %x\n", mode->VTotal); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Scan : %x\n", mode->VScan); +*/ +} +#endif + +/* local used for debug */ +static void +SISModifyModeInfo(DisplayModePtr mode) { - return vgaHWSaveScreen(pScreen, unblank); +/* + mode->Clock = 31500; + mode->CrtcHTotal = 832; + mode->CrtcHDisplay = 640; + mode->CrtcHBlankStart = 648; + mode->CrtcHSyncStart = 664; + mode->CrtcHSyncEnd = 704; + mode->CrtcHBlankEnd = 824; + + mode->CrtcVTotal = 520; + mode->CrtcVDisplay = 480; + mode->CrtcVBlankStart = 488; + mode->CrtcVSyncStart = 489; + mode->CrtcVSyncEnd = 492; + mode->CrtcVBlankEnd = 512; +*/ + if (mode->CrtcHBlankStart == mode->CrtcHDisplay) + mode->CrtcHBlankStart++; + if (mode->CrtcHBlankEnd == mode->CrtcHTotal) + mode->CrtcHBlankEnd--; + if (mode->CrtcVBlankStart == mode->CrtcVDisplay) + mode->CrtcVBlankStart++; + if (mode->CrtcVBlankEnd == mode->CrtcVTotal) + mode->CrtcVBlankEnd--; +} + +void SiSPreSetMode(ScrnInfoPtr pScrn) +{ + SISPtr pSiS = SISPTR(pScrn); + unsigned char usScratchCR30, usScratchCR31; + unsigned short SR26, SR27; + unsigned long temp; + int vbflag; + + usScratchCR30 = usScratchCR31 = 0; + outb(SISCR, 0x31); + usScratchCR31 = inb(SISCR+1) & 0x06; + vbflag=pSiS->VBFlags; + switch (vbflag & (CRT2_TV|CRT2_LCD|CRT2_VGA)) + { case CRT2_TV: + if (vbflag & TV_HIVISION) usScratchCR30 |= 0x80; + else if (vbflag & TV_PAL) usScratchCR31 |= 0x01; + + if (vbflag & TV_AVIDEO) usScratchCR30 |= 0x04; + else if (vbflag & TV_SVIDEO) usScratchCR30 |= 0x08; + else if (vbflag & TV_SCART) usScratchCR30 |= 0x10; + usScratchCR30 |= 0x01; + usScratchCR31 |= 0x40; + break; + case CRT2_LCD: + usScratchCR30 |= 0x21; + usScratchCR31 |= 0x40; + break; + case CRT2_VGA: + usScratchCR30 |= 0x41; + usScratchCR31 |= 0x40; + break; + default: + usScratchCR30 |= 0x00; + usScratchCR31 |= 0x60; + } + SetReg1(SISCR, 0x30, usScratchCR30); + SetReg1(SISCR, 0x31, usScratchCR31); + + /* Set Turbo Queue as 512K */ + if (!pSiS->NoAccel) { + if (pSiS->TurboQueue) { + temp = (pScrn->videoRam/64) - 8; + SR26 = temp & 0xFF; + SR27 = ((temp >> 8) & 3) | 0xF0; + SetReg1(SISSR, 0x26, SR26); + SetReg1(SISSR, 0x27, SR27); + } + } } diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux index 0e34d426c..cb48028fd 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux @@ -175,7 +175,7 @@ ifeq ($(SIS),1) # file to see if we can, at least, compile the driver. MODS += sis.o -SISOBJS= sis_drv.o +SISOBJS= sis_drv.o sis_mm.o sis_ds.o SISHEADERS= sis_drv.h sis_drm.h $(DRMHEADERS) MODCFLAGS += -DCONFIG_DRM_SIS endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h index b011e3369..3def97f74 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h @@ -466,6 +466,11 @@ typedef struct drm_scatter_gather { #ifdef CONFIG_DRM_SIS /* SiS specific ioctls */ +#define SIS_IOCTL_FB_ALLOC DRM_IOWR(0x44, drm_sis_mem_t) +#define SIS_IOCTL_FB_FREE DRM_IOW( 0x45, drm_sis_mem_t) +#define SIS_IOCTL_AGP_INIT DRM_IOWR(0x53, drm_sis_agp_t) +#define SIS_IOCTL_AGP_ALLOC DRM_IOWR(0x54, drm_sis_mem_t) +#define SIS_IOCTL_AGP_FREE DRM_IOW( 0x55, drm_sis_mem_t) #define SIS_IOCTL_FLIP DRM_IOW( 0x48, drm_sis_flip_t) #define SIS_IOCTL_FLIP_INIT DRM_IO( 0x49) #define SIS_IOCTL_FLIP_FINAL DRM_IO( 0x50) diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h index b08851c11..1f33a1e2a 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h @@ -30,13 +30,15 @@ #define __SIS_H__ /* This remains constant for all DRM template files. + * Name it sisdrv_##x as there's a conflict with sis_free/malloc in the kernel + * that's used for fb devices */ -#define DRM(x) sis_##x +#define DRM(x) sisdrv_##x /* General customization: */ #define __HAVE_AGP 1 -#define __MUST_HAVE_AGP 1 +#define __MUST_HAVE_AGP 0 #define __HAVE_MTRR 1 #define __HAVE_CTX_BITMAP 1 diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h index 299143f61..2cf4dde35 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h @@ -17,4 +17,16 @@ typedef struct { unsigned int left, right; } drm_sis_flip_t; +int sis_fb_alloc(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg); +int sis_fb_free(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg); + +int sisp_agp_init(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg); +int sisp_agp_alloc(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg); +int sisp_agp_free(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg); + #endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drv.c index d04d3739c..3dd83fd7e 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drv.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drv.c @@ -39,7 +39,13 @@ #define DRIVER_MINOR 0 #define DRIVER_PATCHLEVEL 0 -#define DRIVER_IOCTLS +#define DRIVER_IOCTLS \ + [DRM_IOCTL_NR(SIS_IOCTL_FB_ALLOC)] = { sis_fb_alloc, 1, 1 }, \ + [DRM_IOCTL_NR(SIS_IOCTL_FB_FREE)] = { sis_fb_free, 1, 1 }, \ + /* AGP Memory Management */ \ + [DRM_IOCTL_NR(SIS_IOCTL_AGP_INIT)] = { sisp_agp_init, 1, 1 }, \ + [DRM_IOCTL_NR(SIS_IOCTL_AGP_ALLOC)] = { sisp_agp_alloc, 1, 1 }, \ + [DRM_IOCTL_NR(SIS_IOCTL_AGP_FREE)] = { sisp_agp_free, 1, 1 } #if 0 /* these don't appear to be defined */ /* SIS Stereo */ [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { sis_control, 1, 1 }, diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_ds.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_ds.c new file mode 100644 index 000000000..6143ad83a --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_ds.c @@ -0,0 +1,406 @@ +/* sis_ds.c -- Private header for Direct Rendering Manager -*- linux-c -*- + * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw + * + * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Sung-Ching Lin <sclin@sis.com.tw> + * + */ + +#define __NO_VERSION__ +#include <linux/module.h> +#include <linux/delay.h> +#include <linux/errno.h> +#include <linux/kernel.h> +#include <linux/malloc.h> +#include <linux/poll.h> +#include <asm/io.h> +#include <linux/pci.h> + +#include "sis_ds.h" + +/* Set Data Structure, not check repeated value + * temporarily used + */ + +set_t *setInit(void) +{ + int i; + set_t *set; + + set = (set_t *)MALLOC(sizeof(set_t)); + for(i = 0; i < SET_SIZE; i++){ + set->list[i].free_next = i+1; + set->list[i].alloc_next = -1; + } + set->list[SET_SIZE-1].free_next = -1; + set->free = 0; + set->alloc = -1; + set->trace = -1; + + return set; +} + +int setAdd(set_t *set, ITEM_TYPE item) +{ + int free = set->free; + + if(free != -1){ + set->list[free].val = item; + set->free = set->list[free].free_next; + } + else{ + return 0; + } + + set->list[free].alloc_next = set->alloc; + set->alloc = free; + set->list[free].free_next = -1; + + return 1; +} + +int setDel(set_t *set, ITEM_TYPE item) +{ + int alloc = set->alloc; + int prev = -1; + + while(alloc != -1){ + if(set->list[alloc].val == item){ + if(prev != -1) + set->list[prev].alloc_next = set->list[alloc].alloc_next; + else + set->alloc = set->list[alloc].alloc_next; + break; + } + prev = alloc; + alloc = set->list[alloc].alloc_next; + } + + if(alloc == -1) + return 0; + + set->list[alloc].free_next = set->free; + set->free = alloc; + set->list[alloc].alloc_next = -1; + + return 1; +} + +/* setFirst -> setAdd -> setNext is wrong */ + +int setFirst(set_t *set, ITEM_TYPE *item) +{ + if(set->alloc == -1) + return 0; + + *item = set->list[set->alloc].val; + set->trace = set->list[set->alloc].alloc_next; + + return 1; +} + +int setNext(set_t *set, ITEM_TYPE *item) +{ + if(set->trace == -1) + return 0; + + *item = set->list[set->trace].val; + set->trace = set->list[set->trace].alloc_next; + + return 1; +} + +int setDestroy(set_t *set) +{ + FREE(set); + + return 1; +} + +/* + * GLX Hardware Device Driver common code + * Copyright (C) 1999 Keith Whitwell + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#define ISFREE(bptr) ((bptr)->free) + +#define PRINTF(fmt, arg...) do{}while(0) +#define fprintf(fmt, arg...) do{}while(0) + +static void *calloc(size_t nmemb, size_t size) +{ + void *addr; + addr = kmalloc(nmemb*size, GFP_KERNEL); + memset(addr, 0, nmemb*size); + return addr; +} +#define free(n) kfree(n) + +void mmDumpMemInfo( memHeap_t *heap ) +{ + TMemBlock *p; + + PRINTF ("Memory heap %p:\n", heap); + if (heap == 0) { + PRINTF (" heap == 0\n"); + } else { + p = (TMemBlock *)heap; + while (p) { + PRINTF (" Offset:%08x, Size:%08x, %c%c\n",p->ofs,p->size, + p->free ? '.':'U', + p->reserved ? 'R':'.'); + p = p->next; + } + } + PRINTF ("End of memory blocks\n"); +} + +memHeap_t *mmInit(int ofs, + int size) +{ + PMemBlock blocks; + + if (size <= 0) { + return 0; + } + blocks = (TMemBlock *) calloc(1,sizeof(TMemBlock)); + if (blocks) { + blocks->ofs = ofs; + blocks->size = size; + blocks->free = 1; + return (memHeap_t *)blocks; + } else + return 0; +} + +/* Kludgey workaround for existing i810 server. Remove soon. + */ +memHeap_t *mmAddRange( memHeap_t *heap, + int ofs, + int size ) +{ + PMemBlock blocks; + blocks = (TMemBlock *) calloc(2,sizeof(TMemBlock)); + if (blocks) { + blocks[0].size = size; + blocks[0].free = 1; + blocks[0].ofs = ofs; + blocks[0].next = &blocks[1]; + + /* Discontinuity - stops JoinBlock from trying to join non-adjacent + * ranges. + */ + blocks[1].size = 0; + blocks[1].free = 0; + blocks[1].ofs = ofs+size; + blocks[1].next = (PMemBlock) heap; + return (memHeap_t *)blocks; + } + else + return heap; +} + +static TMemBlock* SliceBlock(TMemBlock *p, + int startofs, int size, + int reserved, int alignment) +{ + TMemBlock *newblock; + + /* break left */ + if (startofs > p->ofs) { + newblock = (TMemBlock*) calloc(1,sizeof(TMemBlock)); + newblock->ofs = startofs; + newblock->size = p->size - (startofs - p->ofs); + newblock->free = 1; + newblock->next = p->next; + p->size -= newblock->size; + p->next = newblock; + p = newblock; + } + + /* break right */ + if (size < p->size) { + newblock = (TMemBlock*) calloc(1,sizeof(TMemBlock)); + newblock->ofs = startofs + size; + newblock->size = p->size - size; + newblock->free = 1; + newblock->next = p->next; + p->size = size; + p->next = newblock; + } + + /* p = middle block */ + p->align = alignment; + p->free = 0; + p->reserved = reserved; + return p; +} + +PMemBlock mmAllocMem( memHeap_t *heap, int size, int align2, int startSearch) +{ + int mask,startofs,endofs; + TMemBlock *p; + + if (!heap || align2 < 0 || size <= 0) + return NULL; + mask = (1 << align2)-1; + startofs = 0; + p = (TMemBlock *)heap; + while (p) { + if (ISFREE(p)) { + startofs = (p->ofs + mask) & ~mask; + if ( startofs < startSearch ) { + startofs = startSearch; + } + endofs = startofs+size; + if (endofs <= (p->ofs+p->size)) + break; + } + p = p->next; + } + if (!p) + return NULL; + p = SliceBlock(p,startofs,size,0,mask+1); + p->heap = heap; + return p; +} + +static __inline__ int Join2Blocks(TMemBlock *p) +{ + if (p->free && p->next && p->next->free) { + TMemBlock *q = p->next; + p->size += q->size; + p->next = q->next; + free(q); + return 1; + } + return 0; +} + +int mmFreeMem(PMemBlock b) +{ + TMemBlock *p,*prev; + + if (!b) + return 0; + if (!b->heap) { + fprintf(stderr, "no heap\n"); + return -1; + } + p = b->heap; + prev = NULL; + while (p && p != b) { + prev = p; + p = p->next; + } + if (!p || p->free || p->reserved) { + if (!p) + fprintf(stderr, "block not found in heap\n"); + else if (p->free) + fprintf(stderr, "block already free\n"); + else + fprintf(stderr, "block is reserved\n"); + return -1; + } + p->free = 1; + Join2Blocks(p); + if (prev) + Join2Blocks(prev); + return 0; +} + +int mmReserveMem(memHeap_t *heap, int offset,int size) +{ + int endofs; + TMemBlock *p; + + if (!heap || size <= 0) + return -1; + endofs = offset+size; + p = (TMemBlock *)heap; + while (p && p->ofs <= offset) { + if (ISFREE(p) && endofs <= (p->ofs+p->size)) { + SliceBlock(p,offset,size,1,1); + return 0; + } + p = p->next; + } + return -1; +} + +int mmFreeReserved(memHeap_t *heap, int offset) +{ + TMemBlock *p,*prev; + + if (!heap) + return -1; + p = (TMemBlock *)heap; + prev = NULL; + while (p && p->ofs != offset) { + prev = p; + p = p->next; + } + if (!p || !p->reserved) + return -1; + p->free = 1; + p->reserved = 0; + Join2Blocks(p); + if (prev) + Join2Blocks(prev); + return 0; +} + +void mmDestroy(memHeap_t *heap) +{ + TMemBlock *p,*q; + + if (!heap) + return; + p = (TMemBlock *)heap; + while (p) { + q = p->next; + free(p); + p = q; + } +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_ds.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_ds.h new file mode 100644 index 000000000..c3367dba7 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_ds.h @@ -0,0 +1,163 @@ +/* sis_ds.h -- Private header for Direct Rendering Manager -*- linux-c -*- + * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw + * + * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Sung-Ching Lin <sclin@sis.com.tw> + * + */ + +#ifndef _sis_ds_h_ +#define _sis_ds_h_ + +/* Set Data Structure */ + +#define SET_SIZE 5000 +#define MALLOC(s) kmalloc(s, GFP_KERNEL) +#define FREE(s) kfree(s) + +typedef unsigned int ITEM_TYPE; + +typedef struct { + ITEM_TYPE val; + int alloc_next, free_next; +} list_item_t; + +typedef struct { + int alloc; + int free; + int trace; + list_item_t list[SET_SIZE]; +} set_t; + +set_t *setInit(void); +int setAdd(set_t *set, ITEM_TYPE item); +int setDel(set_t *set, ITEM_TYPE item); +int setFirst(set_t *set, ITEM_TYPE *item); +int setNext(set_t *set, ITEM_TYPE *item); +int setDestroy(set_t *set); + +#endif + +/* + * GLX Hardware Device Driver common code + * Copyright (C) 1999 Keith Whitwell + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef MM_INC +#define MM_INC + +struct mem_block_t { + struct mem_block_t *next; + struct mem_block_t *heap; + int ofs,size; + int align; + int free:1; + int reserved:1; +}; +typedef struct mem_block_t TMemBlock; +typedef struct mem_block_t *PMemBlock; + +/* a heap is just the first block in a chain */ +typedef struct mem_block_t memHeap_t; + +static __inline__ int mmBlockSize(PMemBlock b) +{ return b->size; } + +static __inline__ int mmOffset(PMemBlock b) +{ return b->ofs; } + +static __inline__ void mmMarkReserved(PMemBlock b) +{ b->reserved = 1; } + +/* + * input: total size in bytes + * return: a heap pointer if OK, NULL if error + */ +memHeap_t *mmInit( int ofs, int size ); + + + +memHeap_t *mmAddRange( memHeap_t *heap, + int ofs, + int size ); + + +/* + * Allocate 'size' bytes with 2^align2 bytes alignment, + * restrict the search to free memory after 'startSearch' + * depth and back buffers should be in different 4mb banks + * to get better page hits if possible + * input: size = size of block + * align2 = 2^align2 bytes alignment + * startSearch = linear offset from start of heap to begin search + * return: pointer to the allocated block, 0 if error + */ +PMemBlock mmAllocMem( memHeap_t *heap, int size, int align2, int startSearch ); + +/* + * Free block starts at offset + * input: pointer to a block + * return: 0 if OK, -1 if error + */ +int mmFreeMem( PMemBlock b ); + +/* + * Reserve 'size' bytes block start at offset + * This is used to prevent allocation of memory already used + * by the X server for the front buffer, pixmaps, and cursor + * input: size, offset + * output: 0 if OK, -1 if error + */ +int mmReserveMem( memHeap_t *heap, int offset,int size ); +int mmFreeReserved( memHeap_t *heap, int offset ); + +/* + * destroy MM + */ +void mmDestroy( memHeap_t *mmInit ); + +/* For debuging purpose. */ +void mmDumpMemInfo( memHeap_t *mmInit ); + +#endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_mm.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_mm.c new file mode 100644 index 000000000..2c2e0d95a --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_mm.c @@ -0,0 +1,309 @@ +/* sis_mm.c -- Private header for Direct Rendering Manager -*- linux-c -*- + * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw + * + * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Sung-Ching Lin <sclin@sis.com.tw> + * + */ + +#define __NO_VERSION__ +#include "sis.h" +#include <linux/sisfb.h> +#include "drmP.h" +#include "sis_drm.h" +#include "sis_drv.h" +#include "sis_ds.h" + +#define MAX_CONTEXT 100 +#define VIDEO_TYPE 0 +#define AGP_TYPE 1 + +typedef struct { + int used; + int context; + set_t *sets[2]; /* 0 for video, 1 for AGP */ +} sis_context_t; + +static sis_context_t global_ppriv[MAX_CONTEXT]; + +static int add_alloc_set(int context, int type, unsigned int val) +{ + int i, retval = 0; + + for(i = 0; i < MAX_CONTEXT; i++) + if(global_ppriv[i].used && global_ppriv[i].context == context){ + retval = setAdd(global_ppriv[i].sets[type], val); + break; + } + return retval; +} + +static int del_alloc_set(int context, int type, unsigned int val) +{ + int i, retval = 0; + for(i = 0; i < MAX_CONTEXT; i++) + if(global_ppriv[i].used && global_ppriv[i].context == context){ + retval = setDel(global_ppriv[i].sets[type], val); + break; + } + return retval; +} + +/* fb management via fb device */ +#if 0 +int sis_fb_alloc(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_sis_mem_t fb; + struct sis_memreq req; + int retval = 0; + + if (copy_from_user(&fb, (drm_sis_mem_t *)arg, sizeof(fb))) + return -EFAULT; + + req.size = fb.size; + sis_malloc(&req); + if(req.offset){ + /* TODO */ + fb.offset = req.offset; + fb.free = req.offset; + if(!add_alloc_set(fb.context, VIDEO_TYPE, fb.free)){ + DRM_DEBUG("adding to allocation set fails"); + sis_free(req.offset); + retval = -1; + } + } + else{ + fb.offset = 0; + fb.size = 0; + fb.free = 0; + } + + if (copy_to_user((drm_sis_mem_t *)arg, &fb, sizeof(fb))) return -EFAULT; + + DRM_DEBUG("alloc fb, size = %d, offset = %ld\n", fb.size, req.offset); + + return retval; +} + +int sis_fb_free(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_sis_mem_t fb; + int retval = 0; + + if (copy_from_user(&fb, (drm_sis_mem_t *)arg, sizeof(fb))) + return -EFAULT; + + if(!fb.free){ + return -1; + } + + sis_free(fb.free); + if(!del_alloc_set(fb.context, VIDEO_TYPE, fb.free)) + retval = -1; + + DRM_DEBUG("free fb, offset = %d\n", fb.free); + + return retval; +} + +#else + +int sis_fb_alloc(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + return -1; +} + +int sis_fb_free(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + return 0; +} + +#endif + +/* agp memory management */ +#if 1 + +static memHeap_t *AgpHeap = NULL; + +int sisp_agp_init(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_sis_agp_t agp; + + if (copy_from_user(&agp, (drm_sis_agp_t *)arg, sizeof(agp))) + return -EFAULT; + + AgpHeap = mmInit(agp.offset, agp.size); + + DRM_DEBUG("offset = %u, size = %u", agp.offset, agp.size); + + return 0; +} + +int sisp_agp_alloc(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_sis_mem_t agp; + PMemBlock block; + int retval = 0; + + if(!AgpHeap) + return -1; + + if (copy_from_user(&agp, (drm_sis_mem_t *)arg, sizeof(agp))) + return -EFAULT; + + block = mmAllocMem(AgpHeap, agp.size, 0, 0); + if(block){ + /* TODO */ + agp.offset = block->ofs; + agp.free = (unsigned int)block; + if(!add_alloc_set(agp.context, AGP_TYPE, agp.free)){ + DRM_DEBUG("adding to allocation set fails"); + mmFreeMem((PMemBlock)agp.free); + retval = -1; + } + } + else{ + agp.offset = 0; + agp.size = 0; + agp.free = 0; + } + + if (copy_to_user((drm_sis_mem_t *)arg, &agp, sizeof(agp))) return -EFAULT; + + DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp.size, agp.offset); + + return retval; +} + +int sisp_agp_free(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_sis_mem_t agp; + int retval = 0; + + if(!AgpHeap) + return -1; + + if (copy_from_user(&agp, (drm_sis_mem_t *)arg, sizeof(agp))) + return -EFAULT; + + if(!agp.free){ + return -1; + } + + mmFreeMem((PMemBlock)agp.free); + if(!del_alloc_set(agp.context, AGP_TYPE, agp.free)) + retval = -1; + + DRM_DEBUG("free agp, free = %d\n", agp.free); + + return retval; +} + +#endif + +int sis_init_context(int context) +{ + int i; + + for(i = 0; i < MAX_CONTEXT ; i++) + if(global_ppriv[i].used && (global_ppriv[i].context == context)) + break; + + if(i >= MAX_CONTEXT){ + for(i = 0; i < MAX_CONTEXT ; i++){ + if(!global_ppriv[i].used){ + global_ppriv[i].context = context; + global_ppriv[i].used = 1; + global_ppriv[i].sets[0] = setInit(); + global_ppriv[i].sets[1] = setInit(); + DRM_DEBUG("init allocation set, socket=%d, context = %d\n", + i, context); + break; + } + } + if((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) || + (global_ppriv[i].sets[1] == NULL)){ + return 0; + } + } + + return 1; +} + +int sis_final_context(int context) +{ + int i; + + for(i=0; i<MAX_CONTEXT; i++) + if(global_ppriv[i].used && (global_ppriv[i].context == context)) + break; + + if(i < MAX_CONTEXT){ + set_t *set; + unsigned int item; + int retval; + + DRM_DEBUG("find socket %d, context = %d\n", i, context); + + /* Video Memory */ + set = global_ppriv[i].sets[0]; + retval = setFirst(set, &item); + while(retval){ + DRM_DEBUG("free video memory 0x%x\n", item); +#if 0 + sis_free(item); +#endif + retval = setNext(set, &item); + } + setDestroy(set); + + /* AGP Memory */ + set = global_ppriv[i].sets[1]; + retval = setFirst(set, &item); + while(retval){ + DRM_DEBUG("free agp memory 0x%x\n", item); + mmFreeMem((PMemBlock)item); + retval = setNext(set, &item); + } + setDestroy(set); + + global_ppriv[i].used = 0; + } + + /* turn-off auto-flip */ + /* TODO */ +#if defined(SIS_STEREO) + flip_final(); +#endif + + return 1; +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c index 21f4998ec..ef0ae01bd 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c @@ -47,7 +47,6 @@ extern int xf86RemoveSIGIOHandler(int fd); #include "drm.h" #undef CONFIG_DRM_SIS -#if 0 Bool drmSiSAgpInit(int driSubFD, int offset, int size) { drm_sis_agp_t agp; @@ -58,4 +57,3 @@ Bool drmSiSAgpInit(int driSubFD, int offset, int size) return TRUE; } -#endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h index b011e3369..3def97f74 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h @@ -466,6 +466,11 @@ typedef struct drm_scatter_gather { #ifdef CONFIG_DRM_SIS /* SiS specific ioctls */ +#define SIS_IOCTL_FB_ALLOC DRM_IOWR(0x44, drm_sis_mem_t) +#define SIS_IOCTL_FB_FREE DRM_IOW( 0x45, drm_sis_mem_t) +#define SIS_IOCTL_AGP_INIT DRM_IOWR(0x53, drm_sis_agp_t) +#define SIS_IOCTL_AGP_ALLOC DRM_IOWR(0x54, drm_sis_mem_t) +#define SIS_IOCTL_AGP_FREE DRM_IOW( 0x55, drm_sis_mem_t) #define SIS_IOCTL_FLIP DRM_IOW( 0x48, drm_sis_flip_t) #define SIS_IOCTL_FLIP_INIT DRM_IO( 0x49) #define SIS_IOCTL_FLIP_FINAL DRM_IO( 0x50) |