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authoralanh <alanh>2002-08-06 13:41:40 +0000
committeralanh <alanh>2002-08-06 13:41:40 +0000
commit40dda76308c8b7b6ca6813c73f090e911bc6b903 (patch)
treef581bada1f7a660ae74e9b5a97b5c2f468bf31d9
parent564b12eeab9529131118bb19b861ca8e18c86687 (diff)
commit Sven Luther's patch to new tdlabs-0-0-1-branch for Permedia3/Gamma work.tdlabs-0-0-1-branch
-rw-r--r--xc/lib/GL/mesa/src/drv/gamma/gamma_xmesa.c26
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h1
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/glint/glint_common.h8
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c553
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h11
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h48
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c3
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h2
-rw-r--r--xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma.h93
-rw-r--r--xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c89
-rw-r--r--xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drm.h7
-rw-r--r--xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.h5
12 files changed, 776 insertions, 70 deletions
diff --git a/xc/lib/GL/mesa/src/drv/gamma/gamma_xmesa.c b/xc/lib/GL/mesa/src/drv/gamma/gamma_xmesa.c
index cbc17f453..c0d79d07e 100644
--- a/xc/lib/GL/mesa/src/drv/gamma/gamma_xmesa.c
+++ b/xc/lib/GL/mesa/src/drv/gamma/gamma_xmesa.c
@@ -40,6 +40,32 @@
static GLboolean
gammaInitDriver(__DRIscreenPrivate *sPriv)
{
+ GLINTDRIPtr gDRIPriv = (GLINTDRIPtr)sPriv->pDevPriv;
+ /* Return GL_FALSE if we detect an unsupported chip */
+ switch (gDRIPriv->chip_type) {
+ case DRI_GAMMA_CHIP_IS_DELTA :
+ return GL_FALSE;
+ break;
+ case DRI_GAMMA_CHIP_IS_GAMMA :
+ switch (gDRIPriv->rast_type) {
+ case DRI_GAMMA_RAST_IS_MX :
+ break;
+ case DRI_GAMMA_RAST_IS_PERMEDIA3 :
+ return GL_FALSE;
+ break;
+ }
+ break;
+ case DRI_GAMMA_CHIP_IS_PERMEDIA3 :
+ return GL_FALSE;
+ break;
+ case DRI_GAMMA_CHIP_IS_PERMEDIA2 :
+ return GL_FALSE;
+ break;
+ default :
+ return GL_FALSE;
+ break;
+ }
+
sPriv->private = (void *) gammaCreateScreen( sPriv );
if (!sPriv->private) {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h
index 6eaff3a8c..e8c954f38 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h
@@ -257,6 +257,7 @@ void Permedia3EnableOffscreen(ScreenPtr pScreen);
void Permedia3Sync(ScrnInfoPtr pScrn);
void DualPermedia3Sync(ScrnInfoPtr pScrn);
void Permedia3InitVideo(ScreenPtr pScreen);
+void Permedia3ResetVideo(ScrnInfoPtr pScrn);
void TXRestore(ScrnInfoPtr pScrn, GLINTRegPtr glintReg);
void TXSave(ScrnInfoPtr pScrn, GLINTRegPtr glintReg);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_common.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_common.h
index 71f6f6d48..7c0d0666b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_common.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_common.h
@@ -24,6 +24,7 @@
*
* Converted to common header format:
* Jens Owen <jens@tungstengraphics.com>
+ * Sven Luther <luther@dpt-info.u-strasbg.fr>
*
* $XFree86$
*
@@ -55,6 +56,13 @@ typedef struct {
unsigned int mmio2;
unsigned int mmio3;
unsigned int buffers_offset;
+ enum {
+ GAMMA_CHIP_IS_DELTA = 0x01,
+ GAMMA_CHIP_IS_GAMMA = 0x02,
+ GAMMA_CHIP_IS_PERMEDIA2 = 0x03,
+ GAMMA_CHIP_IS_PERMEDIA3 = 0x04
+ } chip_type;
+ int num_rast;
} drmGAMMAInit;
extern int drmGAMMAInitDMA( int fd, drmGAMMAInit *info );
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c
index e6a25cfd1..ffb43d71c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c
@@ -31,6 +31,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Authors:
* Jens Owen <jens@precisioninsight.com>
* Alan Hourihane <alanh@fairlite.demon.co.uk>
+ * Sven Luther <luther@dpt-info.u-strasbg.fr>
*
*/
@@ -48,6 +49,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "GL/glxtokens.h"
#include "glint_regs.h"
+#include "pm3_regs.h"
#include "glint.h"
#include "glint_dri.h"
@@ -310,7 +312,19 @@ static Bool GLINTDRIAgpInit(ScreenPtr pScreen)
/* Read AGP Capabilities */
mode = drmAgpGetMode(pGlint->drmSubFD) & ~0x03; /* Mask Host capabilities */
- mode |= 0x01; /* Gamma only supports AGP 1x */
+ switch (pGlint->Chipset) {
+ case PCI_VENDOR_3DLABS_CHIP_GAMMA :
+ mode |= 0x01; /* Gamma only supports AGP 1x */
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA2 :
+ case PCI_VENDOR_TI_CHIP_PERMEDIA2 :
+ mode |= 0x01; /* Permedia2 only supports AGP 1x */
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA3 :
+ /* TODO : need to check this, in the meantime i will stay with agp 1x */
+ mode |= 0x01; /* Permedia3 supports AGP 1x, 2x and 4x */
+ break;
+ }
/* Now enable AGP only on the specified BusID */
if ( drmAgpEnable( pGlint->drmSubFD, mode ) < 0 ) {
@@ -414,6 +428,23 @@ static Bool GLINTDRIKernelInit( ScreenPtr pScreen )
init.mmio2 = pGlintDRI->registers2.handle;
init.mmio3 = pGlintDRI->registers3.handle;
+
+ switch (pGlint->Chipset) {
+ case PCI_VENDOR_3DLABS_CHIP_GAMMA :
+ init.chip_type = GAMMA_CHIP_IS_GAMMA;
+ init.num_rast = pGlint->numMultiDevices;
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA3 :
+ init.chip_type = GAMMA_CHIP_IS_PERMEDIA3;
+ init.num_rast = 1;
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA2 :
+ case PCI_VENDOR_TI_CHIP_PERMEDIA2 :
+ init.chip_type = GAMMA_CHIP_IS_PERMEDIA2;
+ init.num_rast = 1;
+ break;
+ }
+
if (!pGlint->PCIMode) {
init.pcimode = 0;
init.buffers_offset = pGlint->buffers.handle;
@@ -467,12 +498,38 @@ GLINTDRIScreenInit(ScreenPtr pScreen)
}
}
- if (pGlint->Chipset != PCI_VENDOR_3DLABS_CHIP_GAMMA) return FALSE;
-
- if (pGlint->numMultiDevices > 2) return FALSE;
-
- if (pGlint->MultiChip != PCI_CHIP_MX) return FALSE;
+ switch (pGlint->Chipset) {
+ case PCI_VENDOR_3DLABS_CHIP_GAMMA :
+ switch (pGlint->MultiChip) {
+ case PCI_CHIP_MX :
+ if (pGlint->numMultiDevices > 2) return FALSE;
+ break;
+ case PCI_CHIP_PERMEDIA3 :
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Sorry, gamma + pm3 DRI not yet supported\n");
+ return FALSE;
+ /* We support only one Permedia3 rasterizer for now */
+ if (pGlint->numMultiDevices > 1) return FALSE;
+ break;
+ default :
+ return FALSE;
+ }
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA3 :
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Sorry, pm3 DRI not yet supported\n");
+ return FALSE;
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA2 :
+ case PCI_VENDOR_TI_CHIP_PERMEDIA2 :
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Sorry, pm2 DRI not yet supported\n");
+ return FALSE;
+ break;
+ default :
+ return FALSE;
+ }
pDRIInfo = DRICreateInfoRec();
if(pDRIInfo == NULL)
return FALSE;
@@ -537,7 +594,25 @@ GLINTDRIScreenInit(ScreenPtr pScreen)
/* setup call backs */
pDRIInfo->CreateContext = GLINTCreateContext;
pDRIInfo->DestroyContext = GLINTDestroyContext;
- pDRIInfo->SwapContext = GLINTDRISwapContext;
+ switch (pGlint->Chipset) {
+ case PCI_VENDOR_3DLABS_CHIP_GAMMA :
+ switch (pGlint->MultiChip) {
+ case PCI_CHIP_MX :
+ pDRIInfo->SwapContext = GLINTDRISwapContext_Gamma_MX;
+ break;
+ case PCI_CHIP_PERMEDIA3 :
+ pDRIInfo->SwapContext = GLINTDRISwapContext_PM3;
+ break;
+ }
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA3 :
+ pDRIInfo->SwapContext = GLINTDRISwapContext_PM3;
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA2 :
+ case PCI_VENDOR_TI_CHIP_PERMEDIA2 :
+ pDRIInfo->SwapContext = GLINTDRISwapContext_PM2;
+ break;
+ }
pDRIInfo->InitBuffers = GLINTDRIInitBuffers;
pDRIInfo->MoveBuffers = GLINTDRIMoveBuffers;
pDRIInfo->bufferRequests = DRI_ALL_WINDOWS;
@@ -599,7 +674,7 @@ GLINTDRIScreenInit(ScreenPtr pScreen)
version = drmGetVersion(pGlint->drmSubFD);
if (version) {
if (version->version_major != 2 ||
- version->version_minor < 0) {
+ version->version_minor < 1) {
/* incompatible drm version */
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[dri] GLINTDRIScreenInit failed because of a version mismatch.\n"
@@ -616,18 +691,80 @@ GLINTDRIScreenInit(ScreenPtr pScreen)
}
}
- /* Tell the client driver how many MX's we have */
- pGlintDRI->numMultiDevices = pGlint->numMultiDevices;
- /* Tell the client about our screen size setup */
- pGlintDRI->pprod = pGlint->pprod;
- pGlintDRI->cpp = pScrn->bitsPerPixel / 8;
- pGlintDRI->frontPitch = pScrn->displayWidth;
- pGlintDRI->frontOffset = 0;
-
- pGlintDRI->textureSize = 32 * 1024 * 1024;
- pGlintDRI->logTextureGranularity =
+ switch (pGlint->Chipset) {
+ case PCI_VENDOR_3DLABS_CHIP_GAMMA :
+ pGlintDRI->chip_type = DRI_GAMMA_CHIP_IS_GAMMA;
+ switch (pGlint->MultiChip) {
+ case PCI_CHIP_MX :
+ /* Tell the client driver how many MX's we have */
+ pGlintDRI->numMultiDevices = pGlint->numMultiDevices;
+ pGlintDRI->rast_type = DRI_GAMMA_RAST_IS_MX;
+ /* Tell the client about our screen size setup */
+ pGlintDRI->pprod = pGlint->pprod;
+
+ pGlintDRI->cpp = pScrn->bitsPerPixel / 8;
+ pGlintDRI->frontPitch = pScrn->displayWidth;
+ pGlintDRI->frontOffset = 0;
+
+ pGlintDRI->textureSize = 32 * 1024 * 1024;
+ pGlintDRI->logTextureGranularity =
+ mylog2( pGlintDRI->textureSize / GAMMA_NR_TEX_REGIONS );
+ break;
+ case PCI_CHIP_PERMEDIA3 :
+ /* TODO need to check those */
+ /* Tell the client driver how many MX's we have */
+ pGlintDRI->numMultiDevices = pGlint->numMultiDevices;
+ pGlintDRI->rast_type = DRI_GAMMA_RAST_IS_PERMEDIA3;
+ /* Tell the client about our screen size setup */
+ pGlintDRI->pprod = pGlint->pprod;
+
+ pGlintDRI->cpp = pScrn->bitsPerPixel / 8;
+ pGlintDRI->frontPitch = pScrn->displayWidth;
+ pGlintDRI->frontOffset = 0;
+
+ pGlintDRI->textureSize = 32 * 1024 * 1024;
+ pGlintDRI->logTextureGranularity =
+ mylog2( pGlintDRI->textureSize / GAMMA_NR_TEX_REGIONS );
+ break;
+ }
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA3 :
+ /* Tell the client driver that we have a PERMEDIA3 chip. */
+ pGlintDRI->chip_type = DRI_GAMMA_CHIP_IS_PERMEDIA3;
+ pGlintDRI->rast_type = DRI_GAMMA_RAST_IS_PERMEDIA3;
+ pGlintDRI->numMultiDevices = 0;
+ /* TODO need to check those */
+ /* Tell the client about our screen size setup */
+ pGlintDRI->pprod = pGlint->pprod;
+
+ pGlintDRI->cpp = pScrn->bitsPerPixel / 8;
+ pGlintDRI->frontPitch = pScrn->displayWidth;
+ pGlintDRI->frontOffset = 0;
+
+ pGlintDRI->textureSize = 32 * 1024 * 1024;
+ pGlintDRI->logTextureGranularity =
mylog2( pGlintDRI->textureSize / GAMMA_NR_TEX_REGIONS );
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA2 :
+ case PCI_VENDOR_TI_CHIP_PERMEDIA2 :
+ /* Tell the client driver that we have a PERMEDIA2 chip. */
+ pGlintDRI->chip_type = DRI_GAMMA_CHIP_IS_PERMEDIA2;
+ pGlintDRI->rast_type = DRI_GAMMA_RAST_IS_PERMEDIA2;
+ pGlintDRI->numMultiDevices = 0;
+ /* TODO need to check those */
+ /* Tell the client about our screen size setup */
+ pGlintDRI->pprod = pGlint->pprod;
+
+ pGlintDRI->cpp = pScrn->bitsPerPixel / 8;
+ pGlintDRI->frontPitch = pScrn->displayWidth;
+ pGlintDRI->frontOffset = 0;
+
+ pGlintDRI->textureSize = 32 * 1024 * 1024;
+ pGlintDRI->logTextureGranularity =
+ mylog2( pGlintDRI->textureSize / GAMMA_NR_TEX_REGIONS );
+ break;
+ }
/* setup device specific direct rendering memory maps */
@@ -946,7 +1083,7 @@ GLINTDRIFinishScreenInit(ScreenPtr pScreen)
return FALSE;
}
- if ( (pGlint->irq <= 0) ||
+ if ( (pGlint->irq <= 0) ||
GLINTDRIControlInit(pGlint->drmSubFD, pGlint->irq) ) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] cannot initialize dma with IRQ %d\n",
@@ -986,7 +1123,7 @@ GLINTDRIFinishScreenInit(ScreenPtr pScreen)
#define ContextData_tag 0x1ba
void
-GLINTDRISwapContext(
+GLINTDRISwapContext_Gamma_MX(
ScreenPtr pScreen,
DRISyncType syncType,
DRIContextType readContextType,
@@ -1853,6 +1990,345 @@ dumpIndex,pWC->Gamma[dumpIndex]);
}
void
+GLINTDRISwapContext_PM3(
+ ScreenPtr pScreen,
+ DRISyncType syncType,
+ DRIContextType readContextType,
+ void *readContextStore,
+ DRIContextType writeContextType,
+ void *writeContextStore)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ GLINTPtr pGlint = GLINTPTR(pScrn);
+ GLINTDRIContextPtr pRC = (GLINTDRIContextPtr)readContextStore;
+ GLINTDRIContextPtr pWC = (GLINTDRIContextPtr)writeContextStore;
+ int dumpIndex;
+ int context_size = 0;
+ CARD32 readValue;
+
+ /* Sync here covers both read and write context of contexts */
+ if (pGlint->AccelInfoRec->Sync) {
+ (*pGlint->AccelInfoRec->Sync)(pGlint->AccelInfoRec->pScrn);
+ }
+ pGlint->AccelInfoRec->NeedToSync = FALSE;
+
+ if (readContextType != DRI_NO_CONTEXT) {
+ /* send gamma the context dump command */
+ GLINT_WAIT(2);
+ GLINT_WRITE_REG(3<<18, FilterMode); /* context bits on gamma */
+ switch (pGlint->Chipset) {
+ case PCI_VENDOR_3DLABS_CHIP_GAMMA :
+ if (readContextType == DRI_2D_CONTEXT) {
+ GLINT_WRITE_REG(GLINT_GAMMA_PM3_2D_CONTEXT_MASK, ContextDump);
+ context_size = GLINT_GAMMA_PM3_2D_CONTEXT_SIZE;
+ }
+ else {
+ GLINT_WRITE_REG(GLINT_GAMMA_PM3_3D_CONTEXT_MASK, (ContextDump));
+ context_size = GLINT_GAMMA_PM3_3D_CONTEXT_SIZE;
+ }
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA3 :
+ if (readContextType == DRI_2D_CONTEXT) {
+ GLINT_WRITE_REG(GLINT_PM3_2D_CONTEXT_MASK, (ContextDump));
+ context_size = GLINT_PM3_2D_CONTEXT_SIZE;
+ }
+ else {
+ GLINT_WRITE_REG(GLINT_PM3_3D_CONTEXT_MASK, (ContextDump));
+ context_size = GLINT_PM3_3D_CONTEXT_SIZE;
+ }
+ break;
+ }
+
+ /* save context data from output fifo */
+ dumpIndex = 0;
+ do {
+ while(GLINT_READ_REG(OutFIFOWords) == 0);
+ readValue = GLINT_READ_REG(OutputFIFO);
+#ifdef DEBUG
+xf86DrvMsg(pScreen->myNum, X_INFO, "pRC tag [%d]: %x\n",
+dumpIndex,readValue);
+#endif
+ while(GLINT_READ_REG(OutFIFOWords) == 0);
+ readValue = GLINT_READ_REG(OutputFIFO);
+#ifdef DEBUG
+xf86DrvMsg(pScreen->myNum, X_INFO, "pRC data [%d]: %x\n",
+dumpIndex,readValue);
+#endif
+ pRC->Gamma[dumpIndex++] = readValue;
+ } while (dumpIndex < context_size);
+
+#if 0 /* Don't seem to be working on pm3 */
+ /* clear contextDump tag and data out of fifo */
+ while(GLINT_READ_REG(OutFIFOWords) == 0);
+ readValue = GLINT_READ_REG(OutputFIFO);
+ if (readValue != ContextDump_tag) {
+ xf86DrvMsg(pScreen->myNum, X_ERROR, "Context dump error\n");
+ }
+ while(GLINT_READ_REG(OutFIFOWords) == 0);
+ readValue = GLINT_READ_REG(OutputFIFO);
+#endif
+
+ GLINT_SLOW_WRITE_REG(1<<10, FilterMode);
+ }
+
+ if (writeContextType != DRI_NO_CONTEXT) {
+
+ /* restore the 3D portion of the new context */
+
+ /* send context restore command */
+
+ GLINT_WAIT(3);
+ GLINT_WRITE_REG(ContextRestore_tag, OutputFIFO);
+ switch (pGlint->Chipset) {
+ case PCI_VENDOR_3DLABS_CHIP_GAMMA :
+ if (writeContextType == DRI_2D_CONTEXT) {
+ GLINT_WRITE_REG(GLINT_GAMMA_PM3_2D_CONTEXT_MASK, OutputFIFO);
+ context_size = GLINT_GAMMA_PM3_2D_CONTEXT_SIZE;
+ }
+ else {
+ GLINT_WRITE_REG(GLINT_GAMMA_PM3_3D_CONTEXT_MASK, OutputFIFO);
+ context_size = GLINT_GAMMA_PM3_3D_CONTEXT_SIZE;
+ }
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA3 :
+ if (writeContextType == DRI_2D_CONTEXT) {
+ GLINT_WRITE_REG(GLINT_PM3_2D_CONTEXT_MASK, OutputFIFO);
+ context_size = GLINT_PM3_2D_CONTEXT_SIZE;
+ }
+ else {
+ GLINT_WRITE_REG(GLINT_PM3_3D_CONTEXT_MASK, OutputFIFO);
+ context_size = GLINT_PM3_3D_CONTEXT_SIZE;
+ }
+ break;
+ }
+ GLINT_WRITE_REG((((context_size-1) << 16) | ContextData_tag), OutputFIFO);
+
+ /* restore context data to context data register */
+ dumpIndex = 0;
+ do {
+ GLINT_WAIT(1);
+#ifdef DEBUG
+xf86DrvMsg(pScreen->myNum, X_INFO, "pWC data [%d]: %x\n",
+dumpIndex,pWC->Gamma[dumpIndex]);
+#endif
+ GLINT_WRITE_REG(pWC->Gamma[dumpIndex++], OutputFIFO);
+ } while (dumpIndex < (context_size));
+
+ /* Sync after writing gamma context and before writing MX context */
+ if (pGlint->AccelInfoRec->Sync) {
+ (*pGlint->AccelInfoRec->Sync)(pGlint->AccelInfoRec->pScrn);
+ }
+ /* Update XAA's NeedToSync flag */
+ pGlint->AccelInfoRec->NeedToSync = TRUE;
+
+
+ }
+}
+
+int PM2_2D_Context_List[GLINT_PM2_2D_CONTEXT_SIZE] = {
+ StartXDom,
+ dXDom,
+ StartXSub,
+ dXSub,
+ StartY,
+ dY,
+ GLINTCount,
+ RasterizerMode,
+ YLimits,
+ XLimits, /* 10 */
+ PackedDataLimits,
+ ScissorMode,
+ ScissorMinXY,
+ ScissorMaxXY,
+ ScreenSize,
+ AreaStippleMode,
+ AreaStipplePattern0,
+ AreaStipplePattern1,
+ AreaStipplePattern2,
+ AreaStipplePattern3, /* 20 */
+ AreaStipplePattern4,
+ AreaStipplePattern5,
+ AreaStipplePattern6,
+ AreaStipplePattern7,
+ LBReadMode,
+ LBReadFormat,
+ LBSourceOffset,
+ LBWindowBase,
+ LBWriteMode,
+ LBWriteFormat, /* 30 */
+ GLINTWindow,
+ StencilMode,
+ DepthMode,
+ TextureAddressMode,
+ TextureReadMode,
+ FBReadMode,
+ FBSourceOffset,
+ FBPixelOffset,
+ FBWindowBase,
+ FBWriteMode, /* 40 */
+ FBHardwareWriteMask,
+ FBBlockColor,
+ FBReadPixel,
+ TextureDownloadOffset,
+ FBBlockColorU,
+ FBBlockColorL,
+ FBSourceBase,
+ FBSourceDelta,
+ ColorDDAMode,
+ TextureColorMode, /* 50 */
+ FogMode,
+ AlphaBlendMode,
+ DitherMode,
+ FBSoftwareWriteMask,
+ LogicalOpMode,
+ FilterMode,
+ StatisticMode,
+ Config /* 58 */
+};
+int PM2_3D_Context_List[GLINT_PM2_3D_CONTEXT_SIZE] = {
+#if 0 /* I don't think we need to save those */
+ V0FixedTag, /* V0Fixed */
+ V1FixedTag, /* V1Fixed */
+ V2FixedTag, /* V2Fixed */
+ V0FloatTag, /* V0Float */
+ V1FloatTag, /* V1Float */
+ V2FloatTag, /* V2Float */
+#endif
+ DeltaModeTag, /* DeltaMode */
+ StencilData,
+ GLINTStencil, /* Stencil */
+ GLINTDepth, /* Depth */ /* 10 */
+ ZStartU,
+ ZStartL,
+ dZdxU,
+ dZdxL,
+ dZdyDomU,
+ dZdyDomL,
+ SStart,
+ dSdx,
+ dSdyDom,
+ TStart, /* 20 */
+ dTdx,
+ dTdyDom,
+ QStart,
+ dQdx,
+ dQdyDom,
+ PMTextureMapFormat, /* TextureMapFormat */
+ PMTextureDataFormat, /* TextureDataFormat */
+ Texel0,
+ TexelLUTMode,
+ TexelLUT0, /* 30 */
+ TexelLUT1,
+ TexelLUT2,
+ TexelLUT3,
+ TexelLUT4,
+ TexelLUT5,
+ TexelLUT6,
+ TexelLUT7,
+ TexelLUT8,
+ TexelLUT9,
+ TexelLUT10, /* 40 */
+ TexelLUT11,
+ TexelLUT12,
+ TexelLUT13,
+ TexelLUT14,
+ TexelLUT15,
+ AlphaMapUpperBound,
+ AlphaMapLowerBound,
+ TexelLUTIndex,
+ TexelLUTData,
+ TexelLUTAddress, /* 50 */
+ TexelLUTTransfer,
+ YUVMode,
+ ChromaUpper, /* ChromaUpperBound */
+ ChromaLower, /* ChromaLowerBound */
+ RStart,
+ dRdx,
+ dRdyDom,
+ GStart,
+ dGdx,
+ dGdyDom, /* 60 */
+ BStart,
+ dBdx,
+ dBdyDom,
+ AStart,
+ ConstantColor,
+ FogColor,
+ FStart,
+ dFdx,
+ dFdyDom,
+ KsStart, /* 70 */
+ dKsdx,
+ dKsdyDom,
+ KdStart,
+ dKdStart, /* dKddx */
+ dKddyDom,
+ MinRegion,
+ MaxRegion /* 77 */
+};
+
+
+/* Max context size for space reservation */
+#define GLINT_MAX_CONTEXT_SIZE 1717
+
+void
+GLINTDRISwapContext_PM2(
+ ScreenPtr pScreen,
+ DRISyncType syncType,
+ DRIContextType readContextType,
+ void *readContextStore,
+ DRIContextType writeContextType,
+ void *writeContextStore)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ GLINTPtr pGlint = GLINTPTR(pScrn);
+ GLINTDRIContextPtr pRC = (GLINTDRIContextPtr)readContextStore;
+ GLINTDRIContextPtr pWC = (GLINTDRIContextPtr)writeContextStore;
+ int dumpIndex, i;
+
+ /* Sync here covers both read and write context of contexts */
+ if (pGlint->AccelInfoRec->Sync) {
+ (*pGlint->AccelInfoRec->Sync)(pGlint->AccelInfoRec->pScrn);
+ }
+ pGlint->AccelInfoRec->NeedToSync = FALSE;
+
+ if (readContextType != DRI_NO_CONTEXT) {
+ dumpIndex = 0;
+ i = 0;
+ do {
+ pRC->Gamma[dumpIndex++] = GLINT_READ_REG(PM2_2D_Context_List[i++]);
+ } while (i < (GLINT_PM2_2D_CONTEXT_SIZE));
+ if (readContextType == DRI_3D_CONTEXT) {
+ i = 0;
+ do {
+ pRC->Gamma[dumpIndex++] = GLINT_READ_REG(PM2_3D_Context_List[i++]);
+ } while (i < (GLINT_PM2_3D_CONTEXT_SIZE));
+ }
+ }
+
+ if (writeContextType != DRI_NO_CONTEXT) {
+ dumpIndex = 0;
+ i = 0;
+ do {
+ GLINT_SLOW_WRITE_REG(pWC->Gamma[dumpIndex++], PM2_2D_Context_List[i++]);
+ } while (i < (GLINT_PM2_2D_CONTEXT_SIZE));
+ if (writeContextType == DRI_3D_CONTEXT) {
+ i = 0;
+ do {
+ GLINT_SLOW_WRITE_REG(pWC->Gamma[dumpIndex++], PM2_3D_Context_List[i++]);
+ } while (i < (GLINT_PM2_3D_CONTEXT_SIZE));
+ }
+ /* Sync after writing gamma context and before writing MX context */
+ if (pGlint->AccelInfoRec->Sync) {
+ (*pGlint->AccelInfoRec->Sync)(pGlint->AccelInfoRec->pScrn);
+ }
+ /* Update XAA's NeedToSync flag */
+ pGlint->AccelInfoRec->NeedToSync = TRUE;
+
+ }
+}
+
+void
GLINTDRIInitBuffers(
WindowPtr pWin,
RegionPtr prgn,
@@ -1863,6 +2339,7 @@ GLINTDRIInitBuffers(
GLINTPtr pGlint = GLINTPTR(pScrn);
BoxPtr pbox;
int nbox;
+ int window_index = 0;
pbox = REGION_RECTS(prgn);
nbox = REGION_NUM_RECTS(prgn);
@@ -1872,17 +2349,41 @@ GLINTDRIInitBuffers(
GLINT_WRITE_REG(0, FBWriteMode);
GLINT_WRITE_REG(0, LBWindowBase);
GLINT_WRITE_REG(1, LBWriteMode);
- if (pGlint->numMultiDevices == 2) {
- GLINT_WRITE_REG( pGlint->pprod |
- LBRM_ScanlineInt2 , LBReadMode);
- } else {
- GLINT_WRITE_REG( pGlint->pprod , LBReadMode);
+ switch (pGlint->Chipset) {
+ case PCI_VENDOR_3DLABS_CHIP_GAMMA :
+ switch (pGlint->MultiChip) {
+ case PCI_CHIP_MX :
+ window_index = ((index & 0xf) << 5);
+ if (pGlint->numMultiDevices == 2) {
+ GLINT_WRITE_REG( pGlint->pprod |
+ LBRM_ScanlineInt2 , LBReadMode);
+ } else {
+ GLINT_WRITE_REG( pGlint->pprod , LBReadMode);
+ }
+ break;
+ case PCI_CHIP_PERMEDIA3 :
+ GLINT_WRITE_REG(PM3LBSourceReadMode_Width(pScrn->displayWidth),
+ PM3LBSourceReadMode);
+ GLINT_WRITE_REG(PM3LBDestReadMode_Width(pScrn->displayWidth),
+ PM3LBDestReadMode);
+ break;
+ }
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA3 :
+ GLINT_WRITE_REG(PM3LBSourceReadMode_Width(pScrn->displayWidth),
+ PM3LBSourceReadMode);
+ GLINT_WRITE_REG(PM3LBDestReadMode_Width(pScrn->displayWidth),
+ PM3LBDestReadMode);
+ break;
+ case PCI_VENDOR_3DLABS_CHIP_PERMEDIA2 :
+ GLINT_WRITE_REG( pGlint->pprod , LBReadMode);
+ break;
}
GLINT_WRITE_REG(0, LBDepth);
GLINT_WRITE_REG(0, LBStencil);
GLINT_WRITE_REG( GWIN_UnitEnable |
GWIN_ForceLBUpdate |
- ((index & 0xf) << 5) |
+ window_index |
GWIN_LBUpdateSourceREG |
GWIN_OverrideWriteFilter, GLINTWindow);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h
index 8285f17fb..5d2113890 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h
@@ -107,6 +107,17 @@ typedef struct {
int depthPitch;
int textureSize;
int logTextureGranularity;
+ enum {
+ DRI_GAMMA_CHIP_IS_DELTA = 0x01,
+ DRI_GAMMA_CHIP_IS_GAMMA = 0x02,
+ DRI_GAMMA_CHIP_IS_PERMEDIA2 = 0x03,
+ DRI_GAMMA_CHIP_IS_PERMEDIA3 = 0x04
+ } chip_type;
+ enum {
+ DRI_GAMMA_RAST_IS_MX = 0x01,
+ DRI_GAMMA_RAST_IS_PERMEDIA2 = 0x02,
+ DRI_GAMMA_RAST_IS_PERMEDIA3 = 0x03
+ } rast_type;
} GLINTDRIRec, *GLINTDRIPtr;
#define GLINT_DRI_BUF_COUNT 256
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h
index 83045b727..ea1fe5bb7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h
@@ -30,9 +30,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/*
* Author:
* Jens Owen <jens@precisioninsight.com>
+ * Sven Luther <luther@dpt-info.u-strasbg.fr>
*
*/
+#ifndef _GLINT_DRIPRIV_H_
+#define _GLINT_DRI_PRIV_H_
+
extern void GlxSetVisualConfigs(
int nconfigs,
__GLXvisualConfig *configs,
@@ -45,7 +49,21 @@ extern Bool GLINTCreateContext(ScreenPtr pScreen,
void* pVisualConfigPriv,
DRIContextType contextStore);
-extern void GLINTDRISwapContext( ScreenPtr pScreen,
+extern void GLINTDRISwapContext_Gamma_MX( ScreenPtr pScreen,
+ DRISyncType syncType,
+ DRIContextType readContextType,
+ void* readContextStore,
+ DRIContextType writeContextType,
+ void* writeContextStore);
+
+extern void GLINTDRISwapContext_PM3( ScreenPtr pScreen,
+ DRISyncType syncType,
+ DRIContextType readContextType,
+ void* readContextStore,
+ DRIContextType writeContextType,
+ void* writeContextStore);
+
+extern void GLINTDRISwapContext_PM2( ScreenPtr pScreen,
DRISyncType syncType,
DRIContextType readContextType,
void* readContextStore,
@@ -91,9 +109,29 @@ extern void GLINTDRISwapContext( ScreenPtr pScreen,
#define GLINTSyncTag 0x188
#define GLINT_MAX_DRAWABLES 15
+/* Gamma only, Full context */
#define GLINT_GAMMA_CONTEXT_SIZE 964
#define GLINT_GAMMA_CONTEXT_MASK 0x7ff
+/* Gamma + Permedia3 rasterizer, TwoD & RasterizerState context only */
+#define GLINT_GAMMA_PM3_2D_CONTEXT_SIZE 232
+#define GLINT_GAMMA_PM3_2D_CONTEXT_MASK 0x900
+/* Gamma + Permedia3 rasterizer, Full context */
+#define GLINT_GAMMA_PM3_3D_CONTEXT_SIZE 1717
+#define GLINT_GAMMA_PM3_3D_CONTEXT_MASK 0x1fb03
+
+/* Permedia3, TwoD & RasterizerState context only */
+#define GLINT_PM3_2D_CONTEXT_SIZE 230
+#define GLINT_PM3_2D_CONTEXT_MASK 0x900
+/* Permedia3, Full context */
+#define GLINT_PM3_3D_CONTEXT_SIZE 753
+#define GLINT_PM3_3D_CONTEXT_MASK 0x1fb03
+
+/* Permedia 2 context size and register list */
+#define GLINT_PM2_2D_CONTEXT_SIZE 58
+#define GLINT_PM2_3D_CONTEXT_SIZE 71 /* 77 - 6 */
+
+
typedef struct {
int index;
} GLINTConfigPrivRec, *GLINTConfigPrivPtr;
@@ -289,8 +327,14 @@ typedef struct {
} GLINTMXRec;
+/* Max context size for space reservation */
+#define GLINT_MAX_CONTEXT_SIZE 1717
+
typedef struct {
GLINTMXRec MX1;
GLINTMXRec MX2;
- CARD32 Gamma[GLINT_GAMMA_CONTEXT_SIZE];
+ /* TODO Need to find a more elegant solution, maybe an union ? */
+ CARD32 Gamma[GLINT_MAX_CONTEXT_SIZE];
} GLINTDRIContextRec, *GLINTDRIContextPtr;
+
+#endif /* _GLINT_DRI_PRIV_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
index 4633d2df6..e5e471e5a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
@@ -3609,6 +3609,7 @@ GLINTBlockHandler (
ScreenPtr pScreen = screenInfo.screens[i];
ScrnInfoPtr pScrn = xf86Screens[i];
GLINTPtr pGlint = GLINTPTR(pScrn);
+ int sigstate = xf86BlockSIGIO();
if(pGlint->CursorColorCallback)
(*pGlint->CursorColorCallback)(pScrn);
@@ -3616,6 +3617,8 @@ GLINTBlockHandler (
if(pGlint->LoadCursorCallback)
(*pGlint->LoadCursorCallback)(pScrn);
+ xf86UnblockSIGIO(sigstate);
+
pScreen->BlockHandler = pGlint->BlockHandler;
(*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
pScreen->BlockHandler = GLINTBlockHandler;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h
index a91d914f9..45402c47c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h
@@ -1100,6 +1100,8 @@
#define ChromaUpper GLINT_TAG_ADDR(0x1E,0x01)
#define ChromaLower GLINT_TAG_ADDR(0x1E,0x02)
#define ChromaTestMode GLINT_TAG_ADDR(0x1E,0x03)
+#define AlphaMapUpperBound GLINT_TAG_ADDR(0x1E,0x03) /* PM2 */
+#define AlphaMapLowerBound GLINT_TAG_ADDR(0x1E,0x04) /* PM2 */
/******************************
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma.h
index 44d8d5bce..0ce9b143c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma.h
@@ -1,4 +1,4 @@
-/* gamma.c -- 3dlabs GMX 2000 driver -*- linux-c -*-
+/* gamma.h -- 3dlabs GMX 2000 driver -*- linux-c -*-
* Created: Mon Jan 4 08:58:31 1999 by gareth@valinux.com
*
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -25,6 +25,7 @@
*
* Authors:
* Gareth Hughes <gareth@valinux.com>
+ * Sven Luther <luther@dpt-info.u-strasbg.fr>
*/
#ifndef __GAMMA_H__
@@ -42,10 +43,10 @@
#define DRIVER_NAME "gamma"
#define DRIVER_DESC "3DLabs gamma"
-#define DRIVER_DATE "20010624"
+#define DRIVER_DATE "20020704"
#define DRIVER_MAJOR 2
-#define DRIVER_MINOR 0
+#define DRIVER_MINOR 1
#define DRIVER_PATCHLEVEL 0
#define DRIVER_IOCTLS \
@@ -87,8 +88,11 @@
#define __HAVE_DMA_QUIESCENT 1
#define DRIVER_DMA_QUIESCENT() do { \
- /* FIXME ! */ \
- gamma_dma_quiescent_single(dev); \
+ drm_gamma_private_t *dev_priv = \
+ (drm_gamma_private_t *)dev->dev_private;\
+ if (dev_priv->num_rast == 2) \
+ gamma_dma_quiescent_dual(dev); \
+ else gamma_dma_quiescent_single(dev); \
return 0; \
} while (0)
@@ -99,47 +103,84 @@
#define DRIVER_PREINSTALL() do { \
drm_gamma_private_t *dev_priv = \
(drm_gamma_private_t *)dev->dev_private;\
- while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
- GAMMA_WRITE( GAMMA_GCOMMANDMODE, 0x00000004 ); \
- GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 ); \
+ switch (dev_priv->chip_type) { \
+ case GAMMA_CHIP_IS_GAMMA : \
+ while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
+ GAMMA_WRITE( GAMMA_GCOMMANDMODE, 0x00000004 ); \
+ GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 ); \
+ break; \
+ } \
} while (0)
#define DRIVER_POSTINSTALL() do { \
drm_gamma_private_t *dev_priv = \
(drm_gamma_private_t *)dev->dev_private;\
- while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
- while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3); \
- GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002001 ); \
- GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000008 ); \
- GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00039090 ); \
+ switch (dev_priv->chip_type) { \
+ case GAMMA_CHIP_IS_GAMMA : \
+ while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3); \
+ GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002001 ); \
+ GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000008 ); \
+ GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00039090 ); \
+ break; \
+ case GAMMA_CHIP_IS_PERMEDIA2 : \
+ while(GAMMA_READ(GAMMA_INFIFOSPACE) < 1); \
+ GAMMA_WRITE( GAMMA_INTENABLE, 0x00000081 ); \
+ break; \
+ case GAMMA_CHIP_IS_PERMEDIA3 : \
+ while(GAMMA_READ(GAMMA_INFIFOSPACE) < 1); \
+ GAMMA_WRITE( GAMMA_INTENABLE, 0x00002081 ); \
+ break; \
+ } \
} while (0)
#else
#define DRIVER_POSTINSTALL() do { \
drm_gamma_private_t *dev_priv = \
(drm_gamma_private_t *)dev->dev_private;\
- while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
- while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
- GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002000 ); \
- GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000004 ); \
+ switch (dev_priv->chip_type) { \
+ case GAMMA_CHIP_IS_GAMMA : \
+ while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
+ GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002000 ); \
+ GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000004 ); \
+ break; \
+ case GAMMA_CHIP_IS_PERMEDIA2 : \
+ while(GAMMA_READ(GAMMA_INFIFOSPACE) < 1); \
+ GAMMA_WRITE( GAMMA_INTENABLE, 0x00000081 ); \
+ break; \
+ case GAMMA_CHIP_IS_PERMEDIA3 : \
+ while(GAMMA_READ(GAMMA_INFIFOSPACE) < 1); \
+ GAMMA_WRITE( GAMMA_INTENABLE, 0x00002081 ); \
+ break; \
+ } \
} while (0)
#define DRIVER_PREINSTALL() do { \
drm_gamma_private_t *dev_priv = \
(drm_gamma_private_t *)dev->dev_private;\
- while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
- while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
- GAMMA_WRITE( GAMMA_GCOMMANDMODE, GAMMA_QUEUED_DMA_MODE );\
- GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 );\
+ switch (dev_priv->chip_type) { \
+ case GAMMA_CHIP_IS_GAMMA : \
+ while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
+ GAMMA_WRITE( GAMMA_GCOMMANDMODE, GAMMA_QUEUED_DMA_MODE );\
+ GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 ); \
+ break; \
+ } \
} while (0)
#endif
#define DRIVER_UNINSTALL() do { \
drm_gamma_private_t *dev_priv = \
(drm_gamma_private_t *)dev->dev_private;\
- while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
- while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3); \
- GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00000000 ); \
- GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000000 ); \
- GAMMA_WRITE( GAMMA_GINTENABLE, 0x00000000 ); \
+ switch (dev_priv->chip_type) { \
+ case GAMMA_CHIP_IS_GAMMA : \
+ while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3); \
+ GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00000000 ); \
+ GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000000 ); \
+ GAMMA_WRITE( GAMMA_GINTENABLE, 0x00000000 ); \
+ break; \
+ case GAMMA_CHIP_IS_PERMEDIA2 : \
+ case GAMMA_CHIP_IS_PERMEDIA3 : \
+ while(GAMMA_READ(GAMMA_INFIFOSPACE) < 1); \
+ GAMMA_WRITE( GAMMA_INTENABLE, 0x00000000 ); \
+ break; \
+ } \
} while (0)
#define DRIVER_AGP_BUFFERS_MAP( dev ) \
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
index e18a577c7..621665a90 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
@@ -26,6 +26,7 @@
*
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
+ * Sven Luther <luther@dpt-info.u-strasbg.fr>
*
*/
@@ -46,8 +47,17 @@ static inline void gamma_dma_dispatch(drm_device_t *dev, unsigned long address,
(drm_gamma_private_t *)dev->dev_private;
mb();
while ( GAMMA_READ(GAMMA_INFIFOSPACE) < 2);
- GAMMA_WRITE(GAMMA_DMAADDRESS, address);
- while (GAMMA_READ(GAMMA_GCOMMANDSTATUS) != 4);
+ switch (dev_priv->chip_type) {
+ case GAMMA_CHIP_IS_GAMMA :
+ GAMMA_WRITE(GAMMA_DMAADDRESS, address);
+ while (GAMMA_READ(GAMMA_GCOMMANDSTATUS) != 4);
+ break;
+ case GAMMA_CHIP_IS_PERMEDIA2 :
+ case GAMMA_CHIP_IS_PERMEDIA3 :
+ GAMMA_WRITE(GAMMA_DMAADDRESS, virt_to_phys((void *)address));
+ while (GAMMA_READ(GAMMA_DMACOUNT));
+ break;
+ }
GAMMA_WRITE(GAMMA_DMACOUNT, length / 4);
}
@@ -114,10 +124,22 @@ void gamma_dma_service(int irq, void *device, struct pt_regs *regs)
atomic_inc(&dev->counts[6]); /* _DRM_STAT_IRQ */
- while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3);
- GAMMA_WRITE(GAMMA_GDELAYTIMER, 0xc350/2); /* 0x05S */
- GAMMA_WRITE(GAMMA_GCOMMANDINTFLAGS, 8);
- GAMMA_WRITE(GAMMA_GINTFLAGS, 0x2001);
+ switch (dev_priv->chip_type) {
+ case GAMMA_CHIP_IS_GAMMA :
+ while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3);
+ GAMMA_WRITE(GAMMA_GDELAYTIMER, 0xc350/2); /* 0x05S */
+ GAMMA_WRITE(GAMMA_GCOMMANDINTFLAGS, 8);
+ GAMMA_WRITE(GAMMA_GINTFLAGS, 0x2001);
+ break;
+ case GAMMA_CHIP_IS_PERMEDIA2 :
+ while (GAMMA_READ(GAMMA_INFIFOSPACE) < 1);
+ GAMMA_WRITE(GAMMA_INTFLAGS, 0x0081);
+ break;
+ case GAMMA_CHIP_IS_PERMEDIA3 :
+ while (GAMMA_READ(GAMMA_INFIFOSPACE) < 1);
+ GAMMA_WRITE(GAMMA_INTFLAGS, 0x2081);
+ break;
+ }
if (gamma_dma_is_ready(dev)) {
/* Free previous buffer */
if (test_and_set_bit(0, &dev->dma_flag)) return;
@@ -141,6 +163,8 @@ static int gamma_do_dma(drm_device_t *dev, int locked)
drm_buf_t *buf;
int retcode = 0;
drm_device_dma_t *dma = dev->dma;
+ drm_gamma_private_t *dev_priv =
+ (drm_gamma_private_t *)dev->dev_private;
#if DRM_DMA_HISTOGRAM
cycles_t dma_start, dma_stop;
#endif
@@ -158,9 +182,20 @@ static int gamma_do_dma(drm_device_t *dev, int locked)
}
buf = dma->next_buffer;
- /* WE NOW ARE ON LOGICAL PAGES!! - using page table setup in dma_init */
- /* So we pass the buffer index value into the physical page offset */
- address = buf->idx << 12;
+
+ switch (dev_priv->chip_type) {
+ case GAMMA_CHIP_IS_GAMMA :
+ /* WE NOW ARE ON LOGICAL PAGES!! - using page table
+ * setup in dma_init so we pass the buffer index value
+ * into the physical page offset */
+ address = buf->idx << 12;
+ case GAMMA_CHIP_IS_PERMEDIA2 :
+ case GAMMA_CHIP_IS_PERMEDIA3 :
+ default :
+ /* Permedia3 does not support logical pages */
+ address = (unsigned long)buf->address;
+ break;
+ }
length = buf->used;
DRM_DEBUG("context %d, buffer %d (%ld bytes)\n",
@@ -227,8 +262,13 @@ static int gamma_do_dma(drm_device_t *dev, int locked)
buf->time_dispatched = get_cycles();
#endif
- /* WE NOW ARE ON LOGICAL PAGES!!! - overriding address */
- address = buf->idx << 12;
+
+ switch (dev_priv->chip_type) {
+ case GAMMA_CHIP_IS_GAMMA :
+ /* WE NOW ARE ON LOGICAL PAGES!!! - overriding address */
+ address = buf->idx << 12;
+ break;
+ }
gamma_dma_dispatch(dev, address, length);
gamma_free_buffer(dev, dma->this_buffer);
@@ -605,6 +645,9 @@ static int gamma_do_init_dma( drm_device_t *dev, drm_gamma_init_t *init )
memset( dev_priv, 0, sizeof(drm_gamma_private_t) );
+ dev_priv->chip_type = init->chip_type;
+ dev_priv->num_rast = init->num_rast;
+
list_for_each(list, &dev->maplist->head) {
drm_map_list_t *r_list = (drm_map_list_t *)list;
if( r_list->map &&
@@ -651,12 +694,26 @@ static int gamma_do_init_dma( drm_device_t *dev, drm_gamma_init_t *init )
buf = dma->buflist[GLINT_DRI_BUF_COUNT];
- while (GAMMA_READ(GAMMA_INFIFOSPACE) < 1);
- GAMMA_WRITE( GAMMA_GDMACONTROL, 0xe);
+
+ switch (dev_priv->chip_type) {
+ case GAMMA_CHIP_IS_GAMMA :
+ while (GAMMA_READ(GAMMA_INFIFOSPACE) < 1);
+ GAMMA_WRITE( GAMMA_GDMACONTROL, 0xe);
+ break;
+ case GAMMA_CHIP_IS_PERMEDIA2 :
+ case GAMMA_CHIP_IS_PERMEDIA3 :
+ while (GAMMA_READ(GAMMA_INFIFOSPACE) < 1);
+ GAMMA_WRITE( GAMMA_GDMACONTROL, 0x2);
+ break;
+ }
+ }
+ switch (dev_priv->chip_type) {
+ case GAMMA_CHIP_IS_GAMMA :
+ while (GAMMA_READ(GAMMA_INFIFOSPACE) < 2);
+ GAMMA_WRITE( GAMMA_PAGETABLEADDR, virt_to_phys((void*)buf->address) );
+ GAMMA_WRITE( GAMMA_PAGETABLELENGTH, 2 );
+ break;
}
- while (GAMMA_READ(GAMMA_INFIFOSPACE) < 2);
- GAMMA_WRITE( GAMMA_PAGETABLEADDR, virt_to_phys((void*)buf->address) );
- GAMMA_WRITE( GAMMA_PAGETABLELENGTH, 2 );
return 0;
}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drm.h
index 0d58b07b5..791d61ca8 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drm.h
@@ -84,6 +84,13 @@ typedef struct drm_gamma_init {
unsigned int mmio2;
unsigned int mmio3;
unsigned int buffers_offset;
+ enum {
+ GAMMA_CHIP_IS_DELTA = 0x01,
+ GAMMA_CHIP_IS_GAMMA = 0x02,
+ GAMMA_CHIP_IS_PERMEDIA2 = 0x03,
+ GAMMA_CHIP_IS_PERMEDIA3 = 0x04
+ } chip_type;
+ int num_rast;
} drm_gamma_init_t;
#endif /* _GAMMA_DRM_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.h
index e7d0c8960..71bf2e390 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.h
@@ -26,6 +26,7 @@
*
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
+ * Sven Luther <luther@dpt-info.u-strasbg.fr>
*
*/
@@ -40,6 +41,8 @@ typedef struct drm_gamma_private {
drm_map_t *mmio1;
drm_map_t *mmio2;
drm_map_t *mmio3;
+ int chip_type;
+ int num_rast;
} drm_gamma_private_t;
#define LOCK_TEST_WITH_RETURN( dev ) \
@@ -111,6 +114,8 @@ extern int gamma_found(void);
#define GAMMA_SYNC_TAG 0x0188
#define GAMMA_PAGETABLEADDR 0x0C00
#define GAMMA_PAGETABLELENGTH 0x0C08
+#define GAMMA_INTENABLE 0x0008
+#define GAMMA_INTFLAGS 0x0010
#define GAMMA_PASSTHROUGH 0x1FE
#define GAMMA_DMAADDRTAG 0x530