r600g: fix lodq/levqr600-texture-query-lod

2 files changed, 22 insertions, 4 deletions

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 7b20f16a099..2f8c2fce9b6 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -355,6 +355,8 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 	case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 	case PIPE_CAP_TEXTURE_MULTISAMPLE:
+	case PIPE_CAP_TEXTURE_QUERY_LOD:
+	case PIPE_CAP_TEXTURE_QUERY_LEVELS:
 		return 1;
 
 	case PIPE_CAP_TGSI_TEXCOORD:
@@ -404,8 +406,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 	case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 	case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 	case PIPE_CAP_USER_VERTEX_BUFFERS:
-	case PIPE_CAP_TEXTURE_QUERY_LOD:
-	case PIPE_CAP_TEXTURE_QUERY_LEVELS:
 		return 0;
 
 	/* Stream output. */
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 475ced971e4..ad0a049ddc8 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -5002,9 +5002,20 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
 		tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 2) ? 2 : 7;
 		tex.dst_sel_z = (inst->Dst[0].Register.WriteMask & 4) ? 0 : 7;
 		tex.dst_sel_w = (inst->Dst[0].Register.WriteMask & 8) ? 3 : 7;
-	}
+	} else if (inst->Instruction.Opcode == TGSI_OPCODE_LODQ) {
+		tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 2) ? 1 : 7;
+		tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 1) ? 0 : 7;
+		tex.dst_sel_z = 7;
+		tex.dst_sel_w = 7;
+	} else if (inst->Instruction.Opcode == TGSI_OPCODE_LEVQ) {
+		tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 1) ? 3 : 7;;
+		tex.dst_sel_y = 7;
+		tex.dst_sel_z = 7;
+		tex.dst_sel_w = 7;
+        }
 
-	if (inst->Instruction.Opcode == TGSI_OPCODE_TXQ_LZ) {
+	if (inst->Instruction.Opcode == TGSI_OPCODE_TXQ_LZ ||
+	    inst->Instruction.Opcode == TGSI_OPCODE_LEVQ) {
 		tex.src_sel_x = 4;
 		tex.src_sel_y = 4;
 		tex.src_sel_z = 4;
@@ -5077,6 +5088,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
 
 	/* mask unused source components */
 	if (opcode == FETCH_OP_SAMPLE ||
+	    opcode == FETCH_OP_GET_LOD ||
 	    opcode == FETCH_OP_GATHER4) {
 		switch (inst->Texture.Texture) {
 		case TGSI_TEXTURE_2D:
@@ -6491,6 +6503,8 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_IMUL_HI,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_UMUL_HI,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_TG4,	0, FETCH_OP_GATHER4, tgsi_tex},
+	{TGSI_OPCODE_LODQ,      0, FETCH_OP_GET_LOD, tgsi_tex},
+	{TGSI_OPCODE_LEVQ,      0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex},
 	{TGSI_OPCODE_LAST,	0, ALU_OP0_NOP, tgsi_unsupported},
 };
 
@@ -6686,6 +6700,8 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_IMUL_HI,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_UMUL_HI,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_TG4,	0, FETCH_OP_GATHER4, tgsi_tex},
+	{TGSI_OPCODE_LODQ,      0, FETCH_OP_GET_LOD, tgsi_tex},
+	{TGSI_OPCODE_LEVQ,      0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex},
 	{TGSI_OPCODE_LAST,	0, ALU_OP0_NOP, tgsi_unsupported},
 };
 
@@ -6882,5 +6898,7 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_IMUL_HI,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_UMUL_HI,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_TG4,	0, FETCH_OP_GATHER4, tgsi_tex},
+	{TGSI_OPCODE_LODQ,      0, FETCH_OP_GET_LOD, tgsi_tex},
+	{TGSI_OPCODE_LEVQ,      0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex},
 	{TGSI_OPCODE_LAST,	0, ALU_OP0_NOP, tgsi_unsupported},
 };