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authorDave Airlie <airlied@redhat.com>2018-01-19 06:17:57 +1000
committerDave Airlie <airlied@redhat.com>2018-01-19 06:17:57 +1000
commit67dc091453eca3347c73978cec4df3c3bb53b423 (patch)
tree2e4134072408280f093668267fe6e6391c695051
parentfb75dafa5afb01603d6753d9e629a8490bd6cd54 (diff)
glsl: add support for min/max 64glsl_arb_gpu_shader_fp64
removes some dmin/dmax opcodes
-rw-r--r--src/compiler/glsl/builtin_float64.h400
-rw-r--r--src/compiler/glsl/builtin_functions.cpp7
-rw-r--r--src/compiler/glsl/builtin_functions.h5
-rw-r--r--src/compiler/glsl/float64.glsl20
-rw-r--r--src/compiler/glsl/ir_optimization.h1
-rw-r--r--src/compiler/glsl/lower_64bit.cpp13
-rw-r--r--src/mesa/state_tracker/st_glsl_to_tgsi.cpp2
7 files changed, 396 insertions, 52 deletions
diff --git a/src/compiler/glsl/builtin_float64.h b/src/compiler/glsl/builtin_float64.h
index 01cc3c86f6a..ef27f6c0a09 100644
--- a/src/compiler/glsl/builtin_float64.h
+++ b/src/compiler/glsl/builtin_float64.h
@@ -30,7 +30,7 @@ is_nan(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r000C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
sig_parameters.push_tail(r000C);
ir_expression *const r000D = lshift(swizzle_y(r000C), body.constant(int(1)));
- ir_expression *const r000E = lequal(body.constant(4292870144u), r000D);
+ ir_expression *const r000E = gequal(r000D, body.constant(4292870144u));
ir_expression *const r000F = nequal(swizzle_x(r000C), body.constant(0u));
ir_expression *const r0010 = bit_and(swizzle_y(r000C), body.constant(1048575u));
ir_expression *const r0011 = nequal(r0010, body.constant(0u));
@@ -56,7 +56,7 @@ fneg64(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r0015 = body.make_temp(glsl_type::uvec2_type, "return_value");
/* IF CONDITION */
ir_expression *const r0017 = lshift(swizzle_y(r0014), body.constant(int(1)));
- ir_expression *const r0018 = lequal(body.constant(4292870144u), r0017);
+ ir_expression *const r0018 = gequal(r0017, body.constant(4292870144u));
ir_expression *const r0019 = nequal(swizzle_x(r0014), body.constant(0u));
ir_expression *const r001A = bit_and(swizzle_y(r0014), body.constant(1048575u));
ir_expression *const r001B = nequal(r001A, body.constant(0u));
@@ -944,7 +944,7 @@ roundAndPackFloat64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r00F5, less(r00F6, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r00F8 = lequal(body.constant(int(2045)), r00EF);
+ ir_expression *const r00F8 = gequal(r00EF, body.constant(int(2045)));
ir_if *f00F7 = new(mem_ctx) ir_if(operand(r00F8).val);
exec_list *const f00F7_parent_instructions = body.instructions;
@@ -1553,7 +1553,7 @@ normalizeRoundAndPackFloat64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r014D, add(r0151, body.constant(int(-11))), 0x01));
/* IF CONDITION */
- ir_expression *const r0165 = lequal(body.constant(int(0)), r014D);
+ ir_expression *const r0165 = gequal(r014D, body.constant(int(0)));
ir_if *f0164 = new(mem_ctx) ir_if(operand(r0165).val);
exec_list *const f0164_parent_instructions = body.instructions;
@@ -1785,7 +1785,7 @@ normalizeRoundAndPackFloat64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r018E, less(r018F, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r0191 = lequal(body.constant(int(2045)), r0149);
+ ir_expression *const r0191 = gequal(r0149, body.constant(int(2045)));
ir_if *f0190 = new(mem_ctx) ir_if(operand(r0191).val);
exec_list *const f0190_parent_instructions = body.instructions;
@@ -2106,7 +2106,7 @@ propagateFloat64NaN(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r01CF = body.make_temp(glsl_type::uvec2_type, "return_value");
ir_variable *const r01D0 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
ir_expression *const r01D1 = lshift(swizzle_y(r01CD), body.constant(int(1)));
- ir_expression *const r01D2 = lequal(body.constant(4292870144u), r01D1);
+ ir_expression *const r01D2 = gequal(r01D1, body.constant(4292870144u));
ir_expression *const r01D3 = nequal(swizzle_x(r01CD), body.constant(0u));
ir_expression *const r01D4 = bit_and(swizzle_y(r01CD), body.constant(1048575u));
ir_expression *const r01D5 = nequal(r01D4, body.constant(0u));
@@ -2115,7 +2115,7 @@ propagateFloat64NaN(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r01D7 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
ir_expression *const r01D8 = lshift(swizzle_y(r01CE), body.constant(int(1)));
- ir_expression *const r01D9 = lequal(body.constant(4292870144u), r01D8);
+ ir_expression *const r01D9 = gequal(r01D8, body.constant(4292870144u));
ir_expression *const r01DA = nequal(swizzle_x(r01CE), body.constant(0u));
ir_expression *const r01DB = bit_and(swizzle_y(r01CE), body.constant(1048575u));
ir_expression *const r01DC = nequal(r01DB, body.constant(0u));
@@ -2299,7 +2299,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r0206 = body.make_temp(glsl_type::uvec2_type, "return_value");
ir_variable *const r0207 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
ir_expression *const r0208 = lshift(swizzle_y(r01E2), body.constant(int(1)));
- ir_expression *const r0209 = lequal(body.constant(4292870144u), r0208);
+ ir_expression *const r0209 = gequal(r0208, body.constant(4292870144u));
ir_expression *const r020A = nequal(swizzle_x(r01E2), body.constant(0u));
ir_expression *const r020B = bit_and(swizzle_y(r01E2), body.constant(1048575u));
ir_expression *const r020C = nequal(r020B, body.constant(0u));
@@ -2312,7 +2312,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r020F = lshift(swizzle_y(r01E1), body.constant(int(1)));
- ir_expression *const r0210 = lequal(body.constant(4292870144u), r020F);
+ ir_expression *const r0210 = gequal(r020F, body.constant(4292870144u));
ir_expression *const r0211 = nequal(swizzle_x(r01E1), body.constant(0u));
ir_expression *const r0212 = bit_and(swizzle_y(r01E1), body.constant(1048575u));
ir_expression *const r0213 = nequal(r0212, body.constant(0u));
@@ -2602,7 +2602,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r023C = body.make_temp(glsl_type::uvec2_type, "return_value");
ir_variable *const r023D = body.make_temp(glsl_type::bool_type, "is_nan_retval");
ir_expression *const r023E = lshift(swizzle_y(r01E2), body.constant(int(1)));
- ir_expression *const r023F = lequal(body.constant(4292870144u), r023E);
+ ir_expression *const r023F = gequal(r023E, body.constant(4292870144u));
ir_expression *const r0240 = nequal(swizzle_x(r01E2), body.constant(0u));
ir_expression *const r0241 = bit_and(swizzle_y(r01E2), body.constant(1048575u));
ir_expression *const r0242 = nequal(r0241, body.constant(0u));
@@ -2615,7 +2615,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r0245 = lshift(swizzle_y(r01E1), body.constant(int(1)));
- ir_expression *const r0246 = lequal(body.constant(4292870144u), r0245);
+ ir_expression *const r0246 = gequal(r0245, body.constant(4292870144u));
ir_expression *const r0247 = nequal(swizzle_x(r01E1), body.constant(0u));
ir_expression *const r0248 = bit_and(swizzle_y(r01E1), body.constant(1048575u));
ir_expression *const r0249 = nequal(r0248, body.constant(0u));
@@ -2909,7 +2909,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r0275 = body.make_temp(glsl_type::uvec2_type, "return_value");
ir_variable *const r0276 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
ir_expression *const r0277 = lshift(swizzle_y(r01E2), body.constant(int(1)));
- ir_expression *const r0278 = lequal(body.constant(4292870144u), r0277);
+ ir_expression *const r0278 = gequal(r0277, body.constant(4292870144u));
ir_expression *const r0279 = nequal(swizzle_x(r01E2), body.constant(0u));
ir_expression *const r027A = bit_and(swizzle_y(r01E2), body.constant(1048575u));
ir_expression *const r027B = nequal(r027A, body.constant(0u));
@@ -2922,7 +2922,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r027E = lshift(swizzle_y(r01E1), body.constant(int(1)));
- ir_expression *const r027F = lequal(body.constant(4292870144u), r027E);
+ ir_expression *const r027F = gequal(r027E, body.constant(4292870144u));
ir_expression *const r0280 = nequal(swizzle_x(r01E1), body.constant(0u));
ir_expression *const r0281 = bit_and(swizzle_y(r01E1), body.constant(1048575u));
ir_expression *const r0282 = nequal(r0281, body.constant(0u));
@@ -3073,7 +3073,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r029C, less(r029D, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r029F = lequal(body.constant(int(2045)), r01F6);
+ ir_expression *const r029F = gequal(r01F6, body.constant(int(2045)));
ir_if *f029E = new(mem_ctx) ir_if(operand(r029F).val);
exec_list *const f029E_parent_instructions = body.instructions;
@@ -3453,7 +3453,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r02EA, less(r02EB, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r02ED = lequal(body.constant(int(2045)), r01EF);
+ ir_expression *const r02ED = gequal(r01EF, body.constant(int(2045)));
ir_if *f02EC = new(mem_ctx) ir_if(operand(r02ED).val);
exec_list *const f02EC_parent_instructions = body.instructions;
@@ -3807,7 +3807,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r0337, less(r0338, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r033A = lequal(body.constant(int(2045)), r01EF);
+ ir_expression *const r033A = gequal(r01EF, body.constant(int(2045)));
ir_if *f0339 = new(mem_ctx) ir_if(operand(r033A).val);
exec_list *const f0339_parent_instructions = body.instructions;
@@ -4218,7 +4218,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r0397 = body.make_temp(glsl_type::uvec2_type, "return_value");
ir_variable *const r0398 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
ir_expression *const r0399 = lshift(swizzle_y(r01E2), body.constant(int(1)));
- ir_expression *const r039A = lequal(body.constant(4292870144u), r0399);
+ ir_expression *const r039A = gequal(r0399, body.constant(4292870144u));
ir_expression *const r039B = nequal(swizzle_x(r01E2), body.constant(0u));
ir_expression *const r039C = bit_and(swizzle_y(r01E2), body.constant(1048575u));
ir_expression *const r039D = nequal(r039C, body.constant(0u));
@@ -4231,7 +4231,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r03A0 = lshift(swizzle_y(r01E1), body.constant(int(1)));
- ir_expression *const r03A1 = lequal(body.constant(4292870144u), r03A0);
+ ir_expression *const r03A1 = gequal(r03A0, body.constant(4292870144u));
ir_expression *const r03A2 = nequal(swizzle_x(r01E1), body.constant(0u));
ir_expression *const r03A3 = bit_and(swizzle_y(r01E1), body.constant(1048575u));
ir_expression *const r03A4 = nequal(r03A3, body.constant(0u));
@@ -4616,7 +4616,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r03D5, add(r03D9, body.constant(int(-11))), 0x01));
/* IF CONDITION */
- ir_expression *const r03ED = lequal(body.constant(int(0)), r03D5);
+ ir_expression *const r03ED = gequal(r03D5, body.constant(int(0)));
ir_if *f03EC = new(mem_ctx) ir_if(operand(r03ED).val);
exec_list *const f03EC_parent_instructions = body.instructions;
@@ -4848,7 +4848,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r0416, less(r0417, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r0419 = lequal(body.constant(int(2045)), r03D1);
+ ir_expression *const r0419 = gequal(r03D1, body.constant(int(2045)));
ir_if *f0418 = new(mem_ctx) ir_if(operand(r0419).val);
exec_list *const f0418_parent_instructions = body.instructions;
@@ -5195,7 +5195,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r045E = body.make_temp(glsl_type::uvec2_type, "return_value");
ir_variable *const r045F = body.make_temp(glsl_type::bool_type, "is_nan_retval");
ir_expression *const r0460 = lshift(swizzle_y(r01E2), body.constant(int(1)));
- ir_expression *const r0461 = lequal(body.constant(4292870144u), r0460);
+ ir_expression *const r0461 = gequal(r0460, body.constant(4292870144u));
ir_expression *const r0462 = nequal(swizzle_x(r01E2), body.constant(0u));
ir_expression *const r0463 = bit_and(swizzle_y(r01E2), body.constant(1048575u));
ir_expression *const r0464 = nequal(r0463, body.constant(0u));
@@ -5208,7 +5208,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r0467 = lshift(swizzle_y(r01E1), body.constant(int(1)));
- ir_expression *const r0468 = lequal(body.constant(4292870144u), r0467);
+ ir_expression *const r0468 = gequal(r0467, body.constant(4292870144u));
ir_expression *const r0469 = nequal(swizzle_x(r01E1), body.constant(0u));
ir_expression *const r046A = bit_and(swizzle_y(r01E1), body.constant(1048575u));
ir_expression *const r046B = nequal(r046A, body.constant(0u));
@@ -5606,7 +5606,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r04A0, add(r04A4, body.constant(int(-11))), 0x01));
/* IF CONDITION */
- ir_expression *const r04B8 = lequal(body.constant(int(0)), r04A0);
+ ir_expression *const r04B8 = gequal(r04A0, body.constant(int(0)));
ir_if *f04B7 = new(mem_ctx) ir_if(operand(r04B8).val);
exec_list *const f04B7_parent_instructions = body.instructions;
@@ -5838,7 +5838,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r04E1, less(r04E2, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r04E4 = lequal(body.constant(int(2045)), r049C);
+ ir_expression *const r04E4 = gequal(r049C, body.constant(int(2045)));
ir_if *f04E3 = new(mem_ctx) ir_if(operand(r04E4).val);
exec_list *const f04E3_parent_instructions = body.instructions;
@@ -6179,7 +6179,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r0529 = body.make_temp(glsl_type::uvec2_type, "return_value");
ir_variable *const r052A = body.make_temp(glsl_type::bool_type, "is_nan_retval");
ir_expression *const r052B = lshift(swizzle_y(r01E2), body.constant(int(1)));
- ir_expression *const r052C = lequal(body.constant(4292870144u), r052B);
+ ir_expression *const r052C = gequal(r052B, body.constant(4292870144u));
ir_expression *const r052D = nequal(swizzle_x(r01E2), body.constant(0u));
ir_expression *const r052E = bit_and(swizzle_y(r01E2), body.constant(1048575u));
ir_expression *const r052F = nequal(r052E, body.constant(0u));
@@ -6192,7 +6192,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r0532 = lshift(swizzle_y(r01E1), body.constant(int(1)));
- ir_expression *const r0533 = lequal(body.constant(4292870144u), r0532);
+ ir_expression *const r0533 = gequal(r0532, body.constant(4292870144u));
ir_expression *const r0534 = nequal(swizzle_x(r01E1), body.constant(0u));
ir_expression *const r0535 = bit_and(swizzle_y(r01E1), body.constant(1048575u));
ir_expression *const r0536 = nequal(r0535, body.constant(0u));
@@ -6464,7 +6464,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r054A, add(r054E, body.constant(int(-11))), 0x01));
/* IF CONDITION */
- ir_expression *const r0562 = lequal(body.constant(int(0)), r054A);
+ ir_expression *const r0562 = gequal(r054A, body.constant(int(0)));
ir_if *f0561 = new(mem_ctx) ir_if(operand(r0562).val);
exec_list *const f0561_parent_instructions = body.instructions;
@@ -6696,7 +6696,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r058B, less(r058C, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r058E = lequal(body.constant(int(2045)), r0546);
+ ir_expression *const r058E = gequal(r0546, body.constant(int(2045)));
ir_if *f058D = new(mem_ctx) ir_if(operand(r058E).val);
exec_list *const f058D_parent_instructions = body.instructions;
@@ -7184,7 +7184,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r05D6, add(r05DA, body.constant(int(-11))), 0x01));
/* IF CONDITION */
- ir_expression *const r05EE = lequal(body.constant(int(0)), r05D6);
+ ir_expression *const r05EE = gequal(r05D6, body.constant(int(0)));
ir_if *f05ED = new(mem_ctx) ir_if(operand(r05EE).val);
exec_list *const f05ED_parent_instructions = body.instructions;
@@ -7416,7 +7416,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r0617, less(r0618, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r061A = lequal(body.constant(int(2045)), r05D2);
+ ir_expression *const r061A = gequal(r05D2, body.constant(int(2045)));
ir_if *f0619 = new(mem_ctx) ir_if(operand(r061A).val);
exec_list *const f0619_parent_instructions = body.instructions;
@@ -7902,7 +7902,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r0662, add(r0666, body.constant(int(-11))), 0x01));
/* IF CONDITION */
- ir_expression *const r067A = lequal(body.constant(int(0)), r0662);
+ ir_expression *const r067A = gequal(r0662, body.constant(int(0)));
ir_if *f0679 = new(mem_ctx) ir_if(operand(r067A).val);
exec_list *const f0679_parent_instructions = body.instructions;
@@ -8134,7 +8134,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r06A3, less(r06A4, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r06A6 = lequal(body.constant(int(2045)), r065E);
+ ir_expression *const r06A6 = gequal(r065E, body.constant(int(2045)));
ir_if *f06A5 = new(mem_ctx) ir_if(operand(r06A6).val);
exec_list *const f06A5_parent_instructions = body.instructions;
@@ -8622,7 +8622,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r06EE, add(r06F2, body.constant(int(-11))), 0x01));
/* IF CONDITION */
- ir_expression *const r0706 = lequal(body.constant(int(0)), r06EE);
+ ir_expression *const r0706 = gequal(r06EE, body.constant(int(0)));
ir_if *f0705 = new(mem_ctx) ir_if(operand(r0706).val);
exec_list *const f0705_parent_instructions = body.instructions;
@@ -8854,7 +8854,7 @@ fadd64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r072F, less(r0730, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r0732 = lequal(body.constant(int(2045)), r06EA);
+ ir_expression *const r0732 = gequal(r06EA, body.constant(int(2045)));
ir_if *f0731 = new(mem_ctx) ir_if(operand(r0732).val);
exec_list *const f0731_parent_instructions = body.instructions;
@@ -10002,7 +10002,7 @@ fmul64(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r0855 = body.make_temp(glsl_type::uvec2_type, "return_value");
ir_variable *const r0856 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
ir_expression *const r0857 = lshift(swizzle_y(r082F), body.constant(int(1)));
- ir_expression *const r0858 = lequal(body.constant(4292870144u), r0857);
+ ir_expression *const r0858 = gequal(r0857, body.constant(4292870144u));
ir_expression *const r0859 = nequal(swizzle_x(r082F), body.constant(0u));
ir_expression *const r085A = bit_and(swizzle_y(r082F), body.constant(1048575u));
ir_expression *const r085B = nequal(r085A, body.constant(0u));
@@ -10015,7 +10015,7 @@ fmul64(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r085E = lshift(swizzle_y(r082E), body.constant(int(1)));
- ir_expression *const r085F = lequal(body.constant(4292870144u), r085E);
+ ir_expression *const r085F = gequal(r085E, body.constant(4292870144u));
ir_expression *const r0860 = nequal(swizzle_x(r082E), body.constant(0u));
ir_expression *const r0861 = bit_and(swizzle_y(r082E), body.constant(1048575u));
ir_expression *const r0862 = nequal(r0861, body.constant(0u));
@@ -10148,7 +10148,7 @@ fmul64(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r0876 = body.make_temp(glsl_type::uvec2_type, "return_value");
ir_variable *const r0877 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
ir_expression *const r0878 = lshift(swizzle_y(r082F), body.constant(int(1)));
- ir_expression *const r0879 = lequal(body.constant(4292870144u), r0878);
+ ir_expression *const r0879 = gequal(r0878, body.constant(4292870144u));
ir_expression *const r087A = nequal(swizzle_x(r082F), body.constant(0u));
ir_expression *const r087B = bit_and(swizzle_y(r082F), body.constant(1048575u));
ir_expression *const r087C = nequal(r087B, body.constant(0u));
@@ -10161,7 +10161,7 @@ fmul64(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r087F = lshift(swizzle_y(r082E), body.constant(int(1)));
- ir_expression *const r0880 = lequal(body.constant(4292870144u), r087F);
+ ir_expression *const r0880 = gequal(r087F, body.constant(4292870144u));
ir_expression *const r0881 = nequal(swizzle_x(r082E), body.constant(0u));
ir_expression *const r0882 = bit_and(swizzle_y(r082E), body.constant(1048575u));
ir_expression *const r0883 = nequal(r0882, body.constant(0u));
@@ -11307,7 +11307,7 @@ fmul64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r083A, bit_or(r096D, r0983), 0x01));
/* IF CONDITION */
- ir_expression *const r0985 = lequal(body.constant(2097152u), r0973);
+ ir_expression *const r0985 = gequal(r0973, body.constant(2097152u));
ir_if *f0984 = new(mem_ctx) ir_if(operand(r0985).val);
exec_list *const f0984_parent_instructions = body.instructions;
@@ -11361,7 +11361,7 @@ fmul64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r0992, less(r0993, body.constant(int(0))), 0x01));
/* IF CONDITION */
- ir_expression *const r0995 = lequal(body.constant(int(2045)), r0839);
+ ir_expression *const r0995 = gequal(r0839, body.constant(int(2045)));
ir_if *f0994 = new(mem_ctx) ir_if(operand(r0995).val);
exec_list *const f0994_parent_instructions = body.instructions;
@@ -12438,7 +12438,7 @@ fp64_to_int(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r0A5E, add(r0A5B, body.constant(int(-1043))), 0x01));
/* IF CONDITION */
- ir_expression *const r0A60 = lequal(body.constant(int(0)), r0A5E);
+ ir_expression *const r0A60 = gequal(r0A5E, body.constant(int(0)));
ir_if *f0A5F = new(mem_ctx) ir_if(operand(r0A60).val);
exec_list *const f0A5F_parent_instructions = body.instructions;
@@ -12880,7 +12880,7 @@ int_to_fp64(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r0AAD, add(r0A9A, body.constant(int(-11))), 0x01));
/* IF CONDITION */
- ir_expression *const r0AAF = lequal(body.constant(int(0)), r0AAD);
+ ir_expression *const r0AAF = gequal(r0AAD, body.constant(int(0)));
ir_if *f0AAE = new(mem_ctx) ir_if(operand(r0AAF).val);
exec_list *const f0AAE_parent_instructions = body.instructions;
@@ -13072,7 +13072,7 @@ roundAndPackFloat32(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r0AD6 = expr(ir_unop_i2u, r0ACF);
- ir_expression *const r0AD7 = lequal(body.constant(253u), r0AD6);
+ ir_expression *const r0AD7 = gequal(r0AD6, body.constant(253u));
ir_if *f0AD5 = new(mem_ctx) ir_if(operand(r0AD7).val);
exec_list *const f0AD5_parent_instructions = body.instructions;
@@ -13354,7 +13354,7 @@ fp64_to_fp32(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r0B28 = expr(ir_unop_i2u, r0B21);
- ir_expression *const r0B29 = lequal(body.constant(253u), r0B28);
+ ir_expression *const r0B29 = gequal(r0B28, body.constant(253u));
ir_if *f0B27 = new(mem_ctx) ir_if(operand(r0B29).val);
exec_list *const f0B27_parent_instructions = body.instructions;
@@ -13974,7 +13974,7 @@ estimateDiv64To32(void *mem_ctx, builtin_available_predicate avail)
body.emit(assign(r0BBB, body.constant(0u), 0x01));
/* IF CONDITION */
- ir_expression *const r0BBF = lequal(r0BB8, r0BB6);
+ ir_expression *const r0BBF = gequal(r0BB6, r0BB8);
ir_if *f0BBE = new(mem_ctx) ir_if(operand(r0BBF).val);
exec_list *const f0BBE_parent_instructions = body.instructions;
@@ -13992,7 +13992,7 @@ estimateDiv64To32(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r0BC0 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
/* IF CONDITION */
ir_expression *const r0BC2 = lshift(r0BBD, body.constant(int(16)));
- ir_expression *const r0BC3 = lequal(r0BC2, r0BB6);
+ ir_expression *const r0BC3 = gequal(r0BB6, r0BC2);
ir_if *f0BC1 = new(mem_ctx) ir_if(operand(r0BC3).val);
exec_list *const f0BC1_parent_instructions = body.instructions;
@@ -14116,7 +14116,7 @@ estimateDiv64To32(void *mem_ctx, builtin_available_predicate avail)
ir_variable *const r0BE9 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
/* IF CONDITION */
ir_expression *const r0BEB = lshift(r0BBD, body.constant(int(16)));
- ir_expression *const r0BEC = lequal(r0BEB, r0BBC);
+ ir_expression *const r0BEC = gequal(r0BBC, r0BEB);
ir_if *f0BEA = new(mem_ctx) ir_if(operand(r0BEC).val);
exec_list *const f0BEA_parent_instructions = body.instructions;
@@ -14277,7 +14277,7 @@ fsqrt64(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r0C16 = expr(ir_unop_i2u, r0C0F);
- ir_expression *const r0C17 = lequal(body.constant(253u), r0C16);
+ ir_expression *const r0C17 = gequal(r0C16, body.constant(253u));
ir_if *f0C15 = new(mem_ctx) ir_if(operand(r0C17).val);
exec_list *const f0C15_parent_instructions = body.instructions;
@@ -14762,7 +14762,7 @@ ftrunc64(void *mem_ctx, builtin_available_predicate avail)
body.instructions = &f0C7E->else_instructions;
/* IF CONDITION */
- ir_expression *const r0C81 = greater(r0C7A, body.constant(int(52)));
+ ir_expression *const r0C81 = less(body.constant(int(52)), r0C7A);
ir_if *f0C80 = new(mem_ctx) ir_if(operand(r0C81).val);
exec_list *const f0C80_parent_instructions = body.instructions;
@@ -14968,7 +14968,7 @@ fround64(void *mem_ctx, builtin_available_predicate avail)
body.instructions = &f0C94->else_instructions;
/* IF CONDITION */
- ir_expression *const r0CA5 = greater(r0C90, body.constant(int(51)));
+ ir_expression *const r0CA5 = less(body.constant(int(51)), r0C90);
ir_expression *const r0CA6 = equal(r0C90, body.constant(int(1024)));
ir_expression *const r0CA7 = logic_or(r0CA5, r0CA6);
ir_if *f0CA4 = new(mem_ctx) ir_if(operand(r0CA7).val);
@@ -15199,7 +15199,7 @@ frcp64(void *mem_ctx, builtin_available_predicate avail)
/* IF CONDITION */
ir_expression *const r0CDD = expr(ir_unop_i2u, r0CD6);
- ir_expression *const r0CDE = lequal(body.constant(253u), r0CDD);
+ ir_expression *const r0CDE = gequal(r0CDD, body.constant(253u));
ir_if *f0CDC = new(mem_ctx) ir_if(operand(r0CDE).val);
exec_list *const f0CDC_parent_instructions = body.instructions;
@@ -15650,3 +15650,301 @@ frcp64(void *mem_ctx, builtin_available_predicate avail)
sig->replace_parameters(&sig_parameters);
return sig;
}
+ir_function_signature *
+fmin64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0D3F = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r0D3F);
+ ir_variable *const r0D40 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
+ sig_parameters.push_tail(r0D40);
+ ir_variable *const r0D41 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0D42 = body.make_temp(glsl_type::bool_type, "return_value");
+ ir_variable *const r0D43 = new(mem_ctx) ir_variable(glsl_type::bool_type, "isbNaN", ir_var_auto);
+ body.emit(r0D43);
+ ir_variable *const r0D44 = new(mem_ctx) ir_variable(glsl_type::bool_type, "isaNaN", ir_var_auto);
+ body.emit(r0D44);
+ ir_expression *const r0D45 = rshift(swizzle_y(r0D3F), body.constant(int(20)));
+ ir_expression *const r0D46 = bit_and(r0D45, body.constant(2047u));
+ ir_expression *const r0D47 = expr(ir_unop_u2i, r0D46);
+ ir_expression *const r0D48 = equal(r0D47, body.constant(int(2047)));
+ ir_expression *const r0D49 = bit_and(swizzle_y(r0D3F), body.constant(1048575u));
+ ir_expression *const r0D4A = bit_or(r0D49, swizzle_x(r0D3F));
+ ir_expression *const r0D4B = nequal(r0D4A, body.constant(0u));
+ body.emit(assign(r0D44, logic_and(r0D48, r0D4B), 0x01));
+
+ ir_expression *const r0D4C = rshift(swizzle_y(r0D40), body.constant(int(20)));
+ ir_expression *const r0D4D = bit_and(r0D4C, body.constant(2047u));
+ ir_expression *const r0D4E = expr(ir_unop_u2i, r0D4D);
+ ir_expression *const r0D4F = equal(r0D4E, body.constant(int(2047)));
+ ir_expression *const r0D50 = bit_and(swizzle_y(r0D40), body.constant(1048575u));
+ ir_expression *const r0D51 = bit_or(r0D50, swizzle_x(r0D40));
+ ir_expression *const r0D52 = nequal(r0D51, body.constant(0u));
+ body.emit(assign(r0D43, logic_and(r0D4F, r0D52), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D54 = logic_or(r0D44, r0D43);
+ ir_if *f0D53 = new(mem_ctx) ir_if(operand(r0D54).val);
+ exec_list *const f0D53_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D53->then_instructions;
+
+ body.emit(assign(r0D42, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D53->else_instructions;
+
+ ir_variable *const r0D55 = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r0D55, rshift(swizzle_y(r0D3F), body.constant(int(31))), 0x01));
+
+ ir_variable *const r0D56 = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r0D56, rshift(swizzle_y(r0D40), body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D58 = nequal(r0D55, r0D56);
+ ir_if *f0D57 = new(mem_ctx) ir_if(operand(r0D58).val);
+ exec_list *const f0D57_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D57->then_instructions;
+
+ ir_expression *const r0D59 = nequal(r0D55, body.constant(0u));
+ ir_expression *const r0D5A = bit_or(swizzle_y(r0D3F), swizzle_y(r0D40));
+ ir_expression *const r0D5B = lshift(r0D5A, body.constant(int(1)));
+ ir_expression *const r0D5C = bit_or(r0D5B, swizzle_x(r0D3F));
+ ir_expression *const r0D5D = bit_or(r0D5C, swizzle_x(r0D40));
+ ir_expression *const r0D5E = nequal(r0D5D, body.constant(0u));
+ body.emit(assign(r0D42, logic_and(r0D59, r0D5E), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D57->else_instructions;
+
+ ir_variable *const r0D5F = body.make_temp(glsl_type::bool_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0D61 = nequal(r0D55, body.constant(0u));
+ ir_if *f0D60 = new(mem_ctx) ir_if(operand(r0D61).val);
+ exec_list *const f0D60_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D60->then_instructions;
+
+ ir_expression *const r0D62 = less(swizzle_y(r0D40), swizzle_y(r0D3F));
+ ir_expression *const r0D63 = equal(swizzle_y(r0D40), swizzle_y(r0D3F));
+ ir_expression *const r0D64 = less(swizzle_x(r0D40), swizzle_x(r0D3F));
+ ir_expression *const r0D65 = logic_and(r0D63, r0D64);
+ body.emit(assign(r0D5F, logic_or(r0D62, r0D65), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D60->else_instructions;
+
+ ir_expression *const r0D66 = less(swizzle_y(r0D3F), swizzle_y(r0D40));
+ ir_expression *const r0D67 = equal(swizzle_y(r0D3F), swizzle_y(r0D40));
+ ir_expression *const r0D68 = less(swizzle_x(r0D3F), swizzle_x(r0D40));
+ ir_expression *const r0D69 = logic_and(r0D67, r0D68);
+ body.emit(assign(r0D5F, logic_or(r0D66, r0D69), 0x01));
+
+
+ body.instructions = f0D60_parent_instructions;
+ body.emit(f0D60);
+
+ /* END IF */
+
+ body.emit(assign(r0D42, r0D5F, 0x01));
+
+
+ body.instructions = f0D57_parent_instructions;
+ body.emit(f0D57);
+
+ /* END IF */
+
+
+ body.instructions = f0D53_parent_instructions;
+ body.emit(f0D53);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0D6A = new(mem_ctx) ir_if(operand(r0D42).val);
+ exec_list *const f0D6A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D6A->then_instructions;
+
+ body.emit(assign(r0D41, r0D3F, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D6A->else_instructions;
+
+ body.emit(assign(r0D41, r0D40, 0x03));
+
+
+ body.instructions = f0D6A_parent_instructions;
+ body.emit(f0D6A);
+
+ /* END IF */
+
+ body.emit(ret(r0D41));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+fmax64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0D6B = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r0D6B);
+ ir_variable *const r0D6C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
+ sig_parameters.push_tail(r0D6C);
+ ir_variable *const r0D6D = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0D6E = body.make_temp(glsl_type::bool_type, "return_value");
+ ir_variable *const r0D6F = new(mem_ctx) ir_variable(glsl_type::bool_type, "isbNaN", ir_var_auto);
+ body.emit(r0D6F);
+ ir_variable *const r0D70 = new(mem_ctx) ir_variable(glsl_type::bool_type, "isaNaN", ir_var_auto);
+ body.emit(r0D70);
+ ir_expression *const r0D71 = rshift(swizzle_y(r0D6B), body.constant(int(20)));
+ ir_expression *const r0D72 = bit_and(r0D71, body.constant(2047u));
+ ir_expression *const r0D73 = expr(ir_unop_u2i, r0D72);
+ ir_expression *const r0D74 = equal(r0D73, body.constant(int(2047)));
+ ir_expression *const r0D75 = bit_and(swizzle_y(r0D6B), body.constant(1048575u));
+ ir_expression *const r0D76 = bit_or(r0D75, swizzle_x(r0D6B));
+ ir_expression *const r0D77 = nequal(r0D76, body.constant(0u));
+ body.emit(assign(r0D70, logic_and(r0D74, r0D77), 0x01));
+
+ ir_expression *const r0D78 = rshift(swizzle_y(r0D6C), body.constant(int(20)));
+ ir_expression *const r0D79 = bit_and(r0D78, body.constant(2047u));
+ ir_expression *const r0D7A = expr(ir_unop_u2i, r0D79);
+ ir_expression *const r0D7B = equal(r0D7A, body.constant(int(2047)));
+ ir_expression *const r0D7C = bit_and(swizzle_y(r0D6C), body.constant(1048575u));
+ ir_expression *const r0D7D = bit_or(r0D7C, swizzle_x(r0D6C));
+ ir_expression *const r0D7E = nequal(r0D7D, body.constant(0u));
+ body.emit(assign(r0D6F, logic_and(r0D7B, r0D7E), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D80 = logic_or(r0D70, r0D6F);
+ ir_if *f0D7F = new(mem_ctx) ir_if(operand(r0D80).val);
+ exec_list *const f0D7F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D7F->then_instructions;
+
+ body.emit(assign(r0D6E, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D7F->else_instructions;
+
+ ir_variable *const r0D81 = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r0D81, rshift(swizzle_y(r0D6B), body.constant(int(31))), 0x01));
+
+ ir_variable *const r0D82 = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r0D82, rshift(swizzle_y(r0D6C), body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D84 = nequal(r0D81, r0D82);
+ ir_if *f0D83 = new(mem_ctx) ir_if(operand(r0D84).val);
+ exec_list *const f0D83_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D83->then_instructions;
+
+ ir_expression *const r0D85 = nequal(r0D81, body.constant(0u));
+ ir_expression *const r0D86 = bit_or(swizzle_y(r0D6B), swizzle_y(r0D6C));
+ ir_expression *const r0D87 = lshift(r0D86, body.constant(int(1)));
+ ir_expression *const r0D88 = bit_or(r0D87, swizzle_x(r0D6B));
+ ir_expression *const r0D89 = bit_or(r0D88, swizzle_x(r0D6C));
+ ir_expression *const r0D8A = nequal(r0D89, body.constant(0u));
+ body.emit(assign(r0D6E, logic_and(r0D85, r0D8A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D83->else_instructions;
+
+ ir_variable *const r0D8B = body.make_temp(glsl_type::bool_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0D8D = nequal(r0D81, body.constant(0u));
+ ir_if *f0D8C = new(mem_ctx) ir_if(operand(r0D8D).val);
+ exec_list *const f0D8C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D8C->then_instructions;
+
+ ir_expression *const r0D8E = less(swizzle_y(r0D6C), swizzle_y(r0D6B));
+ ir_expression *const r0D8F = equal(swizzle_y(r0D6C), swizzle_y(r0D6B));
+ ir_expression *const r0D90 = less(swizzle_x(r0D6C), swizzle_x(r0D6B));
+ ir_expression *const r0D91 = logic_and(r0D8F, r0D90);
+ body.emit(assign(r0D8B, logic_or(r0D8E, r0D91), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D8C->else_instructions;
+
+ ir_expression *const r0D92 = less(swizzle_y(r0D6B), swizzle_y(r0D6C));
+ ir_expression *const r0D93 = equal(swizzle_y(r0D6B), swizzle_y(r0D6C));
+ ir_expression *const r0D94 = less(swizzle_x(r0D6B), swizzle_x(r0D6C));
+ ir_expression *const r0D95 = logic_and(r0D93, r0D94);
+ body.emit(assign(r0D8B, logic_or(r0D92, r0D95), 0x01));
+
+
+ body.instructions = f0D8C_parent_instructions;
+ body.emit(f0D8C);
+
+ /* END IF */
+
+ body.emit(assign(r0D6E, r0D8B, 0x01));
+
+
+ body.instructions = f0D83_parent_instructions;
+ body.emit(f0D83);
+
+ /* END IF */
+
+
+ body.instructions = f0D7F_parent_instructions;
+ body.emit(f0D7F);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0D96 = new(mem_ctx) ir_if(operand(r0D6E).val);
+ exec_list *const f0D96_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D96->then_instructions;
+
+ body.emit(assign(r0D6D, r0D6C, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D96->else_instructions;
+
+ body.emit(assign(r0D6D, r0D6B, 0x03));
+
+
+ body.instructions = f0D96_parent_instructions;
+ body.emit(f0D96);
+
+ /* END IF */
+
+ body.emit(ret(r0D6D));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
diff --git a/src/compiler/glsl/builtin_functions.cpp b/src/compiler/glsl/builtin_functions.cpp
index 722425f09a7..7fa757435c5 100644
--- a/src/compiler/glsl/builtin_functions.cpp
+++ b/src/compiler/glsl/builtin_functions.cpp
@@ -3393,6 +3393,13 @@ builtin_builder::create_builtins()
generate_ir::frcp64(mem_ctx, integer_functions_supported),
NULL);
+ add_function("__builtin_fmin64",
+ generate_ir::fmin64(mem_ctx, integer_functions_supported),
+ NULL);
+ add_function("__builtin_fmax64",
+ generate_ir::fmax64(mem_ctx, integer_functions_supported),
+ NULL);
+
#undef F
#undef FI
#undef FIUD_VEC
diff --git a/src/compiler/glsl/builtin_functions.h b/src/compiler/glsl/builtin_functions.h
index a418e57e78e..6d1f080b522 100644
--- a/src/compiler/glsl/builtin_functions.h
+++ b/src/compiler/glsl/builtin_functions.h
@@ -118,6 +118,11 @@ fround64(void *mem_ctx, builtin_available_predicate avail);
ir_function_signature *
frcp64(void *mem_ctx, builtin_available_predicate avail);
+ir_function_signature *
+fmin64(void *mem_ctx, builtin_available_predicate avail);
+
+ir_function_signature *
+fmax64(void *mem_ctx, builtin_available_predicate avail);
}
#endif /* BULITIN_FUNCTIONS_H */
diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl
index af30e026f1c..61d76591755 100644
--- a/src/compiler/glsl/float64.glsl
+++ b/src/compiler/glsl/float64.glsl
@@ -1453,3 +1453,23 @@ frcp64(uvec2 a)
return fp32_to_fp64(1.0/fp64_to_fp32(a));
}
+
+uvec2
+fmin64(uvec2 a, uvec2 b)
+{
+ if (flt64(a, b)) {
+ return a;
+ } else {
+ return b;
+ }
+}
+
+uvec2
+fmax64(uvec2 a, uvec2 b)
+{
+ if (flt64(a, b)) {
+ return b;
+ } else {
+ return a;
+ }
+}
diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimization.h
index d72d88639cf..0bb2bb800e2 100644
--- a/src/compiler/glsl/ir_optimization.h
+++ b/src/compiler/glsl/ir_optimization.h
@@ -81,6 +81,7 @@
#define TRUNC64 (1U << 17)
#define ROUND64 (1U << 18)
#define RCP64 (1U << 19)
+#define MINMAX64 (1U << 20)
/**
* \see class lower_packing_builtins_visitor
diff --git a/src/compiler/glsl/lower_64bit.cpp b/src/compiler/glsl/lower_64bit.cpp
index 72349f62659..648aa0d135b 100644
--- a/src/compiler/glsl/lower_64bit.cpp
+++ b/src/compiler/glsl/lower_64bit.cpp
@@ -654,6 +654,19 @@ lower_64bit_visitor::handle_rvalue(ir_rvalue **rvalue)
*rvalue = handle_op(ir, "__builtin_feq64", generate_ir::feq64);
}
}
+ case ir_binop_min:
+ if (lowering(MINMAX64)) {
+ if (ir->operands[0]->type->base_type == GLSL_TYPE_DOUBLE) {
+ *rvalue = handle_op(ir, "__builtin_fmin64", generate_ir::fmin64);
+ }
+ }
+ break;
+ case ir_binop_max:
+ if (lowering(MINMAX64)) {
+ if (ir->operands[0]->type->base_type == GLSL_TYPE_DOUBLE) {
+ *rvalue = handle_op(ir, "__builtin_fmax64", generate_ir::fmax64);
+ }
+ }
break;
default:
break;
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 96d708b73c0..15062819e6c 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -7084,7 +7084,7 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
SQRT64 |
TRUNC64 |
ROUND64 |
- RCP64;
+ RCP64 | MINMAX64;
lower_64bit_double_instructions(ir, lower_inst);
}