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authorLiu Ying <gnuiyl@gmail.com>2016-03-14 16:10:08 +0800
committerPhilipp Zabel <p.zabel@pengutronix.de>2016-03-31 11:24:30 +0200
commit32c26a56af3ae823a883e926b96e3ff00854e6a8 (patch)
tree6e7e595a598a4921a2fb047a4bbf4a2e56ddd156 /drivers/gpu/ipu-v3
parent1cc9daea2a79720cdd8b13ce97515bf1b2b41939 (diff)
gpu: ipu-v3: ipu-dmfc: Protect function ipu_dmfc_init_channel() with mutex
To avoid race condition issue, we should protect the function ipu_dmfc_init_channel() with the mutex dmfc->priv->mutex, since it configures the register DMFC_GENERAL1 at runtime which contains several control bits for various display channels. This matches better with fine grained locking logic in upper layer. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/gpu/ipu-v3')
-rw-r--r--drivers/gpu/ipu-v3/ipu-dmfc.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-dmfc.c b/drivers/gpu/ipu-v3/ipu-dmfc.c
index 042c3958e2a0..129ccfa9d1d6 100644
--- a/drivers/gpu/ipu-v3/ipu-dmfc.c
+++ b/drivers/gpu/ipu-v3/ipu-dmfc.c
@@ -355,6 +355,8 @@ int ipu_dmfc_init_channel(struct dmfc_channel *dmfc, int width)
struct ipu_dmfc_priv *priv = dmfc->priv;
u32 dmfc_gen1;
+ mutex_lock(&priv->mutex);
+
dmfc_gen1 = readl(priv->base + DMFC_GENERAL1);
if ((dmfc->slots * 64 * 4) / width > dmfc->data->max_fifo_lines)
@@ -364,6 +366,8 @@ int ipu_dmfc_init_channel(struct dmfc_channel *dmfc, int width)
writel(dmfc_gen1, priv->base + DMFC_GENERAL1);
+ mutex_unlock(&priv->mutex);
+
return 0;
}
EXPORT_SYMBOL_GPL(ipu_dmfc_init_channel);