diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2014-11-07 13:24:54 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-11-12 11:56:43 -0500 |
| commit | b6b41cf3b64f88472f08276a90248a6fa36ee8c7 (patch) | |
| tree | 2220dc501416b3210ef2e66b5cb7b524d7cca1d9 /drivers/gpu/drm/radeon/ci_dpm.c | |
| parent | 36654dd4b9b9dd65143095ca48f5b9c846b13e0b (diff) | |
drm/radeon: fix default dpm state setup
Only enable the first levels for mclk and sclk.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/ci_dpm.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/ci_dpm.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c index aad64770ee55..dbc6d2aa6d22 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c @@ -3062,19 +3062,21 @@ static int ci_setup_default_dpm_tables(struct radeon_device *rdev) allowed_sclk_vddc_table->entries[i].clk)) { pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value = allowed_sclk_vddc_table->entries[i].clk; - pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled = true; + pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled = + (i == 0) ? true : false; pi->dpm_table.sclk_table.count++; } } pi->dpm_table.mclk_table.count = 0; for (i = 0; i < allowed_mclk_table->count; i++) { - if ((i==0) || + if ((i == 0) || (pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value != allowed_mclk_table->entries[i].clk)) { pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value = allowed_mclk_table->entries[i].clk; - pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled = true; + pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled = + (i == 0) ? true : false; pi->dpm_table.mclk_table.count++; } } |