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authorAlex Deucher <alexander.deucher@amd.com>2013-03-28 10:46:29 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-06-27 19:40:07 -0400
commit72dd2c54ee630701608c08fd85e0eaf75336e31c (patch)
tree4de60c6912f8a3db5b3df329c00d9415894d88c1 /drivers/gpu/drm/radeon/btc_dpm.c
parent2c48febb47c60df91775366eb8c65556a1cdb3c8 (diff)
drm/radeon/dpm: add dpm_set_power_state failure output (7xx-ni)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/btc_dpm.c')
-rw-r--r--drivers/gpu/drm/radeon/btc_dpm.c29
1 files changed, 21 insertions, 8 deletions
diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c
index 4a50b508d302..0cbf75e07849 100644
--- a/drivers/gpu/drm/radeon/btc_dpm.c
+++ b/drivers/gpu/drm/radeon/btc_dpm.c
@@ -2274,44 +2274,57 @@ int btc_dpm_set_power_state(struct radeon_device *rdev)
ret = btc_disable_ulv(rdev);
btc_set_boot_state_timing(rdev);
ret = rv770_restrict_performance_levels_before_switch(rdev);
- if (ret)
+ if (ret) {
+ DRM_ERROR("rv770_restrict_performance_levels_before_switch failed\n");
return ret;
+ }
if (eg_pi->pcie_performance_request)
cypress_notify_link_speed_change_before_state_change(rdev, new_ps, old_ps);
rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
ret = rv770_halt_smc(rdev);
- if (ret)
+ if (ret) {
+ DRM_ERROR("rv770_halt_smc failed\n");
return ret;
+ }
btc_set_at_for_uvd(rdev, new_ps);
if (eg_pi->smu_uvd_hs)
btc_notify_uvd_to_smc(rdev, new_ps);
ret = cypress_upload_sw_state(rdev, new_ps);
- if (ret)
+ if (ret) {
+ DRM_ERROR("cypress_upload_sw_state failed\n");
return ret;
-
+ }
if (eg_pi->dynamic_ac_timing) {
ret = cypress_upload_mc_reg_table(rdev, new_ps);
- if (ret)
+ if (ret) {
+ DRM_ERROR("cypress_upload_mc_reg_table failed\n");
return ret;
+ }
}
cypress_program_memory_timing_parameters(rdev, new_ps);
ret = rv770_resume_smc(rdev);
- if (ret)
+ if (ret) {
+ DRM_ERROR("rv770_resume_smc failed\n");
return ret;
+ }
ret = rv770_set_sw_state(rdev);
- if (ret)
+ if (ret) {
+ DRM_ERROR("rv770_set_sw_state failed\n");
return ret;
+ }
rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
if (eg_pi->pcie_performance_request)
cypress_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps);
ret = btc_set_power_state_conditionally_enable_ulv(rdev, new_ps);
- if (ret)
+ if (ret) {
+ DRM_ERROR("btc_set_power_state_conditionally_enable_ulv failed\n");
return ret;
+ }
#if 0
/* XXX */