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authorLen Brown <len.brown@intel.com>2009-01-09 03:39:43 -0500
committerLen Brown <len.brown@intel.com>2009-01-09 03:39:43 -0500
commitb2576e1d4408e134e2188c967b1f28af39cd79d4 (patch)
tree004f3c82faab760f304ce031d6d2f572e7746a50 /arch/sh/include/mach-se/mach/mrshpc.h
parent3cc8a5f4ba91f67bbdb81a43a99281a26aab8d77 (diff)
parent2150edc6c5cf00f7adb54538b9ea2a3e9cedca3f (diff)
Merge branch 'linus' into release
Diffstat (limited to 'arch/sh/include/mach-se/mach/mrshpc.h')
-rw-r--r--arch/sh/include/mach-se/mach/mrshpc.h52
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/sh/include/mach-se/mach/mrshpc.h b/arch/sh/include/mach-se/mach/mrshpc.h
new file mode 100644
index 000000000000..56287ee8563a
--- /dev/null
+++ b/arch/sh/include/mach-se/mach/mrshpc.h
@@ -0,0 +1,52 @@
+#ifndef __MACH_SE_MRSHPC_H
+#define __MACH_SE_MRSHPC_H
+
+#include <linux/io.h>
+
+static inline void __init mrshpc_setup_windows(void)
+{
+ if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0)
+ return; /* Not detected */
+
+ if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) {
+ __raw_writew(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
+ } else {
+ __raw_writew(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
+ }
+
+ /*
+ * PC-Card window open
+ * flag == COMMON/ATTRIBUTE/IO
+ */
+ /* common window open */
+ __raw_writew(0x8a84, MRSHPC_MW0CR1);
+ if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
+ /* common mode & bus width 16bit SWAP = 1*/
+ __raw_writew(0x0b00, MRSHPC_MW0CR2);
+ else
+ /* common mode & bus width 16bit SWAP = 0*/
+ __raw_writew(0x0300, MRSHPC_MW0CR2);
+
+ /* attribute window open */
+ __raw_writew(0x8a85, MRSHPC_MW1CR1);
+ if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
+ /* attribute mode & bus width 16bit SWAP = 1*/
+ __raw_writew(0x0a00, MRSHPC_MW1CR2);
+ else
+ /* attribute mode & bus width 16bit SWAP = 0*/
+ __raw_writew(0x0200, MRSHPC_MW1CR2);
+
+ /* I/O window open */
+ __raw_writew(0x8a86, MRSHPC_IOWCR1);
+ __raw_writew(0x0008, MRSHPC_CDCR); /* I/O card mode */
+ if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
+ __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
+ else
+ __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
+
+ __raw_writew(0x2000, MRSHPC_ICR);
+ __raw_writeb(0x00, PA_MRSHPC_MW2 + 0x206);
+ __raw_writeb(0x42, PA_MRSHPC_MW2 + 0x200);
+}
+
+#endif /* __MACH_SE_MRSHPC_H */