diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2013-05-09 17:56:40 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-09 17:56:40 +0200 |
commit | 5e0e61dd2c89c673f89fb57dcd3cc746dc0c1706 (patch) | |
tree | 5ebe6156cbc8620625b736a5c9f4d3f47e6d9ebc /arch/mips/include/asm/mmu_context.h | |
parent | 9b3539e0e545e4c2f338acfc1ce52033a6f5e7f7 (diff) | |
parent | 50c8308538dc9671490d6cb65259ef0ed79f5d13 (diff) |
Merge branch 'next/kvm' into mips-for-linux-next
Diffstat (limited to 'arch/mips/include/asm/mmu_context.h')
-rw-r--r-- | arch/mips/include/asm/mmu_context.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h index 952701c3ad2e..820116067c10 100644 --- a/arch/mips/include/asm/mmu_context.h +++ b/arch/mips/include/asm/mmu_context.h @@ -111,15 +111,21 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) static inline void get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) { + extern void kvm_local_flush_tlb_all(void); unsigned long asid = asid_cache(cpu); if (! ((asid += ASID_INC) & ASID_MASK) ) { if (cpu_has_vtag_icache) flush_icache_all(); +#ifdef CONFIG_VIRTUALIZATION + kvm_local_flush_tlb_all(); /* start new asid cycle */ +#else local_flush_tlb_all(); /* start new asid cycle */ +#endif if (!asid) /* fix version if needed */ asid = ASID_FIRST_VERSION; } + cpu_context(cpu, mm) = asid_cache(cpu) = asid; } |