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authorBenjamin Gaignard <benjamin.gaignard@linaro.org>2017-01-20 10:15:02 +0100
committerLee Jones <lee.jones@linaro.org>2017-01-23 12:02:54 +0000
commit8f9359c6c6a00b43273480a5cf5b0f240aa3b648 (patch)
tree4bd41a18329bdcd14df7060d4ce23818dfd59c7b /Documentation/devicetree/bindings/mfd
parent7ce7d89f48834cefece7804d38fc5d85382edf77 (diff)
dt-bindings: mfd: Add bindings for STM32 Timers driver
Add bindings information for STM32 Timers version 6: - rename stm32-gtimer to stm32-timers - change compatible - add description about the IPs version 2: - rename stm32-mfd-timer to stm32-gptimer - only keep one compatible string Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mfd')
-rw-r--r--Documentation/devicetree/bindings/mfd/stm32-timers.txt46
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diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
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+STM32 Timers driver bindings
+
+This IP provides 3 types of timer along with PWM functionality:
+- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable
+ prescaler, break input feature, PWM outputs and complementary PWM ouputs channels.
+- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a
+ programmable prescaler and PWM outputs.
+- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.
+
+Required parameters:
+- compatible: must be "st,stm32-timers"
+
+- reg: Physical base address and length of the controller's
+ registers.
+- clock-names: Set to "int".
+- clocks: Phandle to the clock used by the timer module.
+ For Clk properties, please refer to ../clock/clock-bindings.txt
+
+Optional parameters:
+- resets: Phandle to the parent reset controller.
+ See ../reset/st,stm32-rcc.txt
+
+Optional subnodes:
+- pwm: See ../pwm/pwm-stm32.txt
+- timer: See ../iio/timer/stm32-timer-trigger.txt
+
+Example:
+ timers@40010000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-timers";
+ reg = <0x40010000 0x400>;
+ clocks = <&rcc 0 160>;
+ clock-names = "clk_int";
+
+ pwm {
+ compatible = "st,stm32-pwm";
+ pinctrl-0 = <&pwm1_pins>;
+ pinctrl-names = "default";
+ };
+
+ timer@0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <0>;
+ };
+ };