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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-25 10:13:31 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-25 10:29:15 +0200
commitef12dab779acdb907eb4c3fa723e1c6f035ee13c (patch)
tree9e485157910e71dfc3243689b81bbb4b18e37942
parent31d8d651eb646498413abe5f17acc7fa2b68b2fc (diff)
drm/i915: tune down the noise of the RP irq limit fail
We still don't understand why this fails exactly, but if fails way too often for a simple debug information. Furthermore the current ducttape should prevent the gpu from getting stuck at low frequencies. Hence tune down the dmesg noise. Note that the known failure case is that the register read returns 0 when the gpu gets confused. v2: Add comments about the known failure case. Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 00462ef96627..d0ce2a5b1d3f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3603,8 +3603,9 @@ static void gen6_sanitize_pm(struct drm_device *dev)
limits |= (dev_priv->min_delay & 0x3f) << 16;
if (old != limits) {
- DRM_ERROR("Power management discrepancy: GEN6_RP_INTERRUPT_LIMITS expected %08x, was %08x\n",
- limits, old);
+ /* Note that the known failure case is to read back 0. */
+ DRM_DEBUG_DRIVER("Power management discrepancy: GEN6_RP_INTERRUPT_LIMITS "
+ "expected %08x, was %08x\n", limits, old);
I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);
}