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authorAdrian Hunter <adrian.hunter@intel.com>2014-11-04 12:42:35 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2014-11-10 12:40:48 +0100
commitc09df940ebe0167dcf13d52ea122c99b9bb8365a (patch)
tree4f980378e991c1cf72acd97f96f832f5d0d53047
parent76d5556428fbbdf411504895b516272cad27127d (diff)
mmc: sdhci: Fix incorrect ADMA2 descriptor table size
The ADMA2 descriptor table size was being calculated incorrectly Fix it. Note that it has been wrong for a long time and likely has not caused any problems because of a combination of 1) not needing alignment descriptors for block operations 2) more memory being allocated than was requested 3) the use of SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC which does not use an extra descriptor for the end marker. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r--drivers/mmc/host/sdhci.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 062222abf3df..41c6d3b9766c 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -44,7 +44,13 @@
#define MAX_TUNING_LOOP 40
-#define ADMA_SIZE ((128 * 2 + 1) * 4)
+/*
+ * The ADMA2 descriptor table size is calculated as the maximum number of
+ * segments (128), times 2 to allow for an alignment descriptor for each
+ * segment, plus 1 for a nop end descriptor, all multipled by the 32-bit
+ * descriptor size (8).
+ */
+#define ADMA_SIZE ((128 * 2 + 1) * 8)
static unsigned int debug_quirks = 0;
static unsigned int debug_quirks2;