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authorDuc Dang <dhdang@apm.com>2015-07-09 14:20:12 -0700
committerBjorn Helgaas <bhelgaas@google.com>2015-07-21 11:13:15 -0500
commit8ef54f27f6f425fa8deedc237d99b9daf41d68d2 (patch)
tree4890d18dca043182c90e231d0de21a3747892163
parent80bb3eda7475eb38b688d2e915c191ce6ad20df1 (diff)
PCI: xgene: Add support for a 64-bit prefetchable memory window
X-Gene PCIe controller has registers to support multiple memory ranges. Add support for a 64-bit prefetchable memory window. [bhelgaas: changelog] Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Tanmay Inamdar <tinamdar@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-rw-r--r--drivers/pci/host/pci-xgene.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c
index a9dfb70d623a..55fe86548d77 100644
--- a/drivers/pci/host/pci-xgene.c
+++ b/drivers/pci/host/pci-xgene.c
@@ -321,8 +321,16 @@ static int xgene_pcie_map_ranges(struct xgene_pcie_port *port,
return ret;
break;
case IORESOURCE_MEM:
- xgene_pcie_setup_ob_reg(port, res, OMR1BARL, res->start,
- res->start - window->offset);
+ if (res->flags & IORESOURCE_PREFETCH)
+ xgene_pcie_setup_ob_reg(port, res, OMR2BARL,
+ res->start,
+ res->start -
+ window->offset);
+ else
+ xgene_pcie_setup_ob_reg(port, res, OMR1BARL,
+ res->start,
+ res->start -
+ window->offset);
break;
case IORESOURCE_BUS:
break;