diff options
author | Pierre Ossman <pierre@ossman.eu> | 2008-12-04 23:29:31 +0100 |
---|---|---|
committer | Pierre Ossman <pierre@ossman.eu> | 2008-12-05 08:10:53 +0100 |
commit | 33638d9e388b330e2f4eb4debd05ba09924cf176 (patch) | |
tree | 5321988a75235f0559d9359b82bcd8aecbc498b2 /src/radeon_commonfuncs.c | |
parent | d1690f5cc096e2f735c8b407c370a1c1cd7a8afc (diff) |
Optimise RADEONWaitForVLine
Only avoid the vlines we are rendering to, instead of the entire
screen. This way we don't stall the card for longer than we
absolutely have to.
EXA calls fixed by Alex Deucher.
Diffstat (limited to 'src/radeon_commonfuncs.c')
-rw-r--r-- | src/radeon_commonfuncs.c | 49 |
1 files changed, 41 insertions, 8 deletions
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c index 7f32acd..c2f3451 100644 --- a/src/radeon_commonfuncs.c +++ b/src/radeon_commonfuncs.c @@ -636,7 +636,8 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) } /* inserts a wait for vline in the command stream */ -void FUNC_NAME(RADEONWaitForVLine)(ScrnInfoPtr pScrn, PixmapPtr pPix, int crtc) +void FUNC_NAME(RADEONWaitForVLine)(ScrnInfoPtr pScrn, PixmapPtr pPix, + int crtc, int start, int stop) { RADEONInfoPtr info = RADEONPTR(pScrn); xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); @@ -646,6 +647,9 @@ void FUNC_NAME(RADEONWaitForVLine)(ScrnInfoPtr pScrn, PixmapPtr pPix, int crtc) if ((crtc < 0) || (crtc > 1)) return; + if (stop < start) + return; + if (!xf86_config->crtc[crtc]->enabled) return; @@ -657,16 +661,45 @@ void FUNC_NAME(RADEONWaitForVLine)(ScrnInfoPtr pScrn, PixmapPtr pPix, int crtc) offset = pPix->devPrivate.ptr - info->FB; /* if drawing to front buffer */ - if (offset == 0) { - BEGIN_ACCEL(1); + if (offset != 0) + return; + + start = max(start, 0); + stop = max(stop, xf86_config->crtc[crtc]->mode.VDisplay); + + if (start > xf86_config->crtc[crtc]->mode.VDisplay) + return; + + BEGIN_ACCEL(2); + + if (IS_AVIVO_VARIANT) { + RADEONCrtcPrivatePtr radeon_crtc = xf86_config->crtc[crtc]->driver_private; + + OUT_ACCEL_REG(AVIVO_D1MODE_VLINE_START_END + radeon_crtc->crtc_offset, + ((start << AVIVO_D1MODE_VLINE_START_SHIFT) | + (stop << AVIVO_D1MODE_VLINE_END_SHIFT) | + AVIVO_D1MODE_VLINE_INV)); + } else { if (crtc == 0) - OUT_ACCEL_REG(RADEON_WAIT_UNTIL, (RADEON_WAIT_CRTC_VLINE | - RADEON_ENG_DISPLAY_SELECT_CRTC0)); + OUT_ACCEL_REG(RADEON_CRTC_GUI_TRIG_VLINE, + ((start << RADEON_CRTC_GUI_TRIG_VLINE_START_SHIFT) | + (stop << RADEON_CRTC_GUI_TRIG_VLINE_END_SHIFT) | + RADEON_CRTC_GUI_TRIG_VLINE_INV)); else - OUT_ACCEL_REG(RADEON_WAIT_UNTIL, (RADEON_WAIT_CRTC_VLINE | - RADEON_ENG_DISPLAY_SELECT_CRTC1)); - FINISH_ACCEL(); + OUT_ACCEL_REG(RADEON_CRTC2_GUI_TRIG_VLINE, + ((start << RADEON_CRTC_GUI_TRIG_VLINE_START_SHIFT) | + (stop << RADEON_CRTC_GUI_TRIG_VLINE_END_SHIFT) | + RADEON_CRTC_GUI_TRIG_VLINE_INV)); } + + if (crtc == 0) + OUT_ACCEL_REG(RADEON_WAIT_UNTIL, (RADEON_WAIT_CRTC_VLINE | + RADEON_ENG_DISPLAY_SELECT_CRTC0)); + else + OUT_ACCEL_REG(RADEON_WAIT_UNTIL, (RADEON_WAIT_CRTC_VLINE | + RADEON_ENG_DISPLAY_SELECT_CRTC1)); + + FINISH_ACCEL(); } /* MMIO: |