diff options
| author | Roland Scheidegger <sroland@tungstengraphics.com> | 2009-06-28 16:54:32 -0400 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2009-06-28 16:54:32 -0400 |
| commit | 407e676b04117c7ca3dcc0cc072f3552b03c64e5 (patch) | |
| tree | 31854486755b0ae18c221143db1b21a78f026da1 /src/r6xx_accel.c | |
| parent | 68001981f22173ff949720055dba89291f284474 (diff) | |
R6xx/R7xx: fix pixel centers
Make sure we are using GL mode (centers at 0.5) rather
than D3D mode (centers at 0.0). This also fixes fdo
bug 21963.
Diffstat (limited to 'src/r6xx_accel.c')
| -rw-r--r-- | src/r6xx_accel.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/r6xx_accel.c b/src/r6xx_accel.c index e9741cd..65834bf 100644 --- a/src/r6xx_accel.c +++ b/src/r6xx_accel.c @@ -974,7 +974,7 @@ set_default_state(ScrnInfoPtr pScrn, drmBufPtr ib) EREG(ib, PA_SU_POLY_OFFSET_FRONT_OFFSET, 0); EREG(ib, PA_SU_LINE_CNTL, (8 << PA_SU_LINE_CNTL__WIDTH_shift)); /* Line width 1 pixel */ - EREG(ib, PA_SU_VTX_CNTL, ((2 << PA_SU_VTX_CNTL__ROUND_MODE_shift) | + EREG(ib, PA_SU_VTX_CNTL, ((2 << PA_SU_VTX_CNTL__ROUND_MODE_shift) | PIX_CENTER_bit | (5 << QUANT_MODE_shift))); /* Round to Even, fixed point 1/256 */ EREG(ib, PA_SU_POLY_OFFSET_CLAMP, 0); |