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AgeCommit message (Expand)AuthorFilesLines
2020-12-07drm/amd/display: Avoid HDCP initialization in devices without outputamd-20.45Rodrigo Siqueira1-1/+1
2020-12-04PCI: Use ioremap(), not phys_to_virt() for platform ROMMikel Rychliski0-0/+0
2020-12-03PCI: Use ioremap(), not phys_to_virt() for platform ROMMikel Rychliski5-44/+52
2020-12-02drm/amdgpu: enable DCN for navi10 headless SKUTianci.Yin1-2/+1
2020-12-02drm/amdgpu: rename nv_is_headless_sku()Flora Cui1-3/+3
2020-12-02drm/amdgpu: disable DCN and VCN for Navi14 0x7340/C9 SKUFlora Cui1-2/+3
2020-12-02drm/amdgpu: disable DCN and VCN for navi10 blockchain SKU(v3)Tianci.Yin1-2/+12
2020-12-02drm/amdgpu: add DID for navi10 blockchain SKUTianci.Yin1-0/+1
2020-11-30drm/amdkfd: keep BOs in system memory if restore failedPhilip Yang1-2/+15
2020-11-25drm/amdgpu: increase reserved VRAM size to 8MBLikun Gao1-1/+1
2020-11-16drm/amd/pm: update driver if file for sienna cichlidLikun Gao3-29/+12
2020-11-11drm/amdgpu: add UMC to ip discovery mapJohn Clements1-0/+1
2020-11-10drm/amdgpu: disable bad page reservationJohn Clements2-7/+1
2020-11-03drm/amdgpu: resolved ASD loading issue on siennaJohn Clements1-0/+1
2020-11-02drm/amdkfd: Use same SQ prefetch setting as amdgpuJay Cornwall1-2/+3
2020-10-30Revert drm/amdgpu: disable sienna chichlid UMC RASJohn Clements1-2/+2
2020-10-22drm/amd/pm: fix the wrong fan speed in fan1_inputKenneth Feng1-8/+3
2020-10-22drm/amd/pm: fix pp_dpm_fclkKenneth Feng1-0/+3
2020-10-22drm/amd/pm: remove the average clock value in sysfsKenneth Feng1-4/+8
2020-10-22drm/amdgpu: correct the cu and rb info for sienna cichlidLikun Gao1-0/+9
2020-10-20drm/amd/pm: update driver if file for sienna cichlidLikun Gao2-3/+13
2020-10-20drm/amd/pm: fix pcie information for sienna cichlidLikun Gao1-2/+2
2020-10-19drm/amd/swsmu: correct wrong feature bit mappingKevin Wang1-10/+17
2020-10-16drm/amd/display: Add missing pflip irqBhawanpreet Lakha1-2/+2
2020-10-16drm/amdkcl: guard the change under drm version specifically for rhel distroShiwu Zhang2-0/+47
2020-10-16drm/amdgpu: update golden setting for sienna_cichlidLikun Gao1-0/+1
2020-10-16drm/amd/swsmu: add missing feature map for sienna_cichlidKevin Wang2-0/+4
2020-10-15drm/amdgpu: add rlc iram and dram firmware supportLikun Gao6-8/+66
2020-10-15drm/amdgpu: add function to program pbb mode for sienna cichlidLikun Gao1-0/+62
2020-10-09drm/amd/display: Avoid set zero in the requested clkRodrigo Siqueira1-2/+1
2020-10-09Revert "drm/amdgpu: Disable encoder UVD and VCE functionalities for Linux Gue...Guchun Chen1-1/+1
2020-10-09Revert "drm/amdgpu: Fix for timeout after TDR"Guchun Chen1-3/+0
2020-10-09Revert "drm/amdgpu/kcl: Fix centOS passthrough issue"Guchun Chen1-1/+1
2020-10-09Revert "drm/amdgpu: Fails on shutting down VM"Guchun Chen1-13/+6
2020-10-09Revert "drm/amdgpu: Correct the irq numbers for virtual ctrc"Guchun Chen1-1/+1
2020-10-08drm/amd/display: add copy of drm_dp_mst_add_affected_dsc_crtc()Bhawanpreet Lakha1-1/+48
2020-10-05drm/amd/display: Move disable interrupt into commit tailAurabindo Pillai1-38/+18
2020-10-05drm/amd/display: Refactor to prevent crtc state access in DM IRQ handlerAurabindo Pillai3-55/+70
2020-10-05drm/amdgpu: Move existing pflip fields into separate structAurabindo Pillai3-3/+38
2020-09-30drm/amdgpu: Use SKU instead of DID for FRU check v2Kent Russell1-11/+24
2020-09-25drm/amdgpu: clean up ras sysfs creation (v2)Guchun Chen1-56/+31
2020-09-25drm/amdgpu: disable sienna chichlid UMC RASJohn Clements1-2/+2
2020-09-24drm/amdgpu: Correct the irq numbers for virtual ctrcEmily Deng1-1/+1
2020-09-22drm/amdgpu: Fails on shutting down VMVictor1-6/+13
2020-09-22drm/amdgpu/kcl: Fix centOS passthrough issueEmily Deng1-1/+1
2020-09-22drm/amdgpu: Fix for timeout after TDRBojan Radovic1-0/+3
2020-09-22drm/amdgpu: Disable encoder UVD and VCE functionalities for Linux Guest Virtu...Surbhi Kakarya1-1/+1
2020-09-22drm/amd/pm: update driver if file for sienna cichlidLikun Gao2-3/+3
2020-09-22drm/amd/pm: update driver if file for sienna cichlidLikun Gao3-11/+16
2020-09-21drm/amdgpu: add device ID for sienna_cichlid (v2)Likun Gao1-0/+8
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