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path: root/src/i965_render.c
AgeCommit message (Expand)AuthorFilesLines
2011-05-09Add support for Ivybridge chipset.Eric Anholt1-0/+4
2011-04-07Revert "i965: Convert to relative relocations for state"Chris Wilson1-375/+435
2011-04-07i965: Avoid transform overheads for vertex emit where possibleChris Wilson1-115/+247
2011-04-07i965: Refactor to use constant sampler_state offsetsChris Wilson1-139/+141
2011-04-04i965: Reset vertex_id after every batchChris Wilson1-10/+7
2011-04-04i965: Always update last_floats_per_vertexChris Wilson1-2/+1
2011-04-04Take advantage of the kernel flush for dirty bo in the busy ioctlChris Wilson1-2/+2
2011-04-04i965: segregate each vertex element into its own bufferChris Wilson1-147/+167
2011-04-04i965: Convert to relative relocations for stateChris Wilson1-624/+452
2011-02-17Fix IGD and IGDNG constants to be comprehensibleAdam Jackson1-3/+3
2011-01-04i965: Fix off-by-one in assertChris Wilson1-2/+1
2010-12-07Revert "i965: The RenderCache flush after every glyph is required for compiz"Chris Wilson1-1/+1
2010-12-07i965: Mark sure we mark reused render targets as dirtyChris Wilson1-19/+16
2010-12-07i965: The RenderCache flush after every glyph is required for compizChris Wilson1-1/+1
2010-12-06snb: Only emit CC and DepthStencil bos once per batchChris Wilson1-31/+37
2010-12-06snb: Restore drawrect, we need the implicit flushChris Wilson1-1/+2
2010-12-06snb: Cache pixmap binding locationsChris Wilson1-0/+18
2010-12-06snb: Cache state between composite opsChris Wilson1-16/+71
2010-12-06snb: Emit more invariants only onceChris Wilson1-75/+65
2010-12-05i965: Also flush the vertex buffer when restarting the array.Chris Wilson1-0/+1
2010-12-05i965: Check for potential vertex array overflow every timeChris Wilson1-12/+12
2010-12-03i965: Amalgamate surface binding tablesChris Wilson1-230/+173
2010-12-03i965: Upload an entire vbo in a single pwrite, rather than per-rectangleChris Wilson1-141/+118
2010-12-03i965: Use reciprocal scale factors to avoid the divide per-vertex-elementChris Wilson1-16/+16
2010-11-09i915: Disable maximum state addressesChris Wilson1-5/+5
2010-11-02render: acceleration for composite on SandybridgeXiang, Haihao1-16/+670
2010-11-02render: set the surface state base addressXiang, Haihao1-51/+24
2010-10-07Include a chipset generation number to clarify device specific paths.Chris Wilson1-15/+15
2010-09-22Make driver compile for 1.6 Xserver series again.Matthias Hopf1-0/+4
2010-06-25Rename common infrastructure to the intel namespace.Chris Wilson1-21/+21
2010-06-25i810: Move into a legacy directory.Chris Wilson1-1/+2
2010-06-21i965: Compile fix.Chris Wilson1-1/+1
2010-06-21i965: Mark the render target as dirty within composite_setup()Chris Wilson1-4/+12
2010-06-21Emit the flush after a potential draw from the BlockHandler.Chris Wilson1-2/+2
2010-06-14i965: Sanity check ComponentAlpha status in prepare_compositeChris Wilson1-0/+16
2010-06-09Revert "xp:trapezoids"Chris Wilson1-0/+2
2010-06-08xp:trapezoidsChris Wilson1-2/+0
2010-05-26i965: Remove ATOMIC_BATCH.Chris Wilson1-2/+0
2010-05-26Add a workaround for Ironlake errata relating to disabling the clipper.Eric Anholt1-0/+9
2010-05-24uxa: Use temporary dest when target is too large for compositorChris Wilson1-2/+5
2010-05-24Kill paranoid assertions on every write into the batchbuffer.Chris Wilson1-14/+1
2010-05-11i965: Add texformats mapping for additional pixman formatsChris Wilson1-4/+16
2010-05-10uxa: Rearrange checking and preparing of composite textures.Chris Wilson1-56/+52
2010-02-23Add initial defines and probing for SandybridgeEric Anholt1-0/+6
2010-01-08i965: Ensure that URB_FENCE is aligned to 64-bytesChris Wilson1-10/+21
2009-12-08i965: Only use the affine kernels if both src and mask are affineChris Wilson1-1/+1
2009-12-08i965: Set src_filter before testing.Chris Wilson1-2/+2
2009-12-08i965: Maximum number of vertices per composite is 24, not 18Chris Wilson1-2/+1
2009-12-07batch: Ensure we send a MI_FLUSH in the block handler for TFPChris Wilson1-3/+3
2009-12-02Remove flush parameter from intel_batch_flush()Chris Wilson1-2/+2
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