diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2013-03-27 16:56:10 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2013-03-27 16:58:41 +0000 |
| commit | 19dfa72c28c6dc677dbfec3a538d4481985195e5 (patch) | |
| tree | c375f6f1bb4cb8765aef963c6a8a6580a1a41891 /src/sna/gen5_render.c | |
| parent | d9b8c2039d1be17af8c56364341fc3e10795f200 (diff) | |
sna/gen4+: Set read-write allocation mode for the target render cache
As we often first clear the destination before performing a blend, we
get a performance boost if that first write populates the render cache.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/sna/gen5_render.c')
| -rw-r--r-- | src/sna/gen5_render.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/sna/gen5_render.c b/src/sna/gen5_render.c index 8b50d22e..7038444d 100644 --- a/src/sna/gen5_render.c +++ b/src/sna/gen5_render.c @@ -490,7 +490,7 @@ gen5_bind_bo(struct sna *sna, /* After the first bind, we manage the cache domains within the batch */ if (!DBG_NO_SURFACE_CACHE) { - offset = kgem_bo_get_binding(bo, format); + offset = kgem_bo_get_binding(bo, format | is_dst << 31); if (offset) { if (is_dst) kgem_bo_mark_dirty(bo); @@ -506,9 +506,10 @@ gen5_bind_bo(struct sna *sna, GEN5_SURFACE_BLEND_ENABLED | format << GEN5_SURFACE_FORMAT_SHIFT); - if (is_dst) + if (is_dst) { + ss[0] |= GEN5_SURFACE_RC_READ_WRITE; domains = I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER; - else + } else domains = I915_GEM_DOMAIN_SAMPLER << 16; ss[1] = kgem_add_reloc(&sna->kgem, offset + 1, bo, domains, 0); @@ -519,7 +520,7 @@ gen5_bind_bo(struct sna *sna, ss[4] = 0; ss[5] = 0; - kgem_bo_set_binding(bo, format, offset); + kgem_bo_set_binding(bo, format | is_dst << 31, offset); DBG(("[%x] bind bo(handle=%d, addr=%d), format=%d, width=%d, height=%d, pitch=%d, tiling=%d -> %s\n", offset, bo->handle, ss[1], |