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| author | Alan Coopersmith <alan.coopersmith@oracle.com> | 2013-07-06 10:00:44 -0700 |
|---|---|---|
| committer | Alan Coopersmith <alan.coopersmith@oracle.com> | 2013-07-06 10:03:32 -0700 |
| commit | 883acb4bf30735c7d8f3147341345fa9e3bc76b2 (patch) | |
| tree | 25132d15eafb1091517559ead23741e9daeacf5a | |
| parent | 3773eea8d4e22aaedf675051e5e96af53b925152 (diff) | |
Solaris: Remove #defines for Ultra 45 southbridge device ids
Workaround for these chipsets was removed in commit d76fb36d9c28be0f7c
with the switch of probing methods from the PCI address poking that upset
them to using the already collected data from the kernel via devinfo,
but the #define to identify them was left behind unused - remove it too.
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
| -rw-r--r-- | src/solx_devfs.c | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/src/solx_devfs.c b/src/solx_devfs.c index df64e71..b365de9 100644 --- a/src/solx_devfs.c +++ b/src/solx_devfs.c @@ -113,26 +113,6 @@ static size_t nexus_count = 0; #define MAPPING_DEV_PATH(dev) (((struct pci_device_private *) dev)->device_string) #endif -/* - * Identify problematic southbridges. These have device id 0x5249 and - * vendor id 0x10b9. Check for revision ID 0 and class code 060400 as well. - * Values are little endian, so they are reversed for SPARC. - * - * Check for these southbridges on all architectures, as the issue is a - * southbridge issue, independent of processor. - * - * If one of these is found during probing, skip probing other devs/funcs on - * the rest of the bus, since the southbridge and all devs underneath will - * otherwise disappear. - */ -#if (NATIVE_ENDIAN == PCITOOL_ACC_ATTR_ENDN_BIG) -# define U45_SB_DEVID_VID 0xb9104952 -# define U45_SB_CLASS_RID 0x00000406 -#else -# define U45_SB_DEVID_VID 0x524910b9 -# define U45_SB_CLASS_RID 0x06040000 -#endif - static nexus_t * find_nexus_for_bus( int domain, int bus ) { |